Peter Drescher / SPI_TFT

Library to control a QVGA TFT connected to SPI. You can use printf to print text The lib can handle different fonts, draw lines, circles, rect and bmp

Dependents:   TFT_Test1 SourceCodePro31-SB Mandelbrot Mindwave-screen ... more

See http://mbed.org/cookbook/SPI-driven-QVGA-TFT for details.

SPI_TFT.cpp@17:d7e48335953e, 2013-10-18 (annotated)

Committer:
dreschpe
Date:
Fri Oct 18 09:11:57 2013 +0000
Revision:
17:d7e48335953e
Parent:
12:9de056a58793 
Better circle function from Michael Ammann

Who changed what in which revision?

UserRevisionLine numberNew contents of line
dreschpe 8:65a4de035c3c 1 /* mbed library for 240*320 pixel display TFT based on HX8347D LCD Controller
dreschpe 8:65a4de035c3c 2 * Copyright (c) 2011 Peter Drescher - DC2PD
dreschpe 8:65a4de035c3c 3 *
dreschpe 8:65a4de035c3c 4 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
dreschpe 8:65a4de035c3c 5 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
dreschpe 8:65a4de035c3c 6 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
dreschpe 8:65a4de035c3c 7 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
dreschpe 8:65a4de035c3c 8 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
dreschpe 8:65a4de035c3c 9 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
dreschpe 8:65a4de035c3c 10 * THE SOFTWARE.
dreschpe 8:65a4de035c3c 11 */
dreschpe 8:65a4de035c3c 12
dreschpe 8:65a4de035c3c 13
dreschpe 8:65a4de035c3c 14 // fix bmp padding for Bitmap function
dreschpe 8:65a4de035c3c 15 // speed up pixel
dreschpe 8:65a4de035c3c 16 // 30.12.11 fix cls
dreschpe 8:65a4de035c3c 17 // 11.03.12 use DMA to speed up
dreschpe 8:65a4de035c3c 18 // 15.03.12 use SSEL for TFT CS to enable DMA Register writes
dreschpe 8:65a4de035c3c 19 // 06.04.12 fix SSEL CS problem
dreschpe 8:65a4de035c3c 20 // 06.04.12 use direct access to the spi register to speed up the library.
dreschpe 8:65a4de035c3c 21 // 11.09.12 switch back to using io pin as cs to avoid problems with SSEL CS.
dreschpe 8:65a4de035c3c 22 // 21.09.12 fix Bug in BMP_16
dreschpe 8:65a4de035c3c 23 // 11.10.12 patch from Hans Bergles to get SPI1 working again
dreschpe 8:65a4de035c3c 24 // 03.02.13 add a switch to switch off DMA use for LPC11U24
dreschpe 17:d7e48335953e 25 // 18.10.13 Better Circle function from Michael Ammann
dreschpe 8:65a4de035c3c 26
dreschpe 8:65a4de035c3c 27 #include "SPI_TFT.h"
dreschpe 8:65a4de035c3c 28 #include "mbed.h"
dreschpe 8:65a4de035c3c 29
dreschpe 8:65a4de035c3c 30 #define BPP 16 // Bits per pixel
dreschpe 8:65a4de035c3c 31
dreschpe 8:65a4de035c3c 32 #if defined TARGET_LPC1768
dreschpe 9:a63fd1ad41b0 33 #define USE_DMA // we use dma to speed up
dreschpe 9:a63fd1ad41b0 34 #define NO_MBED_LIB // we write direct to the SPI register to speed up
dreschpe 8:65a4de035c3c 35 #endif
dreschpe 8:65a4de035c3c 36
dreschpe 8:65a4de035c3c 37 #if defined NO_DMA
dreschpe 8:65a4de035c3c 38 #undef USE_DMA
dreschpe 8:65a4de035c3c 39 #endif
dreschpe 9:a63fd1ad41b0 40
dreschpe 8:65a4de035c3c 41
dreschpe 8:65a4de035c3c 42 //extern Serial pc;
dreschpe 8:65a4de035c3c 43 //extern DigitalOut xx; // debug !!
dreschpe 8:65a4de035c3c 44
dreschpe 8:65a4de035c3c 45 SPI_TFT::SPI_TFT(PinName mosi, PinName miso, PinName sclk, PinName cs, PinName reset, const char *name)
dreschpe 8:65a4de035c3c 46 : _spi(mosi, miso, sclk), _cs(cs), _reset(reset),GraphicsDisplay(name)
dreschpe 8:65a4de035c3c 47 {
dreschpe 8:65a4de035c3c 48 orientation = 0;
dreschpe 8:65a4de035c3c 49 char_x = 0;
dreschpe 8:65a4de035c3c 50 if (mosi == p11 || mosi == P0_18) spi_port = 0; // we must know the used SPI port to setup the DMA
dreschpe 8:65a4de035c3c 51 else spi_port = 1;
dreschpe 8:65a4de035c3c 52 tft_reset();
dreschpe 8:65a4de035c3c 53 }
dreschpe 8:65a4de035c3c 54
dreschpe 8:65a4de035c3c 55 int SPI_TFT::width()
dreschpe 8:65a4de035c3c 56 {
dreschpe 8:65a4de035c3c 57 if (orientation == 0 || orientation == 2) return 240;
dreschpe 8:65a4de035c3c 58 else return 320;
dreschpe 8:65a4de035c3c 59 }
dreschpe 8:65a4de035c3c 60
dreschpe 8:65a4de035c3c 61
dreschpe 8:65a4de035c3c 62 int SPI_TFT::height()
dreschpe 8:65a4de035c3c 63 {
dreschpe 8:65a4de035c3c 64 if (orientation == 0 || orientation == 2) return 320;
dreschpe 8:65a4de035c3c 65 else return 240;
dreschpe 8:65a4de035c3c 66 }
dreschpe 8:65a4de035c3c 67
dreschpe 8:65a4de035c3c 68
dreschpe 8:65a4de035c3c 69 void SPI_TFT::set_orientation(unsigned int o)
dreschpe 8:65a4de035c3c 70 {
dreschpe 8:65a4de035c3c 71 orientation = o;
dreschpe 8:65a4de035c3c 72 switch (orientation) {
dreschpe 8:65a4de035c3c 73 case 0:
dreschpe 8:65a4de035c3c 74 wr_reg(0x16, 0x08);
dreschpe 8:65a4de035c3c 75 break;
dreschpe 8:65a4de035c3c 76 case 1:
dreschpe 8:65a4de035c3c 77 wr_reg(0x16, 0x68);
dreschpe 8:65a4de035c3c 78 break;
dreschpe 8:65a4de035c3c 79 case 2:
dreschpe 8:65a4de035c3c 80 wr_reg(0x16, 0xC8);
dreschpe 8:65a4de035c3c 81 break;
dreschpe 8:65a4de035c3c 82 case 3:
dreschpe 8:65a4de035c3c 83 wr_reg(0x16, 0xA8);
dreschpe 8:65a4de035c3c 84 break;
dreschpe 8:65a4de035c3c 85 }
dreschpe 8:65a4de035c3c 86 WindowMax();
dreschpe 8:65a4de035c3c 87 }
dreschpe 8:65a4de035c3c 88
dreschpe 8:65a4de035c3c 89
dreschpe 8:65a4de035c3c 90 // write command to tft register
dreschpe 8:65a4de035c3c 91
dreschpe 8:65a4de035c3c 92 void SPI_TFT::wr_cmd(unsigned char cmd)
dreschpe 8:65a4de035c3c 93 {
dreschpe 8:65a4de035c3c 94 unsigned short spi_d;
dreschpe 8:65a4de035c3c 95 spi_d = 0x7000 | cmd ;
dreschpe 8:65a4de035c3c 96 _cs = 0;
dreschpe 9:a63fd1ad41b0 97 #if defined NO_MBED_LIB
dreschpe 8:65a4de035c3c 98 if (spi_port == 0) { // TFT on SSP0
dreschpe 8:65a4de035c3c 99 LPC_SSP0->DR = spi_d;
dreschpe 8:65a4de035c3c 100 // we have to wait for SPI IDLE to set CS back to high
dreschpe 8:65a4de035c3c 101 do {
dreschpe 8:65a4de035c3c 102 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI0 not idle
dreschpe 8:65a4de035c3c 103 } else {
dreschpe 8:65a4de035c3c 104 LPC_SSP1->DR = spi_d;
dreschpe 8:65a4de035c3c 105 do {
dreschpe 8:65a4de035c3c 106 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI1 not idle
dreschpe 8:65a4de035c3c 107 }
dreschpe 9:a63fd1ad41b0 108 #else
dreschpe 9:a63fd1ad41b0 109 _spi.write(spi_d); // mbed lib
dreschpe 9:a63fd1ad41b0 110 #endif
dreschpe 8:65a4de035c3c 111 _cs = 1;
dreschpe 8:65a4de035c3c 112 }
dreschpe 8:65a4de035c3c 113
dreschpe 8:65a4de035c3c 114
dreschpe 8:65a4de035c3c 115
dreschpe 8:65a4de035c3c 116 void SPI_TFT::wr_dat(unsigned char dat)
dreschpe 8:65a4de035c3c 117 {
dreschpe 8:65a4de035c3c 118 unsigned short spi_d;
dreschpe 8:65a4de035c3c 119 spi_d = 0x7200 | dat;
dreschpe 8:65a4de035c3c 120 _cs = 0;
dreschpe 9:a63fd1ad41b0 121 #if defined NO_MBED_LIB
dreschpe 8:65a4de035c3c 122 if (spi_port == 0) { // TFT on SSP0
dreschpe 8:65a4de035c3c 123 LPC_SSP0->DR = spi_d;
dreschpe 8:65a4de035c3c 124 // we have to wait for SPI IDLE to set CS back to high
dreschpe 8:65a4de035c3c 125 do {
dreschpe 8:65a4de035c3c 126 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI0 not idle
dreschpe 8:65a4de035c3c 127 } else {
dreschpe 8:65a4de035c3c 128 LPC_SSP1->DR = spi_d;
dreschpe 8:65a4de035c3c 129 do {
dreschpe 8:65a4de035c3c 130 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI1 not idle
dreschpe 8:65a4de035c3c 131 }
dreschpe 9:a63fd1ad41b0 132 #else
dreschpe 9:a63fd1ad41b0 133 _spi.write(spi_d); // mbed lib
dreschpe 9:a63fd1ad41b0 134 #endif
dreschpe 8:65a4de035c3c 135 _cs = 1;
dreschpe 8:65a4de035c3c 136 }
dreschpe 8:65a4de035c3c 137
dreschpe 8:65a4de035c3c 138
dreschpe 8:65a4de035c3c 139
dreschpe 8:65a4de035c3c 140 // the HX8347-D controller do not use the MISO (SDO) Signal.
dreschpe 8:65a4de035c3c 141 // This is a bug - ?
dreschpe 8:65a4de035c3c 142 // A read will return 0 at the moment
dreschpe 8:65a4de035c3c 143
dreschpe 8:65a4de035c3c 144 unsigned short SPI_TFT::rd_dat (void)
dreschpe 8:65a4de035c3c 145 {
dreschpe 8:65a4de035c3c 146 unsigned short val = 0;
dreschpe 8:65a4de035c3c 147
dreschpe 8:65a4de035c3c 148 //val = _spi.write(0x73ff); /* Dummy read 1 */
dreschpe 8:65a4de035c3c 149 //val = _spi.write(0x0000); /* Read D8..D15 */
dreschpe 8:65a4de035c3c 150 return (val);
dreschpe 8:65a4de035c3c 151 }
dreschpe 8:65a4de035c3c 152
dreschpe 8:65a4de035c3c 153 void SPI_TFT::wr_reg (unsigned char reg, unsigned char val)
dreschpe 8:65a4de035c3c 154 {
dreschpe 8:65a4de035c3c 155 wr_cmd(reg);
dreschpe 8:65a4de035c3c 156 wr_dat(val);
dreschpe 8:65a4de035c3c 157 }
dreschpe 8:65a4de035c3c 158
dreschpe 8:65a4de035c3c 159 unsigned short SPI_TFT::rd_reg (unsigned char reg)
dreschpe 8:65a4de035c3c 160 {
dreschpe 8:65a4de035c3c 161 wr_cmd(reg);
dreschpe 8:65a4de035c3c 162 return(rd_dat());
dreschpe 8:65a4de035c3c 163 }
dreschpe 8:65a4de035c3c 164
dreschpe 8:65a4de035c3c 165 void SPI_TFT::tft_reset()
dreschpe 8:65a4de035c3c 166 {
dreschpe 8:65a4de035c3c 167 //static unsigned short driverCode;
dreschpe 8:65a4de035c3c 168 _spi.format(16,3); // 16 bit spi mode 3
dreschpe 8:65a4de035c3c 169 _spi.frequency(48000000); // 48 Mhz SPI clock
dreschpe 8:65a4de035c3c 170 _cs = 1; // cs high
dreschpe 8:65a4de035c3c 171 _reset = 0; // display reset
dreschpe 8:65a4de035c3c 172
dreschpe 8:65a4de035c3c 173 wait_us(50);
dreschpe 8:65a4de035c3c 174 _reset = 1; // end reset
dreschpe 8:65a4de035c3c 175 wait_ms(5);
dreschpe 8:65a4de035c3c 176
dreschpe 8:65a4de035c3c 177 /* Start Initial Sequence ----------------------------------------------------*/
dreschpe 8:65a4de035c3c 178 wr_reg(0xEA, 0x00); /* Reset Power Control 1 */
dreschpe 8:65a4de035c3c 179 wr_reg(0xEB, 0x20); /* Power Control 2 */
dreschpe 8:65a4de035c3c 180 wr_reg(0xEC, 0x0C); /* Power Control 3 */
dreschpe 8:65a4de035c3c 181 wr_reg(0xED, 0xC4); /* Power Control 4 */
dreschpe 8:65a4de035c3c 182 wr_reg(0xE8, 0x40); /* Source OPON_N */
dreschpe 8:65a4de035c3c 183 wr_reg(0xE9, 0x38); /* Source OPON_I */
dreschpe 8:65a4de035c3c 184 wr_reg(0xF1, 0x01); /* */
dreschpe 8:65a4de035c3c 185 wr_reg(0xF2, 0x10); /* */
dreschpe 8:65a4de035c3c 186 wr_reg(0x27, 0xA3); /* Display Control 2 */
dreschpe 8:65a4de035c3c 187
dreschpe 8:65a4de035c3c 188 /* Power On sequence ---------------------------------------------------------*/
dreschpe 8:65a4de035c3c 189 wr_reg(0x1B, 0x1B); /* Power Control 2 */
dreschpe 8:65a4de035c3c 190 wr_reg(0x1A, 0x01); /* Power Control 1 */
dreschpe 8:65a4de035c3c 191 wr_reg(0x24, 0x2F); /* Vcom Control 2 */
dreschpe 8:65a4de035c3c 192 wr_reg(0x25, 0x57); /* Vcom Control 3 */
dreschpe 8:65a4de035c3c 193 wr_reg(0x23, 0x8D); /* Vcom Control 1 */
dreschpe 8:65a4de035c3c 194
dreschpe 8:65a4de035c3c 195 /* Gamma settings -----------------------------------------------------------*/
dreschpe 8:65a4de035c3c 196 wr_reg(0x40,0x00); //
dreschpe 8:65a4de035c3c 197 wr_reg(0x41,0x00); //
dreschpe 8:65a4de035c3c 198 wr_reg(0x42,0x01); //
dreschpe 8:65a4de035c3c 199 wr_reg(0x43,0x13); //
dreschpe 8:65a4de035c3c 200 wr_reg(0x44,0x10); //
dreschpe 8:65a4de035c3c 201 wr_reg(0x45,0x26); //
dreschpe 8:65a4de035c3c 202 wr_reg(0x46,0x08); //
dreschpe 8:65a4de035c3c 203 wr_reg(0x47,0x51); //
dreschpe 8:65a4de035c3c 204 wr_reg(0x48,0x02); //
dreschpe 8:65a4de035c3c 205 wr_reg(0x49,0x12); //
dreschpe 8:65a4de035c3c 206 wr_reg(0x4A,0x18); //
dreschpe 8:65a4de035c3c 207 wr_reg(0x4B,0x19); //
dreschpe 8:65a4de035c3c 208 wr_reg(0x4C,0x14); //
dreschpe 8:65a4de035c3c 209 wr_reg(0x50,0x19); //
dreschpe 8:65a4de035c3c 210 wr_reg(0x51,0x2F); //
dreschpe 8:65a4de035c3c 211 wr_reg(0x52,0x2C); //
dreschpe 8:65a4de035c3c 212 wr_reg(0x53,0x3E); //
dreschpe 8:65a4de035c3c 213 wr_reg(0x54,0x3F); //
dreschpe 8:65a4de035c3c 214 wr_reg(0x55,0x3F); //
dreschpe 8:65a4de035c3c 215 wr_reg(0x56,0x2E); //
dreschpe 8:65a4de035c3c 216 wr_reg(0x57,0x77); //
dreschpe 8:65a4de035c3c 217 wr_reg(0x58,0x0B); //
dreschpe 8:65a4de035c3c 218 wr_reg(0x59,0x06); //
dreschpe 8:65a4de035c3c 219 wr_reg(0x5A,0x07); //
dreschpe 8:65a4de035c3c 220 wr_reg(0x5B,0x0D); //
dreschpe 8:65a4de035c3c 221 wr_reg(0x5C,0x1D); //
dreschpe 8:65a4de035c3c 222 wr_reg(0x5D,0xCC); //
dreschpe 8:65a4de035c3c 223
dreschpe 8:65a4de035c3c 224 /* Power + Osc ---------------------------------------------------------------*/
dreschpe 8:65a4de035c3c 225 wr_reg(0x18, 0x0036); /* OSC Control 1 */
dreschpe 8:65a4de035c3c 226 wr_reg(0x19, 0x0001); /* OSC Control 2 */
dreschpe 8:65a4de035c3c 227 wr_reg(0x01, 0x0000); /* Display Mode Control */
dreschpe 8:65a4de035c3c 228 wr_reg(0x1F, 0x0088); /* Power Control 6 */
dreschpe 8:65a4de035c3c 229 wait_ms(5); /* Delay 5 ms */
dreschpe 8:65a4de035c3c 230 wr_reg(0x1F, 0x0080); /* Power Control 6 */
dreschpe 8:65a4de035c3c 231 wait_ms(5); /* Delay 5 ms */
dreschpe 8:65a4de035c3c 232 wr_reg(0x1F, 0x0090); /* Power Control 6 */
dreschpe 8:65a4de035c3c 233 wait_ms(5); /* Delay 5 ms */
dreschpe 8:65a4de035c3c 234 wr_reg(0x1F, 0x00D0); /* Power Control 6 */
dreschpe 8:65a4de035c3c 235 wait_ms(5); /* Delay 5 ms */
dreschpe 8:65a4de035c3c 236
dreschpe 8:65a4de035c3c 237 wr_reg(0x17, 0x0005); /* Colmod 16Bit/Pixel */
dreschpe 8:65a4de035c3c 238
dreschpe 8:65a4de035c3c 239 wr_reg(0x36, 0x0000); /* Panel Characteristic */
dreschpe 8:65a4de035c3c 240 wr_reg(0x28, 0x0038); /* Display Control 3 */
dreschpe 8:65a4de035c3c 241 wait_ms(40);
dreschpe 8:65a4de035c3c 242 wr_reg(0x28, 0x003C); /* Display Control 3 */
dreschpe 8:65a4de035c3c 243 switch (orientation) {
dreschpe 8:65a4de035c3c 244 case 0:
dreschpe 8:65a4de035c3c 245 wr_reg(0x16, 0x0008);
dreschpe 8:65a4de035c3c 246 break;
dreschpe 8:65a4de035c3c 247 case 1:
dreschpe 8:65a4de035c3c 248 wr_reg(0x16, 0x0068);
dreschpe 8:65a4de035c3c 249 break;
dreschpe 8:65a4de035c3c 250 case 2:
dreschpe 8:65a4de035c3c 251 wr_reg(0x16, 0x00C8);
dreschpe 8:65a4de035c3c 252 break;
dreschpe 8:65a4de035c3c 253 case 3:
dreschpe 8:65a4de035c3c 254 wr_reg(0x16, 0x00A8);
dreschpe 8:65a4de035c3c 255 break;
dreschpe 8:65a4de035c3c 256 }
dreschpe 9:a63fd1ad41b0 257 #if defined USE_DMA
dreschpe 8:65a4de035c3c 258 // setup DMA channel 0
dreschpe 8:65a4de035c3c 259 // Power up the GPDMA.
dreschpe 8:65a4de035c3c 260 LPC_SC->PCONP |= (1UL << 29);
dreschpe 8:65a4de035c3c 261 LPC_GPDMA->DMACConfig = 1; // enable DMA controller
dreschpe 8:65a4de035c3c 262 // Reset the Interrupt status
dreschpe 8:65a4de035c3c 263 LPC_GPDMA->DMACIntTCClear = 0x1;
dreschpe 8:65a4de035c3c 264 LPC_GPDMA->DMACIntErrClr = 0x1;
dreschpe 8:65a4de035c3c 265 LPC_GPDMACH0->DMACCLLI = 0;
dreschpe 8:65a4de035c3c 266 #endif
dreschpe 8:65a4de035c3c 267 WindowMax ();
dreschpe 8:65a4de035c3c 268 }
dreschpe 8:65a4de035c3c 269
dreschpe 8:65a4de035c3c 270
dreschpe 8:65a4de035c3c 271 void SPI_TFT::pixel(int x, int y, int color)
dreschpe 8:65a4de035c3c 272 {
dreschpe 8:65a4de035c3c 273 wr_reg(0x03, (x >> 0));
dreschpe 8:65a4de035c3c 274 wr_reg(0x02, (x >> 8));
dreschpe 8:65a4de035c3c 275 wr_reg(0x07, (y >> 0));
dreschpe 8:65a4de035c3c 276 wr_reg(0x06, (y >> 8));
dreschpe 8:65a4de035c3c 277 wr_cmd(0x22);
dreschpe 8:65a4de035c3c 278 _cs = 0;
dreschpe 9:a63fd1ad41b0 279 #if defined NO_MBED_LIB
dreschpe 8:65a4de035c3c 280 if (spi_port == 0) { // TFT on SSP0
dreschpe 8:65a4de035c3c 281 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 8:65a4de035c3c 282 LPC_SSP0->DR = 0x72; // start Data
dreschpe 8:65a4de035c3c 283 LPC_SSP0->CR0 |= 0x08UL; // set back to 16 bit
dreschpe 9:a63fd1ad41b0 284 LPC_SSP0->DR = color; // Pixel
dreschpe 8:65a4de035c3c 285 // we have to wait for SPI IDLE to set CS back to high
dreschpe 8:65a4de035c3c 286 do {
dreschpe 8:65a4de035c3c 287 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI0 not idle
dreschpe 8:65a4de035c3c 288 } else {
dreschpe 8:65a4de035c3c 289 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 8:65a4de035c3c 290 LPC_SSP1->DR = 0x72; // start Data
dreschpe 8:65a4de035c3c 291 LPC_SSP1->CR0 |= 0x08UL; // set back to 16 bit
dreschpe 9:a63fd1ad41b0 292 LPC_SSP1->DR = color;
dreschpe 8:65a4de035c3c 293 // we have to wait for SPI IDLE to set CS back to high
dreschpe 8:65a4de035c3c 294 do {
dreschpe 8:65a4de035c3c 295 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI1 not idle
dreschpe 8:65a4de035c3c 296 }
dreschpe 9:a63fd1ad41b0 297 #else
dreschpe 9:a63fd1ad41b0 298 _spi.format(8,3); // 8 bit Mode 3
dreschpe 9:a63fd1ad41b0 299 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 9:a63fd1ad41b0 300 _spi.format(16,3); // switch to 16 bit Mode 3
dreschpe 9:a63fd1ad41b0 301 _spi.write(color); // Write D0..D15
dreschpe 9:a63fd1ad41b0 302 #endif
dreschpe 8:65a4de035c3c 303 _cs = 1;
dreschpe 8:65a4de035c3c 304 }
dreschpe 8:65a4de035c3c 305
dreschpe 8:65a4de035c3c 306
dreschpe 8:65a4de035c3c 307 void SPI_TFT::window (unsigned int x, unsigned int y, unsigned int w, unsigned int h)
dreschpe 8:65a4de035c3c 308 {
dreschpe 8:65a4de035c3c 309 wr_reg(0x03, x );
dreschpe 8:65a4de035c3c 310 wr_reg(0x02, (x >> 8));
dreschpe 8:65a4de035c3c 311 wr_reg(0x05, x+w-1 );
dreschpe 8:65a4de035c3c 312 wr_reg(0x04, (x+w-1 >> 8));
dreschpe 8:65a4de035c3c 313 wr_reg(0x07, y );
dreschpe 8:65a4de035c3c 314 wr_reg(0x06, ( y >> 8));
dreschpe 8:65a4de035c3c 315 wr_reg(0x09, ( y+h-1 ));
dreschpe 8:65a4de035c3c 316 wr_reg(0x08, ( y+h-1 >> 8));
dreschpe 8:65a4de035c3c 317 }
dreschpe 8:65a4de035c3c 318
dreschpe 8:65a4de035c3c 319
dreschpe 8:65a4de035c3c 320 void SPI_TFT::WindowMax (void)
dreschpe 8:65a4de035c3c 321 {
dreschpe 8:65a4de035c3c 322 window (0, 0, width(), height());
dreschpe 8:65a4de035c3c 323 }
dreschpe 8:65a4de035c3c 324
dreschpe 8:65a4de035c3c 325
dreschpe 8:65a4de035c3c 326
dreschpe 8:65a4de035c3c 327 void SPI_TFT::cls (void)
dreschpe 8:65a4de035c3c 328 {
dreschpe 8:65a4de035c3c 329 int pixel = ( width() * height());
dreschpe 8:65a4de035c3c 330 #if defined USE_DMA
dreschpe 8:65a4de035c3c 331 int dma_count;
dreschpe 8:65a4de035c3c 332 int color = _background;
dreschpe 8:65a4de035c3c 333 #endif
dreschpe 8:65a4de035c3c 334 WindowMax();
dreschpe 8:65a4de035c3c 335 wr_cmd(0x22);
dreschpe 8:65a4de035c3c 336
dreschpe 9:a63fd1ad41b0 337 #if defined NO_MBED_LIB
dreschpe 8:65a4de035c3c 338 #if defined USE_DMA
dreschpe 8:65a4de035c3c 339 LPC_GPDMACH0->DMACCSrcAddr = (uint32_t)&color;
dreschpe 8:65a4de035c3c 340 #endif
dreschpe 8:65a4de035c3c 341 _cs = 0;
dreschpe 8:65a4de035c3c 342 if (spi_port == 0) { // TFT on SSP0
dreschpe 8:65a4de035c3c 343 #if defined USE_DMA
dreschpe 8:65a4de035c3c 344 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP0->DR; // we send to SSP0
dreschpe 8:65a4de035c3c 345 /* Enable SSP0 for DMA. */
dreschpe 8:65a4de035c3c 346 LPC_SSP0->DMACR = 0x2;
dreschpe 8:65a4de035c3c 347 #endif
dreschpe 8:65a4de035c3c 348 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 8:65a4de035c3c 349 LPC_SSP0->DR = 0x72; // start byte
dreschpe 8:65a4de035c3c 350 LPC_SSP0->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 351 } else {
dreschpe 8:65a4de035c3c 352 #if defined USE_DMA
dreschpe 8:65a4de035c3c 353 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP1->DR; // we send to SSP1
dreschpe 8:65a4de035c3c 354 /* Enable SSP1 for DMA. */
dreschpe 8:65a4de035c3c 355 LPC_SSP1->DMACR = 0x2;
dreschpe 8:65a4de035c3c 356 #endif
dreschpe 8:65a4de035c3c 357 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 8:65a4de035c3c 358 LPC_SSP1->DR = 0x72; // start Data
dreschpe 8:65a4de035c3c 359 LPC_SSP1->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 360 }
dreschpe 8:65a4de035c3c 361
dreschpe 8:65a4de035c3c 362 #if defined USE_DMA
dreschpe 8:65a4de035c3c 363 // start DMA
dreschpe 8:65a4de035c3c 364 do {
dreschpe 8:65a4de035c3c 365 if (pixel > 4095) {
dreschpe 8:65a4de035c3c 366 dma_count = 4095;
dreschpe 8:65a4de035c3c 367 pixel = pixel - 4095;
dreschpe 8:65a4de035c3c 368 } else {
dreschpe 8:65a4de035c3c 369 dma_count = pixel;
dreschpe 8:65a4de035c3c 370 pixel = 0;
dreschpe 8:65a4de035c3c 371 }
dreschpe 8:65a4de035c3c 372 LPC_GPDMA->DMACIntTCClear = 0x1;
dreschpe 8:65a4de035c3c 373 LPC_GPDMA->DMACIntErrClr = 0x1;
dreschpe 8:65a4de035c3c 374 LPC_GPDMACH0->DMACCControl = dma_count | (1UL << 18) | (1UL << 21) | (1UL << 31) ; // 16 bit transfer , no address increment, interrupt
dreschpe 8:65a4de035c3c 375 LPC_GPDMACH0->DMACCConfig = DMA_CHANNEL_ENABLE | DMA_TRANSFER_TYPE_M2P | (spi_port ? DMA_DEST_SSP1_TX : DMA_DEST_SSP0_TX);
dreschpe 8:65a4de035c3c 376 LPC_GPDMA->DMACSoftSReq = 0x1; // DMA request
dreschpe 8:65a4de035c3c 377
dreschpe 8:65a4de035c3c 378 do {
dreschpe 8:65a4de035c3c 379 } while ((LPC_GPDMA->DMACRawIntTCStat & 0x01) == 0); // DMA is running
dreschpe 8:65a4de035c3c 380
dreschpe 8:65a4de035c3c 381 } while (pixel > 0);
dreschpe 8:65a4de035c3c 382 if (spi_port == 0) { // TFT on SSP0
dreschpe 8:65a4de035c3c 383 do {
dreschpe 8:65a4de035c3c 384 } while ((0x0010 & LPC_SSP0->SR) == 0x10); // SPI FIFO not empty
dreschpe 8:65a4de035c3c 385 /* disable SSP0 for DMA. */
dreschpe 8:65a4de035c3c 386 LPC_SSP0->DMACR = 0x0;
dreschpe 8:65a4de035c3c 387 } else {
dreschpe 8:65a4de035c3c 388 do {
dreschpe 8:65a4de035c3c 389 } while ((0x0010 & LPC_SSP1->SR) == 0x10); // SPI FIFO not empty
dreschpe 8:65a4de035c3c 390 /* disable SSP1 for DMA. */
dreschpe 8:65a4de035c3c 391 LPC_SSP1->DMACR = 0x0;
dreschpe 8:65a4de035c3c 392 }
dreschpe 8:65a4de035c3c 393 #else // no DMA
dreschpe 8:65a4de035c3c 394 unsigned int i;
dreschpe 8:65a4de035c3c 395 for (i = 0; i < ( width() * height()); i++)
dreschpe 8:65a4de035c3c 396 _spi.write(_background);
dreschpe 8:65a4de035c3c 397 #endif
dreschpe 9:a63fd1ad41b0 398 #else // mbed lib
dreschpe 9:a63fd1ad41b0 399 _cs = 0;
dreschpe 9:a63fd1ad41b0 400 _spi.format(8,3); // 8 bit Mode 3
dreschpe 9:a63fd1ad41b0 401 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 9:a63fd1ad41b0 402 _spi.format(16,3); // switch to 16 bit Mode 3
dreschpe 9:a63fd1ad41b0 403 unsigned int i;
dreschpe 9:a63fd1ad41b0 404 for (i = 0; i < ( width() * height()); i++)
dreschpe 9:a63fd1ad41b0 405 _spi.write(_background);
dreschpe 9:a63fd1ad41b0 406 #endif
dreschpe 8:65a4de035c3c 407 _cs = 1;
dreschpe 8:65a4de035c3c 408 }
dreschpe 8:65a4de035c3c 409
dreschpe 8:65a4de035c3c 410
dreschpe 8:65a4de035c3c 411 void SPI_TFT::circle(int x0, int y0, int r, int color)
dreschpe 17:d7e48335953e 412 {
dreschpe 17:d7e48335953e 413 int x = -r, y = 0, err = 2-2*r, e2;
dreschpe 17:d7e48335953e 414 do {
dreschpe 17:d7e48335953e 415 pixel(x0-x, y0+y,color);
dreschpe 17:d7e48335953e 416 pixel(x0+x, y0+y,color);
dreschpe 17:d7e48335953e 417 pixel(x0+x, y0-y,color);
dreschpe 17:d7e48335953e 418 pixel(x0-x, y0-y,color);
dreschpe 17:d7e48335953e 419 e2 = err;
dreschpe 17:d7e48335953e 420 if (e2 <= y) {
dreschpe 17:d7e48335953e 421 err += ++y*2+1;
dreschpe 17:d7e48335953e 422 if (-x == y && e2 <= x) e2 = 0;
dreschpe 8:65a4de035c3c 423 }
dreschpe 17:d7e48335953e 424 if (e2 > x) err += ++x*2+1;
dreschpe 17:d7e48335953e 425 } while (x <= 0);
dreschpe 17:d7e48335953e 426
dreschpe 8:65a4de035c3c 427 }
dreschpe 8:65a4de035c3c 428
dreschpe 17:d7e48335953e 429 void SPI_TFT::fillcircle(int x0, int y0, int r, int color)
dreschpe 8:65a4de035c3c 430 {
dreschpe 17:d7e48335953e 431 int x = -r, y = 0, err = 2-2*r, e2;
dreschpe 17:d7e48335953e 432 do {
dreschpe 17:d7e48335953e 433 vline(x0-x, y0-y, y0+y, color);
dreschpe 17:d7e48335953e 434 vline(x0+x, y0-y, y0+y, color);
dreschpe 17:d7e48335953e 435 e2 = err;
dreschpe 17:d7e48335953e 436 if (e2 <= y) {
dreschpe 17:d7e48335953e 437 err += ++y*2+1;
dreschpe 17:d7e48335953e 438 if (-x == y && e2 <= x) e2 = 0;
dreschpe 17:d7e48335953e 439 }
dreschpe 17:d7e48335953e 440 if (e2 > x) err += ++x*2+1;
dreschpe 17:d7e48335953e 441 } while (x <= 0);
dreschpe 8:65a4de035c3c 442 }
dreschpe 8:65a4de035c3c 443
dreschpe 8:65a4de035c3c 444
dreschpe 8:65a4de035c3c 445
dreschpe 8:65a4de035c3c 446 void SPI_TFT::hline(int x0, int x1, int y, int color)
dreschpe 8:65a4de035c3c 447 {
dreschpe 11:9bb71766cafc 448 int w;
dreschpe 8:65a4de035c3c 449 w = x1 - x0 + 1;
dreschpe 8:65a4de035c3c 450 window(x0,y,w,1);
dreschpe 8:65a4de035c3c 451 wr_cmd(0x22);
dreschpe 8:65a4de035c3c 452 _cs = 0;
dreschpe 9:a63fd1ad41b0 453 #if defined NO_MBED_LIB
dreschpe 8:65a4de035c3c 454 if (spi_port == 0) { // TFT on SSP0
dreschpe 8:65a4de035c3c 455 #if defined USE_DMA
dreschpe 8:65a4de035c3c 456 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP0->DR; // we send to SSP0
dreschpe 8:65a4de035c3c 457 /* Enable SSP0 for DMA. */
dreschpe 8:65a4de035c3c 458 LPC_SSP0->DMACR = 0x2;
dreschpe 8:65a4de035c3c 459 #endif
dreschpe 8:65a4de035c3c 460 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 8:65a4de035c3c 461 LPC_SSP0->DR = 0x72; // start Data
dreschpe 8:65a4de035c3c 462 LPC_SSP0->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 463 } else {
dreschpe 8:65a4de035c3c 464 #if defined USE_DMA
dreschpe 8:65a4de035c3c 465 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP1->DR; // we send to SSP1
dreschpe 8:65a4de035c3c 466 /* Enable SSP1 for DMA. */
dreschpe 8:65a4de035c3c 467 LPC_SSP1->DMACR = 0x2;
dreschpe 8:65a4de035c3c 468 #endif
dreschpe 8:65a4de035c3c 469 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 8:65a4de035c3c 470 LPC_SSP1->DR = 0x72; // start Data
dreschpe 8:65a4de035c3c 471 LPC_SSP1->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 472 }
dreschpe 8:65a4de035c3c 473 #if defined USE_DMA
dreschpe 8:65a4de035c3c 474 LPC_GPDMA->DMACIntTCClear = 0x1;
dreschpe 8:65a4de035c3c 475 LPC_GPDMA->DMACIntErrClr = 0x1;
dreschpe 8:65a4de035c3c 476 LPC_GPDMACH0->DMACCSrcAddr = (uint32_t)&color;
dreschpe 8:65a4de035c3c 477 LPC_GPDMACH0->DMACCControl = w | (1UL << 18) | (1UL << 21) | (1UL << 31) ; // 16 bit transfer , no address increment, interrupt
dreschpe 8:65a4de035c3c 478 LPC_GPDMACH0->DMACCConfig = DMA_CHANNEL_ENABLE | DMA_TRANSFER_TYPE_M2P | (spi_port ? DMA_DEST_SSP1_TX : DMA_DEST_SSP0_TX);
dreschpe 8:65a4de035c3c 479 LPC_GPDMA->DMACSoftSReq = 0x1; // start DMA
dreschpe 8:65a4de035c3c 480 do {
dreschpe 8:65a4de035c3c 481 } while ((LPC_GPDMA->DMACRawIntTCStat & 0x01) == 0); // DMA is running
dreschpe 8:65a4de035c3c 482 if (spi_port == 0) { // TFT on SSP0
dreschpe 8:65a4de035c3c 483 do {
dreschpe 8:65a4de035c3c 484 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 8:65a4de035c3c 485 } else {
dreschpe 8:65a4de035c3c 486 do {
dreschpe 8:65a4de035c3c 487 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 8:65a4de035c3c 488 }
dreschpe 8:65a4de035c3c 489 #else
dreschpe 11:9bb71766cafc 490 int i;
dreschpe 8:65a4de035c3c 491 for (i=0; i<w; i++) {
dreschpe 8:65a4de035c3c 492 _spi.write(color);
dreschpe 8:65a4de035c3c 493 }
dreschpe 9:a63fd1ad41b0 494 #endif
dreschpe 9:a63fd1ad41b0 495 #else // use mbed lib
dreschpe 9:a63fd1ad41b0 496 _spi.format(8,3); // 8 bit Mode 3
dreschpe 9:a63fd1ad41b0 497 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 9:a63fd1ad41b0 498 _spi.format(16,3); // switch to 16 bit Mode 3
dreschpe 12:9de056a58793 499 int j;
dreschpe 12:9de056a58793 500 for (j=0; j<w; j++) {
dreschpe 9:a63fd1ad41b0 501 _spi.write(color);
dreschpe 9:a63fd1ad41b0 502 }
dreschpe 9:a63fd1ad41b0 503 #endif
dreschpe 8:65a4de035c3c 504 _cs = 1;
dreschpe 8:65a4de035c3c 505 WindowMax();
dreschpe 8:65a4de035c3c 506 return;
dreschpe 8:65a4de035c3c 507 }
dreschpe 8:65a4de035c3c 508
dreschpe 8:65a4de035c3c 509 void SPI_TFT::vline(int x, int y0, int y1, int color)
dreschpe 8:65a4de035c3c 510 {
dreschpe 8:65a4de035c3c 511 int h;
dreschpe 8:65a4de035c3c 512 h = y1 - y0 + 1;
dreschpe 8:65a4de035c3c 513 window(x,y0,1,h);
dreschpe 8:65a4de035c3c 514 wr_cmd(0x22);
dreschpe 8:65a4de035c3c 515 _cs = 0;
dreschpe 9:a63fd1ad41b0 516 #if defined NO_MBED_LIB
dreschpe 8:65a4de035c3c 517 if (spi_port == 0) { // TFT on SSP0
dreschpe 8:65a4de035c3c 518 #if defined USE_DMA
dreschpe 8:65a4de035c3c 519 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP0->DR; // we send to SSP0
dreschpe 8:65a4de035c3c 520 /* Enable SSP0 for DMA. */
dreschpe 8:65a4de035c3c 521 LPC_SSP0->DMACR = 0x2;
dreschpe 8:65a4de035c3c 522 #endif
dreschpe 8:65a4de035c3c 523 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 8:65a4de035c3c 524 LPC_SSP0->DR = 0x72; // start Data
dreschpe 8:65a4de035c3c 525 LPC_SSP0->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 526 } else {
dreschpe 8:65a4de035c3c 527 #if defined USE_DMA
dreschpe 8:65a4de035c3c 528 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP1->DR; // we send to SSP1
dreschpe 8:65a4de035c3c 529 /* Enable SSP1 for DMA. */
dreschpe 8:65a4de035c3c 530 LPC_SSP1->DMACR = 0x2;
dreschpe 8:65a4de035c3c 531 #endif
dreschpe 8:65a4de035c3c 532 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 8:65a4de035c3c 533 LPC_SSP1->DR = 0x72; // start Data
dreschpe 8:65a4de035c3c 534 LPC_SSP1->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 535 }
dreschpe 8:65a4de035c3c 536 #if defined USE_DMA
dreschpe 8:65a4de035c3c 537 LPC_GPDMA->DMACIntTCClear = 0x1;
dreschpe 8:65a4de035c3c 538 LPC_GPDMA->DMACIntErrClr = 0x1;
dreschpe 8:65a4de035c3c 539 LPC_GPDMACH0->DMACCSrcAddr = (uint32_t)&color;
dreschpe 8:65a4de035c3c 540 LPC_GPDMACH0->DMACCControl = h | (1UL << 18) | (1UL << 21) | (1UL << 31) ; // 16 bit transfer , no address increment, interrupt
dreschpe 8:65a4de035c3c 541 LPC_GPDMACH0->DMACCConfig = DMA_CHANNEL_ENABLE | DMA_TRANSFER_TYPE_M2P | (spi_port ? DMA_DEST_SSP1_TX : DMA_DEST_SSP0_TX);
dreschpe 8:65a4de035c3c 542 LPC_GPDMA->DMACSoftSReq = 0x1;
dreschpe 8:65a4de035c3c 543 do {
dreschpe 8:65a4de035c3c 544 } while ((LPC_GPDMA->DMACRawIntTCStat & 0x01) == 0); // DMA is running
dreschpe 8:65a4de035c3c 545
dreschpe 8:65a4de035c3c 546 if (spi_port == 0) { // TFT on SSP0
dreschpe 8:65a4de035c3c 547 do {
dreschpe 8:65a4de035c3c 548 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 8:65a4de035c3c 549 } else {
dreschpe 8:65a4de035c3c 550 do {
dreschpe 8:65a4de035c3c 551 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 8:65a4de035c3c 552 }
dreschpe 8:65a4de035c3c 553 #else
dreschpe 8:65a4de035c3c 554 for (int y=0; y<h; y++) {
dreschpe 8:65a4de035c3c 555 _spi.write(color);
dreschpe 8:65a4de035c3c 556 }
dreschpe 8:65a4de035c3c 557 #endif
dreschpe 9:a63fd1ad41b0 558 #else // use mbed lib
dreschpe 9:a63fd1ad41b0 559 _spi.format(8,3); // 8 bit Mode 3
dreschpe 9:a63fd1ad41b0 560 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 9:a63fd1ad41b0 561 _spi.format(16,3); // switch to 16 bit Mode 3
dreschpe 9:a63fd1ad41b0 562 for (int y=0; y<h; y++) {
dreschpe 9:a63fd1ad41b0 563 _spi.write(color);
dreschpe 9:a63fd1ad41b0 564 }
dreschpe 9:a63fd1ad41b0 565 #endif
dreschpe 8:65a4de035c3c 566 _cs = 1;
dreschpe 8:65a4de035c3c 567 WindowMax();
dreschpe 8:65a4de035c3c 568 return;
dreschpe 8:65a4de035c3c 569 }
dreschpe 8:65a4de035c3c 570
dreschpe 8:65a4de035c3c 571
dreschpe 8:65a4de035c3c 572
dreschpe 8:65a4de035c3c 573 void SPI_TFT::line(int x0, int y0, int x1, int y1, int color)
dreschpe 8:65a4de035c3c 574 {
dreschpe 8:65a4de035c3c 575 //WindowMax();
dreschpe 8:65a4de035c3c 576 int dx = 0, dy = 0;
dreschpe 8:65a4de035c3c 577 int dx_sym = 0, dy_sym = 0;
dreschpe 8:65a4de035c3c 578 int dx_x2 = 0, dy_x2 = 0;
dreschpe 8:65a4de035c3c 579 int di = 0;
dreschpe 8:65a4de035c3c 580
dreschpe 8:65a4de035c3c 581 dx = x1-x0;
dreschpe 8:65a4de035c3c 582 dy = y1-y0;
dreschpe 8:65a4de035c3c 583
dreschpe 8:65a4de035c3c 584 if (dx == 0) { /* vertical line */
dreschpe 8:65a4de035c3c 585 if (y1 > y0) vline(x0,y0,y1,color);
dreschpe 8:65a4de035c3c 586 else vline(x0,y1,y0,color);
dreschpe 8:65a4de035c3c 587 return;
dreschpe 8:65a4de035c3c 588 }
dreschpe 8:65a4de035c3c 589
dreschpe 8:65a4de035c3c 590 if (dx > 0) {
dreschpe 8:65a4de035c3c 591 dx_sym = 1;
dreschpe 8:65a4de035c3c 592 } else {
dreschpe 8:65a4de035c3c 593 dx_sym = -1;
dreschpe 8:65a4de035c3c 594 }
dreschpe 8:65a4de035c3c 595 if (dy == 0) { /* horizontal line */
dreschpe 8:65a4de035c3c 596 if (x1 > x0) hline(x0,x1,y0,color);
dreschpe 8:65a4de035c3c 597 else hline(x1,x0,y0,color);
dreschpe 8:65a4de035c3c 598 return;
dreschpe 8:65a4de035c3c 599 }
dreschpe 8:65a4de035c3c 600
dreschpe 8:65a4de035c3c 601 if (dy > 0) {
dreschpe 8:65a4de035c3c 602 dy_sym = 1;
dreschpe 8:65a4de035c3c 603 } else {
dreschpe 8:65a4de035c3c 604 dy_sym = -1;
dreschpe 8:65a4de035c3c 605 }
dreschpe 8:65a4de035c3c 606
dreschpe 8:65a4de035c3c 607 dx = dx_sym*dx;
dreschpe 8:65a4de035c3c 608 dy = dy_sym*dy;
dreschpe 8:65a4de035c3c 609
dreschpe 8:65a4de035c3c 610 dx_x2 = dx*2;
dreschpe 8:65a4de035c3c 611 dy_x2 = dy*2;
dreschpe 8:65a4de035c3c 612
dreschpe 8:65a4de035c3c 613 if (dx >= dy) {
dreschpe 8:65a4de035c3c 614 di = dy_x2 - dx;
dreschpe 8:65a4de035c3c 615 while (x0 != x1) {
dreschpe 8:65a4de035c3c 616
dreschpe 8:65a4de035c3c 617 pixel(x0, y0, color);
dreschpe 8:65a4de035c3c 618 x0 += dx_sym;
dreschpe 8:65a4de035c3c 619 if (di<0) {
dreschpe 8:65a4de035c3c 620 di += dy_x2;
dreschpe 8:65a4de035c3c 621 } else {
dreschpe 8:65a4de035c3c 622 di += dy_x2 - dx_x2;
dreschpe 8:65a4de035c3c 623 y0 += dy_sym;
dreschpe 8:65a4de035c3c 624 }
dreschpe 8:65a4de035c3c 625 }
dreschpe 8:65a4de035c3c 626 pixel(x0, y0, color);
dreschpe 8:65a4de035c3c 627 } else {
dreschpe 8:65a4de035c3c 628 di = dx_x2 - dy;
dreschpe 8:65a4de035c3c 629 while (y0 != y1) {
dreschpe 8:65a4de035c3c 630 pixel(x0, y0, color);
dreschpe 8:65a4de035c3c 631 y0 += dy_sym;
dreschpe 8:65a4de035c3c 632 if (di < 0) {
dreschpe 8:65a4de035c3c 633 di += dx_x2;
dreschpe 8:65a4de035c3c 634 } else {
dreschpe 8:65a4de035c3c 635 di += dx_x2 - dy_x2;
dreschpe 8:65a4de035c3c 636 x0 += dx_sym;
dreschpe 8:65a4de035c3c 637 }
dreschpe 8:65a4de035c3c 638 }
dreschpe 8:65a4de035c3c 639 pixel(x0, y0, color);
dreschpe 8:65a4de035c3c 640 }
dreschpe 8:65a4de035c3c 641 return;
dreschpe 8:65a4de035c3c 642 }
dreschpe 8:65a4de035c3c 643
dreschpe 8:65a4de035c3c 644
dreschpe 8:65a4de035c3c 645 void SPI_TFT::rect(int x0, int y0, int x1, int y1, int color)
dreschpe 8:65a4de035c3c 646 {
dreschpe 8:65a4de035c3c 647
dreschpe 8:65a4de035c3c 648 if (x1 > x0) hline(x0,x1,y0,color);
dreschpe 8:65a4de035c3c 649 else hline(x1,x0,y0,color);
dreschpe 8:65a4de035c3c 650
dreschpe 8:65a4de035c3c 651 if (y1 > y0) vline(x0,y0,y1,color);
dreschpe 8:65a4de035c3c 652 else vline(x0,y1,y0,color);
dreschpe 8:65a4de035c3c 653
dreschpe 8:65a4de035c3c 654 if (x1 > x0) hline(x0,x1,y1,color);
dreschpe 8:65a4de035c3c 655 else hline(x1,x0,y1,color);
dreschpe 8:65a4de035c3c 656
dreschpe 8:65a4de035c3c 657 if (y1 > y0) vline(x1,y0,y1,color);
dreschpe 8:65a4de035c3c 658 else vline(x1,y1,y0,color);
dreschpe 8:65a4de035c3c 659
dreschpe 8:65a4de035c3c 660 return;
dreschpe 8:65a4de035c3c 661 }
dreschpe 8:65a4de035c3c 662
dreschpe 8:65a4de035c3c 663
dreschpe 8:65a4de035c3c 664
dreschpe 8:65a4de035c3c 665 void SPI_TFT::fillrect(int x0, int y0, int x1, int y1, int color)
dreschpe 8:65a4de035c3c 666 {
dreschpe 8:65a4de035c3c 667
dreschpe 8:65a4de035c3c 668 int h = y1 - y0 + 1;
dreschpe 8:65a4de035c3c 669 int w = x1 - x0 + 1;
dreschpe 8:65a4de035c3c 670 int pixel = h * w;
dreschpe 8:65a4de035c3c 671 #if defined USE_DMA
dreschpe 8:65a4de035c3c 672 int dma_count;
dreschpe 8:65a4de035c3c 673 #endif
dreschpe 8:65a4de035c3c 674 window(x0,y0,w,h);
dreschpe 8:65a4de035c3c 675 wr_cmd(0x22);
dreschpe 8:65a4de035c3c 676 _cs = 0;
dreschpe 9:a63fd1ad41b0 677 #if defined NO_MBED_LIB
dreschpe 8:65a4de035c3c 678 if (spi_port == 0) { // TFT on SSP0
dreschpe 9:a63fd1ad41b0 679 #if defined USE_DMA
dreschpe 8:65a4de035c3c 680 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP0->DR; // we send to SSP0
dreschpe 8:65a4de035c3c 681 /* Enable SSP0 for DMA. */
dreschpe 8:65a4de035c3c 682 LPC_SSP0->DMACR = 0x2;
dreschpe 9:a63fd1ad41b0 683 #endif
dreschpe 8:65a4de035c3c 684 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 8:65a4de035c3c 685 LPC_SSP0->DR = 0x72; // start Data
dreschpe 8:65a4de035c3c 686 LPC_SSP0->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 687 } else {
dreschpe 9:a63fd1ad41b0 688 #if defined USE_DMA
dreschpe 8:65a4de035c3c 689 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP1->DR; // we send to SSP1
dreschpe 8:65a4de035c3c 690 /* Enable SSP1 for DMA. */
dreschpe 8:65a4de035c3c 691 LPC_SSP1->DMACR = 0x2;
dreschpe 9:a63fd1ad41b0 692 #endif
dreschpe 8:65a4de035c3c 693 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 8:65a4de035c3c 694 LPC_SSP1->DR = 0x72; // start Data
dreschpe 8:65a4de035c3c 695 LPC_SSP1->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 696 }
dreschpe 9:a63fd1ad41b0 697 #if defined USE_DMA
dreschpe 8:65a4de035c3c 698 do {
dreschpe 8:65a4de035c3c 699 if (pixel > 4095) {
dreschpe 8:65a4de035c3c 700 dma_count = 4095;
dreschpe 8:65a4de035c3c 701 pixel = pixel - 4095;
dreschpe 8:65a4de035c3c 702 } else {
dreschpe 8:65a4de035c3c 703 dma_count = pixel;
dreschpe 8:65a4de035c3c 704 pixel = 0;
dreschpe 8:65a4de035c3c 705 }
dreschpe 8:65a4de035c3c 706 LPC_GPDMA->DMACIntTCClear = 0x1;
dreschpe 8:65a4de035c3c 707 LPC_GPDMA->DMACIntErrClr = 0x1;
dreschpe 8:65a4de035c3c 708 LPC_GPDMACH0->DMACCSrcAddr = (uint32_t)&color;
dreschpe 8:65a4de035c3c 709 LPC_GPDMACH0->DMACCControl = dma_count | (1UL << 18) | (1UL << 21) | (1UL << 31) ; // 16 bit transfer , no address increment, interrupt
dreschpe 8:65a4de035c3c 710 LPC_GPDMACH0->DMACCConfig = DMA_CHANNEL_ENABLE | DMA_TRANSFER_TYPE_M2P | (spi_port ? DMA_DEST_SSP1_TX : DMA_DEST_SSP0_TX);
dreschpe 8:65a4de035c3c 711 LPC_GPDMA->DMACSoftSReq = 0x1;
dreschpe 8:65a4de035c3c 712 do {
dreschpe 8:65a4de035c3c 713 } while ((LPC_GPDMA->DMACRawIntTCStat & 0x01) == 0); // DMA is running
dreschpe 8:65a4de035c3c 714
dreschpe 8:65a4de035c3c 715 } while (pixel > 0);
dreschpe 8:65a4de035c3c 716
dreschpe 8:65a4de035c3c 717 if (spi_port == 0) { // TFT on SSP0
dreschpe 8:65a4de035c3c 718 do {
dreschpe 8:65a4de035c3c 719 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 8:65a4de035c3c 720 } else {
dreschpe 8:65a4de035c3c 721 do {
dreschpe 8:65a4de035c3c 722 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 8:65a4de035c3c 723 }
dreschpe 8:65a4de035c3c 724
dreschpe 9:a63fd1ad41b0 725 #else // no DMA
dreschpe 8:65a4de035c3c 726 for (int p=0; p<pixel; p++) {
dreschpe 8:65a4de035c3c 727 _spi.write(color);
dreschpe 8:65a4de035c3c 728 }
dreschpe 9:a63fd1ad41b0 729 #endif
dreschpe 9:a63fd1ad41b0 730 #else // use mbed lib
dreschpe 9:a63fd1ad41b0 731 _spi.format(8,3); // 8 bit Mode 3
dreschpe 9:a63fd1ad41b0 732 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 9:a63fd1ad41b0 733 _spi.format(16,3); // switch to 16 bit Mode 3
dreschpe 9:a63fd1ad41b0 734 for (int p=0; p<pixel; p++) {
dreschpe 9:a63fd1ad41b0 735 _spi.write(color);
dreschpe 9:a63fd1ad41b0 736 }
dreschpe 9:a63fd1ad41b0 737 #endif
dreschpe 8:65a4de035c3c 738 _cs = 1;
dreschpe 8:65a4de035c3c 739 WindowMax();
dreschpe 8:65a4de035c3c 740 return;
dreschpe 8:65a4de035c3c 741 }
dreschpe 8:65a4de035c3c 742
dreschpe 8:65a4de035c3c 743
dreschpe 8:65a4de035c3c 744 void SPI_TFT::locate(int x, int y)
dreschpe 8:65a4de035c3c 745 {
dreschpe 8:65a4de035c3c 746 char_x = x;
dreschpe 8:65a4de035c3c 747 char_y = y;
dreschpe 8:65a4de035c3c 748 }
dreschpe 8:65a4de035c3c 749
dreschpe 8:65a4de035c3c 750
dreschpe 8:65a4de035c3c 751
dreschpe 8:65a4de035c3c 752 int SPI_TFT::columns()
dreschpe 8:65a4de035c3c 753 {
dreschpe 8:65a4de035c3c 754 return width() / font[1];
dreschpe 8:65a4de035c3c 755 }
dreschpe 8:65a4de035c3c 756
dreschpe 8:65a4de035c3c 757
dreschpe 8:65a4de035c3c 758
dreschpe 8:65a4de035c3c 759 int SPI_TFT::rows()
dreschpe 8:65a4de035c3c 760 {
dreschpe 8:65a4de035c3c 761 return height() / font[2];
dreschpe 8:65a4de035c3c 762 }
dreschpe 8:65a4de035c3c 763
dreschpe 8:65a4de035c3c 764
dreschpe 8:65a4de035c3c 765
dreschpe 8:65a4de035c3c 766 int SPI_TFT::_putc(int value)
dreschpe 8:65a4de035c3c 767 {
dreschpe 8:65a4de035c3c 768 if (value == '\n') { // new line
dreschpe 8:65a4de035c3c 769 char_x = 0;
dreschpe 8:65a4de035c3c 770 char_y = char_y + font[2];
dreschpe 8:65a4de035c3c 771 if (char_y >= height() - font[2]) {
dreschpe 8:65a4de035c3c 772 char_y = 0;
dreschpe 8:65a4de035c3c 773 }
dreschpe 8:65a4de035c3c 774 } else {
dreschpe 8:65a4de035c3c 775 character(char_x, char_y, value);
dreschpe 8:65a4de035c3c 776 }
dreschpe 8:65a4de035c3c 777 return value;
dreschpe 8:65a4de035c3c 778 }
dreschpe 8:65a4de035c3c 779
dreschpe 8:65a4de035c3c 780
dreschpe 8:65a4de035c3c 781 void SPI_TFT::character(int x, int y, int c)
dreschpe 8:65a4de035c3c 782 {
dreschpe 9:a63fd1ad41b0 783 unsigned int hor,vert,offset,bpl,j,i,b;
dreschpe 8:65a4de035c3c 784 unsigned char* zeichen;
dreschpe 8:65a4de035c3c 785 unsigned char z,w;
dreschpe 8:65a4de035c3c 786 #if defined USE_DMA
dreschpe 8:65a4de035c3c 787 unsigned int pixel;
dreschpe 9:a63fd1ad41b0 788 unsigned int p;
dreschpe 8:65a4de035c3c 789 unsigned int dma_count,dma_off;
dreschpe 8:65a4de035c3c 790 uint16_t *buffer;
dreschpe 8:65a4de035c3c 791 #endif
dreschpe 8:65a4de035c3c 792
dreschpe 8:65a4de035c3c 793 if ((c < 31) || (c > 127)) return; // test char range
dreschpe 8:65a4de035c3c 794
dreschpe 8:65a4de035c3c 795 // read font parameter from start of array
dreschpe 8:65a4de035c3c 796 offset = font[0]; // bytes / char
dreschpe 8:65a4de035c3c 797 hor = font[1]; // get hor size of font
dreschpe 8:65a4de035c3c 798 vert = font[2]; // get vert size of font
dreschpe 8:65a4de035c3c 799 bpl = font[3]; // bytes per line
dreschpe 8:65a4de035c3c 800
dreschpe 8:65a4de035c3c 801 if (char_x + hor > width()) {
dreschpe 8:65a4de035c3c 802 char_x = 0;
dreschpe 8:65a4de035c3c 803 char_y = char_y + vert;
dreschpe 8:65a4de035c3c 804 if (char_y >= height() - font[2]) {
dreschpe 8:65a4de035c3c 805 char_y = 0;
dreschpe 8:65a4de035c3c 806 }
dreschpe 8:65a4de035c3c 807 }
dreschpe 8:65a4de035c3c 808 window(char_x, char_y,hor,vert); // char box
dreschpe 8:65a4de035c3c 809 wr_cmd(0x22);
dreschpe 8:65a4de035c3c 810
dreschpe 8:65a4de035c3c 811 #if defined USE_DMA
dreschpe 8:65a4de035c3c 812 pixel = hor * vert; // calculate buffer size
dreschpe 8:65a4de035c3c 813
dreschpe 8:65a4de035c3c 814 buffer = (uint16_t *) malloc (2*pixel); // we need a buffer for the 16 bit
dreschpe 8:65a4de035c3c 815 if (buffer == NULL) {
dreschpe 8:65a4de035c3c 816 //led = 1;
dreschpe 8:65a4de035c3c 817 //pc.printf("Malloc error !\n\r");
dreschpe 8:65a4de035c3c 818 return; // error no memory
dreschpe 8:65a4de035c3c 819 }
dreschpe 8:65a4de035c3c 820
dreschpe 8:65a4de035c3c 821 zeichen = &font[((c -32) * offset) + 4]; // start of char bitmap
dreschpe 8:65a4de035c3c 822 w = zeichen[0]; // width of actual char
dreschpe 8:65a4de035c3c 823 p = 0;
dreschpe 8:65a4de035c3c 824 // construct the char into the buffer
dreschpe 8:65a4de035c3c 825 for (j=0; j<vert; j++) { // vert line
dreschpe 8:65a4de035c3c 826 for (i=0; i<hor; i++) { // horz line
dreschpe 8:65a4de035c3c 827 z = zeichen[bpl * i + ((j & 0xF8) >> 3)+1];
dreschpe 8:65a4de035c3c 828 b = 1 << (j & 0x07);
dreschpe 8:65a4de035c3c 829 if (( z & b ) == 0x00) {
dreschpe 8:65a4de035c3c 830 buffer[p] = _background;
dreschpe 8:65a4de035c3c 831 } else {
dreschpe 8:65a4de035c3c 832 buffer[p] = _foreground;
dreschpe 8:65a4de035c3c 833 }
dreschpe 8:65a4de035c3c 834 p++;
dreschpe 8:65a4de035c3c 835 }
dreschpe 8:65a4de035c3c 836 }
dreschpe 8:65a4de035c3c 837
dreschpe 8:65a4de035c3c 838 // copy the buffer with DMA SPI to display
dreschpe 8:65a4de035c3c 839 dma_off = 0; // offset for DMA transfer
dreschpe 8:65a4de035c3c 840 _cs = 0;
dreschpe 8:65a4de035c3c 841 if (spi_port == 0) { // TFT on SSP0
dreschpe 8:65a4de035c3c 842 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP0->DR; // we send to SSP0
dreschpe 8:65a4de035c3c 843 /* Enable SSP0 for DMA. */
dreschpe 8:65a4de035c3c 844 LPC_SSP0->DMACR = 0x2;
dreschpe 8:65a4de035c3c 845 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 8:65a4de035c3c 846 LPC_SSP0->DR = 0x72; // start Data
dreschpe 8:65a4de035c3c 847 LPC_SSP0->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 848 } else {
dreschpe 8:65a4de035c3c 849 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP1->DR; // we send to SSP1
dreschpe 8:65a4de035c3c 850 /* Enable SSP1 for DMA. */
dreschpe 8:65a4de035c3c 851 LPC_SSP1->DMACR = 0x2;
dreschpe 8:65a4de035c3c 852 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 8:65a4de035c3c 853 LPC_SSP1->DR = 0x72; // start Data
dreschpe 8:65a4de035c3c 854 LPC_SSP1->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 855 }
dreschpe 8:65a4de035c3c 856
dreschpe 8:65a4de035c3c 857 // start DMA
dreschpe 8:65a4de035c3c 858 do {
dreschpe 8:65a4de035c3c 859 if (pixel > 4095) { // this is a giant font !
dreschpe 8:65a4de035c3c 860 dma_count = 4095;
dreschpe 8:65a4de035c3c 861 pixel = pixel - 4095;
dreschpe 8:65a4de035c3c 862 } else {
dreschpe 8:65a4de035c3c 863 dma_count = pixel;
dreschpe 8:65a4de035c3c 864 pixel = 0;
dreschpe 8:65a4de035c3c 865 }
dreschpe 8:65a4de035c3c 866 LPC_GPDMA->DMACIntTCClear = 0x1;
dreschpe 8:65a4de035c3c 867 LPC_GPDMA->DMACIntErrClr = 0x1;
dreschpe 8:65a4de035c3c 868 LPC_GPDMACH0->DMACCSrcAddr = (uint32_t) (buffer + dma_off);
dreschpe 8:65a4de035c3c 869 LPC_GPDMACH0->DMACCControl = dma_count | (1UL << 18) | (1UL << 21) | (1UL << 31) | DMA_CHANNEL_SRC_INC ; // 16 bit transfer , address increment, interrupt
dreschpe 8:65a4de035c3c 870 LPC_GPDMACH0->DMACCConfig = DMA_CHANNEL_ENABLE | DMA_TRANSFER_TYPE_M2P | (spi_port ? DMA_DEST_SSP1_TX : DMA_DEST_SSP0_TX);
dreschpe 8:65a4de035c3c 871 LPC_GPDMA->DMACSoftSReq = 0x1;
dreschpe 8:65a4de035c3c 872 do {
dreschpe 8:65a4de035c3c 873 } while ((LPC_GPDMA->DMACRawIntTCStat & 0x01) == 0); // DMA is running
dreschpe 8:65a4de035c3c 874 dma_off = dma_off + dma_count;
dreschpe 8:65a4de035c3c 875 } while (pixel > 0);
dreschpe 8:65a4de035c3c 876
dreschpe 8:65a4de035c3c 877 free ((uint16_t *) buffer);
dreschpe 8:65a4de035c3c 878
dreschpe 8:65a4de035c3c 879 if (spi_port == 0) { // TFT on SSP0
dreschpe 8:65a4de035c3c 880 do {
dreschpe 8:65a4de035c3c 881 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI0 not idle
dreschpe 8:65a4de035c3c 882 /* disable SSP0 for DMA. */
dreschpe 8:65a4de035c3c 883 LPC_SSP0->DMACR = 0x0;
dreschpe 8:65a4de035c3c 884 } else {
dreschpe 8:65a4de035c3c 885 do {
dreschpe 8:65a4de035c3c 886 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI1 not idle
dreschpe 8:65a4de035c3c 887 /* disable SSP1 for DMA. */
dreschpe 8:65a4de035c3c 888 LPC_SSP1->DMACR = 0x0;
dreschpe 8:65a4de035c3c 889 }
dreschpe 8:65a4de035c3c 890
dreschpe 9:a63fd1ad41b0 891 #else // no dma
dreschpe 8:65a4de035c3c 892 _cs = 0;
dreschpe 9:a63fd1ad41b0 893 #if defined NO_MBED_LIB
dreschpe 8:65a4de035c3c 894 if (spi_port == 0) { // TFT on SSP0
dreschpe 8:65a4de035c3c 895 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 8:65a4de035c3c 896 LPC_SSP0->DR = 0x72; // start Data
dreschpe 8:65a4de035c3c 897 LPC_SSP0->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 898 } else {
dreschpe 8:65a4de035c3c 899 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 8:65a4de035c3c 900 LPC_SSP1->DR = 0x72; // start Data
dreschpe 8:65a4de035c3c 901 LPC_SSP1->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 902 }
dreschpe 9:a63fd1ad41b0 903 #else // mbed lib
dreschpe 9:a63fd1ad41b0 904 _spi.format(8,3); // 8 bit Mode 3
dreschpe 9:a63fd1ad41b0 905 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 9:a63fd1ad41b0 906 _spi.format(16,3); // switch to 16 bit Mode 3
dreschpe 9:a63fd1ad41b0 907 #endif
dreschpe 8:65a4de035c3c 908 zeichen = &font[((c -32) * offset) + 4]; // start of char bitmap
dreschpe 8:65a4de035c3c 909 w = zeichen[0]; // width of actual char
dreschpe 8:65a4de035c3c 910 for (j=0; j<vert; j++) { // vert line
dreschpe 8:65a4de035c3c 911 for (i=0; i<hor; i++) { // horz line
dreschpe 8:65a4de035c3c 912 z = zeichen[bpl * i + ((j & 0xF8) >> 3)+1];
dreschpe 8:65a4de035c3c 913 b = 1 << (j & 0x07);
dreschpe 8:65a4de035c3c 914 if (( z & b ) == 0x00) {
dreschpe 8:65a4de035c3c 915 _spi.write(_background);
dreschpe 8:65a4de035c3c 916 } else {
dreschpe 8:65a4de035c3c 917 _spi.write(_foreground);
dreschpe 8:65a4de035c3c 918 }
dreschpe 8:65a4de035c3c 919 }
dreschpe 8:65a4de035c3c 920 }
dreschpe 9:a63fd1ad41b0 921 #endif // no DMA
dreschpe 8:65a4de035c3c 922 _cs = 1;
dreschpe 8:65a4de035c3c 923 WindowMax();
dreschpe 8:65a4de035c3c 924 if ((w + 2) < hor) { // x offset to next char
dreschpe 8:65a4de035c3c 925 char_x += w + 2;
dreschpe 8:65a4de035c3c 926 } else char_x += hor;
dreschpe 8:65a4de035c3c 927 }
dreschpe 8:65a4de035c3c 928
dreschpe 8:65a4de035c3c 929
dreschpe 8:65a4de035c3c 930 void SPI_TFT::set_font(unsigned char* f)
dreschpe 8:65a4de035c3c 931 {
dreschpe 8:65a4de035c3c 932 font = f;
dreschpe 8:65a4de035c3c 933 }
dreschpe 8:65a4de035c3c 934
dreschpe 8:65a4de035c3c 935
dreschpe 8:65a4de035c3c 936
dreschpe 8:65a4de035c3c 937 void SPI_TFT::Bitmap(unsigned int x, unsigned int y, unsigned int w, unsigned int h,unsigned char *bitmap)
dreschpe 8:65a4de035c3c 938 {
dreschpe 8:65a4de035c3c 939 unsigned int j;
dreschpe 8:65a4de035c3c 940 int padd;
dreschpe 8:65a4de035c3c 941 unsigned short *bitmap_ptr = (unsigned short *)bitmap;
dreschpe 8:65a4de035c3c 942 // the lines are padded to multiple of 4 bytes in a bitmap
dreschpe 8:65a4de035c3c 943 padd = -1;
dreschpe 8:65a4de035c3c 944 do {
dreschpe 8:65a4de035c3c 945 padd ++;
dreschpe 8:65a4de035c3c 946 } while (2*(w + padd)%4 != 0);
dreschpe 8:65a4de035c3c 947 window(x, y, w, h);
dreschpe 8:65a4de035c3c 948 wr_cmd(0x22);
dreschpe 8:65a4de035c3c 949 _cs = 0;
dreschpe 9:a63fd1ad41b0 950 #if defined NO_MBED_LIB
dreschpe 8:65a4de035c3c 951 if (spi_port == 0) { // TFT on SSP0
dreschpe 8:65a4de035c3c 952 #if defined USE_DMA
dreschpe 8:65a4de035c3c 953 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP0->DR; // we send to SSP0
dreschpe 8:65a4de035c3c 954 /* Enable SSP0 for DMA. */
dreschpe 8:65a4de035c3c 955 LPC_SSP0->DMACR = 0x2;
dreschpe 8:65a4de035c3c 956 #endif
dreschpe 8:65a4de035c3c 957 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 8:65a4de035c3c 958 LPC_SSP0->DR = 0x72; // start Data
dreschpe 8:65a4de035c3c 959 LPC_SSP0->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 960
dreschpe 8:65a4de035c3c 961 } else {
dreschpe 8:65a4de035c3c 962 #if defined USE_DMA
dreschpe 8:65a4de035c3c 963 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP1->DR; // we send to SSP1
dreschpe 8:65a4de035c3c 964 /* Enable SSP1 for DMA. */
dreschpe 8:65a4de035c3c 965 LPC_SSP1->DMACR = 0x2;
dreschpe 8:65a4de035c3c 966 #endif
dreschpe 8:65a4de035c3c 967 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 8:65a4de035c3c 968 LPC_SSP1->DR = 0x72; // start Data command
dreschpe 8:65a4de035c3c 969 LPC_SSP1->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 970 }
dreschpe 8:65a4de035c3c 971
dreschpe 8:65a4de035c3c 972 bitmap_ptr += ((h - 1)* (w + padd));
dreschpe 8:65a4de035c3c 973 #if defined USE_DMA
dreschpe 8:65a4de035c3c 974 for (j = 0; j < h; j++) { //Lines
dreschpe 8:65a4de035c3c 975 LPC_GPDMA->DMACIntTCClear = 0x1;
dreschpe 8:65a4de035c3c 976 LPC_GPDMA->DMACIntErrClr = 0x1;
dreschpe 8:65a4de035c3c 977 LPC_GPDMACH0->DMACCSrcAddr = (uint32_t)bitmap_ptr;
dreschpe 8:65a4de035c3c 978 LPC_GPDMACH0->DMACCControl = w | (1UL << 18) | (1UL << 21) | (1UL << 31) | DMA_CHANNEL_SRC_INC ; // 16 bit transfer , address increment, interrupt
dreschpe 8:65a4de035c3c 979 LPC_GPDMACH0->DMACCConfig = DMA_CHANNEL_ENABLE | DMA_TRANSFER_TYPE_M2P | (spi_port ? DMA_DEST_SSP1_TX : DMA_DEST_SSP0_TX);
dreschpe 8:65a4de035c3c 980 LPC_GPDMA->DMACSoftSReq = 0x1;
dreschpe 8:65a4de035c3c 981 do {
dreschpe 8:65a4de035c3c 982 } while ((LPC_GPDMA->DMACRawIntTCStat & 0x01) == 0); // DMA is running
dreschpe 8:65a4de035c3c 983
dreschpe 8:65a4de035c3c 984 bitmap_ptr -= w;
dreschpe 8:65a4de035c3c 985 bitmap_ptr -= padd;
dreschpe 8:65a4de035c3c 986 }
dreschpe 8:65a4de035c3c 987 #else
dreschpe 8:65a4de035c3c 988 unsigned int i;
dreschpe 8:65a4de035c3c 989 for (j = 0; j < h; j++) { //Lines
dreschpe 8:65a4de035c3c 990 for (i = 0; i < w; i++) { // copy pixel data to TFT
dreschpe 8:65a4de035c3c 991 _spi.write(*bitmap_ptr); // one line
dreschpe 8:65a4de035c3c 992 bitmap_ptr++;
dreschpe 8:65a4de035c3c 993 }
dreschpe 8:65a4de035c3c 994 bitmap_ptr -= 2*w;
dreschpe 8:65a4de035c3c 995 bitmap_ptr -= padd;
dreschpe 8:65a4de035c3c 996 }
dreschpe 8:65a4de035c3c 997 #endif
dreschpe 8:65a4de035c3c 998 if (spi_port == 0) { // TFT on SSP0
dreschpe 8:65a4de035c3c 999 do {
dreschpe 8:65a4de035c3c 1000 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 8:65a4de035c3c 1001 } else {
dreschpe 8:65a4de035c3c 1002 do {
dreschpe 8:65a4de035c3c 1003 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 8:65a4de035c3c 1004 }
dreschpe 9:a63fd1ad41b0 1005 #else // use mbed lib
dreschpe 17:d7e48335953e 1006 bitmap_ptr += ((h - 1)* (w + padd));
dreschpe 9:a63fd1ad41b0 1007 _spi.format(8,3); // 8 bit Mode 3
dreschpe 9:a63fd1ad41b0 1008 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 9:a63fd1ad41b0 1009 _spi.format(16,3); // switch to 16 bit Mode 3
dreschpe 9:a63fd1ad41b0 1010 unsigned int i;
dreschpe 9:a63fd1ad41b0 1011 for (j = 0; j < h; j++) { //Lines
dreschpe 9:a63fd1ad41b0 1012 for (i = 0; i < w; i++) { // copy pixel data to TFT
dreschpe 9:a63fd1ad41b0 1013 _spi.write(*bitmap_ptr); // one line
dreschpe 9:a63fd1ad41b0 1014 bitmap_ptr++;
dreschpe 9:a63fd1ad41b0 1015 }
dreschpe 9:a63fd1ad41b0 1016 bitmap_ptr -= 2*w;
dreschpe 9:a63fd1ad41b0 1017 bitmap_ptr -= padd;
dreschpe 9:a63fd1ad41b0 1018 }
dreschpe 9:a63fd1ad41b0 1019 #endif
dreschpe 8:65a4de035c3c 1020 _cs = 1;
dreschpe 8:65a4de035c3c 1021 WindowMax();
dreschpe 8:65a4de035c3c 1022 }
dreschpe 8:65a4de035c3c 1023
dreschpe 8:65a4de035c3c 1024
dreschpe 8:65a4de035c3c 1025 int SPI_TFT::BMP_16(unsigned int x, unsigned int y, const char *Name_BMP)
dreschpe 8:65a4de035c3c 1026 {
dreschpe 8:65a4de035c3c 1027
dreschpe 8:65a4de035c3c 1028 #define OffsetPixelWidth 18
dreschpe 8:65a4de035c3c 1029 #define OffsetPixelHeigh 22
dreschpe 8:65a4de035c3c 1030 #define OffsetFileSize 34
dreschpe 8:65a4de035c3c 1031 #define OffsetPixData 10
dreschpe 8:65a4de035c3c 1032 #define OffsetBPP 28
dreschpe 8:65a4de035c3c 1033
dreschpe 8:65a4de035c3c 1034 char filename[50];
dreschpe 8:65a4de035c3c 1035 unsigned char BMP_Header[54];
dreschpe 8:65a4de035c3c 1036 unsigned short BPP_t;
dreschpe 8:65a4de035c3c 1037 unsigned int PixelWidth,PixelHeigh,start_data;
dreschpe 8:65a4de035c3c 1038 unsigned int i,off;
dreschpe 8:65a4de035c3c 1039 int padd,j;
dreschpe 8:65a4de035c3c 1040 unsigned short *line;
dreschpe 8:65a4de035c3c 1041
dreschpe 8:65a4de035c3c 1042 // get the filename
dreschpe 8:65a4de035c3c 1043 LocalFileSystem local("local");
dreschpe 8:65a4de035c3c 1044 sprintf(&filename[0],"/local/");
dreschpe 8:65a4de035c3c 1045 i=7;
dreschpe 8:65a4de035c3c 1046 while (*Name_BMP!='\0') {
dreschpe 8:65a4de035c3c 1047 filename[i++]=*Name_BMP++;
dreschpe 8:65a4de035c3c 1048 }
dreschpe 8:65a4de035c3c 1049
dreschpe 8:65a4de035c3c 1050 fprintf(stderr, "filename : %s \n\r",filename);
dreschpe 8:65a4de035c3c 1051
dreschpe 8:65a4de035c3c 1052 FILE *Image = fopen((const char *)&filename[0], "rb"); // open the bmp file
dreschpe 8:65a4de035c3c 1053 if (!Image) {
dreschpe 8:65a4de035c3c 1054 return(0); // error file not found !
dreschpe 8:65a4de035c3c 1055 }
dreschpe 8:65a4de035c3c 1056
dreschpe 8:65a4de035c3c 1057 fread(&BMP_Header[0],1,54,Image); // get the BMP Header
dreschpe 8:65a4de035c3c 1058
dreschpe 8:65a4de035c3c 1059 if (BMP_Header[0] != 0x42 || BMP_Header[1] != 0x4D) { // check magic byte
dreschpe 8:65a4de035c3c 1060 fclose(Image);
dreschpe 8:65a4de035c3c 1061 return(-1); // error no BMP file
dreschpe 8:65a4de035c3c 1062 }
dreschpe 8:65a4de035c3c 1063
dreschpe 8:65a4de035c3c 1064 BPP_t = BMP_Header[OffsetBPP] + (BMP_Header[OffsetBPP + 1] << 8);
dreschpe 8:65a4de035c3c 1065 if (BPP_t != 0x0010) {
dreschpe 8:65a4de035c3c 1066 fclose(Image);
dreschpe 8:65a4de035c3c 1067 return(-2); // error no 16 bit BMP
dreschpe 8:65a4de035c3c 1068 }
dreschpe 8:65a4de035c3c 1069
dreschpe 8:65a4de035c3c 1070 PixelHeigh = BMP_Header[OffsetPixelHeigh] + (BMP_Header[OffsetPixelHeigh + 1] << 8) + (BMP_Header[OffsetPixelHeigh + 2] << 16) + (BMP_Header[OffsetPixelHeigh + 3] << 24);
dreschpe 8:65a4de035c3c 1071 PixelWidth = BMP_Header[OffsetPixelWidth] + (BMP_Header[OffsetPixelWidth + 1] << 8) + (BMP_Header[OffsetPixelWidth + 2] << 16) + (BMP_Header[OffsetPixelWidth + 3] << 24);
dreschpe 8:65a4de035c3c 1072 if (PixelHeigh > height() + y || PixelWidth > width() + x) {
dreschpe 8:65a4de035c3c 1073 fclose(Image);
dreschpe 8:65a4de035c3c 1074 return(-3); // to big
dreschpe 8:65a4de035c3c 1075 }
dreschpe 8:65a4de035c3c 1076
dreschpe 8:65a4de035c3c 1077 start_data = BMP_Header[OffsetPixData] + (BMP_Header[OffsetPixData + 1] << 8) + (BMP_Header[OffsetPixData + 2] << 16) + (BMP_Header[OffsetPixData + 3] << 24);
dreschpe 8:65a4de035c3c 1078
dreschpe 8:65a4de035c3c 1079 line = (unsigned short *) malloc (2 * PixelWidth); // we need a buffer for a line
dreschpe 8:65a4de035c3c 1080 if (line == NULL) {
dreschpe 8:65a4de035c3c 1081 return(-4); // error no memory
dreschpe 8:65a4de035c3c 1082 }
dreschpe 8:65a4de035c3c 1083
dreschpe 8:65a4de035c3c 1084 // the bmp lines are padded to multiple of 4 bytes
dreschpe 8:65a4de035c3c 1085 padd = -1;
dreschpe 8:65a4de035c3c 1086 do {
dreschpe 8:65a4de035c3c 1087 padd ++;
dreschpe 8:65a4de035c3c 1088 } while ((PixelWidth * 2 + padd)%4 != 0);
dreschpe 8:65a4de035c3c 1089
dreschpe 8:65a4de035c3c 1090
dreschpe 8:65a4de035c3c 1091 //fseek(Image, 70 ,SEEK_SET);
dreschpe 8:65a4de035c3c 1092 window(x, y,PixelWidth ,PixelHeigh);
dreschpe 8:65a4de035c3c 1093 wr_cmd(0x22);
dreschpe 8:65a4de035c3c 1094 _cs = 0;
dreschpe 9:a63fd1ad41b0 1095 #if defined NO_MBED_LIB
dreschpe 8:65a4de035c3c 1096 if (spi_port == 0) { // TFT on SSP0
dreschpe 8:65a4de035c3c 1097 #if defined USE_DMA
dreschpe 8:65a4de035c3c 1098 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP0->DR; // we send to SSP0
dreschpe 8:65a4de035c3c 1099 /* Enable SSP0 for DMA. */
dreschpe 8:65a4de035c3c 1100 LPC_SSP0->DMACR = 0x2;
dreschpe 8:65a4de035c3c 1101 #endif
dreschpe 8:65a4de035c3c 1102 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 8:65a4de035c3c 1103 LPC_SSP0->DR = 0x72; // start Data
dreschpe 8:65a4de035c3c 1104 LPC_SSP0->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 1105
dreschpe 8:65a4de035c3c 1106 } else {
dreschpe 8:65a4de035c3c 1107 #if defined USE_DMA
dreschpe 8:65a4de035c3c 1108 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP1->DR; // we send to SSP1
dreschpe 8:65a4de035c3c 1109 /* Enable SSP1 for DMA. */
dreschpe 8:65a4de035c3c 1110 LPC_SSP1->DMACR = 0x2;
dreschpe 8:65a4de035c3c 1111 #endif
dreschpe 8:65a4de035c3c 1112 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 8:65a4de035c3c 1113 LPC_SSP1->DR = 0x72; // start Data
dreschpe 8:65a4de035c3c 1114 LPC_SSP1->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 1115 }
dreschpe 8:65a4de035c3c 1116 for (j = PixelHeigh - 1; j >= 0; j--) { //Lines bottom up
dreschpe 8:65a4de035c3c 1117 off = j * (PixelWidth * 2 + padd) + start_data; // start of line
dreschpe 8:65a4de035c3c 1118 fseek(Image, off ,SEEK_SET);
dreschpe 8:65a4de035c3c 1119 fread(line,1,PixelWidth * 2,Image); // read a line - slow !
dreschpe 8:65a4de035c3c 1120 #if defined USE_DMA
dreschpe 8:65a4de035c3c 1121 LPC_GPDMA->DMACIntTCClear = 0x1;
dreschpe 8:65a4de035c3c 1122 LPC_GPDMA->DMACIntErrClr = 0x1;
dreschpe 8:65a4de035c3c 1123 LPC_GPDMACH0->DMACCSrcAddr = (uint32_t)line;
dreschpe 8:65a4de035c3c 1124 LPC_GPDMACH0->DMACCControl = PixelWidth | (1UL << 18) | (1UL << 21) | (1UL << 31) | DMA_CHANNEL_SRC_INC ; // 16 bit transfer , address increment, interrupt
dreschpe 8:65a4de035c3c 1125 LPC_GPDMACH0->DMACCConfig = DMA_CHANNEL_ENABLE | DMA_TRANSFER_TYPE_M2P | (spi_port ? DMA_DEST_SSP1_TX : DMA_DEST_SSP0_TX);
dreschpe 8:65a4de035c3c 1126 LPC_GPDMA->DMACSoftSReq = 0x1;
dreschpe 8:65a4de035c3c 1127 do {
dreschpe 8:65a4de035c3c 1128 } while ((LPC_GPDMA->DMACRawIntTCStat & 0x01) == 0); // DMA is running
dreschpe 8:65a4de035c3c 1129 #else
dreschpe 8:65a4de035c3c 1130 for (i = 0; i < PixelWidth; i++) { // copy pixel data to TFT
dreschpe 8:65a4de035c3c 1131 _spi.write(line[i]); // one 16 bit pixel
dreschpe 8:65a4de035c3c 1132 }
dreschpe 8:65a4de035c3c 1133 #endif
dreschpe 8:65a4de035c3c 1134 }
dreschpe 8:65a4de035c3c 1135 if (spi_port == 0) { // TFT on SSP0
dreschpe 8:65a4de035c3c 1136 do {
dreschpe 8:65a4de035c3c 1137 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 8:65a4de035c3c 1138 } else {
dreschpe 8:65a4de035c3c 1139 do {
dreschpe 8:65a4de035c3c 1140 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 8:65a4de035c3c 1141 }
dreschpe 9:a63fd1ad41b0 1142
dreschpe 9:a63fd1ad41b0 1143 #else // use mbed lib
dreschpe 9:a63fd1ad41b0 1144 _spi.format(8,3); // 8 bit Mode 3
dreschpe 9:a63fd1ad41b0 1145 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 9:a63fd1ad41b0 1146 _spi.format(16,3); // switch to 16 bit Mode 3
dreschpe 9:a63fd1ad41b0 1147 for (j = PixelHeigh - 1; j >= 0; j--) { //Lines bottom up
dreschpe 9:a63fd1ad41b0 1148 off = j * (PixelWidth * 2 + padd) + start_data; // start of line
dreschpe 9:a63fd1ad41b0 1149 fseek(Image, off ,SEEK_SET);
dreschpe 9:a63fd1ad41b0 1150 fread(line,1,PixelWidth * 2,Image); // read a line - slow !
dreschpe 9:a63fd1ad41b0 1151 for (i = 0; i < PixelWidth; i++) { // copy pixel data to TFT
dreschpe 9:a63fd1ad41b0 1152 _spi.write(line[i]); // one 16 bit pixel
dreschpe 9:a63fd1ad41b0 1153 }
dreschpe 9:a63fd1ad41b0 1154 }
dreschpe 9:a63fd1ad41b0 1155 #endif
dreschpe 8:65a4de035c3c 1156 _cs = 1;
dreschpe 8:65a4de035c3c 1157 free (line);
dreschpe 8:65a4de035c3c 1158 fclose(Image);
dreschpe 8:65a4de035c3c 1159 WindowMax();
dreschpe 8:65a4de035c3c 1160 return(1);
dreschpe 0:de9d1462a835 1161 }