Users » dreschpe » Code » FT800_2

Lib for FTDI FT800 graphic controller "EVE" The API is changed from the FTDI original names. It use smaller names now. DL() will add something to the display list instead of Ft_App_WrCoCmd_Buffer ... The FTDI programmer Guide is also using this commands.

Dependents: FT800_RGB_demo FT800_RGB_demo2 FT800_demo_for_habr Temp_&_RH_at_TFT-demo ... more

Fork of FT800 by Peter Drescher

The mbed is talking thru the SPI interface with the graphic engine. We have to set up a list of Commands and send them to the FT800 to get graphics.

Hardware

1. VM800C development modules from FTDI : http://www.ftdichip.com/Products/Modules/VM800C.html

The modules come with different size lcd. 3.5", 4.3" or 5" or without. /media/uploads/dreschpe/ftdi_eve.jpg The picture shows a modified board, because my lcd had a different pinout. The mbed is connected to the pin header on the bottom.

2. EVBEVE-FT800 board from GLYN: http://www.glyn.com/News-Events/Newsletter/Newsletter-2013/October-2013/A-quick-start-for-EVE-Requires-no-basic-knowledge-graphics-sound-and-touch-can-all-be-learned-in-minutes

The module has a 40 pin flex cable connector to connect a display out of the EDT series.

/media/uploads/dreschpe/glyn_eve.jpg

The mbed is connected via the pin header on the left. If you use this board with a EDT display you have to uncomment the #define Inv_Backlite in FT_LCD_Type.h, because the backlight dimming is inverted.

3. ConnectEVE board from MikroElektronika http://www.mikroe.com/add-on-boards/display/connecteve/#headers_10 The board has also a pin header to connect the mbed. - not tested, but it looks like the other boards.

4. ADAM arduino shield http://www.4dsystems.com.au/product/4DLCD_FT843/ Component page : http://mbed.org/components/ADAM/

Works with the NUCLEO boards, but you have to patch three wires.

/media/uploads/dreschpe/adam.jpg

Connection

We need 5 signals to connect to the mbed. SCK, MOSI and MISO are connected to a SPI channel. SS is the chip select signal and PD work as powerdown. The additional INT signal is not used at the moment. It is possible to generate a interrupt signal, but at the moment you have to poll the status register of the FT800 to see if a command is finished.

Software

This lib is based on the demo code from FTDI. If you want to use it, you have to read the programming manual : http://www.ftdichip.com/Support/Documents/ProgramGuides/FT800%20Programmers%20Guide.pdf

See my demo : http://mbed.org/users/dreschpe/code/FT800_RGB_demo/

FT_CoPro_Cmds.cpp@2:ab74a9a05970, 2014-01-04 (annotated)

Committer:: dreschpe
Date:: Sat Jan 04 13:56:38 2014 +0000
Revision:: 2:ab74a9a05970
Parent:: 0:5e013296b353
Child:: 3:392d2c733c68

add doku

Who changed what in which revision?

User	Revision	Line number	New contents of line
dreschpe	2:ab74a9a05970	1	/* mbed Library for FTDI FT800 Enbedded Video Engine "EVE"
dreschpe	2:ab74a9a05970	2	* based on Original Code Sample from FTDI
dreschpe	2:ab74a9a05970	3	* ported to mbed by Peter Drescher, DC2PD 2014
dreschpe	2:ab74a9a05970	4	* Released under the MIT License: http://mbed.org/license/mit */
dreschpe	0:5e013296b353	5
dreschpe	0:5e013296b353	6	#include "FT_Platform.h"
dreschpe	0:5e013296b353	7
dreschpe	0:5e013296b353	8
dreschpe	0:5e013296b353	9	ft_void_t FT800::Ft_Gpu_Copro_SendCmd( ft_uint32_t cmd)
dreschpe	0:5e013296b353	10	{
dreschpe	0:5e013296b353	11	Ft_Gpu_Hal_Transfer32( cmd);
dreschpe	0:5e013296b353	12	}
dreschpe	0:5e013296b353	13
dreschpe	0:5e013296b353	14	ft_void_t FT800::Ft_Gpu_CoCmd_SendStr( const ft_char8_t *s)
dreschpe	0:5e013296b353	15	{
dreschpe	0:5e013296b353	16	Ft_Gpu_Hal_TransferString( s);
dreschpe	0:5e013296b353	17	}
dreschpe	0:5e013296b353	18
dreschpe	0:5e013296b353	19
dreschpe	0:5e013296b353	20	ft_void_t FT800::Ft_Gpu_CoCmd_StartFunc( ft_uint16_t count)
dreschpe	0:5e013296b353	21	{
dreschpe	0:5e013296b353	22	Ft_Gpu_Hal_CheckCmdBuffer( count);
dreschpe	0:5e013296b353	23	Ft_Gpu_Hal_StartCmdTransfer( FT_GPU_WRITE,count);
dreschpe	0:5e013296b353	24	}
dreschpe	0:5e013296b353	25
dreschpe	0:5e013296b353	26	ft_void_t FT800::Ft_Gpu_CoCmd_EndFunc( ft_uint16_t count)
dreschpe	0:5e013296b353	27	{
dreschpe	0:5e013296b353	28	Ft_Gpu_Hal_EndTransfer( );
dreschpe	0:5e013296b353	29	Ft_Gpu_Hal_Updatecmdfifo( count);
dreschpe	0:5e013296b353	30	}
dreschpe	0:5e013296b353	31
dreschpe	0:5e013296b353	32	ft_void_t FT800::Ft_Gpu_CoCmd_Text( ft_int16_t x, ft_int16_t y, ft_int16_t font, ft_uint16_t options, const ft_char8_t* s)
dreschpe	0:5e013296b353	33	{
dreschpe	0:5e013296b353	34	Ft_Gpu_CoCmd_StartFunc( FT_CMD_SIZE*3 + strlen(s) + 1);
dreschpe	0:5e013296b353	35	Ft_Gpu_Copro_SendCmd( CMD_TEXT);
dreschpe	0:5e013296b353	36	//Ft_Gpu_Copro_SendCmd( (((ft_uint32_t)y<<16)\|(ft_uint32_t)x));
dreschpe	0:5e013296b353	37	Ft_Gpu_Copro_SendCmd( (((ft_uint32_t)y<<16)\|(x & 0xffff)));
dreschpe	0:5e013296b353	38	Ft_Gpu_Copro_SendCmd( (((ft_uint32_t)options<<16)\|(ft_uint32_t)font));
dreschpe	0:5e013296b353	39	Ft_Gpu_CoCmd_SendStr( s);
dreschpe	0:5e013296b353	40	Ft_Gpu_CoCmd_EndFunc( (FT_CMD_SIZE*3 + strlen(s) + 1));
dreschpe	0:5e013296b353	41	}
dreschpe	0:5e013296b353	42
dreschpe	0:5e013296b353	43	ft_void_t FT800::Ft_Gpu_CoCmd_Number( ft_int16_t x, ft_int16_t y, ft_int16_t font, ft_uint16_t options, ft_int32_t n)
dreschpe	0:5e013296b353	44	{
dreschpe	0:5e013296b353	45	Ft_Gpu_CoCmd_StartFunc( FT_CMD_SIZE*4);
dreschpe	0:5e013296b353	46	Ft_Gpu_Copro_SendCmd( CMD_NUMBER);
dreschpe	0:5e013296b353	47	Ft_Gpu_Copro_SendCmd( (((ft_uint32_t)y<<16)\|(x & 0xffff)));
dreschpe	0:5e013296b353	48	Ft_Gpu_Copro_SendCmd( (((ft_uint32_t)options<<16)\|font));
dreschpe	0:5e013296b353	49	Ft_Gpu_Copro_SendCmd( n);
dreschpe	0:5e013296b353	50	Ft_Gpu_CoCmd_EndFunc( (FT_CMD_SIZE*4));
dreschpe	0:5e013296b353	51	}
dreschpe	0:5e013296b353	52
dreschpe	0:5e013296b353	53	ft_void_t FT800::Ft_Gpu_CoCmd_LoadIdentity( )
dreschpe	0:5e013296b353	54	{
dreschpe	0:5e013296b353	55	Ft_Gpu_CoCmd_StartFunc( FT_CMD_SIZE*1);
dreschpe	0:5e013296b353	56	Ft_Gpu_Copro_SendCmd( CMD_LOADIDENTITY);
dreschpe	0:5e013296b353	57	Ft_Gpu_CoCmd_EndFunc( (FT_CMD_SIZE*1));
dreschpe	0:5e013296b353	58	}
dreschpe	0:5e013296b353	59
dreschpe	0:5e013296b353	60	ft_void_t FT800::Ft_Gpu_CoCmd_Toggle( ft_int16_t x, ft_int16_t y, ft_int16_t w, ft_int16_t font, ft_uint16_t options, ft_uint16_t state, const ft_char8_t* s)
dreschpe	0:5e013296b353	61	{
dreschpe	0:5e013296b353	62	Ft_Gpu_CoCmd_StartFunc( FT_CMD_SIZE*4 + strlen(s) + 1);
dreschpe	0:5e013296b353	63	Ft_Gpu_Copro_SendCmd( CMD_TOGGLE);
dreschpe	0:5e013296b353	64	Ft_Gpu_Copro_SendCmd( (((ft_uint32_t)y<<16)\|(x & 0xffff)));
dreschpe	0:5e013296b353	65	Ft_Gpu_Copro_SendCmd( (((ft_uint32_t)font<<16)\|w));
dreschpe	0:5e013296b353	66	Ft_Gpu_Copro_SendCmd( (((ft_uint32_t)state<<16)\|options));
dreschpe	0:5e013296b353	67	Ft_Gpu_CoCmd_SendStr( s);
dreschpe	0:5e013296b353	68	Ft_Gpu_CoCmd_EndFunc( (FT_CMD_SIZE*4 + strlen(s) + 1));
dreschpe	0:5e013296b353	69	}
dreschpe	0:5e013296b353	70
dreschpe	0:5e013296b353	71	/* Error handling for val is not done, so better to always use range of 65535 in order that needle is drawn within display region */
dreschpe	0:5e013296b353	72	ft_void_t FT800::Ft_Gpu_CoCmd_Gauge( ft_int16_t x, ft_int16_t y, ft_int16_t r, ft_uint16_t options, ft_uint16_t major, ft_uint16_t minor, ft_uint16_t val, ft_uint16_t range)
dreschpe	0:5e013296b353	73	{
dreschpe	0:5e013296b353	74	Ft_Gpu_CoCmd_StartFunc( FT_CMD_SIZE*5);
dreschpe	0:5e013296b353	75	Ft_Gpu_Copro_SendCmd( CMD_GAUGE);
dreschpe	0:5e013296b353	76	Ft_Gpu_Copro_SendCmd( (((ft_uint32_t)y<<16)\|(x & 0xffff)));
dreschpe	0:5e013296b353	77	Ft_Gpu_Copro_SendCmd( (((ft_uint32_t)options<<16)\|r));
dreschpe	0:5e013296b353	78	Ft_Gpu_Copro_SendCmd( (((ft_uint32_t)minor<<16)\|major));
dreschpe	0:5e013296b353	79	Ft_Gpu_Copro_SendCmd( (((ft_uint32_t)range<<16)\|val));
dreschpe	0:5e013296b353	80	Ft_Gpu_CoCmd_EndFunc( (FT_CMD_SIZE*5));
dreschpe	0:5e013296b353	81	}
dreschpe	0:5e013296b353	82
dreschpe	0:5e013296b353	83	ft_void_t FT800::Ft_Gpu_CoCmd_RegRead( ft_uint32_t ptr, ft_uint32_t result)
dreschpe	0:5e013296b353	84	{
dreschpe	0:5e013296b353	85	Ft_Gpu_CoCmd_StartFunc( FT_CMD_SIZE*3);
dreschpe	0:5e013296b353	86	Ft_Gpu_Copro_SendCmd( CMD_REGREAD);
dreschpe	0:5e013296b353	87	Ft_Gpu_Copro_SendCmd( ptr);
dreschpe	0:5e013296b353	88	Ft_Gpu_Copro_SendCmd( 0);
dreschpe	0:5e013296b353	89	Ft_Gpu_CoCmd_EndFunc( (FT_CMD_SIZE*3));
dreschpe	0:5e013296b353	90
dreschpe	0:5e013296b353	91	}
dreschpe	0:5e013296b353	92
dreschpe	0:5e013296b353	93	ft_void_t FT800::Ft_Gpu_CoCmd_GetProps( ft_uint32_t ptr, ft_uint32_t w, ft_uint32_t h)
dreschpe	0:5e013296b353	94	{
dreschpe	0:5e013296b353	95	Ft_Gpu_CoCmd_StartFunc( FT_CMD_SIZE*4);
dreschpe	0:5e013296b353	96	Ft_Gpu_Copro_SendCmd( CMD_GETPROPS);
dreschpe	0:5e013296b353	97	Ft_Gpu_Copro_SendCmd( ptr);
dreschpe	0:5e013296b353	98	Ft_Gpu_Copro_SendCmd( w);
dreschpe	0:5e013296b353	99	Ft_Gpu_Copro_SendCmd( h);
dreschpe	0:5e013296b353	100	Ft_Gpu_CoCmd_EndFunc( (FT_CMD_SIZE*4));
dreschpe	0:5e013296b353	101	}
dreschpe	0:5e013296b353	102
dreschpe	0:5e013296b353	103	ft_void_t FT800::Ft_Gpu_CoCmd_Memcpy( ft_uint32_t dest, ft_uint32_t src, ft_uint32_t num)
dreschpe	0:5e013296b353	104	{
dreschpe	0:5e013296b353	105	Ft_Gpu_CoCmd_StartFunc( FT_CMD_SIZE*4);
dreschpe	0:5e013296b353	106	Ft_Gpu_Copro_SendCmd( CMD_MEMCPY);
dreschpe	0:5e013296b353	107	Ft_Gpu_Copro_SendCmd( dest);
dreschpe	0:5e013296b353	108	Ft_Gpu_Copro_SendCmd( src);
dreschpe	0:5e013296b353	109	Ft_Gpu_Copro_SendCmd( num);
dreschpe	0:5e013296b353	110	Ft_Gpu_CoCmd_EndFunc( (FT_CMD_SIZE*4));
dreschpe	0:5e013296b353	111	}
dreschpe	0:5e013296b353	112
dreschpe	0:5e013296b353	113	ft_void_t FT800::Ft_Gpu_CoCmd_Spinner( ft_int16_t x, ft_int16_t y, ft_uint16_t style, ft_uint16_t scale)
dreschpe	0:5e013296b353	114	{
dreschpe	0:5e013296b353	115	Ft_Gpu_CoCmd_StartFunc( FT_CMD_SIZE*3);
dreschpe	0:5e013296b353	116	Ft_Gpu_Copro_SendCmd( CMD_SPINNER);
dreschpe	0:5e013296b353	117	Ft_Gpu_Copro_SendCmd( (((ft_uint32_t)y<<16)\|(x & 0xffff)));
dreschpe	0:5e013296b353	118	Ft_Gpu_Copro_SendCmd( (((ft_uint32_t)scale<<16)\|style));
dreschpe	0:5e013296b353	119	Ft_Gpu_CoCmd_EndFunc( (FT_CMD_SIZE*3));
dreschpe	0:5e013296b353	120	}
dreschpe	0:5e013296b353	121
dreschpe	0:5e013296b353	122	ft_void_t FT800::Ft_Gpu_CoCmd_BgColor( ft_uint32_t c)
dreschpe	0:5e013296b353	123	{
dreschpe	0:5e013296b353	124	Ft_Gpu_CoCmd_StartFunc( FT_CMD_SIZE*2);
dreschpe	0:5e013296b353	125	Ft_Gpu_Copro_SendCmd( CMD_BGCOLOR);
dreschpe	0:5e013296b353	126	Ft_Gpu_Copro_SendCmd( c);
dreschpe	0:5e013296b353	127	Ft_Gpu_CoCmd_EndFunc( (FT_CMD_SIZE*2));
dreschpe	0:5e013296b353	128	}
dreschpe	0:5e013296b353	129
dreschpe	0:5e013296b353	130	ft_void_t FT800::Ft_Gpu_CoCmd_Swap()
dreschpe	0:5e013296b353	131	{
dreschpe	0:5e013296b353	132	Ft_Gpu_CoCmd_StartFunc( FT_CMD_SIZE*1);
dreschpe	0:5e013296b353	133	Ft_Gpu_Copro_SendCmd( CMD_SWAP);
dreschpe	0:5e013296b353	134	Ft_Gpu_CoCmd_EndFunc( (FT_CMD_SIZE*1));
dreschpe	0:5e013296b353	135	}
dreschpe	0:5e013296b353	136
dreschpe	0:5e013296b353	137	ft_void_t FT800::Ft_Gpu_CoCmd_Inflate( ft_uint32_t ptr)
dreschpe	0:5e013296b353	138	{
dreschpe	0:5e013296b353	139	Ft_Gpu_CoCmd_StartFunc( FT_CMD_SIZE*2);
dreschpe	0:5e013296b353	140	Ft_Gpu_Copro_SendCmd( CMD_INFLATE);
dreschpe	0:5e013296b353	141	Ft_Gpu_Copro_SendCmd( ptr);
dreschpe	0:5e013296b353	142	Ft_Gpu_CoCmd_EndFunc( (FT_CMD_SIZE*2));
dreschpe	0:5e013296b353	143	}
dreschpe	0:5e013296b353	144
dreschpe	0:5e013296b353	145	ft_void_t FT800::Ft_Gpu_CoCmd_Translate( ft_int32_t tx, ft_int32_t ty)
dreschpe	0:5e013296b353	146	{
dreschpe	0:5e013296b353	147	Ft_Gpu_CoCmd_StartFunc( FT_CMD_SIZE*3);
dreschpe	0:5e013296b353	148	Ft_Gpu_Copro_SendCmd( CMD_TRANSLATE);
dreschpe	0:5e013296b353	149	Ft_Gpu_Copro_SendCmd( tx);
dreschpe	0:5e013296b353	150	Ft_Gpu_Copro_SendCmd( ty);
dreschpe	0:5e013296b353	151	Ft_Gpu_CoCmd_EndFunc( (FT_CMD_SIZE*3));
dreschpe	0:5e013296b353	152	}
dreschpe	0:5e013296b353	153
dreschpe	0:5e013296b353	154	ft_void_t FT800::Ft_Gpu_CoCmd_Stop()
dreschpe	0:5e013296b353	155	{
dreschpe	0:5e013296b353	156	Ft_Gpu_CoCmd_StartFunc( FT_CMD_SIZE*1);
dreschpe	0:5e013296b353	157	Ft_Gpu_Copro_SendCmd( CMD_STOP);
dreschpe	0:5e013296b353	158	Ft_Gpu_CoCmd_EndFunc( (FT_CMD_SIZE*1));
dreschpe	0:5e013296b353	159	}
dreschpe	0:5e013296b353	160
dreschpe	0:5e013296b353	161	ft_void_t FT800::Ft_Gpu_CoCmd_Slider( ft_int16_t x, ft_int16_t y, ft_int16_t w, ft_int16_t h, ft_uint16_t options, ft_uint16_t val, ft_uint16_t range)
dreschpe	0:5e013296b353	162	{
dreschpe	0:5e013296b353	163	Ft_Gpu_CoCmd_StartFunc( FT_CMD_SIZE*5);
dreschpe	0:5e013296b353	164	Ft_Gpu_Copro_SendCmd( CMD_SLIDER);
dreschpe	0:5e013296b353	165	Ft_Gpu_Copro_SendCmd( (((ft_uint32_t)y<<16)\|(x & 0xffff)));
dreschpe	0:5e013296b353	166	Ft_Gpu_Copro_SendCmd( (((ft_uint32_t)h<<16)\|w));
dreschpe	0:5e013296b353	167	Ft_Gpu_Copro_SendCmd( (((ft_uint32_t)val<<16)\|options));
dreschpe	0:5e013296b353	168	Ft_Gpu_Copro_SendCmd( range);
dreschpe	0:5e013296b353	169	Ft_Gpu_CoCmd_EndFunc( (FT_CMD_SIZE*5));
dreschpe	0:5e013296b353	170	}
dreschpe	0:5e013296b353	171
dreschpe	0:5e013296b353	172	ft_void_t FT800::Ft_Gpu_CoCmd_TouchTransform( ft_int32_t x0, ft_int32_t y0, ft_int32_t x1, ft_int32_t y1, ft_int32_t x2, ft_int32_t y2, ft_int32_t tx0, ft_int32_t ty0, ft_int32_t tx1, ft_int32_t ty1, ft_int32_t tx2, ft_int32_t ty2, ft_uint16_t result)
dreschpe	0:5e013296b353	173	{
dreschpe	0:5e013296b353	174	Ft_Gpu_CoCmd_StartFunc( FT_CMD_SIZE62+FT_CMD_SIZE*2);
dreschpe	0:5e013296b353	175	Ft_Gpu_Copro_SendCmd( CMD_TOUCH_TRANSFORM);
dreschpe	0:5e013296b353	176	Ft_Gpu_Copro_SendCmd( x0);
dreschpe	0:5e013296b353	177	Ft_Gpu_Copro_SendCmd( y0);
dreschpe	0:5e013296b353	178	Ft_Gpu_Copro_SendCmd( x1);
dreschpe	0:5e013296b353	179	Ft_Gpu_Copro_SendCmd( y1);
dreschpe	0:5e013296b353	180	Ft_Gpu_Copro_SendCmd( x2);
dreschpe	0:5e013296b353	181	Ft_Gpu_Copro_SendCmd( y2);
dreschpe	0:5e013296b353	182	Ft_Gpu_Copro_SendCmd( tx0);
dreschpe	0:5e013296b353	183	Ft_Gpu_Copro_SendCmd( ty0);
dreschpe	0:5e013296b353	184	Ft_Gpu_Copro_SendCmd( tx1);
dreschpe	0:5e013296b353	185	Ft_Gpu_Copro_SendCmd( ty1);
dreschpe	0:5e013296b353	186	Ft_Gpu_Copro_SendCmd( tx2);
dreschpe	0:5e013296b353	187	Ft_Gpu_Copro_SendCmd( ty2);
dreschpe	0:5e013296b353	188	Ft_Gpu_Copro_SendCmd( result);
dreschpe	0:5e013296b353	189	Ft_Gpu_CoCmd_EndFunc( (FT_CMD_SIZE62+FT_CMD_SIZE*2));
dreschpe	0:5e013296b353	190	}
dreschpe	0:5e013296b353	191
dreschpe	0:5e013296b353	192	ft_void_t FT800::Ft_Gpu_CoCmd_Interrupt( ft_uint32_t ms)
dreschpe	0:5e013296b353	193	{
dreschpe	0:5e013296b353	194	Ft_Gpu_CoCmd_StartFunc( FT_CMD_SIZE*2);
dreschpe	0:5e013296b353	195	Ft_Gpu_Copro_SendCmd( CMD_INTERRUPT);
dreschpe	0:5e013296b353	196	Ft_Gpu_Copro_SendCmd( ms);
dreschpe	0:5e013296b353	197	Ft_Gpu_CoCmd_EndFunc( (FT_CMD_SIZE*2));
dreschpe	0:5e013296b353	198	}
dreschpe	0:5e013296b353	199
dreschpe	0:5e013296b353	200	ft_void_t FT800::Ft_Gpu_CoCmd_FgColor( ft_uint32_t c)
dreschpe	0:5e013296b353	201	{
dreschpe	0:5e013296b353	202	Ft_Gpu_CoCmd_StartFunc( FT_CMD_SIZE*2);
dreschpe	0:5e013296b353	203	Ft_Gpu_Copro_SendCmd( CMD_FGCOLOR);
dreschpe	0:5e013296b353	204	Ft_Gpu_Copro_SendCmd( c);
dreschpe	0:5e013296b353	205	Ft_Gpu_CoCmd_EndFunc( (FT_CMD_SIZE*2));
dreschpe	0:5e013296b353	206	}
dreschpe	0:5e013296b353	207
dreschpe	0:5e013296b353	208	ft_void_t FT800::Ft_Gpu_CoCmd_Rotate( ft_int32_t a)
dreschpe	0:5e013296b353	209	{
dreschpe	0:5e013296b353	210	Ft_Gpu_CoCmd_StartFunc( FT_CMD_SIZE*2);
dreschpe	0:5e013296b353	211	Ft_Gpu_Copro_SendCmd( CMD_ROTATE);
dreschpe	0:5e013296b353	212	Ft_Gpu_Copro_SendCmd( a);
dreschpe	0:5e013296b353	213	Ft_Gpu_CoCmd_EndFunc( (FT_CMD_SIZE*2));
dreschpe	0:5e013296b353	214	}
dreschpe	0:5e013296b353	215
dreschpe	0:5e013296b353	216	ft_void_t FT800::Ft_Gpu_CoCmd_Button( ft_int16_t x, ft_int16_t y, ft_int16_t w, ft_int16_t h, ft_int16_t font, ft_uint16_t options, const ft_char8_t* s)
dreschpe	0:5e013296b353	217	{
dreschpe	0:5e013296b353	218	Ft_Gpu_CoCmd_StartFunc( FT_CMD_SIZE*4 + strlen(s) + 1);
dreschpe	0:5e013296b353	219	Ft_Gpu_Copro_SendCmd( CMD_BUTTON);
dreschpe	0:5e013296b353	220	Ft_Gpu_Copro_SendCmd( (((ft_uint32_t)y<<16)\|(x & 0xffff)));
dreschpe	0:5e013296b353	221	Ft_Gpu_Copro_SendCmd( (((ft_uint32_t)h<<16)\|w));
dreschpe	0:5e013296b353	222	Ft_Gpu_Copro_SendCmd( (((ft_uint32_t)y<<16)\|font));
dreschpe	0:5e013296b353	223	Ft_Gpu_CoCmd_SendStr( s);
dreschpe	0:5e013296b353	224	Ft_Gpu_CoCmd_EndFunc( (FT_CMD_SIZE*4 + strlen(s) + 1));
dreschpe	0:5e013296b353	225	}
dreschpe	0:5e013296b353	226
dreschpe	0:5e013296b353	227	ft_void_t FT800::Ft_Gpu_CoCmd_MemWrite( ft_uint32_t ptr, ft_uint32_t num)
dreschpe	0:5e013296b353	228	{
dreschpe	0:5e013296b353	229	Ft_Gpu_CoCmd_StartFunc( FT_CMD_SIZE*3);
dreschpe	0:5e013296b353	230	Ft_Gpu_Copro_SendCmd( CMD_MEMWRITE);
dreschpe	0:5e013296b353	231	Ft_Gpu_Copro_SendCmd( ptr);
dreschpe	0:5e013296b353	232	Ft_Gpu_Copro_SendCmd( num);
dreschpe	0:5e013296b353	233	Ft_Gpu_CoCmd_EndFunc( (FT_CMD_SIZE*3));
dreschpe	0:5e013296b353	234	}
dreschpe	0:5e013296b353	235
dreschpe	0:5e013296b353	236	ft_void_t FT800::Ft_Gpu_CoCmd_Scrollbar( ft_int16_t x, ft_int16_t y, ft_int16_t w, ft_int16_t h, ft_uint16_t options, ft_uint16_t val, ft_uint16_t size, ft_uint16_t range)
dreschpe	0:5e013296b353	237	{
dreschpe	0:5e013296b353	238	Ft_Gpu_CoCmd_StartFunc( FT_CMD_SIZE*5);
dreschpe	0:5e013296b353	239	Ft_Gpu_Copro_SendCmd( CMD_SCROLLBAR);
dreschpe	0:5e013296b353	240	Ft_Gpu_Copro_SendCmd( (((ft_uint32_t)y<<16)\|(x & 0xffff)));
dreschpe	0:5e013296b353	241	Ft_Gpu_Copro_SendCmd( (((ft_uint32_t)h<<16)\|w));
dreschpe	0:5e013296b353	242	Ft_Gpu_Copro_SendCmd( (((ft_uint32_t)val<<16)\|options));
dreschpe	0:5e013296b353	243	Ft_Gpu_Copro_SendCmd( (((ft_uint32_t)range<<16)\|size));
dreschpe	0:5e013296b353	244	Ft_Gpu_CoCmd_EndFunc( (FT_CMD_SIZE*5));
dreschpe	0:5e013296b353	245	}
dreschpe	0:5e013296b353	246
dreschpe	0:5e013296b353	247	ft_void_t FT800::Ft_Gpu_CoCmd_GetMatrix( ft_int32_t a, ft_int32_t b, ft_int32_t c, ft_int32_t d, ft_int32_t e, ft_int32_t f)
dreschpe	0:5e013296b353	248	{
dreschpe	0:5e013296b353	249	Ft_Gpu_CoCmd_StartFunc( FT_CMD_SIZE*7);
dreschpe	0:5e013296b353	250	Ft_Gpu_Copro_SendCmd( CMD_GETMATRIX);
dreschpe	0:5e013296b353	251	Ft_Gpu_Copro_SendCmd( a);
dreschpe	0:5e013296b353	252	Ft_Gpu_Copro_SendCmd( b);
dreschpe	0:5e013296b353	253	Ft_Gpu_Copro_SendCmd( c);
dreschpe	0:5e013296b353	254	Ft_Gpu_Copro_SendCmd( d);
dreschpe	0:5e013296b353	255	Ft_Gpu_Copro_SendCmd( e);
dreschpe	0:5e013296b353	256	Ft_Gpu_Copro_SendCmd( f);
dreschpe	0:5e013296b353	257	Ft_Gpu_CoCmd_EndFunc( (FT_CMD_SIZE*7));
dreschpe	0:5e013296b353	258	}
dreschpe	0:5e013296b353	259
dreschpe	0:5e013296b353	260	ft_void_t FT800::Ft_Gpu_CoCmd_Sketch( ft_int16_t x, ft_int16_t y, ft_uint16_t w, ft_uint16_t h, ft_uint32_t ptr, ft_uint16_t format)
dreschpe	0:5e013296b353	261	{
dreschpe	0:5e013296b353	262	Ft_Gpu_CoCmd_StartFunc( FT_CMD_SIZE*5);
dreschpe	0:5e013296b353	263	Ft_Gpu_Copro_SendCmd( CMD_SKETCH);
dreschpe	0:5e013296b353	264	Ft_Gpu_Copro_SendCmd( (((ft_uint32_t)y<<16)\|(x & 0xffff)));
dreschpe	0:5e013296b353	265	Ft_Gpu_Copro_SendCmd( (((ft_uint32_t)h<<16)\|w));
dreschpe	0:5e013296b353	266	Ft_Gpu_Copro_SendCmd( ptr);
dreschpe	0:5e013296b353	267	Ft_Gpu_Copro_SendCmd( format);
dreschpe	0:5e013296b353	268	Ft_Gpu_CoCmd_EndFunc( (FT_CMD_SIZE*5));
dreschpe	0:5e013296b353	269	}
dreschpe	0:5e013296b353	270	ft_void_t FT800::Ft_Gpu_CoCmd_MemSet( ft_uint32_t ptr, ft_uint32_t value, ft_uint32_t num)
dreschpe	0:5e013296b353	271	{
dreschpe	0:5e013296b353	272	Ft_Gpu_CoCmd_StartFunc( FT_CMD_SIZE*4);
dreschpe	0:5e013296b353	273	Ft_Gpu_Copro_SendCmd( CMD_MEMSET);
dreschpe	0:5e013296b353	274	Ft_Gpu_Copro_SendCmd( ptr);
dreschpe	0:5e013296b353	275	Ft_Gpu_Copro_SendCmd( value);
dreschpe	0:5e013296b353	276	Ft_Gpu_Copro_SendCmd( num);
dreschpe	0:5e013296b353	277	Ft_Gpu_CoCmd_EndFunc( (FT_CMD_SIZE*4));
dreschpe	0:5e013296b353	278	}
dreschpe	0:5e013296b353	279	ft_void_t FT800::Ft_Gpu_CoCmd_GradColor( ft_uint32_t c)
dreschpe	0:5e013296b353	280	{
dreschpe	0:5e013296b353	281	Ft_Gpu_CoCmd_StartFunc( FT_CMD_SIZE*2);
dreschpe	0:5e013296b353	282	Ft_Gpu_Copro_SendCmd( CMD_GRADCOLOR);
dreschpe	0:5e013296b353	283	Ft_Gpu_Copro_SendCmd( c);
dreschpe	0:5e013296b353	284	Ft_Gpu_CoCmd_EndFunc( (FT_CMD_SIZE*2));
dreschpe	0:5e013296b353	285	}
dreschpe	0:5e013296b353	286	ft_void_t FT800::Ft_Gpu_CoCmd_BitmapTransform( ft_int32_t x0, ft_int32_t y0, ft_int32_t x1, ft_int32_t y1, ft_int32_t x2, ft_int32_t y2, ft_int32_t tx0, ft_int32_t ty0, ft_int32_t tx1, ft_int32_t ty1, ft_int32_t tx2, ft_int32_t ty2, ft_uint16_t result)
dreschpe	0:5e013296b353	287	{
dreschpe	0:5e013296b353	288	Ft_Gpu_CoCmd_StartFunc( FT_CMD_SIZE62+FT_CMD_SIZE*2);
dreschpe	0:5e013296b353	289	Ft_Gpu_Copro_SendCmd( CMD_BITMAP_TRANSFORM);
dreschpe	0:5e013296b353	290	Ft_Gpu_Copro_SendCmd( x0);
dreschpe	0:5e013296b353	291	Ft_Gpu_Copro_SendCmd( y0);
dreschpe	0:5e013296b353	292	Ft_Gpu_Copro_SendCmd( x1);
dreschpe	0:5e013296b353	293	Ft_Gpu_Copro_SendCmd( y1);
dreschpe	0:5e013296b353	294	Ft_Gpu_Copro_SendCmd( x2);
dreschpe	0:5e013296b353	295	Ft_Gpu_Copro_SendCmd( y2);
dreschpe	0:5e013296b353	296	Ft_Gpu_Copro_SendCmd( tx0);
dreschpe	0:5e013296b353	297	Ft_Gpu_Copro_SendCmd( ty0);
dreschpe	0:5e013296b353	298	Ft_Gpu_Copro_SendCmd( tx1);
dreschpe	0:5e013296b353	299	Ft_Gpu_Copro_SendCmd( ty1);
dreschpe	0:5e013296b353	300	Ft_Gpu_Copro_SendCmd( tx2);
dreschpe	0:5e013296b353	301	Ft_Gpu_Copro_SendCmd( ty2);
dreschpe	0:5e013296b353	302	Ft_Gpu_Copro_SendCmd( result);
dreschpe	0:5e013296b353	303	Ft_Gpu_CoCmd_EndFunc( (FT_CMD_SIZE62+FT_CMD_SIZE*2));
dreschpe	0:5e013296b353	304	}
dreschpe	0:5e013296b353	305	ft_void_t FT800::Ft_Gpu_CoCmd_Calibrate( ft_uint32_t result)
dreschpe	0:5e013296b353	306	{
dreschpe	0:5e013296b353	307	Ft_Gpu_CoCmd_StartFunc( FT_CMD_SIZE*2);
dreschpe	0:5e013296b353	308	Ft_Gpu_Copro_SendCmd( CMD_CALIBRATE);
dreschpe	0:5e013296b353	309	Ft_Gpu_Copro_SendCmd( result);
dreschpe	0:5e013296b353	310	Ft_Gpu_CoCmd_EndFunc( (FT_CMD_SIZE*2));
dreschpe	0:5e013296b353	311	Ft_Gpu_Hal_WaitCmdfifo_empty( );
dreschpe	0:5e013296b353	312
dreschpe	0:5e013296b353	313	}
dreschpe	0:5e013296b353	314	ft_void_t FT800::Ft_Gpu_CoCmd_SetFont( ft_uint32_t font, ft_uint32_t ptr)
dreschpe	0:5e013296b353	315	{
dreschpe	0:5e013296b353	316	Ft_Gpu_CoCmd_StartFunc( FT_CMD_SIZE*3);
dreschpe	0:5e013296b353	317	Ft_Gpu_Copro_SendCmd( CMD_SETFONT);
dreschpe	0:5e013296b353	318	Ft_Gpu_Copro_SendCmd( font);
dreschpe	0:5e013296b353	319	Ft_Gpu_Copro_SendCmd( ptr);
dreschpe	0:5e013296b353	320	Ft_Gpu_CoCmd_EndFunc( (FT_CMD_SIZE*3));
dreschpe	0:5e013296b353	321	}
dreschpe	0:5e013296b353	322	ft_void_t FT800::Ft_Gpu_CoCmd_Logo( )
dreschpe	0:5e013296b353	323	{
dreschpe	0:5e013296b353	324	Ft_Gpu_CoCmd_StartFunc( FT_CMD_SIZE*1);
dreschpe	0:5e013296b353	325	Ft_Gpu_Copro_SendCmd( CMD_LOGO);
dreschpe	0:5e013296b353	326	Ft_Gpu_CoCmd_EndFunc( FT_CMD_SIZE*1);
dreschpe	0:5e013296b353	327	}
dreschpe	0:5e013296b353	328	ft_void_t FT800::Ft_Gpu_CoCmd_Append( ft_uint32_t ptr, ft_uint32_t num)
dreschpe	0:5e013296b353	329	{
dreschpe	0:5e013296b353	330	Ft_Gpu_CoCmd_StartFunc( FT_CMD_SIZE*3);
dreschpe	0:5e013296b353	331	Ft_Gpu_Copro_SendCmd( CMD_APPEND);
dreschpe	0:5e013296b353	332	Ft_Gpu_Copro_SendCmd( ptr);
dreschpe	0:5e013296b353	333	Ft_Gpu_Copro_SendCmd( num);
dreschpe	0:5e013296b353	334	Ft_Gpu_CoCmd_EndFunc( (FT_CMD_SIZE*3));
dreschpe	0:5e013296b353	335	}
dreschpe	0:5e013296b353	336	ft_void_t FT800::Ft_Gpu_CoCmd_MemZero( ft_uint32_t ptr, ft_uint32_t num)
dreschpe	0:5e013296b353	337	{
dreschpe	0:5e013296b353	338	Ft_Gpu_CoCmd_StartFunc( FT_CMD_SIZE*3);
dreschpe	0:5e013296b353	339	Ft_Gpu_Copro_SendCmd( CMD_MEMZERO);
dreschpe	0:5e013296b353	340	Ft_Gpu_Copro_SendCmd( ptr);
dreschpe	0:5e013296b353	341	Ft_Gpu_Copro_SendCmd( num);
dreschpe	0:5e013296b353	342	Ft_Gpu_CoCmd_EndFunc( (FT_CMD_SIZE*3));
dreschpe	0:5e013296b353	343	}
dreschpe	0:5e013296b353	344	ft_void_t FT800::Ft_Gpu_CoCmd_Scale( ft_int32_t sx, ft_int32_t sy)
dreschpe	0:5e013296b353	345	{
dreschpe	0:5e013296b353	346	Ft_Gpu_CoCmd_StartFunc( FT_CMD_SIZE*3);
dreschpe	0:5e013296b353	347	Ft_Gpu_Copro_SendCmd( CMD_SCALE);
dreschpe	0:5e013296b353	348	Ft_Gpu_Copro_SendCmd( sx);
dreschpe	0:5e013296b353	349	Ft_Gpu_Copro_SendCmd( sy);
dreschpe	0:5e013296b353	350	Ft_Gpu_CoCmd_EndFunc( (FT_CMD_SIZE*3));
dreschpe	0:5e013296b353	351	}
dreschpe	0:5e013296b353	352	ft_void_t FT800::Ft_Gpu_CoCmd_Clock( ft_int16_t x, ft_int16_t y, ft_int16_t r, ft_uint16_t options, ft_uint16_t h, ft_uint16_t m, ft_uint16_t s, ft_uint16_t ms)
dreschpe	0:5e013296b353	353	{
dreschpe	0:5e013296b353	354	Ft_Gpu_CoCmd_StartFunc( FT_CMD_SIZE*5);
dreschpe	0:5e013296b353	355	Ft_Gpu_Copro_SendCmd( CMD_CLOCK);
dreschpe	0:5e013296b353	356	Ft_Gpu_Copro_SendCmd( (((ft_uint32_t)y<<16)\|(x & 0xffff)));
dreschpe	0:5e013296b353	357	Ft_Gpu_Copro_SendCmd( (((ft_uint32_t)options<<16)\|r));
dreschpe	0:5e013296b353	358	Ft_Gpu_Copro_SendCmd( (((ft_uint32_t)m<<16)\|h));
dreschpe	0:5e013296b353	359	Ft_Gpu_Copro_SendCmd( (((ft_uint32_t)ms<<16)\|s));
dreschpe	0:5e013296b353	360	Ft_Gpu_CoCmd_EndFunc( (FT_CMD_SIZE*5));
dreschpe	0:5e013296b353	361	}
dreschpe	0:5e013296b353	362
dreschpe	0:5e013296b353	363	ft_void_t FT800::Ft_Gpu_CoCmd_Gradient( ft_int16_t x0, ft_int16_t y0, ft_uint32_t rgb0, ft_int16_t x1, ft_int16_t y1, ft_uint32_t rgb1)
dreschpe	0:5e013296b353	364	{
dreschpe	0:5e013296b353	365	Ft_Gpu_CoCmd_StartFunc( FT_CMD_SIZE*5);
dreschpe	0:5e013296b353	366	Ft_Gpu_Copro_SendCmd( CMD_GRADIENT);
dreschpe	0:5e013296b353	367	Ft_Gpu_Copro_SendCmd( (((ft_uint32_t)y0<<16)\|(x0 & 0xffff)));
dreschpe	0:5e013296b353	368	Ft_Gpu_Copro_SendCmd( rgb0);
dreschpe	0:5e013296b353	369	Ft_Gpu_Copro_SendCmd( (((ft_uint32_t)y1<<16)\|(x1 & 0xffff)));
dreschpe	0:5e013296b353	370	Ft_Gpu_Copro_SendCmd( rgb1);
dreschpe	0:5e013296b353	371	Ft_Gpu_CoCmd_EndFunc( (FT_CMD_SIZE*5));
dreschpe	0:5e013296b353	372	}
dreschpe	0:5e013296b353	373
dreschpe	0:5e013296b353	374	ft_void_t FT800::Ft_Gpu_CoCmd_SetMatrix( )
dreschpe	0:5e013296b353	375	{
dreschpe	0:5e013296b353	376	Ft_Gpu_CoCmd_StartFunc( FT_CMD_SIZE*1);
dreschpe	0:5e013296b353	377	Ft_Gpu_Copro_SendCmd( CMD_SETMATRIX);
dreschpe	0:5e013296b353	378	Ft_Gpu_CoCmd_EndFunc( (FT_CMD_SIZE*1));
dreschpe	0:5e013296b353	379	}
dreschpe	0:5e013296b353	380
dreschpe	0:5e013296b353	381	ft_void_t FT800::Ft_Gpu_CoCmd_Track( ft_int16_t x, ft_int16_t y, ft_int16_t w, ft_int16_t h, ft_int16_t tag)
dreschpe	0:5e013296b353	382	{
dreschpe	0:5e013296b353	383	Ft_Gpu_CoCmd_StartFunc( FT_CMD_SIZE*4);
dreschpe	0:5e013296b353	384	Ft_Gpu_Copro_SendCmd( CMD_TRACK);
dreschpe	0:5e013296b353	385	Ft_Gpu_Copro_SendCmd( (((ft_uint32_t)y<<16)\|(x & 0xffff)));
dreschpe	0:5e013296b353	386	Ft_Gpu_Copro_SendCmd( (((ft_uint32_t)h<<16)\|w));
dreschpe	0:5e013296b353	387	Ft_Gpu_Copro_SendCmd( tag);
dreschpe	0:5e013296b353	388	Ft_Gpu_CoCmd_EndFunc( (FT_CMD_SIZE*4));
dreschpe	0:5e013296b353	389	}
dreschpe	0:5e013296b353	390
dreschpe	0:5e013296b353	391	ft_void_t FT800::Ft_Gpu_CoCmd_GetPtr( ft_uint32_t result)
dreschpe	0:5e013296b353	392	{
dreschpe	0:5e013296b353	393	Ft_Gpu_CoCmd_StartFunc( FT_CMD_SIZE*2);
dreschpe	0:5e013296b353	394	Ft_Gpu_Copro_SendCmd( CMD_GETPTR);
dreschpe	0:5e013296b353	395	Ft_Gpu_Copro_SendCmd( result);
dreschpe	0:5e013296b353	396	Ft_Gpu_CoCmd_EndFunc( (FT_CMD_SIZE*2));
dreschpe	0:5e013296b353	397	}
dreschpe	0:5e013296b353	398
dreschpe	0:5e013296b353	399	ft_void_t FT800::Ft_Gpu_CoCmd_Progress( ft_int16_t x, ft_int16_t y, ft_int16_t w, ft_int16_t h, ft_uint16_t options, ft_uint16_t val, ft_uint16_t range)
dreschpe	0:5e013296b353	400	{
dreschpe	0:5e013296b353	401	Ft_Gpu_CoCmd_StartFunc( FT_CMD_SIZE*5);
dreschpe	0:5e013296b353	402	Ft_Gpu_Copro_SendCmd( CMD_PROGRESS);
dreschpe	0:5e013296b353	403	Ft_Gpu_Copro_SendCmd( (((ft_uint32_t)y<<16)\|(x & 0xffff)));
dreschpe	0:5e013296b353	404	Ft_Gpu_Copro_SendCmd( (((ft_uint32_t)h<<16)\|w));
dreschpe	0:5e013296b353	405	Ft_Gpu_Copro_SendCmd( (((ft_uint32_t)val<<16)\|options));
dreschpe	0:5e013296b353	406	Ft_Gpu_Copro_SendCmd( range);
dreschpe	0:5e013296b353	407	Ft_Gpu_CoCmd_EndFunc( (FT_CMD_SIZE*5));
dreschpe	0:5e013296b353	408	}
dreschpe	0:5e013296b353	409
dreschpe	0:5e013296b353	410	ft_void_t FT800::Ft_Gpu_CoCmd_ColdStart( )
dreschpe	0:5e013296b353	411	{
dreschpe	0:5e013296b353	412	Ft_Gpu_CoCmd_StartFunc( FT_CMD_SIZE*1);
dreschpe	0:5e013296b353	413	Ft_Gpu_Copro_SendCmd( CMD_COLDSTART);
dreschpe	0:5e013296b353	414	Ft_Gpu_CoCmd_EndFunc( (FT_CMD_SIZE*1));
dreschpe	0:5e013296b353	415	}
dreschpe	0:5e013296b353	416
dreschpe	0:5e013296b353	417	ft_void_t FT800::Ft_Gpu_CoCmd_Keys( ft_int16_t x, ft_int16_t y, ft_int16_t w, ft_int16_t h, ft_int16_t font, ft_uint16_t options, const ft_char8_t* s)
dreschpe	0:5e013296b353	418	{
dreschpe	0:5e013296b353	419	Ft_Gpu_CoCmd_StartFunc( FT_CMD_SIZE*4 + strlen(s) + 1);
dreschpe	0:5e013296b353	420	Ft_Gpu_Copro_SendCmd( CMD_KEYS);
dreschpe	0:5e013296b353	421	Ft_Gpu_Copro_SendCmd( (((ft_uint32_t)y<<16)\|(x & 0xffff)));
dreschpe	0:5e013296b353	422	Ft_Gpu_Copro_SendCmd( (((ft_uint32_t)h<<16)\|w));
dreschpe	0:5e013296b353	423	Ft_Gpu_Copro_SendCmd( (((ft_uint32_t)options<<16)\|font));
dreschpe	0:5e013296b353	424	Ft_Gpu_CoCmd_SendStr( s);
dreschpe	0:5e013296b353	425	Ft_Gpu_CoCmd_EndFunc( (FT_CMD_SIZE*4 + strlen(s) + 1));
dreschpe	0:5e013296b353	426	}
dreschpe	0:5e013296b353	427
dreschpe	0:5e013296b353	428	ft_void_t FT800::Ft_Gpu_CoCmd_Dial( ft_int16_t x, ft_int16_t y, ft_int16_t r, ft_uint16_t options, ft_uint16_t val)
dreschpe	0:5e013296b353	429	{
dreschpe	0:5e013296b353	430	Ft_Gpu_CoCmd_StartFunc( FT_CMD_SIZE*4);
dreschpe	0:5e013296b353	431	Ft_Gpu_Copro_SendCmd( CMD_DIAL);
dreschpe	0:5e013296b353	432	Ft_Gpu_Copro_SendCmd( (((ft_uint32_t)y<<16)\|(x & 0xffff)));
dreschpe	0:5e013296b353	433	Ft_Gpu_Copro_SendCmd( (((ft_uint32_t)options<<16)\|r));
dreschpe	0:5e013296b353	434	Ft_Gpu_Copro_SendCmd( val);
dreschpe	0:5e013296b353	435	Ft_Gpu_CoCmd_EndFunc( (FT_CMD_SIZE*4));
dreschpe	0:5e013296b353	436	}
dreschpe	0:5e013296b353	437
dreschpe	0:5e013296b353	438	ft_void_t FT800::Ft_Gpu_CoCmd_LoadImage( ft_uint32_t ptr, ft_uint32_t options)
dreschpe	0:5e013296b353	439	{
dreschpe	0:5e013296b353	440	Ft_Gpu_CoCmd_StartFunc( FT_CMD_SIZE*3);
dreschpe	0:5e013296b353	441	Ft_Gpu_Copro_SendCmd( CMD_LOADIMAGE);
dreschpe	0:5e013296b353	442	Ft_Gpu_Copro_SendCmd( ptr);
dreschpe	0:5e013296b353	443	Ft_Gpu_Copro_SendCmd( options);
dreschpe	0:5e013296b353	444	Ft_Gpu_CoCmd_EndFunc( (FT_CMD_SIZE*3));
dreschpe	0:5e013296b353	445	}
dreschpe	0:5e013296b353	446
dreschpe	0:5e013296b353	447	ft_void_t FT800::Ft_Gpu_CoCmd_Dlstart( )
dreschpe	0:5e013296b353	448	{
dreschpe	0:5e013296b353	449	Ft_Gpu_CoCmd_StartFunc( FT_CMD_SIZE*1);
dreschpe	0:5e013296b353	450	Ft_Gpu_Copro_SendCmd( CMD_DLSTART);
dreschpe	0:5e013296b353	451	Ft_Gpu_CoCmd_EndFunc( (FT_CMD_SIZE*1));
dreschpe	0:5e013296b353	452	}
dreschpe	0:5e013296b353	453
dreschpe	0:5e013296b353	454	ft_void_t FT800::Ft_Gpu_CoCmd_Snapshot( ft_uint32_t ptr)
dreschpe	0:5e013296b353	455	{
dreschpe	0:5e013296b353	456	Ft_Gpu_CoCmd_StartFunc( FT_CMD_SIZE*2);
dreschpe	0:5e013296b353	457	Ft_Gpu_Copro_SendCmd( CMD_SNAPSHOT);
dreschpe	0:5e013296b353	458	Ft_Gpu_Copro_SendCmd( ptr);
dreschpe	0:5e013296b353	459	Ft_Gpu_CoCmd_EndFunc( (FT_CMD_SIZE*2));
dreschpe	0:5e013296b353	460	}
dreschpe	0:5e013296b353	461
dreschpe	0:5e013296b353	462	ft_void_t FT800::Ft_Gpu_CoCmd_ScreenSaver( )
dreschpe	0:5e013296b353	463	{
dreschpe	0:5e013296b353	464	Ft_Gpu_CoCmd_StartFunc( FT_CMD_SIZE*1);
dreschpe	0:5e013296b353	465	Ft_Gpu_Copro_SendCmd( CMD_SCREENSAVER);
dreschpe	0:5e013296b353	466	Ft_Gpu_CoCmd_EndFunc( (FT_CMD_SIZE*1));
dreschpe	0:5e013296b353	467	}
dreschpe	0:5e013296b353	468
dreschpe	0:5e013296b353	469	ft_void_t FT800::Ft_Gpu_CoCmd_MemCrc( ft_uint32_t ptr, ft_uint32_t num, ft_uint32_t result)
dreschpe	0:5e013296b353	470	{
dreschpe	0:5e013296b353	471	Ft_Gpu_CoCmd_StartFunc( FT_CMD_SIZE*4);
dreschpe	0:5e013296b353	472	Ft_Gpu_Copro_SendCmd( CMD_MEMCRC);
dreschpe	0:5e013296b353	473	Ft_Gpu_Copro_SendCmd( ptr);
dreschpe	0:5e013296b353	474	Ft_Gpu_Copro_SendCmd( num);
dreschpe	0:5e013296b353	475	Ft_Gpu_Copro_SendCmd( result);
dreschpe	0:5e013296b353	476	Ft_Gpu_CoCmd_EndFunc( (FT_CMD_SIZE*4));
dreschpe	0:5e013296b353	477	}
dreschpe	0:5e013296b353	478
dreschpe	0:5e013296b353	479
dreschpe	0:5e013296b353	480	ft_void_t FT800::Ft_App_WrCoCmd_Buffer(ft_uint32_t cmd)
dreschpe	0:5e013296b353	481	{
dreschpe	0:5e013296b353	482	Ft_Gpu_Hal_WrCmd32(cmd);
dreschpe	0:5e013296b353	483	/* Increment the command index */
dreschpe	0:5e013296b353	484	Ft_CmdBuffer_Index += FT_CMD_SIZE;
dreschpe	0:5e013296b353	485	}
dreschpe	0:5e013296b353	486
dreschpe	0:5e013296b353	487	ft_void_t FT800::Ft_App_WrDlCmd_Buffer(ft_uint32_t cmd)
dreschpe	0:5e013296b353	488	{
dreschpe	0:5e013296b353	489	Ft_Gpu_Hal_Wr32((RAM_DL+Ft_DlBuffer_Index),cmd);
dreschpe	0:5e013296b353	490	/* Increment the command index */
dreschpe	0:5e013296b353	491	Ft_DlBuffer_Index += FT_CMD_SIZE;
dreschpe	0:5e013296b353	492	}
dreschpe	0:5e013296b353	493
dreschpe	0:5e013296b353	494	ft_void_t FT800::Ft_App_Flush_DL_Buffer()
dreschpe	0:5e013296b353	495	{
dreschpe	0:5e013296b353	496	Ft_DlBuffer_Index = 0;
dreschpe	0:5e013296b353	497
dreschpe	0:5e013296b353	498	}
dreschpe	0:5e013296b353	499
dreschpe	0:5e013296b353	500	ft_void_t FT800::Ft_App_Flush_Co_Buffer()
dreschpe	0:5e013296b353	501	{
dreschpe	0:5e013296b353	502	Ft_CmdBuffer_Index = 0;
dreschpe	0:5e013296b353	503	}
dreschpe	0:5e013296b353	504
dreschpe	0:5e013296b353	505
dreschpe	0:5e013296b353	506	/* API to check the status of previous DLSWAP and perform DLSWAP of new DL */
dreschpe	0:5e013296b353	507	/* Check for the status of previous DLSWAP and if still not done wait for few ms and check again */
dreschpe	0:5e013296b353	508	ft_void_t FT800::GPU_DLSwap(ft_uint8_t DL_Swap_Type)
dreschpe	0:5e013296b353	509	{
dreschpe	0:5e013296b353	510	ft_uint8_t Swap_Type = DLSWAP_FRAME,Swap_Done = DLSWAP_FRAME;
dreschpe	0:5e013296b353	511
dreschpe	0:5e013296b353	512	if(DL_Swap_Type == DLSWAP_LINE)
dreschpe	0:5e013296b353	513	{
dreschpe	0:5e013296b353	514	Swap_Type = DLSWAP_LINE;
dreschpe	0:5e013296b353	515	}
dreschpe	0:5e013296b353	516
dreschpe	0:5e013296b353	517	/* Perform a new DL swap */
dreschpe	0:5e013296b353	518	Ft_Gpu_Hal_Wr8(REG_DLSWAP,Swap_Type);
dreschpe	0:5e013296b353	519
dreschpe	0:5e013296b353	520	/* Wait till the swap is done */
dreschpe	0:5e013296b353	521	while(Swap_Done)
dreschpe	0:5e013296b353	522	{
dreschpe	0:5e013296b353	523	Swap_Done = Ft_Gpu_Hal_Rd8(REG_DLSWAP);
dreschpe	0:5e013296b353	524
dreschpe	0:5e013296b353	525	if(DLSWAP_DONE != Swap_Done)
dreschpe	0:5e013296b353	526	{
dreschpe	0:5e013296b353	527	Ft_Gpu_Hal_Sleep(10);//wait for 10ms
dreschpe	0:5e013296b353	528	}
dreschpe	0:5e013296b353	529	}
dreschpe	0:5e013296b353	530	}
dreschpe	0:5e013296b353	531
dreschpe	0:5e013296b353	532
dreschpe	0:5e013296b353	533
dreschpe	0:5e013296b353	534	/* Nothing beyond this */
dreschpe	0:5e013296b353	535
dreschpe	0:5e013296b353	536
dreschpe	0:5e013296b353	537
dreschpe	0:5e013296b353	538