Peter Drescher / FT800_2

Lib for FTDI FT800 graphic controller "EVE" The API is changed from the FTDI original names. It use smaller names now. DL() will add something to the display list instead of Ft_App_WrCoCmd_Buffer ... The FTDI programmer Guide is also using this commands.

Dependents:   FT800_RGB_demo FT800_RGB_demo2 FT800_demo_for_habr Temp_&_RH_at_TFT-demo ... more

Fork of FT800 by Peter Drescher

The mbed is talking thru the SPI interface with the graphic engine. We have to set up a list of Commands and send them to the FT800 to get graphics.

Hardware

1. VM800C development modules from FTDI : http://www.ftdichip.com/Products/Modules/VM800C.html

The modules come with different size lcd. 3.5", 4.3" or 5" or without. /media/uploads/dreschpe/ftdi_eve.jpg The picture shows a modified board, because my lcd had a different pinout. The mbed is connected to the pin header on the bottom.

2. EVBEVE-FT800 board from GLYN: http://www.glyn.com/News-Events/Newsletter/Newsletter-2013/October-2013/A-quick-start-for-EVE-Requires-no-basic-knowledge-graphics-sound-and-touch-can-all-be-learned-in-minutes

The module has a 40 pin flex cable connector to connect a display out of the EDT series.

/media/uploads/dreschpe/glyn_eve.jpg

The mbed is connected via the pin header on the left. If you use this board with a EDT display you have to uncomment the #define Inv_Backlite in FT_LCD_Type.h, because the backlight dimming is inverted.

3. ConnectEVE board from MikroElektronika http://www.mikroe.com/add-on-boards/display/connecteve/#headers_10 The board has also a pin header to connect the mbed. - not tested, but it looks like the other boards.

4. ADAM arduino shield http://www.4dsystems.com.au/product/4DLCD_FT843/ Component page : http://mbed.org/components/ADAM/

Works with the NUCLEO boards, but you have to patch three wires.

/media/uploads/dreschpe/adam.jpg

Connection

We need 5 signals to connect to the mbed. SCK, MOSI and MISO are connected to a SPI channel. SS is the chip select signal and PD work as powerdown. The additional INT signal is not used at the moment. It is possible to generate a interrupt signal, but at the moment you have to poll the status register of the FT800 to see if a command is finished.

Software

This lib is based on the demo code from FTDI. If you want to use it, you have to read the programming manual : http://www.ftdichip.com/Support/Documents/ProgramGuides/FT800%20Programmers%20Guide.pdf

See my demo : http://mbed.org/users/dreschpe/code/FT800_RGB_demo/

FT_Gpu_Hal.h@6:16e22c789f7d, 2015-02-10 (annotated)

Committer:
dreschpe
Date:
Tue Feb 10 23:32:22 2015 +0000
Revision:
6:16e22c789f7d
Parent:
4:363ec27cdfaa 
Add function to read/write touch calibration data.; Add color names  ; Add a patch from  Ivano Pelicella to draw flat buttons

Who changed what in which revision?

UserRevisionLine numberNew contents of line
dreschpe 0:5e013296b353 1 /*!
dreschpe 0:5e013296b353 2 * \file FT_GPU_HAL.h
dreschpe 0:5e013296b353 3 *
dreschpe 0:5e013296b353 4 * \author FTDI
dreschpe 0:5e013296b353 5 * \date 2013.04.24
dreschpe 0:5e013296b353 6 *
dreschpe 0:5e013296b353 7 * Copyright 2013 Future Technology Devices International Limited
dreschpe 0:5e013296b353 8 *
dreschpe 0:5e013296b353 9 * Project: FT800 or EVE compatible silicon
dreschpe 0:5e013296b353 10 * File Description:
dreschpe 0:5e013296b353 11 * This file defines the generic APIs of host access layer for the FT800 or EVE compatible silicon.
dreschpe 2:ab74a9a05970 12 * Application shall access FT800 or EVE resources over these APIs. In addition, there are
dreschpe 0:5e013296b353 13 * some helper functions defined for FT800 coprocessor engine as well as host commands.
dreschpe 0:5e013296b353 14 * Rivision History:
dreschpe 2:ab74a9a05970 15 * ported to mbed by Peter Drescher, DC2PD 2014
dreschpe 3:392d2c733c68 16 *
dreschpe 0:5e013296b353 17 */
dreschpe 3:392d2c733c68 18
dreschpe 0:5e013296b353 19 #ifndef FT_GPU_HAL_H
dreschpe 0:5e013296b353 20 #define FT_GPU_HAL_H
dreschpe 0:5e013296b353 21
dreschpe 0:5e013296b353 22 #include "mbed.h"
dreschpe 0:5e013296b353 23 #include "FT_DataTypes.h"
dreschpe 0:5e013296b353 24
dreschpe 0:5e013296b353 25 typedef enum {
dreschpe 0:5e013296b353 26 FT_GPU_I2C_MODE = 0,
dreschpe 0:5e013296b353 27 FT_GPU_SPI_MODE,
dreschpe 0:5e013296b353 28
dreschpe 0:5e013296b353 29 FT_GPU_MODE_COUNT,
dreschpe 0:5e013296b353 30 FT_GPU_MODE_UNKNOWN = FT_GPU_MODE_COUNT
dreschpe 0:5e013296b353 31 } FT_GPU_HAL_MODE_E;
dreschpe 0:5e013296b353 32
dreschpe 0:5e013296b353 33 typedef enum {
dreschpe 3:392d2c733c68 34 OPENED,
dreschpe 3:392d2c733c68 35 READING,
dreschpe 3:392d2c733c68 36 WRITING,
dreschpe 3:392d2c733c68 37 CLOSED,
dreschpe 3:392d2c733c68 38 STATUS_COUNT,
dreschpe 3:392d2c733c68 39 STATUS_ERROR = STATUS_COUNT
dreschpe 0:5e013296b353 40 } FT_GPU_HAL_STATUS_E;
dreschpe 0:5e013296b353 41
dreschpe 0:5e013296b353 42 typedef struct {
dreschpe 0:5e013296b353 43 ft_uint8_t reserved;
dreschpe 0:5e013296b353 44 } Ft_Gpu_App_Context_t;
dreschpe 0:5e013296b353 45
dreschpe 0:5e013296b353 46 typedef struct {
dreschpe 0:5e013296b353 47 /* Total number channels for libmpsse */
dreschpe 0:5e013296b353 48 ft_uint32_t TotalChannelNum;
dreschpe 0:5e013296b353 49 } Ft_Gpu_HalInit_t;
dreschpe 0:5e013296b353 50
dreschpe 0:5e013296b353 51 typedef enum {
dreschpe 0:5e013296b353 52 FT_GPU_READ = 0,
dreschpe 0:5e013296b353 53 FT_GPU_WRITE,
dreschpe 0:5e013296b353 54 } FT_GPU_TRANSFERDIR_T;
dreschpe 0:5e013296b353 55
dreschpe 0:5e013296b353 56
dreschpe 0:5e013296b353 57 typedef struct {
dreschpe 0:5e013296b353 58 ft_uint32_t length; //IN and OUT
dreschpe 0:5e013296b353 59 ft_uint32_t address;
dreschpe 0:5e013296b353 60 ft_uint8_t *buffer;
dreschpe 0:5e013296b353 61 } Ft_Gpu_App_Transfer_t;
dreschpe 0:5e013296b353 62
dreschpe 0:5e013296b353 63 class FT800
dreschpe 0:5e013296b353 64 {
dreschpe 0:5e013296b353 65 public:
dreschpe 0:5e013296b353 66 FT800(PinName mosi,
dreschpe 0:5e013296b353 67 PinName miso,
dreschpe 0:5e013296b353 68 PinName sck,
dreschpe 0:5e013296b353 69 PinName ss,
dreschpe 0:5e013296b353 70 PinName intr,
dreschpe 0:5e013296b353 71 PinName pd);
dreschpe 0:5e013296b353 72
dreschpe 0:5e013296b353 73 private:
dreschpe 0:5e013296b353 74 SPI _spi;
dreschpe 0:5e013296b353 75 DigitalOut _ss;
dreschpe 0:5e013296b353 76 DigitalOut _pd;
dreschpe 0:5e013296b353 77 InterruptIn _f800_isr;
dreschpe 0:5e013296b353 78 public:
dreschpe 0:5e013296b353 79 /* Global used for buffer optimization */
dreschpe 0:5e013296b353 80 //Ft_Gpu_Hal_Context_t host,*phost;
dreschpe 0:5e013296b353 81 Ft_Gpu_App_Context_t app_header;
dreschpe 3:392d2c733c68 82 ft_uint16_t cmd_fifo_wp; //coprocessor fifo write pointer
dreschpe 3:392d2c733c68 83 ft_uint16_t dl_buff_wp; //display command memory write pointer
dreschpe 0:5e013296b353 84 FT_GPU_HAL_STATUS_E status; //OUT
dreschpe 0:5e013296b353 85 ft_void_t* hal_handle; //IN/OUT
dreschpe 3:392d2c733c68 86 ft_uint32_t CmdBuffer_Index;
dreschpe 3:392d2c733c68 87 ft_uint32_t DlBuffer_Index;
dreschpe 3:392d2c733c68 88 ft_int16_t DispWidth;
dreschpe 3:392d2c733c68 89 ft_int16_t DispHeight;
dreschpe 3:392d2c733c68 90 ft_int16_t DispHCycle;
dreschpe 3:392d2c733c68 91 ft_int16_t DispHOffset;
dreschpe 3:392d2c733c68 92 ft_int16_t DispHSync0;
dreschpe 3:392d2c733c68 93 ft_int16_t DispHSync1;
dreschpe 3:392d2c733c68 94 ft_int16_t DispVCycle;
dreschpe 3:392d2c733c68 95 ft_int16_t DispVOffset;
dreschpe 3:392d2c733c68 96 ft_int16_t DispVSync0;
dreschpe 3:392d2c733c68 97 ft_int16_t DispVSync1;
dreschpe 3:392d2c733c68 98 ft_uint8_t DispPCLK;
dreschpe 3:392d2c733c68 99 ft_char8_t DispSwizzle;
dreschpe 3:392d2c733c68 100 ft_char8_t DispPCLKPol;
dreschpe 0:5e013296b353 101
dreschpe 0:5e013296b353 102
dreschpe 0:5e013296b353 103 ft_void_t BootupConfig(void);
dreschpe 0:5e013296b353 104 ft_bool_t Bootup(void);
dreschpe 0:5e013296b353 105
dreschpe 0:5e013296b353 106
dreschpe 0:5e013296b353 107 /*The basic APIs Level 1*/
dreschpe 3:392d2c733c68 108 ft_bool_t Init( );
dreschpe 3:392d2c733c68 109 ft_bool_t Open( );
dreschpe 0:5e013296b353 110
dreschpe 0:5e013296b353 111 /*The APIs for reading/writing transfer continuously only with small buffer system*/
dreschpe 3:392d2c733c68 112 ft_void_t StartTransfer(FT_GPU_TRANSFERDIR_T rw,ft_uint32_t addr);
dreschpe 3:392d2c733c68 113 ft_uint8_t Transfer8(ft_uint8_t value);
dreschpe 3:392d2c733c68 114 ft_uint16_t Transfer16(ft_uint16_t value);
dreschpe 3:392d2c733c68 115 ft_uint32_t Transfer32(ft_uint32_t value);
dreschpe 3:392d2c733c68 116 ft_void_t EndTransfer( );
dreschpe 0:5e013296b353 117
dreschpe 0:5e013296b353 118 /*Read & Write APIs for both burst and single transfer,depending on buffer size*/
dreschpe 3:392d2c733c68 119 ft_void_t Read(Ft_Gpu_App_Transfer_t *transfer);
dreschpe 3:392d2c733c68 120 ft_void_t Write(Ft_Gpu_App_Transfer_t *transfer);
dreschpe 0:5e013296b353 121
dreschpe 3:392d2c733c68 122 ft_void_t Close();
dreschpe 3:392d2c733c68 123 ft_void_t DeInit();
dreschpe 0:5e013296b353 124
dreschpe 0:5e013296b353 125 /*Helper function APIs Read*/
dreschpe 3:392d2c733c68 126 ft_uint8_t Rd8(ft_uint32_t addr);
dreschpe 3:392d2c733c68 127 ft_uint16_t Rd16(ft_uint32_t addr);
dreschpe 3:392d2c733c68 128 ft_uint32_t Rd32(ft_uint32_t addr);
dreschpe 0:5e013296b353 129
dreschpe 0:5e013296b353 130 /*Helper function APIs Write*/
dreschpe 3:392d2c733c68 131 ft_void_t Wr8(ft_uint32_t addr, ft_uint8_t v);
dreschpe 3:392d2c733c68 132 ft_void_t Wr16(ft_uint32_t addr, ft_uint16_t v);
dreschpe 3:392d2c733c68 133 ft_void_t Wr32(ft_uint32_t addr, ft_uint32_t v);
dreschpe 0:5e013296b353 134
dreschpe 0:5e013296b353 135 /*******************************************************************************/
dreschpe 0:5e013296b353 136 /*******************************************************************************/
dreschpe 0:5e013296b353 137 /*APIs for coprocessor Fifo read/write and space management*/
dreschpe 3:392d2c733c68 138 ft_void_t Updatecmdfifo(ft_uint16_t count);
dreschpe 3:392d2c733c68 139 ft_void_t WrCmd32(ft_uint32_t cmd);
dreschpe 3:392d2c733c68 140 ft_void_t WrCmdBuf(ft_uint8_t *buffer,ft_uint16_t count);
dreschpe 3:392d2c733c68 141 ft_void_t WaitCmdfifo_empty();
dreschpe 3:392d2c733c68 142 ft_void_t ResetCmdFifo();
dreschpe 3:392d2c733c68 143 ft_void_t CheckCmdBuffer(ft_uint16_t count);
dreschpe 3:392d2c733c68 144 ft_void_t ResetDLBuffer();
dreschpe 0:5e013296b353 145
dreschpe 3:392d2c733c68 146 ft_void_t StartCmdTransfer(FT_GPU_TRANSFERDIR_T rw, ft_uint16_t count);
dreschpe 3:392d2c733c68 147 ft_void_t Powercycle(ft_bool_t up);
dreschpe 0:5e013296b353 148
dreschpe 0:5e013296b353 149
dreschpe 0:5e013296b353 150 /*******************************************************************************/
dreschpe 0:5e013296b353 151 /*******************************************************************************/
dreschpe 0:5e013296b353 152 /*APIs for Host Commands*/
dreschpe 0:5e013296b353 153 typedef enum {
dreschpe 0:5e013296b353 154 FT_GPU_INTERNAL_OSC = 0x48, //default
dreschpe 0:5e013296b353 155 FT_GPU_EXTERNAL_OSC = 0x44,
dreschpe 0:5e013296b353 156 } FT_GPU_PLL_SOURCE_T;
dreschpe 0:5e013296b353 157 typedef enum {
dreschpe 0:5e013296b353 158 FT_GPU_PLL_48M = 0x62, //default
dreschpe 0:5e013296b353 159 FT_GPU_PLL_36M = 0x61,
dreschpe 0:5e013296b353 160 FT_GPU_PLL_24M = 0x64,
dreschpe 0:5e013296b353 161 } FT_GPU_PLL_FREQ_T;
dreschpe 0:5e013296b353 162
dreschpe 0:5e013296b353 163 typedef enum {
dreschpe 0:5e013296b353 164 FT_GPU_ACTIVE_M = 0x00,
dreschpe 0:5e013296b353 165 FT_GPU_STANDBY_M = 0x41,//default
dreschpe 0:5e013296b353 166 FT_GPU_SLEEP_M = 0x42,
dreschpe 0:5e013296b353 167 FT_GPU_POWERDOWN_M = 0x50,
dreschpe 0:5e013296b353 168 } FT_GPU_POWER_MODE_T;
dreschpe 0:5e013296b353 169
dreschpe 0:5e013296b353 170 #define FT_GPU_CORE_RESET (0x68)
dreschpe 0:5e013296b353 171
dreschpe 0:5e013296b353 172 ft_int32_t hal_strlen(const ft_char8_t *s);
dreschpe 3:392d2c733c68 173 ft_void_t Sleep(ft_uint16_t ms);
dreschpe 3:392d2c733c68 174 ft_void_t ClockSelect(FT_GPU_PLL_SOURCE_T pllsource);
dreschpe 3:392d2c733c68 175 ft_void_t PLL_FreqSelect(FT_GPU_PLL_FREQ_T freq);
dreschpe 3:392d2c733c68 176 ft_void_t PowerModeSwitch(FT_GPU_POWER_MODE_T pwrmode);
dreschpe 3:392d2c733c68 177 ft_void_t CoreReset();
dreschpe 0:5e013296b353 178 //ft_void_t Ft_Gpu_Hal_StartTransfer( ,FT_GPU_TRANSFERDIR_T rw,ft_uint32_t addr);
dreschpe 3:392d2c733c68 179 ft_void_t WrMem(ft_uint32_t addr, const ft_uint8_t *buffer, ft_uint32_t length);
dreschpe 3:392d2c733c68 180 ft_void_t WrMemFromFlash(ft_uint32_t addr,const ft_prog_uchar8_t *buffer, ft_uint32_t length);
dreschpe 3:392d2c733c68 181 ft_void_t WrCmdBufFromFlash(FT_PROGMEM ft_prog_uchar8_t *buffer,ft_uint16_t count);
dreschpe 3:392d2c733c68 182 ft_void_t RdMem(ft_uint32_t addr, ft_uint8_t *buffer, ft_uint32_t length);
dreschpe 3:392d2c733c68 183 ft_void_t WaitLogo_Finish();
dreschpe 3:392d2c733c68 184 ft_uint8_t TransferString(const ft_char8_t *string);
dreschpe 3:392d2c733c68 185 ft_void_t HostCommand(ft_uint8_t cmd);
dreschpe 3:392d2c733c68 186 ft_int32_t Dec2Ascii(ft_char8_t *pSrc,ft_int32_t value);
dreschpe 0:5e013296b353 187
dreschpe 3:392d2c733c68 188 ft_void_t Text(ft_int16_t x, ft_int16_t y, ft_int16_t font, ft_uint16_t options, const ft_char8_t* s);
dreschpe 3:392d2c733c68 189 ft_void_t Number(ft_int16_t x, ft_int16_t y, ft_int16_t font, ft_uint16_t options, ft_int32_t n);
dreschpe 3:392d2c733c68 190 ft_void_t LoadIdentity();
dreschpe 3:392d2c733c68 191 ft_void_t Toggle(ft_int16_t x, ft_int16_t y, ft_int16_t w, ft_int16_t font, ft_uint16_t options, ft_uint16_t state, const ft_char8_t* s);
dreschpe 3:392d2c733c68 192 ft_void_t Gauge(ft_int16_t x, ft_int16_t y, ft_int16_t r, ft_uint16_t options, ft_uint16_t major, ft_uint16_t minor, ft_uint16_t val, ft_uint16_t range);
dreschpe 3:392d2c733c68 193 ft_void_t RegRead(ft_uint32_t ptr, ft_uint32_t result);
dreschpe 3:392d2c733c68 194 ft_void_t GetProps(ft_uint32_t ptr, ft_uint32_t w, ft_uint32_t h);
dreschpe 3:392d2c733c68 195 ft_void_t Memcpy(ft_uint32_t dest, ft_uint32_t src, ft_uint32_t num);
dreschpe 3:392d2c733c68 196 ft_void_t Spinner(ft_int16_t x, ft_int16_t y, ft_uint16_t style, ft_uint16_t scale);
dreschpe 3:392d2c733c68 197 ft_void_t BgColor(ft_uint32_t c);
dreschpe 3:392d2c733c68 198 ft_void_t Swap();
dreschpe 3:392d2c733c68 199 ft_void_t Inflate(ft_uint32_t ptr);
dreschpe 3:392d2c733c68 200 ft_void_t Translate(ft_int32_t tx, ft_int32_t ty);
dreschpe 3:392d2c733c68 201 ft_void_t Stop();
dreschpe 3:392d2c733c68 202 ft_void_t Slider(ft_int16_t x, ft_int16_t y, ft_int16_t w, ft_int16_t h, ft_uint16_t options, ft_uint16_t val, ft_uint16_t range);
dreschpe 3:392d2c733c68 203 ft_void_t Interrupt(ft_uint32_t ms);
dreschpe 3:392d2c733c68 204 ft_void_t FgColor(ft_uint32_t c);
dreschpe 3:392d2c733c68 205 ft_void_t Rotate(ft_int32_t a);
dreschpe 3:392d2c733c68 206 ft_void_t Button(ft_int16_t x, ft_int16_t y, ft_int16_t w, ft_int16_t h, ft_int16_t font, ft_uint16_t options, const ft_char8_t* s);
dreschpe 3:392d2c733c68 207 ft_void_t MemWrite(ft_uint32_t ptr, ft_uint32_t num);
dreschpe 3:392d2c733c68 208 ft_void_t Scrollbar(ft_int16_t x, ft_int16_t y, ft_int16_t w, ft_int16_t h, ft_uint16_t options, ft_uint16_t val, ft_uint16_t size, ft_uint16_t range);
dreschpe 3:392d2c733c68 209 ft_void_t GetMatrix(ft_int32_t a, ft_int32_t b, ft_int32_t c, ft_int32_t d, ft_int32_t e, ft_int32_t f);
dreschpe 3:392d2c733c68 210 ft_void_t Sketch(ft_int16_t x, ft_int16_t y, ft_uint16_t w, ft_uint16_t h, ft_uint32_t ptr, ft_uint16_t format);
dreschpe 3:392d2c733c68 211 ft_void_t MemSet(ft_uint32_t ptr, ft_uint32_t value, ft_uint32_t num);
dreschpe 3:392d2c733c68 212 ft_void_t Calibrate(ft_uint32_t result);
dreschpe 3:392d2c733c68 213 ft_void_t SetFont(ft_uint32_t font, ft_uint32_t ptr);
dreschpe 3:392d2c733c68 214 ft_void_t Bitmap_Transform(ft_int32_t x0, ft_int32_t y0, ft_int32_t x1, ft_int32_t y1, ft_int32_t x2, ft_int32_t y2, ft_int32_t tx0, ft_int32_t ty0, ft_int32_t tx1, ft_int32_t ty1, ft_int32_t tx2, ft_int32_t ty2, ft_uint16_t result);
dreschpe 3:392d2c733c68 215 ft_void_t GradColor(ft_uint32_t c);
dreschpe 3:392d2c733c68 216 ft_void_t Append(ft_uint32_t ptr, ft_uint32_t num);
dreschpe 3:392d2c733c68 217 ft_void_t MemZero(ft_uint32_t ptr, ft_uint32_t num);
dreschpe 3:392d2c733c68 218 ft_void_t Scale(ft_int32_t sx, ft_int32_t sy);
dreschpe 3:392d2c733c68 219 ft_void_t Clock(ft_int16_t x, ft_int16_t y, ft_int16_t r, ft_uint16_t options, ft_uint16_t h, ft_uint16_t m, ft_uint16_t s, ft_uint16_t ms);
dreschpe 3:392d2c733c68 220 ft_void_t Gradient(ft_int16_t x0, ft_int16_t y0, ft_uint32_t rgb0, ft_int16_t x1, ft_int16_t y1, ft_uint32_t rgb1);
dreschpe 3:392d2c733c68 221 ft_void_t SetMatrix();
dreschpe 3:392d2c733c68 222 ft_void_t Track(ft_int16_t x, ft_int16_t y, ft_int16_t w, ft_int16_t h, ft_int16_t tag);
dreschpe 3:392d2c733c68 223 ft_void_t GetPtr(ft_uint32_t result);
dreschpe 3:392d2c733c68 224 ft_void_t Progress(ft_int16_t x, ft_int16_t y, ft_int16_t w, ft_int16_t h, ft_uint16_t options, ft_uint16_t val, ft_uint16_t range);
dreschpe 3:392d2c733c68 225 ft_void_t ColdStart();
dreschpe 3:392d2c733c68 226 ft_void_t Keys(ft_int16_t x, ft_int16_t y, ft_int16_t w, ft_int16_t h, ft_int16_t font, ft_uint16_t options, const ft_char8_t* s);
dreschpe 3:392d2c733c68 227 ft_void_t Dial(ft_int16_t x, ft_int16_t y, ft_int16_t r, ft_uint16_t options, ft_uint16_t val);
dreschpe 3:392d2c733c68 228 ft_void_t LoadImage(ft_uint32_t ptr, ft_uint32_t options);
dreschpe 4:363ec27cdfaa 229 ft_void_t DLstart();
dreschpe 3:392d2c733c68 230 ft_void_t Snapshot(ft_uint32_t ptr);
dreschpe 3:392d2c733c68 231 ft_void_t ScreenSaver();
dreschpe 3:392d2c733c68 232 ft_void_t Memcrc(ft_uint32_t ptr, ft_uint32_t num, ft_uint32_t result);
dreschpe 0:5e013296b353 233
dreschpe 3:392d2c733c68 234 ft_void_t Logo();
dreschpe 0:5e013296b353 235
dreschpe 3:392d2c733c68 236 ft_void_t SendCmd( ft_uint32_t cmd);
dreschpe 3:392d2c733c68 237 ft_void_t SendStr( const ft_char8_t *s);
dreschpe 3:392d2c733c68 238 ft_void_t StartFunc( ft_uint16_t count);
dreschpe 3:392d2c733c68 239 ft_void_t EndFunc( ft_uint16_t count);
dreschpe 3:392d2c733c68 240 ft_void_t TouchTransform( ft_int32_t x0, ft_int32_t y0, ft_int32_t x1, ft_int32_t y1, ft_int32_t x2, ft_int32_t y2, ft_int32_t tx0, ft_int32_t ty0, ft_int32_t tx1, ft_int32_t ty1, ft_int32_t tx2, ft_int32_t ty2, ft_uint16_t result);
dreschpe 3:392d2c733c68 241 ft_void_t BitmapTransform( ft_int32_t x0, ft_int32_t y0, ft_int32_t x1, ft_int32_t y1, ft_int32_t x2, ft_int32_t y2, ft_int32_t tx0, ft_int32_t ty0, ft_int32_t tx1, ft_int32_t ty1, ft_int32_t tx2, ft_int32_t ty2, ft_uint16_t result);
dreschpe 3:392d2c733c68 242 ft_void_t MemCrc( ft_uint32_t ptr, ft_uint32_t num, ft_uint32_t result);
dreschpe 0:5e013296b353 243
dreschpe 3:392d2c733c68 244 ft_uint16_t fifo_Freespace( );
dreschpe 0:5e013296b353 245
dreschpe 4:363ec27cdfaa 246 ft_void_t DL(ft_uint32_t cmd);
dreschpe 3:392d2c733c68 247 ft_void_t WrDlCmd_Buffer(ft_uint32_t cmd);
dreschpe 3:392d2c733c68 248 ft_void_t Flush_DL_Buffer();
dreschpe 3:392d2c733c68 249 ft_void_t Flush_Co_Buffer();
dreschpe 3:392d2c733c68 250 ft_void_t fadeout();
dreschpe 3:392d2c733c68 251 ft_void_t fadein();
dreschpe 3:392d2c733c68 252 ft_void_t DLSwap(ft_uint8_t DL_Swap_Type);
dreschpe 0:5e013296b353 253
dreschpe 3:392d2c733c68 254 ft_void_t Sound_ON();
dreschpe 3:392d2c733c68 255 ft_void_t Sound_OFF();
dreschpe 4:363ec27cdfaa 256
dreschpe 4:363ec27cdfaa 257 int Load_jpg(char* filename, ft_int16_t* x_size, ft_int16_t* y_size);
dreschpe 4:363ec27cdfaa 258 ft_void_t Calibrate();
dreschpe 6:16e22c789f7d 259 ft_void_t read_calibrate(ft_uint8_t data[24]);
dreschpe 6:16e22c789f7d 260 ft_void_t write_calibrate(ft_uint8_t data[24]);
dreschpe 6:16e22c789f7d 261
dreschpe 6:16e22c789f7d 262 ft_uint32_t color_rgb(ft_uint8_t red,ft_uint8_t green, ft_uint8_t blue);
dreschpe 6:16e22c789f7d 263 ft_uint32_t clear_color_rgb(ft_uint8_t red,ft_uint8_t green, ft_uint8_t blue);
dreschpe 0:5e013296b353 264
dreschpe 0:5e013296b353 265 }; // end of class
dreschpe 0:5e013296b353 266
dreschpe 3:392d2c733c68 267 #endif /*FT_GPU_HAL_H*/