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targets/cmsis/core_ca9.h@144:423e1876dc07, 2016-08-02 (annotated)

Committer:
screamer
Date:
Tue Aug 02 14:07:36 2016 +0000
Revision:
144:423e1876dc07
Parent:
66:fdb3f9f9a72f 
Added targets.json file for the supported targets in the release

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**************************************************************************//**
bogdanm 0:9b334a45a8ff 2 * @file core_ca9.h
bogdanm 0:9b334a45a8ff 3 * @brief CMSIS Cortex-A9 Core Peripheral Access Layer Header File
bogdanm 0:9b334a45a8ff 4 * @version
bogdanm 0:9b334a45a8ff 5 * @date 25 March 2013
bogdanm 0:9b334a45a8ff 6 *
bogdanm 0:9b334a45a8ff 7 * @note
bogdanm 0:9b334a45a8ff 8 *
bogdanm 0:9b334a45a8ff 9 ******************************************************************************/
bogdanm 0:9b334a45a8ff 10 /* Copyright (c) 2009 - 2012 ARM LIMITED
bogdanm 0:9b334a45a8ff 11
bogdanm 0:9b334a45a8ff 12 All rights reserved.
bogdanm 0:9b334a45a8ff 13 Redistribution and use in source and binary forms, with or without
bogdanm 0:9b334a45a8ff 14 modification, are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 15 - Redistributions of source code must retain the above copyright
bogdanm 0:9b334a45a8ff 16 notice, this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 17 - Redistributions in binary form must reproduce the above copyright
bogdanm 0:9b334a45a8ff 18 notice, this list of conditions and the following disclaimer in the
bogdanm 0:9b334a45a8ff 19 documentation and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 20 - Neither the name of ARM nor the names of its contributors may be used
bogdanm 0:9b334a45a8ff 21 to endorse or promote products derived from this software without
bogdanm 0:9b334a45a8ff 22 specific prior written permission.
bogdanm 0:9b334a45a8ff 23 *
bogdanm 0:9b334a45a8ff 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
bogdanm 0:9b334a45a8ff 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
bogdanm 0:9b334a45a8ff 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
bogdanm 0:9b334a45a8ff 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
bogdanm 0:9b334a45a8ff 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
bogdanm 0:9b334a45a8ff 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
bogdanm 0:9b334a45a8ff 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
bogdanm 0:9b334a45a8ff 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
bogdanm 0:9b334a45a8ff 34 POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 35 ---------------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 36
bogdanm 0:9b334a45a8ff 37
bogdanm 0:9b334a45a8ff 38 #if defined ( __ICCARM__ )
bogdanm 0:9b334a45a8ff 39 #pragma system_include /* treat file as system include file for MISRA check */
bogdanm 0:9b334a45a8ff 40 #endif
bogdanm 0:9b334a45a8ff 41
bogdanm 0:9b334a45a8ff 42 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 43 extern "C" {
bogdanm 0:9b334a45a8ff 44 #endif
bogdanm 0:9b334a45a8ff 45
bogdanm 0:9b334a45a8ff 46 #ifndef __CORE_CA9_H_GENERIC
bogdanm 0:9b334a45a8ff 47 #define __CORE_CA9_H_GENERIC
bogdanm 0:9b334a45a8ff 48
bogdanm 0:9b334a45a8ff 49
bogdanm 0:9b334a45a8ff 50 /** \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
bogdanm 0:9b334a45a8ff 51 CMSIS violates the following MISRA-C:2004 rules:
bogdanm 0:9b334a45a8ff 52
bogdanm 0:9b334a45a8ff 53 \li Required Rule 8.5, object/function definition in header file.<br>
bogdanm 0:9b334a45a8ff 54 Function definitions in header files are used to allow 'inlining'.
bogdanm 0:9b334a45a8ff 55
bogdanm 0:9b334a45a8ff 56 \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
bogdanm 0:9b334a45a8ff 57 Unions are used for effective representation of core registers.
bogdanm 0:9b334a45a8ff 58
bogdanm 0:9b334a45a8ff 59 \li Advisory Rule 19.7, Function-like macro defined.<br>
bogdanm 0:9b334a45a8ff 60 Function-like macros are used to allow more efficient code.
bogdanm 0:9b334a45a8ff 61 */
bogdanm 0:9b334a45a8ff 62
bogdanm 0:9b334a45a8ff 63
bogdanm 0:9b334a45a8ff 64 /*******************************************************************************
bogdanm 0:9b334a45a8ff 65 * CMSIS definitions
bogdanm 0:9b334a45a8ff 66 ******************************************************************************/
bogdanm 0:9b334a45a8ff 67 /** \ingroup Cortex_A9
bogdanm 0:9b334a45a8ff 68 @{
bogdanm 0:9b334a45a8ff 69 */
bogdanm 0:9b334a45a8ff 70
bogdanm 0:9b334a45a8ff 71 /* CMSIS CA9 definitions */
bogdanm 0:9b334a45a8ff 72 #define __CA9_CMSIS_VERSION_MAIN (0x03) /*!< [31:16] CMSIS HAL main version */
bogdanm 0:9b334a45a8ff 73 #define __CA9_CMSIS_VERSION_SUB (0x10) /*!< [15:0] CMSIS HAL sub version */
bogdanm 0:9b334a45a8ff 74 #define __CA9_CMSIS_VERSION ((__CA9_CMSIS_VERSION_MAIN << 16) | \
bogdanm 0:9b334a45a8ff 75 __CA9_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */
bogdanm 0:9b334a45a8ff 76
bogdanm 0:9b334a45a8ff 77 #define __CORTEX_A (0x09) /*!< Cortex-A Core */
bogdanm 0:9b334a45a8ff 78
bogdanm 0:9b334a45a8ff 79
bogdanm 0:9b334a45a8ff 80 #if defined ( __CC_ARM )
bogdanm 0:9b334a45a8ff 81 #define __ASM __asm /*!< asm keyword for ARM Compiler */
bogdanm 0:9b334a45a8ff 82 #define __INLINE __inline /*!< inline keyword for ARM Compiler */
bogdanm 0:9b334a45a8ff 83 #define __STATIC_INLINE static __inline
bogdanm 0:9b334a45a8ff 84 #define __STATIC_ASM static __asm
bogdanm 0:9b334a45a8ff 85
bogdanm 0:9b334a45a8ff 86 #elif defined ( __ICCARM__ )
bogdanm 0:9b334a45a8ff 87 #define __ASM __asm /*!< asm keyword for IAR Compiler */
bogdanm 0:9b334a45a8ff 88 #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
bogdanm 0:9b334a45a8ff 89 #define __STATIC_INLINE static inline
bogdanm 0:9b334a45a8ff 90 #define __STATIC_ASM static __asm
bogdanm 0:9b334a45a8ff 91
mbed_official 66:fdb3f9f9a72f 92 #include <stdint.h>
mbed_official 66:fdb3f9f9a72f 93 inline uint32_t __get_PSR(void) {
mbed_official 66:fdb3f9f9a72f 94 __ASM("mrs r0, cpsr");
mbed_official 66:fdb3f9f9a72f 95 }
mbed_official 66:fdb3f9f9a72f 96
bogdanm 0:9b334a45a8ff 97 #elif defined ( __TMS470__ )
bogdanm 0:9b334a45a8ff 98 #define __ASM __asm /*!< asm keyword for TI CCS Compiler */
bogdanm 0:9b334a45a8ff 99 #define __STATIC_INLINE static inline
bogdanm 0:9b334a45a8ff 100 #define __STATIC_ASM static __asm
bogdanm 0:9b334a45a8ff 101
bogdanm 0:9b334a45a8ff 102 #elif defined ( __GNUC__ )
bogdanm 0:9b334a45a8ff 103 #define __ASM __asm /*!< asm keyword for GNU Compiler */
bogdanm 0:9b334a45a8ff 104 #define __INLINE inline /*!< inline keyword for GNU Compiler */
bogdanm 0:9b334a45a8ff 105 #define __STATIC_INLINE static inline
bogdanm 0:9b334a45a8ff 106 #define __STATIC_ASM static __asm
bogdanm 0:9b334a45a8ff 107
bogdanm 0:9b334a45a8ff 108 #elif defined ( __TASKING__ )
bogdanm 0:9b334a45a8ff 109 #define __ASM __asm /*!< asm keyword for TASKING Compiler */
bogdanm 0:9b334a45a8ff 110 #define __INLINE inline /*!< inline keyword for TASKING Compiler */
bogdanm 0:9b334a45a8ff 111 #define __STATIC_INLINE static inline
bogdanm 0:9b334a45a8ff 112 #define __STATIC_ASM static __asm
bogdanm 0:9b334a45a8ff 113
bogdanm 0:9b334a45a8ff 114 #endif
bogdanm 0:9b334a45a8ff 115
bogdanm 0:9b334a45a8ff 116 /** __FPU_USED indicates whether an FPU is used or not. For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
bogdanm 0:9b334a45a8ff 117 */
bogdanm 0:9b334a45a8ff 118 #if defined ( __CC_ARM )
bogdanm 0:9b334a45a8ff 119 #if defined __TARGET_FPU_VFP
bogdanm 0:9b334a45a8ff 120 #if (__FPU_PRESENT == 1)
bogdanm 0:9b334a45a8ff 121 #define __FPU_USED 1
bogdanm 0:9b334a45a8ff 122 #else
bogdanm 0:9b334a45a8ff 123 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
bogdanm 0:9b334a45a8ff 124 #define __FPU_USED 0
bogdanm 0:9b334a45a8ff 125 #endif
bogdanm 0:9b334a45a8ff 126 #else
bogdanm 0:9b334a45a8ff 127 #define __FPU_USED 0
bogdanm 0:9b334a45a8ff 128 #endif
bogdanm 0:9b334a45a8ff 129
bogdanm 0:9b334a45a8ff 130 #elif defined ( __ICCARM__ )
bogdanm 0:9b334a45a8ff 131 #if defined __ARMVFP__
bogdanm 0:9b334a45a8ff 132 #if (__FPU_PRESENT == 1)
bogdanm 0:9b334a45a8ff 133 #define __FPU_USED 1
bogdanm 0:9b334a45a8ff 134 #else
bogdanm 0:9b334a45a8ff 135 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
bogdanm 0:9b334a45a8ff 136 #define __FPU_USED 0
bogdanm 0:9b334a45a8ff 137 #endif
bogdanm 0:9b334a45a8ff 138 #else
bogdanm 0:9b334a45a8ff 139 #define __FPU_USED 0
bogdanm 0:9b334a45a8ff 140 #endif
bogdanm 0:9b334a45a8ff 141
bogdanm 0:9b334a45a8ff 142 #elif defined ( __TMS470__ )
bogdanm 0:9b334a45a8ff 143 #if defined __TI_VFP_SUPPORT__
bogdanm 0:9b334a45a8ff 144 #if (__FPU_PRESENT == 1)
bogdanm 0:9b334a45a8ff 145 #define __FPU_USED 1
bogdanm 0:9b334a45a8ff 146 #else
bogdanm 0:9b334a45a8ff 147 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
bogdanm 0:9b334a45a8ff 148 #define __FPU_USED 0
bogdanm 0:9b334a45a8ff 149 #endif
bogdanm 0:9b334a45a8ff 150 #else
bogdanm 0:9b334a45a8ff 151 #define __FPU_USED 0
bogdanm 0:9b334a45a8ff 152 #endif
bogdanm 0:9b334a45a8ff 153
bogdanm 0:9b334a45a8ff 154 #elif defined ( __GNUC__ )
bogdanm 0:9b334a45a8ff 155 #if defined (__VFP_FP__) && !defined(__SOFTFP__)
bogdanm 0:9b334a45a8ff 156 #if (__FPU_PRESENT == 1)
bogdanm 0:9b334a45a8ff 157 #define __FPU_USED 1
bogdanm 0:9b334a45a8ff 158 #else
bogdanm 0:9b334a45a8ff 159 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
bogdanm 0:9b334a45a8ff 160 #define __FPU_USED 0
bogdanm 0:9b334a45a8ff 161 #endif
bogdanm 0:9b334a45a8ff 162 #else
bogdanm 0:9b334a45a8ff 163 #define __FPU_USED 0
bogdanm 0:9b334a45a8ff 164 #endif
bogdanm 0:9b334a45a8ff 165
bogdanm 0:9b334a45a8ff 166 #elif defined ( __TASKING__ )
bogdanm 0:9b334a45a8ff 167 #if defined __FPU_VFP__
bogdanm 0:9b334a45a8ff 168 #if (__FPU_PRESENT == 1)
bogdanm 0:9b334a45a8ff 169 #define __FPU_USED 1
bogdanm 0:9b334a45a8ff 170 #else
bogdanm 0:9b334a45a8ff 171 #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
bogdanm 0:9b334a45a8ff 172 #define __FPU_USED 0
bogdanm 0:9b334a45a8ff 173 #endif
bogdanm 0:9b334a45a8ff 174 #else
bogdanm 0:9b334a45a8ff 175 #define __FPU_USED 0
bogdanm 0:9b334a45a8ff 176 #endif
bogdanm 0:9b334a45a8ff 177 #endif
bogdanm 0:9b334a45a8ff 178
bogdanm 0:9b334a45a8ff 179 #include <stdint.h> /*!< standard types definitions */
bogdanm 0:9b334a45a8ff 180 #include "core_caInstr.h" /*!< Core Instruction Access */
bogdanm 0:9b334a45a8ff 181 #include "core_caFunc.h" /*!< Core Function Access */
bogdanm 0:9b334a45a8ff 182 #include "core_cm4_simd.h" /*!< Compiler specific SIMD Intrinsics */
bogdanm 0:9b334a45a8ff 183
bogdanm 0:9b334a45a8ff 184 #endif /* __CORE_CA9_H_GENERIC */
bogdanm 0:9b334a45a8ff 185
bogdanm 0:9b334a45a8ff 186 #ifndef __CMSIS_GENERIC
bogdanm 0:9b334a45a8ff 187
bogdanm 0:9b334a45a8ff 188 #ifndef __CORE_CA9_H_DEPENDANT
bogdanm 0:9b334a45a8ff 189 #define __CORE_CA9_H_DEPENDANT
bogdanm 0:9b334a45a8ff 190
bogdanm 0:9b334a45a8ff 191 /* check device defines and use defaults */
bogdanm 0:9b334a45a8ff 192 #if defined __CHECK_DEVICE_DEFINES
bogdanm 0:9b334a45a8ff 193 #ifndef __CA9_REV
bogdanm 0:9b334a45a8ff 194 #define __CA9_REV 0x0000
bogdanm 0:9b334a45a8ff 195 #warning "__CA9_REV not defined in device header file; using default!"
bogdanm 0:9b334a45a8ff 196 #endif
bogdanm 0:9b334a45a8ff 197
bogdanm 0:9b334a45a8ff 198 #ifndef __FPU_PRESENT
bogdanm 0:9b334a45a8ff 199 #define __FPU_PRESENT 1
bogdanm 0:9b334a45a8ff 200 #warning "__FPU_PRESENT not defined in device header file; using default!"
bogdanm 0:9b334a45a8ff 201 #endif
bogdanm 0:9b334a45a8ff 202
bogdanm 0:9b334a45a8ff 203 #ifndef __Vendor_SysTickConfig
bogdanm 0:9b334a45a8ff 204 #define __Vendor_SysTickConfig 1
bogdanm 0:9b334a45a8ff 205 #endif
bogdanm 0:9b334a45a8ff 206
bogdanm 0:9b334a45a8ff 207 #if __Vendor_SysTickConfig == 0
bogdanm 0:9b334a45a8ff 208 #error "__Vendor_SysTickConfig set to 0, but vendor systick timer must be supplied for Cortex-A9"
bogdanm 0:9b334a45a8ff 209 #endif
bogdanm 0:9b334a45a8ff 210 #endif
bogdanm 0:9b334a45a8ff 211
bogdanm 0:9b334a45a8ff 212 /* IO definitions (access restrictions to peripheral registers) */
bogdanm 0:9b334a45a8ff 213 /**
bogdanm 0:9b334a45a8ff 214 \defgroup CMSIS_glob_defs CMSIS Global Defines
bogdanm 0:9b334a45a8ff 215
bogdanm 0:9b334a45a8ff 216 <strong>IO Type Qualifiers</strong> are used
bogdanm 0:9b334a45a8ff 217 \li to specify the access to peripheral variables.
bogdanm 0:9b334a45a8ff 218 \li for automatic generation of peripheral register debug information.
bogdanm 0:9b334a45a8ff 219 */
bogdanm 0:9b334a45a8ff 220 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 221 #define __I volatile /*!< Defines 'read only' permissions */
bogdanm 0:9b334a45a8ff 222 #else
bogdanm 0:9b334a45a8ff 223 #define __I volatile const /*!< Defines 'read only' permissions */
bogdanm 0:9b334a45a8ff 224 #endif
bogdanm 0:9b334a45a8ff 225 #define __O volatile /*!< Defines 'write only' permissions */
bogdanm 0:9b334a45a8ff 226 #define __IO volatile /*!< Defines 'read / write' permissions */
bogdanm 0:9b334a45a8ff 227
bogdanm 0:9b334a45a8ff 228 /*@} end of group Cortex_A9 */
bogdanm 0:9b334a45a8ff 229
bogdanm 0:9b334a45a8ff 230
bogdanm 0:9b334a45a8ff 231 /*******************************************************************************
bogdanm 0:9b334a45a8ff 232 * Register Abstraction
bogdanm 0:9b334a45a8ff 233 ******************************************************************************/
bogdanm 0:9b334a45a8ff 234 /** \defgroup CMSIS_core_register Defines and Type Definitions
bogdanm 0:9b334a45a8ff 235 \brief Type definitions and defines for Cortex-A processor based devices.
bogdanm 0:9b334a45a8ff 236 */
bogdanm 0:9b334a45a8ff 237
bogdanm 0:9b334a45a8ff 238 /** \ingroup CMSIS_core_register
bogdanm 0:9b334a45a8ff 239 \defgroup CMSIS_CORE Status and Control Registers
bogdanm 0:9b334a45a8ff 240 \brief Core Register type definitions.
bogdanm 0:9b334a45a8ff 241 @{
bogdanm 0:9b334a45a8ff 242 */
bogdanm 0:9b334a45a8ff 243
bogdanm 0:9b334a45a8ff 244 /** \brief Union type to access the Application Program Status Register (APSR).
bogdanm 0:9b334a45a8ff 245 */
bogdanm 0:9b334a45a8ff 246 typedef union
bogdanm 0:9b334a45a8ff 247 {
bogdanm 0:9b334a45a8ff 248 struct
bogdanm 0:9b334a45a8ff 249 {
bogdanm 0:9b334a45a8ff 250 uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */
bogdanm 0:9b334a45a8ff 251 uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
bogdanm 0:9b334a45a8ff 252 uint32_t reserved1:7; /*!< bit: 20..23 Reserved */
bogdanm 0:9b334a45a8ff 253 uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
bogdanm 0:9b334a45a8ff 254 uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
bogdanm 0:9b334a45a8ff 255 uint32_t C:1; /*!< bit: 29 Carry condition code flag */
bogdanm 0:9b334a45a8ff 256 uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
bogdanm 0:9b334a45a8ff 257 uint32_t N:1; /*!< bit: 31 Negative condition code flag */
bogdanm 0:9b334a45a8ff 258 } b; /*!< Structure used for bit access */
bogdanm 0:9b334a45a8ff 259 uint32_t w; /*!< Type used for word access */
bogdanm 0:9b334a45a8ff 260 } APSR_Type;
bogdanm 0:9b334a45a8ff 261
bogdanm 0:9b334a45a8ff 262
bogdanm 0:9b334a45a8ff 263 /*@} end of group CMSIS_CORE */
bogdanm 0:9b334a45a8ff 264
bogdanm 0:9b334a45a8ff 265 /*@} end of CMSIS_Core_FPUFunctions */
bogdanm 0:9b334a45a8ff 266
bogdanm 0:9b334a45a8ff 267
bogdanm 0:9b334a45a8ff 268 #endif /* __CORE_CA9_H_GENERIC */
bogdanm 0:9b334a45a8ff 269
bogdanm 0:9b334a45a8ff 270 #endif /* __CMSIS_GENERIC */
bogdanm 0:9b334a45a8ff 271
bogdanm 0:9b334a45a8ff 272 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 273 }
bogdanm 0:9b334a45a8ff 274
bogdanm 0:9b334a45a8ff 275
bogdanm 0:9b334a45a8ff 276 #endif