zg_com.c

00001 
00002 /*
00003 Copyright (c) 2010 Donatien Garnier (donatiengar [at] gmail [dot] com)
00004  
00005 Permission is hereby granted, free of charge, to any person obtaining a copy
00006 of this software and associated documentation files (the "Software"), to deal
00007 in the Software without restriction, including without limitation the rights
00008 to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
00009 copies of the Software, and to permit persons to whom the Software is
00010 furnished to do so, subject to the following conditions:
00011  
00012 The above copyright notice and this permission notice shall be included in
00013 all copies or substantial portions of the Software.
00014  
00015 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
00016 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
00017 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
00018 AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
00019 LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
00020 OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
00021 THE SOFTWARE.
00022 */
00023 
00024 #include "netCfg.h"
00025 #if NET_ZG2100
00026 
00027 #include "zg_defs.h"
00028 #include "zg_com.h"
00029 
00030 #include "mbed.h" //For SPI, DigitalOut & InterruptIn
00031 
00032 //#define __DEBUG
00033 #include "dbg/dbg.h"
00034 
00035 #define ZG_CMD_BUF_SIZE 16
00036 
00037 //Locals
00038 static SPI* m_pSpi;
00039 static DigitalOut* m_pCs;
00040 //static InterruptIn* m_pInt;
00041 static DigitalIn* m_pInt;
00042 
00043 static byte cmd[ZG_CMD_BUF_SIZE] ZG_MEM;
00044 
00045 //Functions
00046 
00047 void zg_com_init(SPI* pSpi, DigitalOut* pCs, /*InterruptIn**/ DigitalIn* pInt, DigitalOut* pNrst)
00048 {
00049   m_pSpi = pSpi;
00050   m_pCs = pCs;
00051   m_pInt = pInt;
00052   m_pCs->write(ZG_SPI_CS_OFF); //Do no select chip for now
00053   m_pSpi->format(8,0); //8 bits / word, Mode 0
00054   //m_pSpi->frequency(1000000); //1Mhz - FMax is 25MHz
00055   m_pSpi->frequency(20000000); //20Mhz - FMax is 25MHz
00056   //Reset chip
00057   pNrst->write(ZG_SPI_RST_ON);
00058   wait_ms(100);
00059   //And release
00060   pNrst->write(ZG_SPI_RST_OFF);
00061  // m_pInt->fall(zg_on_int); //Attach on interrupt callback
00062 }
00063 
00064 
00065 //Registers Access
00066 
00067 uint32_t zg_register_read(uint32_t addr)
00068 {
00069   int len;
00070   uint32_t res;
00071   
00072   len = ZG_REG_LEN( addr );
00073   cmd[0] = (byte)(ZG_CMD_REG_RD | addr);
00074   memset( &cmd[1], 0, len );
00075   
00076   zg_spi_trf(cmd, len + 1);
00077   
00078   if(len==1)
00079   {
00080     res = cmd[1];
00081   }
00082   else //if(len == 2)
00083   {
00084     res = (uint16_t) DTOHS( *((uint16_t*)&cmd[1]) );
00085   }
00086   
00087   return res;
00088 }
00089 
00090 void zg_register_write(uint32_t addr, uint32_t reg)
00091 {
00092   int len;
00093   
00094   len = ZG_REG_LEN( addr );
00095   cmd[0] = (byte)(ZG_CMD_REG_WR | addr);
00096   
00097   if(len==1)
00098   {
00099     cmd[1] = reg;
00100   }
00101   else //if(len == 2)
00102   {
00103     *((uint16_t*)&cmd[1]) = HTODS( reg );
00104   }
00105   
00106   zg_spi_trf(cmd, len + 1);
00107 }
00108 
00109 //Indexed Registers Access
00110 
00111 uint32_t zg_indexed_register_read(uint32_t addr)
00112 {
00113   zg_register_write( ZG_REG_IREG_ADDR, addr );
00114   return zg_register_read( ZG_REG_IREG_DATA );
00115 }
00116 
00117 void zg_indexed_register_write(uint32_t addr, uint32_t reg)
00118 {
00119   zg_register_write( ZG_REG_IREG_ADDR, addr );
00120   zg_register_write( ZG_REG_IREG_DATA, reg );
00121 }
00122 
00123 //Fifos
00124 
00125 void zg_fifo_read( byte fifo, byte* pType, byte* pSubtype, byte* buf, int len )
00126 {
00127   cmd[0] = (fifo==ZG_FIFO_DATA)?ZG_CMD_FIFO_RD_DATA:ZG_CMD_FIFO_RD_MGMT;
00128   memset( &cmd[1], 0, 2 );
00129   zg_spi_trf(cmd, 3, false, ZG_SPI_TRF); //false : Command not terminated yet
00130   *pType = cmd[1];
00131   *pSubtype = cmd[2];
00132   
00133   //memset(buf, 0, len);
00134   zg_spi_trf(buf, len, true, ZG_SPI_READ);  
00135   
00136   cmd[0] = ZG_CMD_FIFO_RD_DONE;
00137   zg_spi_trf(cmd, 1, true, ZG_SPI_WRITE);  
00138 }
00139 
00140 void zg_fifo_write( byte fifo, byte type, byte subtype, byte* buf, int len, bool start /*= true*/, bool stop /*= true*/ )
00141 {
00142   if(start)
00143   {
00144     cmd[0] = (fifo==ZG_FIFO_DATA)?ZG_CMD_FIFO_WR_DATA:ZG_CMD_FIFO_WR_MGMT;
00145     cmd[1] = type;
00146     cmd[2] = subtype;
00147     zg_spi_trf(cmd, 3, false, ZG_SPI_WRITE); //false : Command not terminated yet
00148   }
00149   
00150   /*if(len>0 && buf!=NULL)
00151   {*/
00152     zg_spi_trf(buf, len, stop, ZG_SPI_WRITE);
00153   /*}*/
00154   
00155   if(stop)
00156   {
00157     cmd[0] = ZG_CMD_FIFO_WR_DONE;
00158     zg_spi_trf(cmd, 1, true, ZG_SPI_WRITE);
00159   }
00160 }
00161 
00162 
00163 void zg_spi_trf(byte* buf, int len, bool resetCs /*= true*/, ZG_SPI_DIR dir /*= ZG_SPI_TRF*/)
00164 {
00165   int i;
00166   m_pCs->write(ZG_SPI_CS_ON);
00167 
00168 #ifdef __DEBUG
00169   DBG("\r\nDump: >>\r\n");
00170   for(i=0; i<len; i++)
00171   {
00172     DBGL("%02x ", buf[i]);
00173   }
00174   DBG("\r\n>>\r\n");
00175 #endif
00176 
00177   switch(dir)
00178   {
00179   case ZG_SPI_READ:
00180     for(i=0; i<len; i++)
00181       buf[i] = (byte) m_pSpi->write(0);
00182     break;
00183   case ZG_SPI_WRITE:
00184     for(i=0; i<len; i++)
00185       m_pSpi->write(buf[i]);
00186     break;
00187   case ZG_SPI_TRF:
00188   default:
00189     for(i=0; i<len; i++)
00190       buf[i] = (byte) m_pSpi->write(buf[i]);
00191     break;
00192   }
00193 
00194 #ifdef __DEBUG
00195   DBG("\r\nDump: <<\r\n");
00196   for(i=0; i<len; i++)
00197   {
00198     DBGL("%02x ", buf[i]);
00199   }
00200   DBG("\r\n<<\r\n"); 
00201 #endif
00202 
00203  
00204   if(resetCs) //If false, allows to split transfer in multiple calls
00205     m_pCs->write(ZG_SPI_CS_OFF);
00206 }
00207 
00208 bool zg_is_int()
00209 {
00210   return !(m_pInt->read());
00211 }
00212 
00213 #endif