Daiki Kato / mbed-os-lychee

mbed-os for GR-LYCHEE

Dependents:   mbed-os-example-blinky-gr-lychee GR-Boads_Camera_sample GR-Boards_Audio_Recoder GR-Boads_Camera_DisplayApp ... more

drivers/SPI.h@0:f782d9c66c49, 2018-02-02 (annotated)

Committer:
dkato
Date:
Fri Feb 02 05:42:23 2018 +0000
Revision:
0:f782d9c66c49
mbed-os for GR-LYCHEE

Who changed what in which revision?

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dkato 0:f782d9c66c49 1 /* mbed Microcontroller Library
dkato 0:f782d9c66c49 2 * Copyright (c) 2006-2015 ARM Limited
dkato 0:f782d9c66c49 3 *
dkato 0:f782d9c66c49 4 * Licensed under the Apache License, Version 2.0 (the "License");
dkato 0:f782d9c66c49 5 * you may not use this file except in compliance with the License.
dkato 0:f782d9c66c49 6 * You may obtain a copy of the License at
dkato 0:f782d9c66c49 7 *
dkato 0:f782d9c66c49 8 * http://www.apache.org/licenses/LICENSE-2.0
dkato 0:f782d9c66c49 9 *
dkato 0:f782d9c66c49 10 * Unless required by applicable law or agreed to in writing, software
dkato 0:f782d9c66c49 11 * distributed under the License is distributed on an "AS IS" BASIS,
dkato 0:f782d9c66c49 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
dkato 0:f782d9c66c49 13 * See the License for the specific language governing permissions and
dkato 0:f782d9c66c49 14 * limitations under the License.
dkato 0:f782d9c66c49 15 */
dkato 0:f782d9c66c49 16 #ifndef MBED_SPI_H
dkato 0:f782d9c66c49 17 #define MBED_SPI_H
dkato 0:f782d9c66c49 18
dkato 0:f782d9c66c49 19 #include "platform/platform.h"
dkato 0:f782d9c66c49 20
dkato 0:f782d9c66c49 21 #if DEVICE_SPI
dkato 0:f782d9c66c49 22
dkato 0:f782d9c66c49 23 #include "platform/PlatformMutex.h"
dkato 0:f782d9c66c49 24 #include "hal/spi_api.h"
dkato 0:f782d9c66c49 25 #include "platform/SingletonPtr.h"
dkato 0:f782d9c66c49 26
dkato 0:f782d9c66c49 27 #if DEVICE_SPI_ASYNCH
dkato 0:f782d9c66c49 28 #include "platform/CThunk.h"
dkato 0:f782d9c66c49 29 #include "hal/dma_api.h"
dkato 0:f782d9c66c49 30 #include "platform/CircularBuffer.h"
dkato 0:f782d9c66c49 31 #include "platform/FunctionPointer.h"
dkato 0:f782d9c66c49 32 #include "platform/Transaction.h"
dkato 0:f782d9c66c49 33 #endif
dkato 0:f782d9c66c49 34
dkato 0:f782d9c66c49 35 namespace mbed {
dkato 0:f782d9c66c49 36 /** \addtogroup drivers */
dkato 0:f782d9c66c49 37 /** @{*/
dkato 0:f782d9c66c49 38
dkato 0:f782d9c66c49 39 /** A SPI Master, used for communicating with SPI slave devices
dkato 0:f782d9c66c49 40 *
dkato 0:f782d9c66c49 41 * The default format is set to 8-bits, mode 0, and a clock frequency of 1MHz
dkato 0:f782d9c66c49 42 *
dkato 0:f782d9c66c49 43 * Most SPI devices will also require Chip Select and Reset signals. These
dkato 0:f782d9c66c49 44 * can be controlled using <DigitalOut> pins
dkato 0:f782d9c66c49 45 *
dkato 0:f782d9c66c49 46 * @Note Synchronization level: Thread safe
dkato 0:f782d9c66c49 47 *
dkato 0:f782d9c66c49 48 * Example:
dkato 0:f782d9c66c49 49 * @code
dkato 0:f782d9c66c49 50 * // Send a byte to a SPI slave, and record the response
dkato 0:f782d9c66c49 51 *
dkato 0:f782d9c66c49 52 * #include "mbed.h"
dkato 0:f782d9c66c49 53 *
dkato 0:f782d9c66c49 54 * // hardware ssel (where applicable)
dkato 0:f782d9c66c49 55 * //SPI device(p5, p6, p7, p8); // mosi, miso, sclk, ssel
dkato 0:f782d9c66c49 56 *
dkato 0:f782d9c66c49 57 * // software ssel
dkato 0:f782d9c66c49 58 * SPI device(p5, p6, p7); // mosi, miso, sclk
dkato 0:f782d9c66c49 59 * DigitalOut cs(p8); // ssel
dkato 0:f782d9c66c49 60 *
dkato 0:f782d9c66c49 61 * int main() {
dkato 0:f782d9c66c49 62 * // hardware ssel (where applicable)
dkato 0:f782d9c66c49 63 * //int response = device.write(0xFF);
dkato 0:f782d9c66c49 64 *
dkato 0:f782d9c66c49 65 * device.lock();
dkato 0:f782d9c66c49 66 * // software ssel
dkato 0:f782d9c66c49 67 * cs = 0;
dkato 0:f782d9c66c49 68 * int response = device.write(0xFF);
dkato 0:f782d9c66c49 69 * cs = 1;
dkato 0:f782d9c66c49 70 * device.unlock();
dkato 0:f782d9c66c49 71 *
dkato 0:f782d9c66c49 72 * }
dkato 0:f782d9c66c49 73 * @endcode
dkato 0:f782d9c66c49 74 */
dkato 0:f782d9c66c49 75 class SPI {
dkato 0:f782d9c66c49 76
dkato 0:f782d9c66c49 77 public:
dkato 0:f782d9c66c49 78
dkato 0:f782d9c66c49 79 /** Create a SPI master connected to the specified pins
dkato 0:f782d9c66c49 80 *
dkato 0:f782d9c66c49 81 * mosi or miso can be specfied as NC if not used
dkato 0:f782d9c66c49 82 *
dkato 0:f782d9c66c49 83 * @param mosi SPI Master Out, Slave In pin
dkato 0:f782d9c66c49 84 * @param miso SPI Master In, Slave Out pin
dkato 0:f782d9c66c49 85 * @param sclk SPI Clock pin
dkato 0:f782d9c66c49 86 * @param ssel SPI chip select pin
dkato 0:f782d9c66c49 87 */
dkato 0:f782d9c66c49 88 SPI(PinName mosi, PinName miso, PinName sclk, PinName ssel=NC);
dkato 0:f782d9c66c49 89
dkato 0:f782d9c66c49 90 /** Configure the data transmission format
dkato 0:f782d9c66c49 91 *
dkato 0:f782d9c66c49 92 * @param bits Number of bits per SPI frame (4 - 16)
dkato 0:f782d9c66c49 93 * @param mode Clock polarity and phase mode (0 - 3)
dkato 0:f782d9c66c49 94 *
dkato 0:f782d9c66c49 95 * @code
dkato 0:f782d9c66c49 96 * mode | POL PHA
dkato 0:f782d9c66c49 97 * -----+--------
dkato 0:f782d9c66c49 98 * 0 | 0 0
dkato 0:f782d9c66c49 99 * 1 | 0 1
dkato 0:f782d9c66c49 100 * 2 | 1 0
dkato 0:f782d9c66c49 101 * 3 | 1 1
dkato 0:f782d9c66c49 102 * @endcode
dkato 0:f782d9c66c49 103 */
dkato 0:f782d9c66c49 104 void format(int bits, int mode = 0);
dkato 0:f782d9c66c49 105
dkato 0:f782d9c66c49 106 /** Set the spi bus clock frequency
dkato 0:f782d9c66c49 107 *
dkato 0:f782d9c66c49 108 * @param hz SCLK frequency in hz (default = 1MHz)
dkato 0:f782d9c66c49 109 */
dkato 0:f782d9c66c49 110 void frequency(int hz = 1000000);
dkato 0:f782d9c66c49 111
dkato 0:f782d9c66c49 112 /** Write to the SPI Slave and return the response
dkato 0:f782d9c66c49 113 *
dkato 0:f782d9c66c49 114 * @param value Data to be sent to the SPI slave
dkato 0:f782d9c66c49 115 *
dkato 0:f782d9c66c49 116 * @returns
dkato 0:f782d9c66c49 117 * Response from the SPI slave
dkato 0:f782d9c66c49 118 */
dkato 0:f782d9c66c49 119 virtual int write(int value);
dkato 0:f782d9c66c49 120
dkato 0:f782d9c66c49 121 /** Acquire exclusive access to this SPI bus
dkato 0:f782d9c66c49 122 */
dkato 0:f782d9c66c49 123 virtual void lock(void);
dkato 0:f782d9c66c49 124
dkato 0:f782d9c66c49 125 /** Release exclusive access to this SPI bus
dkato 0:f782d9c66c49 126 */
dkato 0:f782d9c66c49 127 virtual void unlock(void);
dkato 0:f782d9c66c49 128
dkato 0:f782d9c66c49 129 #if DEVICE_SPI_ASYNCH
dkato 0:f782d9c66c49 130
dkato 0:f782d9c66c49 131 /** Start non-blocking SPI transfer using 8bit buffers.
dkato 0:f782d9c66c49 132 *
dkato 0:f782d9c66c49 133 * @param tx_buffer The TX buffer with data to be transfered. If NULL is passed,
dkato 0:f782d9c66c49 134 * the default SPI value is sent
dkato 0:f782d9c66c49 135 * @param tx_length The length of TX buffer in bytes
dkato 0:f782d9c66c49 136 * @param rx_buffer The RX buffer which is used for received data. If NULL is passed,
dkato 0:f782d9c66c49 137 * received data are ignored
dkato 0:f782d9c66c49 138 * @param rx_length The length of RX buffer in bytes
dkato 0:f782d9c66c49 139 * @param callback The event callback function
dkato 0:f782d9c66c49 140 * @param event The logical OR of events to modify. Look at spi hal header file for SPI events.
dkato 0:f782d9c66c49 141 * @return Zero if the transfer has started, or -1 if SPI peripheral is busy
dkato 0:f782d9c66c49 142 */
dkato 0:f782d9c66c49 143 template<typename Type>
dkato 0:f782d9c66c49 144 int transfer(const Type *tx_buffer, int tx_length, Type *rx_buffer, int rx_length, const event_callback_t& callback, int event = SPI_EVENT_COMPLETE) {
dkato 0:f782d9c66c49 145 if (spi_active(&_spi)) {
dkato 0:f782d9c66c49 146 return queue_transfer(tx_buffer, tx_length, rx_buffer, rx_length, sizeof(Type)*8, callback, event);
dkato 0:f782d9c66c49 147 }
dkato 0:f782d9c66c49 148 start_transfer(tx_buffer, tx_length, rx_buffer, rx_length, sizeof(Type)*8, callback, event);
dkato 0:f782d9c66c49 149 return 0;
dkato 0:f782d9c66c49 150 }
dkato 0:f782d9c66c49 151
dkato 0:f782d9c66c49 152 /** Abort the on-going SPI transfer, and continue with transfer's in the queue if any.
dkato 0:f782d9c66c49 153 */
dkato 0:f782d9c66c49 154 void abort_transfer();
dkato 0:f782d9c66c49 155
dkato 0:f782d9c66c49 156 /** Clear the transaction buffer
dkato 0:f782d9c66c49 157 */
dkato 0:f782d9c66c49 158 void clear_transfer_buffer();
dkato 0:f782d9c66c49 159
dkato 0:f782d9c66c49 160 /** Clear the transaction buffer and abort on-going transfer.
dkato 0:f782d9c66c49 161 */
dkato 0:f782d9c66c49 162 void abort_all_transfers();
dkato 0:f782d9c66c49 163
dkato 0:f782d9c66c49 164 /** Configure DMA usage suggestion for non-blocking transfers
dkato 0:f782d9c66c49 165 *
dkato 0:f782d9c66c49 166 * @param usage The usage DMA hint for peripheral
dkato 0:f782d9c66c49 167 * @return Zero if the usage was set, -1 if a transaction is on-going
dkato 0:f782d9c66c49 168 */
dkato 0:f782d9c66c49 169 int set_dma_usage(DMAUsage usage);
dkato 0:f782d9c66c49 170
dkato 0:f782d9c66c49 171 protected:
dkato 0:f782d9c66c49 172 /** SPI IRQ handler
dkato 0:f782d9c66c49 173 *
dkato 0:f782d9c66c49 174 */
dkato 0:f782d9c66c49 175 void irq_handler_asynch(void);
dkato 0:f782d9c66c49 176
dkato 0:f782d9c66c49 177 /** Common transfer method
dkato 0:f782d9c66c49 178 *
dkato 0:f782d9c66c49 179 * @param tx_buffer The TX buffer with data to be transfered. If NULL is passed,
dkato 0:f782d9c66c49 180 * the default SPI value is sent
dkato 0:f782d9c66c49 181 * @param tx_length The length of TX buffer in bytes
dkato 0:f782d9c66c49 182 * @param rx_buffer The RX buffer which is used for received data. If NULL is passed,
dkato 0:f782d9c66c49 183 * received data are ignored
dkato 0:f782d9c66c49 184 * @param rx_length The length of RX buffer in bytes
dkato 0:f782d9c66c49 185 * @param bit_width The buffers element width
dkato 0:f782d9c66c49 186 * @param callback The event callback function
dkato 0:f782d9c66c49 187 * @param event The logical OR of events to modify
dkato 0:f782d9c66c49 188 * @return Zero if the transfer has started or was added to the queue, or -1 if SPI peripheral is busy/buffer is full
dkato 0:f782d9c66c49 189 */
dkato 0:f782d9c66c49 190 int transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event);
dkato 0:f782d9c66c49 191
dkato 0:f782d9c66c49 192 /**
dkato 0:f782d9c66c49 193 *
dkato 0:f782d9c66c49 194 * @param tx_buffer The TX buffer with data to be transfered. If NULL is passed,
dkato 0:f782d9c66c49 195 * the default SPI value is sent
dkato 0:f782d9c66c49 196 * @param tx_length The length of TX buffer in bytes
dkato 0:f782d9c66c49 197 * @param rx_buffer The RX buffer which is used for received data. If NULL is passed,
dkato 0:f782d9c66c49 198 * received data are ignored
dkato 0:f782d9c66c49 199 * @param rx_length The length of RX buffer in bytes
dkato 0:f782d9c66c49 200 * @param bit_width The buffers element width
dkato 0:f782d9c66c49 201 * @param callback The event callback function
dkato 0:f782d9c66c49 202 * @param event The logical OR of events to modify
dkato 0:f782d9c66c49 203 * @return Zero if a transfer was added to the queue, or -1 if the queue is full
dkato 0:f782d9c66c49 204 */
dkato 0:f782d9c66c49 205 int queue_transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event);
dkato 0:f782d9c66c49 206
dkato 0:f782d9c66c49 207 /** Configures a callback, spi peripheral and initiate a new transfer
dkato 0:f782d9c66c49 208 *
dkato 0:f782d9c66c49 209 * @param tx_buffer The TX buffer with data to be transfered. If NULL is passed,
dkato 0:f782d9c66c49 210 * the default SPI value is sent
dkato 0:f782d9c66c49 211 * @param tx_length The length of TX buffer in bytes
dkato 0:f782d9c66c49 212 * @param rx_buffer The RX buffer which is used for received data. If NULL is passed,
dkato 0:f782d9c66c49 213 * received data are ignored
dkato 0:f782d9c66c49 214 * @param rx_length The length of RX buffer in bytes
dkato 0:f782d9c66c49 215 * @param bit_width The buffers element width
dkato 0:f782d9c66c49 216 * @param callback The event callback function
dkato 0:f782d9c66c49 217 * @param event The logical OR of events to modify
dkato 0:f782d9c66c49 218 */
dkato 0:f782d9c66c49 219 void start_transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event);
dkato 0:f782d9c66c49 220
dkato 0:f782d9c66c49 221 #if TRANSACTION_QUEUE_SIZE_SPI
dkato 0:f782d9c66c49 222
dkato 0:f782d9c66c49 223 /** Start a new transaction
dkato 0:f782d9c66c49 224 *
dkato 0:f782d9c66c49 225 * @param data Transaction data
dkato 0:f782d9c66c49 226 */
dkato 0:f782d9c66c49 227 void start_transaction(transaction_t *data);
dkato 0:f782d9c66c49 228
dkato 0:f782d9c66c49 229 /** Dequeue a transaction
dkato 0:f782d9c66c49 230 *
dkato 0:f782d9c66c49 231 */
dkato 0:f782d9c66c49 232 void dequeue_transaction();
dkato 0:f782d9c66c49 233 static CircularBuffer<Transaction<SPI>, TRANSACTION_QUEUE_SIZE_SPI> _transaction_buffer;
dkato 0:f782d9c66c49 234 #endif
dkato 0:f782d9c66c49 235
dkato 0:f782d9c66c49 236 #endif
dkato 0:f782d9c66c49 237
dkato 0:f782d9c66c49 238 public:
dkato 0:f782d9c66c49 239 virtual ~SPI() {
dkato 0:f782d9c66c49 240 }
dkato 0:f782d9c66c49 241
dkato 0:f782d9c66c49 242 protected:
dkato 0:f782d9c66c49 243 spi_t _spi;
dkato 0:f782d9c66c49 244
dkato 0:f782d9c66c49 245 #if DEVICE_SPI_ASYNCH
dkato 0:f782d9c66c49 246 CThunk<SPI> _irq;
dkato 0:f782d9c66c49 247 event_callback_t _callback;
dkato 0:f782d9c66c49 248 DMAUsage _usage;
dkato 0:f782d9c66c49 249 #endif
dkato 0:f782d9c66c49 250
dkato 0:f782d9c66c49 251 void aquire(void);
dkato 0:f782d9c66c49 252 static SPI *_owner;
dkato 0:f782d9c66c49 253 static SingletonPtr<PlatformMutex> _mutex;
dkato 0:f782d9c66c49 254 int _bits;
dkato 0:f782d9c66c49 255 int _mode;
dkato 0:f782d9c66c49 256 int _hz;
dkato 0:f782d9c66c49 257 };
dkato 0:f782d9c66c49 258
dkato 0:f782d9c66c49 259 } // namespace mbed
dkato 0:f782d9c66c49 260
dkato 0:f782d9c66c49 261 #endif
dkato 0:f782d9c66c49 262
dkato 0:f782d9c66c49 263 #endif
dkato 0:f782d9c66c49 264
dkato 0:f782d9c66c49 265 /** @}*/