Dewant Katare / Mbed 2 deprecated RFID_RC522

RFID-RC522, SPI, FRDMk64F

Dependencies:   mbed

MFRC522.h@0:35581ea6b194, 2019-04-17 (annotated)

Committer:
dewantkatare
Date:
Wed Apr 17 20:36:49 2019 +0000
Revision:
0:35581ea6b194
RFID-RC522, K64F

Who changed what in which revision?

UserRevisionLine numberNew contents of line
dewantkatare 0:35581ea6b194 1 /**
dewantkatare 0:35581ea6b194 2 * MFRC522.h - Library to use ARDUINO RFID MODULE KIT 13.56 MHZ WITH TAGS SPI W AND R BY COOQROBOT.
dewantkatare 0:35581ea6b194 3 * Based on code Dr.Leong ( WWW.B2CQSHOP.COM )
dewantkatare 0:35581ea6b194 4 * Created by Miguel Balboa (circuitito.com), Jan, 2012.
dewantkatare 0:35581ea6b194 5 * Rewritten by Soren Thing Andersen (access.thing.dk), fall of 2013 (Translation to English, refactored, comments, anti collision, cascade levels.)
dewantkatare 0:35581ea6b194 6 * Ported to mbed by Martin Olejar, Dec, 2013
dewantkatare 0:35581ea6b194 7 *
dewantkatare 0:35581ea6b194 8 * Please read this file for an overview and then MFRC522.cpp for comments on the specific functions.
dewantkatare 0:35581ea6b194 9 * Search for "mf-rc522" on ebay.com to purchase the MF-RC522 board.
dewantkatare 0:35581ea6b194 10 *
dewantkatare 0:35581ea6b194 11 * There are three hardware components involved:
dewantkatare 0:35581ea6b194 12 * 1) The micro controller: An Arduino
dewantkatare 0:35581ea6b194 13 * 2) The PCD (short for Proximity Coupling Device): NXP MFRC522 Contactless Reader IC
dewantkatare 0:35581ea6b194 14 * 3) The PICC (short for Proximity Integrated Circuit Card): A card or tag using the ISO 14443A interface, eg Mifare or NTAG203.
dewantkatare 0:35581ea6b194 15 *
dewantkatare 0:35581ea6b194 16 * The microcontroller and card reader uses SPI for communication.
dewantkatare 0:35581ea6b194 17 * The protocol is described in the MFRC522 datasheet: http://www.nxp.com/documents/data_sheet/MFRC522.pdf
dewantkatare 0:35581ea6b194 18 *
dewantkatare 0:35581ea6b194 19 * The card reader and the tags communicate using a 13.56MHz electromagnetic field.
dewantkatare 0:35581ea6b194 20 * The protocol is defined in ISO/IEC 14443-3 Identification cards -- Contactless integrated circuit cards -- Proximity cards -- Part 3: Initialization and anticollision".
dewantkatare 0:35581ea6b194 21 * A free version of the final draft can be found at http://wg8.de/wg8n1496_17n3613_Ballot_FCD14443-3.pdf
dewantkatare 0:35581ea6b194 22 * Details are found in chapter 6, Type A: Initialization and anticollision.
dewantkatare 0:35581ea6b194 23 *
dewantkatare 0:35581ea6b194 24 * If only the PICC UID is wanted, the above documents has all the needed information.
dewantkatare 0:35581ea6b194 25 * To read and write from MIFARE PICCs, the MIFARE protocol is used after the PICC has been selected.
dewantkatare 0:35581ea6b194 26 * The MIFARE Classic chips and protocol is described in the datasheets:
dewantkatare 0:35581ea6b194 27 * 1K: http://www.nxp.com/documents/data_sheet/MF1S503x.pdf
dewantkatare 0:35581ea6b194 28 * 4K: http://www.nxp.com/documents/data_sheet/MF1S703x.pdf
dewantkatare 0:35581ea6b194 29 * Mini: http://www.idcardmarket.com/download/mifare_S20_datasheet.pdf
dewantkatare 0:35581ea6b194 30 * The MIFARE Ultralight chip and protocol is described in the datasheets:
dewantkatare 0:35581ea6b194 31 * Ultralight: http://www.nxp.com/documents/data_sheet/MF0ICU1.pdf
dewantkatare 0:35581ea6b194 32 * Ultralight C: http://www.nxp.com/documents/short_data_sheet/MF0ICU2_SDS.pdf
dewantkatare 0:35581ea6b194 33 *
dewantkatare 0:35581ea6b194 34 * MIFARE Classic 1K (MF1S503x):
dewantkatare 0:35581ea6b194 35 * Has 16 sectors * 4 blocks/sector * 16 bytes/block = 1024 bytes.
dewantkatare 0:35581ea6b194 36 * The blocks are numbered 0-63.
dewantkatare 0:35581ea6b194 37 * Block 3 in each sector is the Sector Trailer. See http://www.nxp.com/documents/data_sheet/MF1S503x.pdf sections 8.6 and 8.7:
dewantkatare 0:35581ea6b194 38 * Bytes 0-5: Key A
dewantkatare 0:35581ea6b194 39 * Bytes 6-8: Access Bits
dewantkatare 0:35581ea6b194 40 * Bytes 9: User data
dewantkatare 0:35581ea6b194 41 * Bytes 10-15: Key B (or user data)
dewantkatare 0:35581ea6b194 42 * Block 0 is read only manufacturer data.
dewantkatare 0:35581ea6b194 43 * To access a block, an authentication using a key from the block's sector must be performed first.
dewantkatare 0:35581ea6b194 44 * Example: To read from block 10, first authenticate using a key from sector 3 (blocks 8-11).
dewantkatare 0:35581ea6b194 45 * All keys are set to FFFFFFFFFFFFh at chip delivery.
dewantkatare 0:35581ea6b194 46 * Warning: Please read section 8.7 "Memory Access". It includes this text: if the PICC detects a format violation the whole sector is irreversibly blocked.
dewantkatare 0:35581ea6b194 47 * To use a block in "value block" mode (for Increment/Decrement operations) you need to change the sector trailer. Use PICC_SetAccessBits() to calculate the bit patterns.
dewantkatare 0:35581ea6b194 48 * MIFARE Classic 4K (MF1S703x):
dewantkatare 0:35581ea6b194 49 * Has (32 sectors * 4 blocks/sector + 8 sectors * 16 blocks/sector) * 16 bytes/block = 4096 bytes.
dewantkatare 0:35581ea6b194 50 * The blocks are numbered 0-255.
dewantkatare 0:35581ea6b194 51 * The last block in each sector is the Sector Trailer like above.
dewantkatare 0:35581ea6b194 52 * MIFARE Classic Mini (MF1 IC S20):
dewantkatare 0:35581ea6b194 53 * Has 5 sectors * 4 blocks/sector * 16 bytes/block = 320 bytes.
dewantkatare 0:35581ea6b194 54 * The blocks are numbered 0-19.
dewantkatare 0:35581ea6b194 55 * The last block in each sector is the Sector Trailer like above.
dewantkatare 0:35581ea6b194 56 *
dewantkatare 0:35581ea6b194 57 * MIFARE Ultralight (MF0ICU1):
dewantkatare 0:35581ea6b194 58 * Has 16 pages of 4 bytes = 64 bytes.
dewantkatare 0:35581ea6b194 59 * Pages 0 + 1 is used for the 7-byte UID.
dewantkatare 0:35581ea6b194 60 * Page 2 contains the last chech digit for the UID, one byte manufacturer internal data, and the lock bytes (see http://www.nxp.com/documents/data_sheet/MF0ICU1.pdf section 8.5.2)
dewantkatare 0:35581ea6b194 61 * Page 3 is OTP, One Time Programmable bits. Once set to 1 they cannot revert to 0.
dewantkatare 0:35581ea6b194 62 * Pages 4-15 are read/write unless blocked by the lock bytes in page 2.
dewantkatare 0:35581ea6b194 63 * MIFARE Ultralight C (MF0ICU2):
dewantkatare 0:35581ea6b194 64 * Has 48 pages of 4 bytes = 64 bytes.
dewantkatare 0:35581ea6b194 65 * Pages 0 + 1 is used for the 7-byte UID.
dewantkatare 0:35581ea6b194 66 * Page 2 contains the last chech digit for the UID, one byte manufacturer internal data, and the lock bytes (see http://www.nxp.com/documents/data_sheet/MF0ICU1.pdf section 8.5.2)
dewantkatare 0:35581ea6b194 67 * Page 3 is OTP, One Time Programmable bits. Once set to 1 they cannot revert to 0.
dewantkatare 0:35581ea6b194 68 * Pages 4-39 are read/write unless blocked by the lock bytes in page 2.
dewantkatare 0:35581ea6b194 69 * Page 40 Lock bytes
dewantkatare 0:35581ea6b194 70 * Page 41 16 bit one way counter
dewantkatare 0:35581ea6b194 71 * Pages 42-43 Authentication configuration
dewantkatare 0:35581ea6b194 72 * Pages 44-47 Authentication key
dewantkatare 0:35581ea6b194 73 */
dewantkatare 0:35581ea6b194 74 #ifndef MFRC522_h
dewantkatare 0:35581ea6b194 75 #define MFRC522_h
dewantkatare 0:35581ea6b194 76
dewantkatare 0:35581ea6b194 77 #include "mbed.h"
dewantkatare 0:35581ea6b194 78
dewantkatare 0:35581ea6b194 79 /**
dewantkatare 0:35581ea6b194 80 * MFRC522 example
dewantkatare 0:35581ea6b194 81 *
dewantkatare 0:35581ea6b194 82 * @code
dewantkatare 0:35581ea6b194 83 * #include "mbed.h"
dewantkatare 0:35581ea6b194 84 * #include "MFRC522.h"
dewantkatare 0:35581ea6b194 85 *
dewantkatare 0:35581ea6b194 86 * //KL25Z Pins for MFRC522 SPI interface
dewantkatare 0:35581ea6b194 87 * #define SPI_MOSI PTC6
dewantkatare 0:35581ea6b194 88 * #define SPI_MISO PTC7
dewantkatare 0:35581ea6b194 89 * #define SPI_SCLK PTC5
dewantkatare 0:35581ea6b194 90 * #define SPI_CS PTC4
dewantkatare 0:35581ea6b194 91 * // KL25Z Pin for MFRC522 reset
dewantkatare 0:35581ea6b194 92 * #define MF_RESET PTC3
dewantkatare 0:35581ea6b194 93 * // KL25Z Pins for Debug UART port
dewantkatare 0:35581ea6b194 94 * #define UART_RX PTA1
dewantkatare 0:35581ea6b194 95 * #define UART_TX PTA2
dewantkatare 0:35581ea6b194 96 *
dewantkatare 0:35581ea6b194 97 * DigitalOut LedRed (LED_RED);
dewantkatare 0:35581ea6b194 98 * DigitalOut LedGreen (LED_GREEN);
dewantkatare 0:35581ea6b194 99 *
dewantkatare 0:35581ea6b194 100 * Serial DebugUART(UART_TX, UART_RX);
dewantkatare 0:35581ea6b194 101 * MFRC522 RfChip (SPI_MOSI, SPI_MISO, SPI_SCLK, SPI_CS, MF_RESET);
dewantkatare 0:35581ea6b194 102 *
dewantkatare 0:35581ea6b194 103 * int main(void) {
dewantkatare 0:35581ea6b194 104 * // Set debug UART speed
dewantkatare 0:35581ea6b194 105 * DebugUART.baud(115200);
dewantkatare 0:35581ea6b194 106 *
dewantkatare 0:35581ea6b194 107 * // Init. RC522 Chip
dewantkatare 0:35581ea6b194 108 * RfChip.PCD_Init();
dewantkatare 0:35581ea6b194 109 *
dewantkatare 0:35581ea6b194 110 * while (true) {
dewantkatare 0:35581ea6b194 111 * LedRed = 1;
dewantkatare 0:35581ea6b194 112 * LedGreen = 1;
dewantkatare 0:35581ea6b194 113 *
dewantkatare 0:35581ea6b194 114 * // Look for new cards
dewantkatare 0:35581ea6b194 115 * if ( ! RfChip.PICC_IsNewCardPresent())
dewantkatare 0:35581ea6b194 116 * {
dewantkatare 0:35581ea6b194 117 * wait_ms(500);
dewantkatare 0:35581ea6b194 118 * continue;
dewantkatare 0:35581ea6b194 119 * }
dewantkatare 0:35581ea6b194 120 *
dewantkatare 0:35581ea6b194 121 * LedRed = 0;
dewantkatare 0:35581ea6b194 122 *
dewantkatare 0:35581ea6b194 123 * // Select one of the cards
dewantkatare 0:35581ea6b194 124 * if ( ! RfChip.PICC_ReadCardSerial())
dewantkatare 0:35581ea6b194 125 * {
dewantkatare 0:35581ea6b194 126 * wait_ms(500);
dewantkatare 0:35581ea6b194 127 * continue;
dewantkatare 0:35581ea6b194 128 * }
dewantkatare 0:35581ea6b194 129 *
dewantkatare 0:35581ea6b194 130 * LedRed = 1;
dewantkatare 0:35581ea6b194 131 * LedGreen = 0;
dewantkatare 0:35581ea6b194 132 *
dewantkatare 0:35581ea6b194 133 * // Print Card UID
dewantkatare 0:35581ea6b194 134 * printf("Card UID: ");
dewantkatare 0:35581ea6b194 135 * for (uint8_t i = 0; i < RfChip.uid.size; i++)
dewantkatare 0:35581ea6b194 136 * {
dewantkatare 0:35581ea6b194 137 * printf(" %X02", RfChip.uid.uidByte[i]);
dewantkatare 0:35581ea6b194 138 * }
dewantkatare 0:35581ea6b194 139 * printf("\n\r");
dewantkatare 0:35581ea6b194 140 *
dewantkatare 0:35581ea6b194 141 * // Print Card type
dewantkatare 0:35581ea6b194 142 * uint8_t piccType = RfChip.PICC_GetType(RfChip.uid.sak);
dewantkatare 0:35581ea6b194 143 * printf("PICC Type: %s \n\r", RfChip.PICC_GetTypeName(piccType));
dewantkatare 0:35581ea6b194 144 * wait_ms(1000);
dewantkatare 0:35581ea6b194 145 * }
dewantkatare 0:35581ea6b194 146 * }
dewantkatare 0:35581ea6b194 147 * @endcode
dewantkatare 0:35581ea6b194 148 */
dewantkatare 0:35581ea6b194 149
dewantkatare 0:35581ea6b194 150 class MFRC522 {
dewantkatare 0:35581ea6b194 151 public:
dewantkatare 0:35581ea6b194 152
dewantkatare 0:35581ea6b194 153 /**
dewantkatare 0:35581ea6b194 154 * MFRC522 registers (described in chapter 9 of the datasheet).
dewantkatare 0:35581ea6b194 155 * When using SPI all addresses are shifted one bit left in the "SPI address byte" (section 8.1.2.3)
dewantkatare 0:35581ea6b194 156 */
dewantkatare 0:35581ea6b194 157 enum PCD_Register {
dewantkatare 0:35581ea6b194 158 // Page 0: Command and status
dewantkatare 0:35581ea6b194 159 // 0x00 // reserved for future use
dewantkatare 0:35581ea6b194 160 CommandReg = 0x01 << 1, // starts and stops command execution
dewantkatare 0:35581ea6b194 161 ComIEnReg = 0x02 << 1, // enable and disable interrupt request control bits
dewantkatare 0:35581ea6b194 162 DivIEnReg = 0x03 << 1, // enable and disable interrupt request control bits
dewantkatare 0:35581ea6b194 163 ComIrqReg = 0x04 << 1, // interrupt request bits
dewantkatare 0:35581ea6b194 164 DivIrqReg = 0x05 << 1, // interrupt request bits
dewantkatare 0:35581ea6b194 165 ErrorReg = 0x06 << 1, // error bits showing the error status of the last command executed
dewantkatare 0:35581ea6b194 166 Status1Reg = 0x07 << 1, // communication status bits
dewantkatare 0:35581ea6b194 167 Status2Reg = 0x08 << 1, // receiver and transmitter status bits
dewantkatare 0:35581ea6b194 168 FIFODataReg = 0x09 << 1, // input and output of 64 byte FIFO buffer
dewantkatare 0:35581ea6b194 169 FIFOLevelReg = 0x0A << 1, // number of bytes stored in the FIFO buffer
dewantkatare 0:35581ea6b194 170 WaterLevelReg = 0x0B << 1, // level for FIFO underflow and overflow warning
dewantkatare 0:35581ea6b194 171 ControlReg = 0x0C << 1, // miscellaneous control registers
dewantkatare 0:35581ea6b194 172 BitFramingReg = 0x0D << 1, // adjustments for bit-oriented frames
dewantkatare 0:35581ea6b194 173 CollReg = 0x0E << 1, // bit position of the first bit-collision detected on the RF interface
dewantkatare 0:35581ea6b194 174 // 0x0F // reserved for future use
dewantkatare 0:35581ea6b194 175
dewantkatare 0:35581ea6b194 176 // Page 1:Command
dewantkatare 0:35581ea6b194 177 // 0x10 // reserved for future use
dewantkatare 0:35581ea6b194 178 ModeReg = 0x11 << 1, // defines general modes for transmitting and receiving
dewantkatare 0:35581ea6b194 179 TxModeReg = 0x12 << 1, // defines transmission data rate and framing
dewantkatare 0:35581ea6b194 180 RxModeReg = 0x13 << 1, // defines reception data rate and framing
dewantkatare 0:35581ea6b194 181 TxControlReg = 0x14 << 1, // controls the logical behavior of the antenna driver pins TX1 and TX2
dewantkatare 0:35581ea6b194 182 TxASKReg = 0x15 << 1, // controls the setting of the transmission modulation
dewantkatare 0:35581ea6b194 183 TxSelReg = 0x16 << 1, // selects the internal sources for the antenna driver
dewantkatare 0:35581ea6b194 184 RxSelReg = 0x17 << 1, // selects internal receiver settings
dewantkatare 0:35581ea6b194 185 RxThresholdReg = 0x18 << 1, // selects thresholds for the bit decoder
dewantkatare 0:35581ea6b194 186 DemodReg = 0x19 << 1, // defines demodulator settings
dewantkatare 0:35581ea6b194 187 // 0x1A // reserved for future use
dewantkatare 0:35581ea6b194 188 // 0x1B // reserved for future use
dewantkatare 0:35581ea6b194 189 MfTxReg = 0x1C << 1, // controls some MIFARE communication transmit parameters
dewantkatare 0:35581ea6b194 190 MfRxReg = 0x1D << 1, // controls some MIFARE communication receive parameters
dewantkatare 0:35581ea6b194 191 // 0x1E // reserved for future use
dewantkatare 0:35581ea6b194 192 SerialSpeedReg = 0x1F << 1, // selects the speed of the serial UART interface
dewantkatare 0:35581ea6b194 193
dewantkatare 0:35581ea6b194 194 // Page 2: Configuration
dewantkatare 0:35581ea6b194 195 // 0x20 // reserved for future use
dewantkatare 0:35581ea6b194 196 CRCResultRegH = 0x21 << 1, // shows the MSB and LSB values of the CRC calculation
dewantkatare 0:35581ea6b194 197 CRCResultRegL = 0x22 << 1,
dewantkatare 0:35581ea6b194 198 // 0x23 // reserved for future use
dewantkatare 0:35581ea6b194 199 ModWidthReg = 0x24 << 1, // controls the ModWidth setting?
dewantkatare 0:35581ea6b194 200 // 0x25 // reserved for future use
dewantkatare 0:35581ea6b194 201 RFCfgReg = 0x26 << 1, // configures the receiver gain
dewantkatare 0:35581ea6b194 202 GsNReg = 0x27 << 1, // selects the conductance of the antenna driver pins TX1 and TX2 for modulation
dewantkatare 0:35581ea6b194 203 CWGsPReg = 0x28 << 1, // defines the conductance of the p-driver output during periods of no modulation
dewantkatare 0:35581ea6b194 204 ModGsPReg = 0x29 << 1, // defines the conductance of the p-driver output during periods of modulation
dewantkatare 0:35581ea6b194 205 TModeReg = 0x2A << 1, // defines settings for the internal timer
dewantkatare 0:35581ea6b194 206 TPrescalerReg = 0x2B << 1, // the lower 8 bits of the TPrescaler value. The 4 high bits are in TModeReg.
dewantkatare 0:35581ea6b194 207 TReloadRegH = 0x2C << 1, // defines the 16-bit timer reload value
dewantkatare 0:35581ea6b194 208 TReloadRegL = 0x2D << 1,
dewantkatare 0:35581ea6b194 209 TCntValueRegH = 0x2E << 1, // shows the 16-bit timer value
dewantkatare 0:35581ea6b194 210 TCntValueRegL = 0x2F << 1,
dewantkatare 0:35581ea6b194 211
dewantkatare 0:35581ea6b194 212 // Page 3:Test Registers
dewantkatare 0:35581ea6b194 213 // 0x30 // reserved for future use
dewantkatare 0:35581ea6b194 214 TestSel1Reg = 0x31 << 1, // general test signal configuration
dewantkatare 0:35581ea6b194 215 TestSel2Reg = 0x32 << 1, // general test signal configuration
dewantkatare 0:35581ea6b194 216 TestPinEnReg = 0x33 << 1, // enables pin output driver on pins D1 to D7
dewantkatare 0:35581ea6b194 217 TestPinValueReg = 0x34 << 1, // defines the values for D1 to D7 when it is used as an I/O bus
dewantkatare 0:35581ea6b194 218 TestBusReg = 0x35 << 1, // shows the status of the internal test bus
dewantkatare 0:35581ea6b194 219 AutoTestReg = 0x36 << 1, // controls the digital self test
dewantkatare 0:35581ea6b194 220 VersionReg = 0x37 << 1, // shows the software version
dewantkatare 0:35581ea6b194 221 AnalogTestReg = 0x38 << 1, // controls the pins AUX1 and AUX2
dewantkatare 0:35581ea6b194 222 TestDAC1Reg = 0x39 << 1, // defines the test value for TestDAC1
dewantkatare 0:35581ea6b194 223 TestDAC2Reg = 0x3A << 1, // defines the test value for TestDAC2
dewantkatare 0:35581ea6b194 224 TestADCReg = 0x3B << 1 // shows the value of ADC I and Q channels
dewantkatare 0:35581ea6b194 225 // 0x3C // reserved for production tests
dewantkatare 0:35581ea6b194 226 // 0x3D // reserved for production tests
dewantkatare 0:35581ea6b194 227 // 0x3E // reserved for production tests
dewantkatare 0:35581ea6b194 228 // 0x3F // reserved for production tests
dewantkatare 0:35581ea6b194 229 };
dewantkatare 0:35581ea6b194 230
dewantkatare 0:35581ea6b194 231 // MFRC522 commands Described in chapter 10 of the datasheet.
dewantkatare 0:35581ea6b194 232 enum PCD_Command {
dewantkatare 0:35581ea6b194 233 PCD_Idle = 0x00, // no action, cancels current command execution
dewantkatare 0:35581ea6b194 234 PCD_Mem = 0x01, // stores 25 bytes into the internal buffer
dewantkatare 0:35581ea6b194 235 PCD_GenerateRandomID = 0x02, // generates a 10-byte random ID number
dewantkatare 0:35581ea6b194 236 PCD_CalcCRC = 0x03, // activates the CRC coprocessor or performs a self test
dewantkatare 0:35581ea6b194 237 PCD_Transmit = 0x04, // transmits data from the FIFO buffer
dewantkatare 0:35581ea6b194 238 PCD_NoCmdChange = 0x07, // no command change, can be used to modify the CommandReg register bits without affecting the command, for example, the PowerDown bit
dewantkatare 0:35581ea6b194 239 PCD_Receive = 0x08, // activates the receiver circuits
dewantkatare 0:35581ea6b194 240 PCD_Transceive = 0x0C, // transmits data from FIFO buffer to antenna and automatically activates the receiver after transmission
dewantkatare 0:35581ea6b194 241 PCD_MFAuthent = 0x0E, // performs the MIFARE standard authentication as a reader
dewantkatare 0:35581ea6b194 242 PCD_SoftReset = 0x0F // resets the MFRC522
dewantkatare 0:35581ea6b194 243 };
dewantkatare 0:35581ea6b194 244
dewantkatare 0:35581ea6b194 245 // Commands sent to the PICC.
dewantkatare 0:35581ea6b194 246 enum PICC_Command {
dewantkatare 0:35581ea6b194 247 // The commands used by the PCD to manage communication with several PICCs (ISO 14443-3, Type A, section 6.4)
dewantkatare 0:35581ea6b194 248 PICC_CMD_REQA = 0x26, // REQuest command, Type A. Invites PICCs in state IDLE to go to READY and prepare for anticollision or selection. 7 bit frame.
dewantkatare 0:35581ea6b194 249 PICC_CMD_WUPA = 0x52, // Wake-UP command, Type A. Invites PICCs in state IDLE and HALT to go to READY(*) and prepare for anticollision or selection. 7 bit frame.
dewantkatare 0:35581ea6b194 250 PICC_CMD_CT = 0x88, // Cascade Tag. Not really a command, but used during anti collision.
dewantkatare 0:35581ea6b194 251 PICC_CMD_SEL_CL1 = 0x93, // Anti collision/Select, Cascade Level 1
dewantkatare 0:35581ea6b194 252 PICC_CMD_SEL_CL2 = 0x95, // Anti collision/Select, Cascade Level 1
dewantkatare 0:35581ea6b194 253 PICC_CMD_SEL_CL3 = 0x97, // Anti collision/Select, Cascade Level 1
dewantkatare 0:35581ea6b194 254 PICC_CMD_HLTA = 0x50, // HaLT command, Type A. Instructs an ACTIVE PICC to go to state HALT.
dewantkatare 0:35581ea6b194 255
dewantkatare 0:35581ea6b194 256 // The commands used for MIFARE Classic (from http://www.nxp.com/documents/data_sheet/MF1S503x.pdf, Section 9)
dewantkatare 0:35581ea6b194 257 // Use PCD_MFAuthent to authenticate access to a sector, then use these commands to read/write/modify the blocks on the sector.
dewantkatare 0:35581ea6b194 258 // The read/write commands can also be used for MIFARE Ultralight.
dewantkatare 0:35581ea6b194 259 PICC_CMD_MF_AUTH_KEY_A = 0x60, // Perform authentication with Key A
dewantkatare 0:35581ea6b194 260 PICC_CMD_MF_AUTH_KEY_B = 0x61, // Perform authentication with Key B
dewantkatare 0:35581ea6b194 261 PICC_CMD_MF_READ = 0x30, // Reads one 16 byte block from the authenticated sector of the PICC. Also used for MIFARE Ultralight.
dewantkatare 0:35581ea6b194 262 PICC_CMD_MF_WRITE = 0xA0, // Writes one 16 byte block to the authenticated sector of the PICC. Called "COMPATIBILITY WRITE" for MIFARE Ultralight.
dewantkatare 0:35581ea6b194 263 PICC_CMD_MF_DECREMENT = 0xC0, // Decrements the contents of a block and stores the result in the internal data register.
dewantkatare 0:35581ea6b194 264 PICC_CMD_MF_INCREMENT = 0xC1, // Increments the contents of a block and stores the result in the internal data register.
dewantkatare 0:35581ea6b194 265 PICC_CMD_MF_RESTORE = 0xC2, // Reads the contents of a block into the internal data register.
dewantkatare 0:35581ea6b194 266 PICC_CMD_MF_TRANSFER = 0xB0, // Writes the contents of the internal data register to a block.
dewantkatare 0:35581ea6b194 267
dewantkatare 0:35581ea6b194 268 // The commands used for MIFARE Ultralight (from http://www.nxp.com/documents/data_sheet/MF0ICU1.pdf, Section 8.6)
dewantkatare 0:35581ea6b194 269 // The PICC_CMD_MF_READ and PICC_CMD_MF_WRITE can also be used for MIFARE Ultralight.
dewantkatare 0:35581ea6b194 270 PICC_CMD_UL_WRITE = 0xA2 // Writes one 4 byte page to the PICC.
dewantkatare 0:35581ea6b194 271 };
dewantkatare 0:35581ea6b194 272
dewantkatare 0:35581ea6b194 273 // MIFARE constants that does not fit anywhere else
dewantkatare 0:35581ea6b194 274 enum MIFARE_Misc {
dewantkatare 0:35581ea6b194 275 MF_ACK = 0xA, // The MIFARE Classic uses a 4 bit ACK/NAK. Any other value than 0xA is NAK.
dewantkatare 0:35581ea6b194 276 MF_KEY_SIZE = 6 // A Mifare Crypto1 key is 6 bytes.
dewantkatare 0:35581ea6b194 277 };
dewantkatare 0:35581ea6b194 278
dewantkatare 0:35581ea6b194 279 // PICC types we can detect. Remember to update PICC_GetTypeName() if you add more.
dewantkatare 0:35581ea6b194 280 enum PICC_Type {
dewantkatare 0:35581ea6b194 281 PICC_TYPE_UNKNOWN = 0,
dewantkatare 0:35581ea6b194 282 PICC_TYPE_ISO_14443_4 = 1, // PICC compliant with ISO/IEC 14443-4
dewantkatare 0:35581ea6b194 283 PICC_TYPE_ISO_18092 = 2, // PICC compliant with ISO/IEC 18092 (NFC)
dewantkatare 0:35581ea6b194 284 PICC_TYPE_MIFARE_MINI = 3, // MIFARE Classic protocol, 320 bytes
dewantkatare 0:35581ea6b194 285 PICC_TYPE_MIFARE_1K = 4, // MIFARE Classic protocol, 1KB
dewantkatare 0:35581ea6b194 286 PICC_TYPE_MIFARE_4K = 5, // MIFARE Classic protocol, 4KB
dewantkatare 0:35581ea6b194 287 PICC_TYPE_MIFARE_UL = 6, // MIFARE Ultralight or Ultralight C
dewantkatare 0:35581ea6b194 288 PICC_TYPE_MIFARE_PLUS = 7, // MIFARE Plus
dewantkatare 0:35581ea6b194 289 PICC_TYPE_TNP3XXX = 8, // Only mentioned in NXP AN 10833 MIFARE Type Identification Procedure
dewantkatare 0:35581ea6b194 290 PICC_TYPE_NOT_COMPLETE = 255 // SAK indicates UID is not complete.
dewantkatare 0:35581ea6b194 291 };
dewantkatare 0:35581ea6b194 292
dewantkatare 0:35581ea6b194 293 // Return codes from the functions in this class. Remember to update GetStatusCodeName() if you add more.
dewantkatare 0:35581ea6b194 294 enum StatusCode {
dewantkatare 0:35581ea6b194 295 STATUS_OK = 1, // Success
dewantkatare 0:35581ea6b194 296 STATUS_ERROR = 2, // Error in communication
dewantkatare 0:35581ea6b194 297 STATUS_COLLISION = 3, // Collision detected
dewantkatare 0:35581ea6b194 298 STATUS_TIMEOUT = 4, // Timeout in communication.
dewantkatare 0:35581ea6b194 299 STATUS_NO_ROOM = 5, // A buffer is not big enough.
dewantkatare 0:35581ea6b194 300 STATUS_INTERNAL_ERROR = 6, // Internal error in the code. Should not happen ;-)
dewantkatare 0:35581ea6b194 301 STATUS_INVALID = 7, // Invalid argument.
dewantkatare 0:35581ea6b194 302 STATUS_CRC_WRONG = 8, // The CRC_A does not match
dewantkatare 0:35581ea6b194 303 STATUS_MIFARE_NACK = 9 // A MIFARE PICC responded with NAK.
dewantkatare 0:35581ea6b194 304 };
dewantkatare 0:35581ea6b194 305
dewantkatare 0:35581ea6b194 306 // A struct used for passing the UID of a PICC.
dewantkatare 0:35581ea6b194 307 typedef struct {
dewantkatare 0:35581ea6b194 308 uint8_t size; // Number of bytes in the UID. 4, 7 or 10.
dewantkatare 0:35581ea6b194 309 uint8_t uidByte[10];
dewantkatare 0:35581ea6b194 310 uint8_t sak; // The SAK (Select acknowledge) byte returned from the PICC after successful selection.
dewantkatare 0:35581ea6b194 311 } Uid;
dewantkatare 0:35581ea6b194 312
dewantkatare 0:35581ea6b194 313 // A struct used for passing a MIFARE Crypto1 key
dewantkatare 0:35581ea6b194 314 typedef struct {
dewantkatare 0:35581ea6b194 315 uint8_t keyByte[MF_KEY_SIZE];
dewantkatare 0:35581ea6b194 316 } MIFARE_Key;
dewantkatare 0:35581ea6b194 317
dewantkatare 0:35581ea6b194 318 // Member variables
dewantkatare 0:35581ea6b194 319 Uid uid; // Used by PICC_ReadCardSerial().
dewantkatare 0:35581ea6b194 320
dewantkatare 0:35581ea6b194 321 // Size of the MFRC522 FIFO
dewantkatare 0:35581ea6b194 322 static const uint8_t FIFO_SIZE = 64; // The FIFO is 64 bytes.
dewantkatare 0:35581ea6b194 323
dewantkatare 0:35581ea6b194 324 /**
dewantkatare 0:35581ea6b194 325 * MFRC522 constructor
dewantkatare 0:35581ea6b194 326 *
dewantkatare 0:35581ea6b194 327 * @param mosi SPI MOSI pin
dewantkatare 0:35581ea6b194 328 * @param miso SPI MISO pin
dewantkatare 0:35581ea6b194 329 * @param sclk SPI SCLK pin
dewantkatare 0:35581ea6b194 330 * @param cs SPI CS pin
dewantkatare 0:35581ea6b194 331 * @param reset Reset pin
dewantkatare 0:35581ea6b194 332 */
dewantkatare 0:35581ea6b194 333 MFRC522(PinName mosi, PinName miso, PinName sclk, PinName cs, PinName reset);
dewantkatare 0:35581ea6b194 334
dewantkatare 0:35581ea6b194 335 /**
dewantkatare 0:35581ea6b194 336 * MFRC522 destructor
dewantkatare 0:35581ea6b194 337 */
dewantkatare 0:35581ea6b194 338 ~MFRC522();
dewantkatare 0:35581ea6b194 339
dewantkatare 0:35581ea6b194 340
dewantkatare 0:35581ea6b194 341 // ************************************************************************************
dewantkatare 0:35581ea6b194 342 //! @name Functions for manipulating the MFRC522
dewantkatare 0:35581ea6b194 343 // ************************************************************************************
dewantkatare 0:35581ea6b194 344 //@{
dewantkatare 0:35581ea6b194 345
dewantkatare 0:35581ea6b194 346 /**
dewantkatare 0:35581ea6b194 347 * Initializes the MFRC522 chip.
dewantkatare 0:35581ea6b194 348 */
dewantkatare 0:35581ea6b194 349 void PCD_Init (void);
dewantkatare 0:35581ea6b194 350
dewantkatare 0:35581ea6b194 351 /**
dewantkatare 0:35581ea6b194 352 * Performs a soft reset on the MFRC522 chip and waits for it to be ready again.
dewantkatare 0:35581ea6b194 353 */
dewantkatare 0:35581ea6b194 354 void PCD_Reset (void);
dewantkatare 0:35581ea6b194 355
dewantkatare 0:35581ea6b194 356 /**
dewantkatare 0:35581ea6b194 357 * Turns the antenna on by enabling pins TX1 and TX2.
dewantkatare 0:35581ea6b194 358 * After a reset these pins disabled.
dewantkatare 0:35581ea6b194 359 */
dewantkatare 0:35581ea6b194 360 void PCD_AntennaOn (void);
dewantkatare 0:35581ea6b194 361
dewantkatare 0:35581ea6b194 362 /**
dewantkatare 0:35581ea6b194 363 * Writes a byte to the specified register in the MFRC522 chip.
dewantkatare 0:35581ea6b194 364 * The interface is described in the datasheet section 8.1.2.
dewantkatare 0:35581ea6b194 365 *
dewantkatare 0:35581ea6b194 366 * @param reg The register to write to. One of the PCD_Register enums.
dewantkatare 0:35581ea6b194 367 * @param value The value to write.
dewantkatare 0:35581ea6b194 368 */
dewantkatare 0:35581ea6b194 369 void PCD_WriteRegister (uint8_t reg, uint8_t value);
dewantkatare 0:35581ea6b194 370
dewantkatare 0:35581ea6b194 371 /**
dewantkatare 0:35581ea6b194 372 * Writes a number of bytes to the specified register in the MFRC522 chip.
dewantkatare 0:35581ea6b194 373 * The interface is described in the datasheet section 8.1.2.
dewantkatare 0:35581ea6b194 374 *
dewantkatare 0:35581ea6b194 375 * @param reg The register to write to. One of the PCD_Register enums.
dewantkatare 0:35581ea6b194 376 * @param count The number of bytes to write to the register
dewantkatare 0:35581ea6b194 377 * @param values The values to write. Byte array.
dewantkatare 0:35581ea6b194 378 */
dewantkatare 0:35581ea6b194 379 void PCD_WriteRegister (uint8_t reg, uint8_t count, uint8_t *values);
dewantkatare 0:35581ea6b194 380
dewantkatare 0:35581ea6b194 381 /**
dewantkatare 0:35581ea6b194 382 * Reads a byte from the specified register in the MFRC522 chip.
dewantkatare 0:35581ea6b194 383 * The interface is described in the datasheet section 8.1.2.
dewantkatare 0:35581ea6b194 384 *
dewantkatare 0:35581ea6b194 385 * @param reg The register to read from. One of the PCD_Register enums.
dewantkatare 0:35581ea6b194 386 * @returns Register value
dewantkatare 0:35581ea6b194 387 */
dewantkatare 0:35581ea6b194 388 uint8_t PCD_ReadRegister (uint8_t reg);
dewantkatare 0:35581ea6b194 389
dewantkatare 0:35581ea6b194 390 /**
dewantkatare 0:35581ea6b194 391 * Reads a number of bytes from the specified register in the MFRC522 chip.
dewantkatare 0:35581ea6b194 392 * The interface is described in the datasheet section 8.1.2.
dewantkatare 0:35581ea6b194 393 *
dewantkatare 0:35581ea6b194 394 * @param reg The register to read from. One of the PCD_Register enums.
dewantkatare 0:35581ea6b194 395 * @param count The number of bytes to read.
dewantkatare 0:35581ea6b194 396 * @param values Byte array to store the values in.
dewantkatare 0:35581ea6b194 397 * @param rxAlign Only bit positions rxAlign..7 in values[0] are updated.
dewantkatare 0:35581ea6b194 398 */
dewantkatare 0:35581ea6b194 399 void PCD_ReadRegister (uint8_t reg, uint8_t count, uint8_t *values, uint8_t rxAlign = 0);
dewantkatare 0:35581ea6b194 400
dewantkatare 0:35581ea6b194 401 /**
dewantkatare 0:35581ea6b194 402 * Sets the bits given in mask in register reg.
dewantkatare 0:35581ea6b194 403 *
dewantkatare 0:35581ea6b194 404 * @param reg The register to update. One of the PCD_Register enums.
dewantkatare 0:35581ea6b194 405 * @param mask The bits to set.
dewantkatare 0:35581ea6b194 406 */
dewantkatare 0:35581ea6b194 407 void PCD_SetRegisterBits(uint8_t reg, uint8_t mask);
dewantkatare 0:35581ea6b194 408
dewantkatare 0:35581ea6b194 409 /**
dewantkatare 0:35581ea6b194 410 * Clears the bits given in mask from register reg.
dewantkatare 0:35581ea6b194 411 *
dewantkatare 0:35581ea6b194 412 * @param reg The register to update. One of the PCD_Register enums.
dewantkatare 0:35581ea6b194 413 * @param mask The bits to clear.
dewantkatare 0:35581ea6b194 414 */
dewantkatare 0:35581ea6b194 415 void PCD_ClrRegisterBits(uint8_t reg, uint8_t mask);
dewantkatare 0:35581ea6b194 416
dewantkatare 0:35581ea6b194 417 /**
dewantkatare 0:35581ea6b194 418 * Use the CRC coprocessor in the MFRC522 to calculate a CRC_A.
dewantkatare 0:35581ea6b194 419 *
dewantkatare 0:35581ea6b194 420 * @param data Pointer to the data to transfer to the FIFO for CRC calculation.
dewantkatare 0:35581ea6b194 421 * @param length The number of bytes to transfer.
dewantkatare 0:35581ea6b194 422 * @param result Pointer to result buffer. Result is written to result[0..1], low byte first.
dewantkatare 0:35581ea6b194 423 * @return STATUS_OK on success, STATUS_??? otherwise.
dewantkatare 0:35581ea6b194 424 */
dewantkatare 0:35581ea6b194 425 uint8_t PCD_CalculateCRC (uint8_t *data, uint8_t length, uint8_t *result);
dewantkatare 0:35581ea6b194 426
dewantkatare 0:35581ea6b194 427 /**
dewantkatare 0:35581ea6b194 428 * Executes the Transceive command.
dewantkatare 0:35581ea6b194 429 * CRC validation can only be done if backData and backLen are specified.
dewantkatare 0:35581ea6b194 430 *
dewantkatare 0:35581ea6b194 431 * @param sendData Pointer to the data to transfer to the FIFO.
dewantkatare 0:35581ea6b194 432 * @param sendLen Number of bytes to transfer to the FIFO.
dewantkatare 0:35581ea6b194 433 * @param backData NULL or pointer to buffer if data should be read back after executing the command.
dewantkatare 0:35581ea6b194 434 * @param backLen Max number of bytes to write to *backData. Out: The number of bytes returned.
dewantkatare 0:35581ea6b194 435 * @param validBits The number of valid bits in the last byte. 0 for 8 valid bits. Default NULL.
dewantkatare 0:35581ea6b194 436 * @param rxAlign Defines the bit position in backData[0] for the first bit received. Default 0.
dewantkatare 0:35581ea6b194 437 * @param checkCRC True => The last two bytes of the response is assumed to be a CRC_A that must be validated.
dewantkatare 0:35581ea6b194 438 *
dewantkatare 0:35581ea6b194 439 * @return STATUS_OK on success, STATUS_??? otherwise.
dewantkatare 0:35581ea6b194 440 */
dewantkatare 0:35581ea6b194 441 uint8_t PCD_TransceiveData (uint8_t *sendData,
dewantkatare 0:35581ea6b194 442 uint8_t sendLen,
dewantkatare 0:35581ea6b194 443 uint8_t *backData,
dewantkatare 0:35581ea6b194 444 uint8_t *backLen,
dewantkatare 0:35581ea6b194 445 uint8_t *validBits = NULL,
dewantkatare 0:35581ea6b194 446 uint8_t rxAlign = 0,
dewantkatare 0:35581ea6b194 447 bool checkCRC = false);
dewantkatare 0:35581ea6b194 448
dewantkatare 0:35581ea6b194 449
dewantkatare 0:35581ea6b194 450 /**
dewantkatare 0:35581ea6b194 451 * Transfers data to the MFRC522 FIFO, executes a commend, waits for completion and transfers data back from the FIFO.
dewantkatare 0:35581ea6b194 452 * CRC validation can only be done if backData and backLen are specified.
dewantkatare 0:35581ea6b194 453 *
dewantkatare 0:35581ea6b194 454 * @param command The command to execute. One of the PCD_Command enums.
dewantkatare 0:35581ea6b194 455 * @param waitIRq The bits in the ComIrqReg register that signals successful completion of the command.
dewantkatare 0:35581ea6b194 456 * @param sendData Pointer to the data to transfer to the FIFO.
dewantkatare 0:35581ea6b194 457 * @param sendLen Number of bytes to transfer to the FIFO.
dewantkatare 0:35581ea6b194 458 * @param backData NULL or pointer to buffer if data should be read back after executing the command.
dewantkatare 0:35581ea6b194 459 * @param backLen In: Max number of bytes to write to *backData. Out: The number of bytes returned.
dewantkatare 0:35581ea6b194 460 * @param validBits In/Out: The number of valid bits in the last byte. 0 for 8 valid bits.
dewantkatare 0:35581ea6b194 461 * @param rxAlign In: Defines the bit position in backData[0] for the first bit received. Default 0.
dewantkatare 0:35581ea6b194 462 * @param checkCRC In: True => The last two bytes of the response is assumed to be a CRC_A that must be validated.
dewantkatare 0:35581ea6b194 463 *
dewantkatare 0:35581ea6b194 464 * @return STATUS_OK on success, STATUS_??? otherwise.
dewantkatare 0:35581ea6b194 465 */
dewantkatare 0:35581ea6b194 466 uint8_t PCD_CommunicateWithPICC(uint8_t command,
dewantkatare 0:35581ea6b194 467 uint8_t waitIRq,
dewantkatare 0:35581ea6b194 468 uint8_t *sendData,
dewantkatare 0:35581ea6b194 469 uint8_t sendLen,
dewantkatare 0:35581ea6b194 470 uint8_t *backData = NULL,
dewantkatare 0:35581ea6b194 471 uint8_t *backLen = NULL,
dewantkatare 0:35581ea6b194 472 uint8_t *validBits = NULL,
dewantkatare 0:35581ea6b194 473 uint8_t rxAlign = 0,
dewantkatare 0:35581ea6b194 474 bool checkCRC = false);
dewantkatare 0:35581ea6b194 475
dewantkatare 0:35581ea6b194 476 /**
dewantkatare 0:35581ea6b194 477 * Transmits a REQuest command, Type A. Invites PICCs in state IDLE to go to READY and prepare for anticollision or selection. 7 bit frame.
dewantkatare 0:35581ea6b194 478 * Beware: When two PICCs are in the field at the same time I often get STATUS_TIMEOUT - probably due do bad antenna design.
dewantkatare 0:35581ea6b194 479 *
dewantkatare 0:35581ea6b194 480 * @param bufferATQA The buffer to store the ATQA (Answer to request) in
dewantkatare 0:35581ea6b194 481 * @param bufferSize Buffer size, at least two bytes. Also number of bytes returned if STATUS_OK.
dewantkatare 0:35581ea6b194 482 *
dewantkatare 0:35581ea6b194 483 * @return STATUS_OK on success, STATUS_??? otherwise.
dewantkatare 0:35581ea6b194 484 */
dewantkatare 0:35581ea6b194 485 uint8_t PICC_RequestA (uint8_t *bufferATQA, uint8_t *bufferSize);
dewantkatare 0:35581ea6b194 486
dewantkatare 0:35581ea6b194 487 /**
dewantkatare 0:35581ea6b194 488 * Transmits a Wake-UP command, Type A. Invites PICCs in state IDLE and HALT to go to READY(*) and prepare for anticollision or selection. 7 bit frame.
dewantkatare 0:35581ea6b194 489 * Beware: When two PICCs are in the field at the same time I often get STATUS_TIMEOUT - probably due do bad antenna design.
dewantkatare 0:35581ea6b194 490 *
dewantkatare 0:35581ea6b194 491 * @param bufferATQA The buffer to store the ATQA (Answer to request) in
dewantkatare 0:35581ea6b194 492 * @param bufferSize Buffer size, at least two bytes. Also number of bytes returned if STATUS_OK.
dewantkatare 0:35581ea6b194 493 *
dewantkatare 0:35581ea6b194 494 * @return STATUS_OK on success, STATUS_??? otherwise.
dewantkatare 0:35581ea6b194 495 */
dewantkatare 0:35581ea6b194 496 uint8_t PICC_WakeupA (uint8_t *bufferATQA, uint8_t *bufferSize);
dewantkatare 0:35581ea6b194 497
dewantkatare 0:35581ea6b194 498 /**
dewantkatare 0:35581ea6b194 499 * Transmits REQA or WUPA commands.
dewantkatare 0:35581ea6b194 500 * Beware: When two PICCs are in the field at the same time I often get STATUS_TIMEOUT - probably due do bad antenna design.
dewantkatare 0:35581ea6b194 501 *
dewantkatare 0:35581ea6b194 502 * @param command The command to send - PICC_CMD_REQA or PICC_CMD_WUPA
dewantkatare 0:35581ea6b194 503 * @param bufferATQA The buffer to store the ATQA (Answer to request) in
dewantkatare 0:35581ea6b194 504 * @param bufferSize Buffer size, at least two bytes. Also number of bytes returned if STATUS_OK.
dewantkatare 0:35581ea6b194 505 *
dewantkatare 0:35581ea6b194 506 * @return STATUS_OK on success, STATUS_??? otherwise.
dewantkatare 0:35581ea6b194 507 */
dewantkatare 0:35581ea6b194 508 uint8_t PICC_REQA_or_WUPA (uint8_t command, uint8_t *bufferATQA, uint8_t *bufferSize);
dewantkatare 0:35581ea6b194 509
dewantkatare 0:35581ea6b194 510 /**
dewantkatare 0:35581ea6b194 511 * Transmits SELECT/ANTICOLLISION commands to select a single PICC.
dewantkatare 0:35581ea6b194 512 * Before calling this function the PICCs must be placed in the READY(*) state by calling PICC_RequestA() or PICC_WakeupA().
dewantkatare 0:35581ea6b194 513 * On success:
dewantkatare 0:35581ea6b194 514 * - The chosen PICC is in state ACTIVE(*) and all other PICCs have returned to state IDLE/HALT. (Figure 7 of the ISO/IEC 14443-3 draft.)
dewantkatare 0:35581ea6b194 515 * - The UID size and value of the chosen PICC is returned in *uid along with the SAK.
dewantkatare 0:35581ea6b194 516 *
dewantkatare 0:35581ea6b194 517 * A PICC UID consists of 4, 7 or 10 bytes.
dewantkatare 0:35581ea6b194 518 * Only 4 bytes can be specified in a SELECT command, so for the longer UIDs two or three iterations are used:
dewantkatare 0:35581ea6b194 519 *
dewantkatare 0:35581ea6b194 520 * UID size Number of UID bytes Cascade levels Example of PICC
dewantkatare 0:35581ea6b194 521 * ======== =================== ============== ===============
dewantkatare 0:35581ea6b194 522 * single 4 1 MIFARE Classic
dewantkatare 0:35581ea6b194 523 * double 7 2 MIFARE Ultralight
dewantkatare 0:35581ea6b194 524 * triple 10 3 Not currently in use?
dewantkatare 0:35581ea6b194 525 *
dewantkatare 0:35581ea6b194 526 *
dewantkatare 0:35581ea6b194 527 * @param uid Pointer to Uid struct. Normally output, but can also be used to supply a known UID.
dewantkatare 0:35581ea6b194 528 * @param validBits The number of known UID bits supplied in *uid. Normally 0. If set you must also supply uid->size.
dewantkatare 0:35581ea6b194 529 *
dewantkatare 0:35581ea6b194 530 * @return STATUS_OK on success, STATUS_??? otherwise.
dewantkatare 0:35581ea6b194 531 */
dewantkatare 0:35581ea6b194 532 uint8_t PICC_Select (Uid *uid, uint8_t validBits = 0);
dewantkatare 0:35581ea6b194 533
dewantkatare 0:35581ea6b194 534 /**
dewantkatare 0:35581ea6b194 535 * Instructs a PICC in state ACTIVE(*) to go to state HALT.
dewantkatare 0:35581ea6b194 536 *
dewantkatare 0:35581ea6b194 537 * @return STATUS_OK on success, STATUS_??? otherwise.
dewantkatare 0:35581ea6b194 538 */
dewantkatare 0:35581ea6b194 539 uint8_t PICC_HaltA (void);
dewantkatare 0:35581ea6b194 540
dewantkatare 0:35581ea6b194 541 // ************************************************************************************
dewantkatare 0:35581ea6b194 542 //@}
dewantkatare 0:35581ea6b194 543
dewantkatare 0:35581ea6b194 544
dewantkatare 0:35581ea6b194 545 // ************************************************************************************
dewantkatare 0:35581ea6b194 546 //! @name Functions for communicating with MIFARE PICCs
dewantkatare 0:35581ea6b194 547 // ************************************************************************************
dewantkatare 0:35581ea6b194 548 //@{
dewantkatare 0:35581ea6b194 549
dewantkatare 0:35581ea6b194 550 /**
dewantkatare 0:35581ea6b194 551 * Executes the MFRC522 MFAuthent command.
dewantkatare 0:35581ea6b194 552 * This command manages MIFARE authentication to enable a secure communication to any MIFARE Mini, MIFARE 1K and MIFARE 4K card.
dewantkatare 0:35581ea6b194 553 * The authentication is described in the MFRC522 datasheet section 10.3.1.9 and http://www.nxp.com/documents/data_sheet/MF1S503x.pdf section 10.1.
dewantkatare 0:35581ea6b194 554 * For use with MIFARE Classic PICCs.
dewantkatare 0:35581ea6b194 555 * The PICC must be selected - ie in state ACTIVE(*) - before calling this function.
dewantkatare 0:35581ea6b194 556 * Remember to call PCD_StopCrypto1() after communicating with the authenticated PICC - otherwise no new communications can start.
dewantkatare 0:35581ea6b194 557 *
dewantkatare 0:35581ea6b194 558 * All keys are set to FFFFFFFFFFFFh at chip delivery.
dewantkatare 0:35581ea6b194 559 *
dewantkatare 0:35581ea6b194 560 * @param command PICC_CMD_MF_AUTH_KEY_A or PICC_CMD_MF_AUTH_KEY_B
dewantkatare 0:35581ea6b194 561 * @param blockAddr The block number. See numbering in the comments in the .h file.
dewantkatare 0:35581ea6b194 562 * @param key Pointer to the Crypteo1 key to use (6 bytes)
dewantkatare 0:35581ea6b194 563 * @param uid Pointer to Uid struct. The first 4 bytes of the UID is used.
dewantkatare 0:35581ea6b194 564 *
dewantkatare 0:35581ea6b194 565 * @return STATUS_OK on success, STATUS_??? otherwise. Probably STATUS_TIMEOUT if you supply the wrong key.
dewantkatare 0:35581ea6b194 566 */
dewantkatare 0:35581ea6b194 567 uint8_t PCD_Authenticate (uint8_t command, uint8_t blockAddr, MIFARE_Key *key, Uid *uid);
dewantkatare 0:35581ea6b194 568
dewantkatare 0:35581ea6b194 569 /**
dewantkatare 0:35581ea6b194 570 * Used to exit the PCD from its authenticated state.
dewantkatare 0:35581ea6b194 571 * Remember to call this function after communicating with an authenticated PICC - otherwise no new communications can start.
dewantkatare 0:35581ea6b194 572 */
dewantkatare 0:35581ea6b194 573 void PCD_StopCrypto1 (void);
dewantkatare 0:35581ea6b194 574
dewantkatare 0:35581ea6b194 575 /**
dewantkatare 0:35581ea6b194 576 * Reads 16 bytes (+ 2 bytes CRC_A) from the active PICC.
dewantkatare 0:35581ea6b194 577 *
dewantkatare 0:35581ea6b194 578 * For MIFARE Classic the sector containing the block must be authenticated before calling this function.
dewantkatare 0:35581ea6b194 579 *
dewantkatare 0:35581ea6b194 580 * For MIFARE Ultralight only addresses 00h to 0Fh are decoded.
dewantkatare 0:35581ea6b194 581 * The MF0ICU1 returns a NAK for higher addresses.
dewantkatare 0:35581ea6b194 582 * The MF0ICU1 responds to the READ command by sending 16 bytes starting from the page address defined by the command argument.
dewantkatare 0:35581ea6b194 583 * For example; if blockAddr is 03h then pages 03h, 04h, 05h, 06h are returned.
dewantkatare 0:35581ea6b194 584 * A roll-back is implemented: If blockAddr is 0Eh, then the contents of pages 0Eh, 0Fh, 00h and 01h are returned.
dewantkatare 0:35581ea6b194 585 *
dewantkatare 0:35581ea6b194 586 * The buffer must be at least 18 bytes because a CRC_A is also returned.
dewantkatare 0:35581ea6b194 587 * Checks the CRC_A before returning STATUS_OK.
dewantkatare 0:35581ea6b194 588 *
dewantkatare 0:35581ea6b194 589 * @param blockAddr MIFARE Classic: The block (0-0xff) number. MIFARE Ultralight: The first page to return data from.
dewantkatare 0:35581ea6b194 590 * @param buffer The buffer to store the data in
dewantkatare 0:35581ea6b194 591 * @param bufferSize Buffer size, at least 18 bytes. Also number of bytes returned if STATUS_OK.
dewantkatare 0:35581ea6b194 592 *
dewantkatare 0:35581ea6b194 593 * @return STATUS_OK on success, STATUS_??? otherwise.
dewantkatare 0:35581ea6b194 594 */
dewantkatare 0:35581ea6b194 595 uint8_t MIFARE_Read (uint8_t blockAddr, uint8_t *buffer, uint8_t *bufferSize);
dewantkatare 0:35581ea6b194 596
dewantkatare 0:35581ea6b194 597 /**
dewantkatare 0:35581ea6b194 598 * Writes 16 bytes to the active PICC.
dewantkatare 0:35581ea6b194 599 *
dewantkatare 0:35581ea6b194 600 * For MIFARE Classic the sector containing the block must be authenticated before calling this function.
dewantkatare 0:35581ea6b194 601 *
dewantkatare 0:35581ea6b194 602 * For MIFARE Ultralight the opretaion is called "COMPATIBILITY WRITE".
dewantkatare 0:35581ea6b194 603 * Even though 16 bytes are transferred to the Ultralight PICC, only the least significant 4 bytes (bytes 0 to 3)
dewantkatare 0:35581ea6b194 604 * are written to the specified address. It is recommended to set the remaining bytes 04h to 0Fh to all logic 0.
dewantkatare 0:35581ea6b194 605 *
dewantkatare 0:35581ea6b194 606 * @param blockAddr MIFARE Classic: The block (0-0xff) number. MIFARE Ultralight: The page (2-15) to write to.
dewantkatare 0:35581ea6b194 607 * @param buffer The 16 bytes to write to the PICC
dewantkatare 0:35581ea6b194 608 * @param bufferSize Buffer size, must be at least 16 bytes. Exactly 16 bytes are written.
dewantkatare 0:35581ea6b194 609 *
dewantkatare 0:35581ea6b194 610 * @return STATUS_OK on success, STATUS_??? otherwise.
dewantkatare 0:35581ea6b194 611 */
dewantkatare 0:35581ea6b194 612 uint8_t MIFARE_Write (uint8_t blockAddr, uint8_t *buffer, uint8_t bufferSize);
dewantkatare 0:35581ea6b194 613
dewantkatare 0:35581ea6b194 614 /**
dewantkatare 0:35581ea6b194 615 * Writes a 4 byte page to the active MIFARE Ultralight PICC.
dewantkatare 0:35581ea6b194 616 *
dewantkatare 0:35581ea6b194 617 * @param page The page (2-15) to write to.
dewantkatare 0:35581ea6b194 618 * @param buffer The 4 bytes to write to the PICC
dewantkatare 0:35581ea6b194 619 * @param bufferSize Buffer size, must be at least 4 bytes. Exactly 4 bytes are written.
dewantkatare 0:35581ea6b194 620 *
dewantkatare 0:35581ea6b194 621 * @return STATUS_OK on success, STATUS_??? otherwise.
dewantkatare 0:35581ea6b194 622 */
dewantkatare 0:35581ea6b194 623 uint8_t MIFARE_UltralightWrite(uint8_t page, uint8_t *buffer, uint8_t bufferSize);
dewantkatare 0:35581ea6b194 624
dewantkatare 0:35581ea6b194 625 /**
dewantkatare 0:35581ea6b194 626 * MIFARE Decrement subtracts the delta from the value of the addressed block, and stores the result in a volatile memory.
dewantkatare 0:35581ea6b194 627 * For MIFARE Classic only. The sector containing the block must be authenticated before calling this function.
dewantkatare 0:35581ea6b194 628 * Only for blocks in "value block" mode, ie with access bits [C1 C2 C3] = [110] or [001].
dewantkatare 0:35581ea6b194 629 * Use MIFARE_Transfer() to store the result in a block.
dewantkatare 0:35581ea6b194 630 *
dewantkatare 0:35581ea6b194 631 * @param blockAddr The block (0-0xff) number.
dewantkatare 0:35581ea6b194 632 * @param delta This number is subtracted from the value of block blockAddr.
dewantkatare 0:35581ea6b194 633 *
dewantkatare 0:35581ea6b194 634 * @return STATUS_OK on success, STATUS_??? otherwise.
dewantkatare 0:35581ea6b194 635 */
dewantkatare 0:35581ea6b194 636 uint8_t MIFARE_Decrement (uint8_t blockAddr, uint32_t delta);
dewantkatare 0:35581ea6b194 637
dewantkatare 0:35581ea6b194 638 /**
dewantkatare 0:35581ea6b194 639 * MIFARE Increment adds the delta to the value of the addressed block, and stores the result in a volatile memory.
dewantkatare 0:35581ea6b194 640 * For MIFARE Classic only. The sector containing the block must be authenticated before calling this function.
dewantkatare 0:35581ea6b194 641 * Only for blocks in "value block" mode, ie with access bits [C1 C2 C3] = [110] or [001].
dewantkatare 0:35581ea6b194 642 * Use MIFARE_Transfer() to store the result in a block.
dewantkatare 0:35581ea6b194 643 *
dewantkatare 0:35581ea6b194 644 * @param blockAddr The block (0-0xff) number.
dewantkatare 0:35581ea6b194 645 * @param delta This number is added to the value of block blockAddr.
dewantkatare 0:35581ea6b194 646 *
dewantkatare 0:35581ea6b194 647 * @return STATUS_OK on success, STATUS_??? otherwise.
dewantkatare 0:35581ea6b194 648 */
dewantkatare 0:35581ea6b194 649 uint8_t MIFARE_Increment (uint8_t blockAddr, uint32_t delta);
dewantkatare 0:35581ea6b194 650
dewantkatare 0:35581ea6b194 651 /**
dewantkatare 0:35581ea6b194 652 * MIFARE Restore copies the value of the addressed block into a volatile memory.
dewantkatare 0:35581ea6b194 653 * For MIFARE Classic only. The sector containing the block must be authenticated before calling this function.
dewantkatare 0:35581ea6b194 654 * Only for blocks in "value block" mode, ie with access bits [C1 C2 C3] = [110] or [001].
dewantkatare 0:35581ea6b194 655 * Use MIFARE_Transfer() to store the result in a block.
dewantkatare 0:35581ea6b194 656 *
dewantkatare 0:35581ea6b194 657 * @param blockAddr The block (0-0xff) number.
dewantkatare 0:35581ea6b194 658 *
dewantkatare 0:35581ea6b194 659 * @return STATUS_OK on success, STATUS_??? otherwise.
dewantkatare 0:35581ea6b194 660 */
dewantkatare 0:35581ea6b194 661 uint8_t MIFARE_Restore (uint8_t blockAddr);
dewantkatare 0:35581ea6b194 662
dewantkatare 0:35581ea6b194 663 /**
dewantkatare 0:35581ea6b194 664 * MIFARE Transfer writes the value stored in the volatile memory into one MIFARE Classic block.
dewantkatare 0:35581ea6b194 665 * For MIFARE Classic only. The sector containing the block must be authenticated before calling this function.
dewantkatare 0:35581ea6b194 666 * Only for blocks in "value block" mode, ie with access bits [C1 C2 C3] = [110] or [001].
dewantkatare 0:35581ea6b194 667 *
dewantkatare 0:35581ea6b194 668 * @param blockAddr The block (0-0xff) number.
dewantkatare 0:35581ea6b194 669 *
dewantkatare 0:35581ea6b194 670 * @return STATUS_OK on success, STATUS_??? otherwise.
dewantkatare 0:35581ea6b194 671 */
dewantkatare 0:35581ea6b194 672 uint8_t MIFARE_Transfer (uint8_t blockAddr);
dewantkatare 0:35581ea6b194 673
dewantkatare 0:35581ea6b194 674 // ************************************************************************************
dewantkatare 0:35581ea6b194 675 //@}
dewantkatare 0:35581ea6b194 676
dewantkatare 0:35581ea6b194 677
dewantkatare 0:35581ea6b194 678 // ************************************************************************************
dewantkatare 0:35581ea6b194 679 //! @name Support functions
dewantkatare 0:35581ea6b194 680 // ************************************************************************************
dewantkatare 0:35581ea6b194 681 //@{
dewantkatare 0:35581ea6b194 682
dewantkatare 0:35581ea6b194 683 /**
dewantkatare 0:35581ea6b194 684 * Wrapper for MIFARE protocol communication.
dewantkatare 0:35581ea6b194 685 * Adds CRC_A, executes the Transceive command and checks that the response is MF_ACK or a timeout.
dewantkatare 0:35581ea6b194 686 *
dewantkatare 0:35581ea6b194 687 * @param sendData Pointer to the data to transfer to the FIFO. Do NOT include the CRC_A.
dewantkatare 0:35581ea6b194 688 * @param sendLen Number of bytes in sendData.
dewantkatare 0:35581ea6b194 689 * @param acceptTimeout True => A timeout is also success
dewantkatare 0:35581ea6b194 690 *
dewantkatare 0:35581ea6b194 691 * @return STATUS_OK on success, STATUS_??? otherwise.
dewantkatare 0:35581ea6b194 692 */
dewantkatare 0:35581ea6b194 693 uint8_t PCD_MIFARE_Transceive(uint8_t *sendData, uint8_t sendLen, bool acceptTimeout = false);
dewantkatare 0:35581ea6b194 694
dewantkatare 0:35581ea6b194 695 /**
dewantkatare 0:35581ea6b194 696 * Translates the SAK (Select Acknowledge) to a PICC type.
dewantkatare 0:35581ea6b194 697 *
dewantkatare 0:35581ea6b194 698 * @param sak The SAK byte returned from PICC_Select().
dewantkatare 0:35581ea6b194 699 *
dewantkatare 0:35581ea6b194 700 * @return PICC_Type
dewantkatare 0:35581ea6b194 701 */
dewantkatare 0:35581ea6b194 702 uint8_t PICC_GetType (uint8_t sak);
dewantkatare 0:35581ea6b194 703
dewantkatare 0:35581ea6b194 704 /**
dewantkatare 0:35581ea6b194 705 * Returns a string pointer to the PICC type name.
dewantkatare 0:35581ea6b194 706 *
dewantkatare 0:35581ea6b194 707 * @param type One of the PICC_Type enums.
dewantkatare 0:35581ea6b194 708 *
dewantkatare 0:35581ea6b194 709 * @return A string pointer to the PICC type name.
dewantkatare 0:35581ea6b194 710 */
dewantkatare 0:35581ea6b194 711 char* PICC_GetTypeName (uint8_t type);
dewantkatare 0:35581ea6b194 712
dewantkatare 0:35581ea6b194 713 /**
dewantkatare 0:35581ea6b194 714 * Returns a string pointer to a status code name.
dewantkatare 0:35581ea6b194 715 *
dewantkatare 0:35581ea6b194 716 * @param code One of the StatusCode enums.
dewantkatare 0:35581ea6b194 717 *
dewantkatare 0:35581ea6b194 718 * @return A string pointer to a status code name.
dewantkatare 0:35581ea6b194 719 */
dewantkatare 0:35581ea6b194 720 char* GetStatusCodeName (uint8_t code);
dewantkatare 0:35581ea6b194 721
dewantkatare 0:35581ea6b194 722 /**
dewantkatare 0:35581ea6b194 723 * Calculates the bit pattern needed for the specified access bits. In the [C1 C2 C3] tupples C1 is MSB (=4) and C3 is LSB (=1).
dewantkatare 0:35581ea6b194 724 *
dewantkatare 0:35581ea6b194 725 * @param accessBitBuffer Pointer to byte 6, 7 and 8 in the sector trailer. Bytes [0..2] will be set.
dewantkatare 0:35581ea6b194 726 * @param g0 Access bits [C1 C2 C3] for block 0 (for sectors 0-31) or blocks 0-4 (for sectors 32-39)
dewantkatare 0:35581ea6b194 727 * @param g1 Access bits [C1 C2 C3] for block 1 (for sectors 0-31) or blocks 5-9 (for sectors 32-39)
dewantkatare 0:35581ea6b194 728 * @param g2 Access bits [C1 C2 C3] for block 2 (for sectors 0-31) or blocks 10-14 (for sectors 32-39)
dewantkatare 0:35581ea6b194 729 * @param g3 Access bits [C1 C2 C3] for the sector trailer, block 3 (for sectors 0-31) or block 15 (for sectors 32-39)
dewantkatare 0:35581ea6b194 730 */
dewantkatare 0:35581ea6b194 731 void MIFARE_SetAccessBits (uint8_t *accessBitBuffer,
dewantkatare 0:35581ea6b194 732 uint8_t g0,
dewantkatare 0:35581ea6b194 733 uint8_t g1,
dewantkatare 0:35581ea6b194 734 uint8_t g2,
dewantkatare 0:35581ea6b194 735 uint8_t g3);
dewantkatare 0:35581ea6b194 736
dewantkatare 0:35581ea6b194 737 // ************************************************************************************
dewantkatare 0:35581ea6b194 738 //@}
dewantkatare 0:35581ea6b194 739
dewantkatare 0:35581ea6b194 740
dewantkatare 0:35581ea6b194 741 // ************************************************************************************
dewantkatare 0:35581ea6b194 742 //! @name Convenience functions - does not add extra functionality
dewantkatare 0:35581ea6b194 743 // ************************************************************************************
dewantkatare 0:35581ea6b194 744 //@{
dewantkatare 0:35581ea6b194 745
dewantkatare 0:35581ea6b194 746 /**
dewantkatare 0:35581ea6b194 747 * Returns true if a PICC responds to PICC_CMD_REQA.
dewantkatare 0:35581ea6b194 748 * Only "new" cards in state IDLE are invited. Sleeping cards in state HALT are ignored.
dewantkatare 0:35581ea6b194 749 *
dewantkatare 0:35581ea6b194 750 * @return bool
dewantkatare 0:35581ea6b194 751 */
dewantkatare 0:35581ea6b194 752 bool PICC_IsNewCardPresent(void);
dewantkatare 0:35581ea6b194 753
dewantkatare 0:35581ea6b194 754 /**
dewantkatare 0:35581ea6b194 755 * Simple wrapper around PICC_Select.
dewantkatare 0:35581ea6b194 756 * Returns true if a UID could be read.
dewantkatare 0:35581ea6b194 757 * Remember to call PICC_IsNewCardPresent(), PICC_RequestA() or PICC_WakeupA() first.
dewantkatare 0:35581ea6b194 758 * The read UID is available in the class variable uid.
dewantkatare 0:35581ea6b194 759 *
dewantkatare 0:35581ea6b194 760 * @return bool
dewantkatare 0:35581ea6b194 761 */
dewantkatare 0:35581ea6b194 762 bool PICC_ReadCardSerial (void);
dewantkatare 0:35581ea6b194 763
dewantkatare 0:35581ea6b194 764 // ************************************************************************************
dewantkatare 0:35581ea6b194 765 //@}
dewantkatare 0:35581ea6b194 766
dewantkatare 0:35581ea6b194 767
dewantkatare 0:35581ea6b194 768 private:
dewantkatare 0:35581ea6b194 769 SPI m_SPI;
dewantkatare 0:35581ea6b194 770 DigitalOut m_CS;
dewantkatare 0:35581ea6b194 771 DigitalOut m_RESET;
dewantkatare 0:35581ea6b194 772
dewantkatare 0:35581ea6b194 773 /**
dewantkatare 0:35581ea6b194 774 * Helper function for the two-step MIFARE Classic protocol operations Decrement, Increment and Restore.
dewantkatare 0:35581ea6b194 775 *
dewantkatare 0:35581ea6b194 776 * @param command The command to use
dewantkatare 0:35581ea6b194 777 * @param blockAddr The block (0-0xff) number.
dewantkatare 0:35581ea6b194 778 * @param data The data to transfer in step 2
dewantkatare 0:35581ea6b194 779 *
dewantkatare 0:35581ea6b194 780 * @return STATUS_OK on success, STATUS_??? otherwise.
dewantkatare 0:35581ea6b194 781 */
dewantkatare 0:35581ea6b194 782 uint8_t MIFARE_TwoStepHelper(uint8_t command, uint8_t blockAddr, uint32_t data);
dewantkatare 0:35581ea6b194 783 };
dewantkatare 0:35581ea6b194 784
dewantkatare 0:35581ea6b194 785 #endif