Daniel Kline / Mbed OS MAX30001-MAX32630FTHR-ECG-EVKIT

Compile SD library

Dependencies:   SDFileSystem USBDevice max32630fthr

Fork of MAX30001-MAX32630FTHR-ECG-EVKIT by Maxim Integrated

HSP/Devices/MAX30001/MAX30001/MAX30001.h@9:e4a06973e0a8, 2018-07-09 (annotated)

Committer:
Emre.Eken
Date:
Mon Jul 09 17:40:02 2018 +0300
Revision:
9:e4a06973e0a8
Parent:
0:8e4630a71eb1 
File hiararchy is changed

Who changed what in which revision?

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Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1 /*******************************************************************************
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 2 * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 3 *
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 4 * Permission is hereby granted, free of charge, to any person obtaining a
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 5 * copy of this software and associated documentation files (the "Software"),
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 6 * to deal in the Software without restriction, including without limitation
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 8 * and/or sell copies of the Software, and to permit persons to whom the
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 9 * Software is furnished to do so, subject to the following conditions:
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 10 *
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 11 * The above copyright notice and this permission notice shall be included
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 12 * in all copies or substantial portions of the Software.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 13 *
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 20 * OTHER DEALINGS IN THE SOFTWARE.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 21 *
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 22 * Except as contained in this notice, the name of Maxim Integrated
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 24 * Products, Inc. Branding Policy.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 25 *
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 26 * The mere transfer of this software does not imply any licenses
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 27 * of trade secrets, proprietary technology, copyrights, patents,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 28 * trademarks, maskwork rights, or any other form of intellectual
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 30 * ownership rights.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 31 *******************************************************************************/
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 32 /*
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 33 * max30001.h
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 34 *
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 35 * Created on: Oct 9, 2015
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 36 * Author: faisal.tariq
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 37 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 38
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 39 #ifndef MAX30001_H_
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 40 #define MAX30001_H_
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 41
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 42 #include "mbed.h"
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 43
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 44 #define mbed_COMPLIANT // Uncomment to Use timer for MAX30001 FCLK (for mbed)
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 45 // Comment to use the RTC clock
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 46
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 47 #define ASYNC_SPI_BUFFER_SIZE (32 * 3) // Maximimum buffer size for async byte transfers
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 48
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 49 // Defines for data callbacks
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 50 #define MAX30001_DATA_ECG 0x30
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 51 #define MAX30001_DATA_PACE 0x31
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 52 #define MAX30001_DATA_RTOR 0x32
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 53 #define MAX30001_DATA_BIOZ 0x33
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 54 #define MAX30001_DATA_LEADOFF_DC 0x34
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 55 #define MAX30001_DATA_LEADOFF_AC 0x35
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 56 #define MAX30001_DATA_BCGMON 0x36
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 57 #define MAX30001_DATA_ACLEADON 0x37
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 58
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 59 #define MAX30001_SPI_MASTER_PORT 0
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 60 #define MAX30001_SPI_SS_INDEX 0
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 61
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 62 #define MAX30001_INT_PORT_B 3
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 63 #define MAX30001_INT_PIN_B 6
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 64
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 65 #define MAX30001_INT_PORT_2B 4
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 66 #define MAX30001_INT_PIN_2B 5
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 67
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 68 #define MAX30001_INT_PORT_FCLK 1
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 69 #define MAX30001_INT_PIN_FCLK 7
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 70
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 71 #define MAX30001_FUNC_SEL_TMR 2 // 0=FW Control, 1= Pulse Train, 2=Timer
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 72
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 73 #define MAX30001_INDEX 3
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 74 #define MAX30001_POLARITY 0
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 75 #define MAX30001_PERIOD 30518
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 76 #define MAX30001_CYCLE 50
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 77
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 78 #define MAX30001_IOMUX_IO_ENABLE 1
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 79
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 80 #define MAX30001_SPI_PORT 0
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 81 #define MAX30001_CS_PIN 0
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 82 #define MAX30001_CS_POLARITY 0
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 83 #define MAX30001_CS_ACTIVITY_DELAY 0
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 84 #define MAX30001_CS_INACTIVITY_DELAY 0
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 85 #define MAX30001_CLK_HI 1
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 86 #define MAX30001_CLK_LOW 1
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 87 #define MAX30001_ALT_CLK 0
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 88 #define MAX30001_CLK_POLARITY 0
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 89 #define MAX30001_CLK_PHASE 0
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 90 #define MAX30001_WRITE 1
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 91 #define MAX30001_READ 0
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 92
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 93 #define MAX30001_INT_PORT_B 3
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 94 #define MAX30001INT_PIN_B 6
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 95
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 96 void MAX30001_AllowInterrupts(int state);
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 97
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 98 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 99 * Maxim Integrated MAX30001 ECG/BIOZ chip
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 100 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 101 class MAX30001 {
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 102
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 103 public:
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 104 typedef enum { // MAX30001 Register addresses
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 105 STATUS = 0x01,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 106 EN_INT = 0x02,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 107 EN_INT2 = 0x03,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 108 MNGR_INT = 0x04,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 109 MNGR_DYN = 0x05,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 110 SW_RST = 0x08,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 111 SYNCH = 0x09,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 112 FIFO_RST = 0x0A,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 113 INFO = 0x0F,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 114 CNFG_GEN = 0x10,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 115 CNFG_CAL = 0x12,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 116 CNFG_EMUX = 0x14,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 117 CNFG_ECG = 0x15,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 118 CNFG_BMUX = 0x17,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 119 CNFG_BIOZ = 0x18,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 120 CNFG_PACE = 0x1A,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 121 CNFG_RTOR1 = 0x1D,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 122 CNFG_RTOR2 = 0x1E,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 123
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 124 // Data locations
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 125 ECG_FIFO_BURST = 0x20,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 126 ECG_FIFO = 0x21,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 127 FIFO_BURST = 0x22,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 128 BIOZ_FIFO = 0x23,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 129 RTOR = 0x25,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 130
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 131 PACE0_FIFO_BURST = 0x30,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 132 PACE0_A = 0x31,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 133 PACE0_B = 0x32,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 134 PACE0_C = 0x33,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 135
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 136 PACE1_FIFO_BURST = 0x34,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 137 PACE1_A = 0x35,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 138 PACE1_B = 0x36,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 139 PACE1_C = 0x37,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 140
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 141 PACE2_FIFO_BURST = 0x38,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 142 PACE2_A = 0x39,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 143 PACE2_B = 0x3A,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 144 PACE2_C = 0x3B,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 145
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 146 PACE3_FIFO_BURST = 0x3C,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 147 PACE3_A = 0x3D,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 148 PACE3_B = 0x3E,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 149 PACE3_C = 0x3F,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 150
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 151 PACE4_FIFO_BURST = 0x40,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 152 PACE4_A = 0x41,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 153 PACE4_B = 0x42,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 154 PACE4_C = 0x43,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 155
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 156 PACE5_FIFO_BURST = 0x44,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 157 PACE5_A = 0x45,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 158 PACE5_B = 0x46,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 159 PACE5_C = 0x47,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 160
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 161 } MAX30001_REG_map_t;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 162
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 163 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 164 * @brief STATUS (0x01)
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 165 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 166 union max30001_status_reg {
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 167 uint32_t all;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 168
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 169 struct {
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 170 uint32_t loff_nl : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 171 uint32_t loff_nh : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 172 uint32_t loff_pl : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 173 uint32_t loff_ph : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 174
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 175 uint32_t bcgmn : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 176 uint32_t bcgmp : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 177 uint32_t reserved1 : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 178 uint32_t reserved2 : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 179
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 180 uint32_t pllint : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 181 uint32_t samp : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 182 uint32_t rrint : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 183 uint32_t lonint : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 184
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 185 uint32_t pedge : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 186 uint32_t povf : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 187 uint32_t pint : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 188 uint32_t bcgmon : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 189
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 190 uint32_t bundr : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 191 uint32_t bover : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 192 uint32_t bovf : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 193 uint32_t bint : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 194
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 195 uint32_t dcloffint : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 196 uint32_t fstint : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 197 uint32_t eovf : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 198 uint32_t eint : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 199
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 200 uint32_t reserved : 8;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 201
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 202 } bit;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 203
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 204 } max30001_status;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 205
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 206
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 207 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 208 * @brief EN_INT (0x02)
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 209 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 210
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 211 union max30001_en_int_reg {
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 212 uint32_t all;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 213
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 214 struct {
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 215 uint32_t intb_type : 2;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 216 uint32_t reserved1 : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 217 uint32_t reserved2 : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 218
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 219 uint32_t reserved3 : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 220 uint32_t reserved4 : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 221 uint32_t reserved5 : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 222 uint32_t reserved6 : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 223
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 224 uint32_t en_pllint : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 225 uint32_t en_samp : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 226 uint32_t en_rrint : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 227 uint32_t en_lonint : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 228
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 229 uint32_t en_pedge : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 230 uint32_t en_povf : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 231 uint32_t en_pint : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 232 uint32_t en_bcgmon : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 233
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 234 uint32_t en_bundr : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 235 uint32_t en_bover : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 236 uint32_t en_bovf : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 237 uint32_t en_bint : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 238
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 239 uint32_t en_dcloffint : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 240 uint32_t en_fstint : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 241 uint32_t en_eovf : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 242 uint32_t en_eint : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 243
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 244 uint32_t reserved : 8;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 245
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 246 } bit;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 247
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 248 } max30001_en_int;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 249
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 250
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 251 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 252 * @brief EN_INT2 (0x03)
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 253 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 254 union max30001_en_int2_reg {
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 255 uint32_t all;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 256
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 257 struct {
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 258 uint32_t intb_type : 2;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 259 uint32_t reserved1 : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 260 uint32_t reserved2 : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 261
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 262 uint32_t reserved3 : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 263 uint32_t reserved4 : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 264 uint32_t reserved5 : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 265 uint32_t reserved6 : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 266
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 267 uint32_t en_pllint : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 268 uint32_t en_samp : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 269 uint32_t en_rrint : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 270 uint32_t en_lonint : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 271
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 272 uint32_t en_pedge : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 273 uint32_t en_povf : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 274 uint32_t en_pint : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 275 uint32_t en_bcgmon : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 276
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 277 uint32_t en_bundr : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 278 uint32_t en_bover : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 279 uint32_t en_bovf : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 280 uint32_t en_bint : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 281
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 282 uint32_t en_dcloffint : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 283 uint32_t en_fstint : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 284 uint32_t en_eovf : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 285 uint32_t en_eint : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 286
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 287 uint32_t reserved : 8;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 288
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 289 } bit;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 290
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 291 } max30001_en_int2;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 292
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 293 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 294 * @brief MNGR_INT (0x04)
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 295 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 296 union max30001_mngr_int_reg {
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 297 uint32_t all;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 298
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 299 struct {
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 300 uint32_t samp_it : 2;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 301 uint32_t clr_samp : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 302 uint32_t clr_pedge : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 303 uint32_t clr_rrint : 2;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 304 uint32_t clr_fast : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 305 uint32_t reserved1 : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 306 uint32_t reserved2 : 4;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 307 uint32_t reserved3 : 4;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 308
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 309 uint32_t b_fit : 3;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 310 uint32_t e_fit : 5;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 311
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 312 uint32_t reserved : 8;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 313
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 314 } bit;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 315
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 316 } max30001_mngr_int;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 317
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 318 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 319 * @brief MNGR_DYN (0x05)
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 320 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 321 union max30001_mngr_dyn_reg {
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 322 uint32_t all;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 323
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 324 struct {
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 325 uint32_t bloff_lo_it : 8;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 326 uint32_t bloff_hi_it : 8;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 327 uint32_t fast_th : 6;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 328 uint32_t fast : 2;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 329 uint32_t reserved : 8;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 330 } bit;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 331
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 332 } max30001_mngr_dyn;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 333
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 334 // 0x08
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 335 // uint32_t max30001_sw_rst;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 336
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 337 // 0x09
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 338 // uint32_t max30001_synch;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 339
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 340 // 0x0A
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 341 // uint32_t max30001_fifo_rst;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 342
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 343
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 344 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 345 * @brief INFO (0x0F)
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 346 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 347 union max30001_info_reg {
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 348 uint32_t all;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 349 struct {
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 350 uint32_t serial : 12;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 351 uint32_t part_id : 2;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 352 uint32_t sample : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 353 uint32_t reserved1 : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 354 uint32_t rev_id : 4;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 355 uint32_t pattern : 4;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 356 uint32_t reserved : 8;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 357 } bit;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 358
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 359 } max30001_info;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 360
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 361 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 362 * @brief CNFG_GEN (0x10)
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 363 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 364 union max30001_cnfg_gen_reg {
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 365 uint32_t all;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 366 struct {
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 367 uint32_t rbiasn : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 368 uint32_t rbiasp : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 369 uint32_t rbiasv : 2;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 370 uint32_t en_rbias : 2;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 371 uint32_t vth : 2;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 372 uint32_t imag : 3;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 373 uint32_t ipol : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 374 uint32_t en_dcloff : 2;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 375 uint32_t en_bloff : 2;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 376 uint32_t reserved1 : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 377 uint32_t en_pace : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 378 uint32_t en_bioz : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 379 uint32_t en_ecg : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 380 uint32_t fmstr : 2;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 381 uint32_t en_ulp_lon : 2;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 382 uint32_t reserved : 8;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 383 } bit;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 384
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 385 } max30001_cnfg_gen;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 386
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 387
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 388 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 389 * @brief CNFG_CAL (0x12)
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 390 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 391 union max30001_cnfg_cal_reg {
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 392 uint32_t all;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 393 struct {
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 394 uint32_t thigh : 11;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 395 uint32_t fifty : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 396 uint32_t fcal : 3;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 397 uint32_t reserved1 : 5;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 398 uint32_t vmag : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 399 uint32_t vmode : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 400 uint32_t en_vcal : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 401 uint32_t reserved2 : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 402 uint32_t reserved : 8;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 403 } bit;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 404
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 405 } max30001_cnfg_cal;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 406
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 407 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 408 * @brief CNFG_EMUX (0x14)
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 409 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 410 union max30001_cnfg_emux_reg {
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 411 uint32_t all;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 412 struct {
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 413 uint32_t reserved1 : 16;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 414 uint32_t caln_sel : 2;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 415 uint32_t calp_sel : 2;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 416 uint32_t openn : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 417 uint32_t openp : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 418 uint32_t reserved2 : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 419 uint32_t pol : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 420 uint32_t reserved : 8;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 421 } bit;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 422
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 423 } max30001_cnfg_emux;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 424
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 425
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 426 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 427 * @brief CNFG_ECG (0x15)
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 428 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 429 union max30001_cnfg_ecg_reg {
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 430 uint32_t all;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 431 struct {
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 432 uint32_t reserved1 : 12;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 433 uint32_t dlpf : 2;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 434 uint32_t dhpf : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 435 uint32_t reserved2 : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 436 uint32_t gain : 2;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 437 uint32_t reserved3 : 4;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 438 uint32_t rate : 2;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 439
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 440 uint32_t reserved : 8;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 441 } bit;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 442
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 443 } max30001_cnfg_ecg;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 444
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 445 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 446 * @brief CNFG_BMUX (0x17)
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 447 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 448 union max30001_cnfg_bmux_reg {
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 449 uint32_t all;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 450 struct {
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 451 uint32_t fbist : 2;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 452 uint32_t reserved1 : 2;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 453 uint32_t rmod : 3;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 454 uint32_t reserved2 : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 455 uint32_t rnom : 3;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 456 uint32_t en_bist : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 457 uint32_t cg_mode : 2;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 458 uint32_t reserved3 : 2;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 459 uint32_t caln_sel : 2;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 460 uint32_t calp_sel : 2;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 461 uint32_t openn : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 462 uint32_t openp : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 463 uint32_t reserved4 : 2;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 464 uint32_t reserved : 8;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 465 } bit;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 466
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 467 } max30001_cnfg_bmux;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 468
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 469 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 470 * @brief CNFG_BIOZ (0x18)
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 471 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 472 union max30001_bioz_reg {
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 473 uint32_t all;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 474 struct {
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 475 uint32_t phoff : 4;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 476 uint32_t cgmag : 3;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 477 uint32_t cgmon : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 478 uint32_t fcgen : 4;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 479 uint32_t dlpf : 2;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 480 uint32_t dhpf : 2;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 481 uint32_t gain : 2;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 482 uint32_t inapow_mode : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 483 uint32_t ext_rbias : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 484 uint32_t ahpf : 3;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 485 uint32_t rate : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 486 uint32_t reserved : 8;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 487 } bit;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 488
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 489 } max30001_cnfg_bioz;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 490
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 491
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 492 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 493 * @brief CNFG_PACE (0x1A)
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 494 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 495 union max30001_cnfg_pace_reg {
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 496 uint32_t all;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 497
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 498 struct {
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 499 uint32_t dacn : 4;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 500 uint32_t dacp : 4;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 501 uint32_t reserved1 : 4;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 502 uint32_t aout : 2;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 503 uint32_t aout_lbw : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 504 uint32_t reserved2 : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 505 uint32_t gain : 3;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 506 uint32_t gn_diff_off : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 507 uint32_t reserved3 : 3;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 508 uint32_t pol : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 509 uint32_t reserved : 8;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 510 } bit;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 511
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 512 } max30001_cnfg_pace;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 513
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 514 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 515 * @brief CNFG_RTOR1 (0x1D)
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 516 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 517 union max30001_cnfg_rtor1_reg {
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 518 uint32_t all;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 519 struct {
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 520 uint32_t reserved1 : 8;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 521 uint32_t ptsf : 4;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 522 uint32_t pavg : 2;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 523 uint32_t reserved2 : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 524 uint32_t en_rtor : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 525 uint32_t gain : 4;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 526 uint32_t wndw : 4;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 527 uint32_t reserved : 8;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 528 } bit;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 529
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 530 } max30001_cnfg_rtor1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 531
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 532 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 533 * @brief CNFG_RTOR2 (0x1E)
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 534 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 535 union max30001_cnfg_rtor2_reg {
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 536 uint32_t all;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 537 struct {
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 538 uint32_t reserved1 : 8;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 539 uint32_t rhsf : 3;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 540 uint32_t reserved2 : 1;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 541 uint32_t ravg : 2;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 542 uint32_t reserved3 : 2;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 543 uint32_t hoff : 6;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 544 uint32_t reserved4 : 2;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 545 uint32_t reserved : 8;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 546 } bit;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 547
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 548 } max30001_cnfg_rtor2;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 549
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 550 /*********************************************************************************/
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 551
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 552 typedef enum {
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 553 MAX30001_NO_INT = 0, // No interrupt
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 554 MAX30001_INT_B = 1, // INTB selected for interrupt
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 555 MAX30001_INT_2B = 2 // INT2B selected for interrupt
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 556 } max30001_intrpt_Location_t;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 557
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 558 typedef enum {
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 559 MAX30001_INT_DISABLED = 0b00,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 560 MAX30001_INT_CMOS = 0b01,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 561 MAX30001_INT_ODN = 0b10,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 562 MAX30001_INT_ODNR = 0b11
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 563 } max30001_intrpt_type_t;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 564
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 565 typedef enum { // Input Polarity selection
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 566 MAX30001_NON_INV = 0, // Non-Inverted
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 567 MAX30001_INV = 1 // Inverted
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 568 } max30001_emux_pol;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 569
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 570 typedef enum { // OPENP and OPENN setting
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 571 MAX30001_ECG_CON_AFE = 0, // ECGx is connected to AFE channel
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 572 MAX30001_ECG_ISO_AFE = 1 // ECGx is isolated from AFE channel
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 573 } max30001_emux_openx;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 574
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 575 typedef enum { // EMUX_CALP_SEL & EMUX_CALN_SEL
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 576 MAX30001_NO_CAL_SIG = 0b00, // No calibration signal is applied
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 577 MAX30001_INPT_VMID = 0b01, // Input is connected to VMID
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 578 MAX30001_INPT_VCALP = 0b10, // Input is connected to VCALP
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 579 MAX30001_INPT_VCALN = 0b11 // Input is connected to VCALN
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 580 } max30001_emux_calx_sel;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 581
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 582 typedef enum { // EN_ECG, EN_BIOZ, EN_PACE
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 583 MAX30001_CHANNEL_DISABLED = 0b0, //
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 584 MAX30001_CHANNEL_ENABLED = 0b1
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 585 } max30001_en_feature;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 586
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 587 /*********************************************************************************/
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 588 // Data
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 589 uint32_t max30001_ECG_FIFO_buffer[32]; // (303 for internal test)
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 590 uint32_t max30001_BIOZ_FIFO_buffer[8]; // (303 for internal test)
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 591
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 592 uint32_t max30001_PACE[18]; // Pace Data 0-5
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 593
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 594 uint32_t max30001_RtoR_data; // This holds the RtoR data
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 595
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 596 uint32_t max30001_DCLeadOff; // This holds the LeadOff data, Last 4 bits give
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 597 // the status, BIT3=LOFF_PH, BIT2=LOFF_PL,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 598 // BIT1=LOFF_NH, BIT0=LOFF_NL
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 599 // 8th and 9th bits tell Lead off is due to ECG or BIOZ.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 600 // 0b01 = ECG Lead Off and 0b10 = BIOZ Lead off
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 601
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 602 uint32_t max30001_ACLeadOff; // This gives the state of the BIOZ AC Lead Off
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 603 // state. BIT 1 = BOVER, BIT 0 = BUNDR
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 604
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 605 uint32_t max30001_bcgmon; // This holds the BCGMON data, BIT 1 = BCGMP, BIT0 =
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 606 // BCGMN
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 607
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 608 uint32_t max30001_LeadOn; // This holds the LeadOn data, BIT1 = BIOZ Lead ON,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 609 // BIT0 = ECG Lead ON, BIT8= Lead On Status Bit
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 610
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 611 uint32_t max30001_timeout; // If the PLL does not respond, timeout and get out.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 612
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 613 typedef struct { // Creating a structure for BLE data
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 614 int16_t R2R;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 615 int16_t fmstr;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 616 } max30001_t;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 617
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 618 max30001_t hspValMax30001; // R2R, FMSTR
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 619
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 620 //jjj 14MAR17
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 621 //added DigitalOut so we can use any pin for cs
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 622 //jjj
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 623 MAX30001(SPI *spi, DigitalOut *cs);
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 624
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 625
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 626 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 627 * @brief Constructor that accepts pin names for the SPI interface
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 628 * @param mosi master out slave in pin name
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 629 * @param miso master in slave out pin name
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 630 * @param sclk serial clock pin name
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 631 * @param cs chip select pin name
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 632 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 633 MAX30001(PinName mosi, PinName miso, PinName sclk, PinName cs);
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 634
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 635 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 636 * MAX30001 destructor
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 637 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 638 ~MAX30001(void);
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 639
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 640 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 641 * @brief This function sets up the Resistive Bias mode and also selects the master clock frequency.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 642 * @brief Uses Register: CNFG_GEN-0x10
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 643 * @param En_rbias: Enable and Select Resitive Lead Bias Mode
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 644 * @param Rbiasv: Resistive Bias Mode Value Selection
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 645 * @param Rbiasp: Enables Resistive Bias on Positive Input
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 646 * @param Rbiasn: Enables Resistive Bias on Negative Input
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 647 * @param Fmstr: Selects Master Clock Frequency
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 648 * @returns 0-if no error. A non-zero value indicates an error.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 649 *
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 650 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 651 int max30001_Rbias_FMSTR_Init(uint8_t En_rbias, uint8_t Rbiasv,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 652 uint8_t Rbiasp, uint8_t Rbiasn, uint8_t Fmstr);
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 653
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 654 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 655 * @brief This function uses sets up the calibration signal internally. If it is desired to use the internal signal, then
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 656 * @brief this function must be called and the registers set, prior to setting the CALP_SEL and CALN_SEL in the ECG_InitStart
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 657 * @brief and BIOZ_InitStart functions.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 658 * @brief Uses Register: CNFG_CAL-0x12
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 659 * @param En_Vcal: Calibration Source (VCALP and VCALN) Enable
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 660 * @param Vmode: Calibration Source Mode Selection
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 661 * @param Vmag: Calibration Source Magnitude Selection (VMAG)
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 662 * @param Fcal: Calibration Source Frequency Selection (FCAL)
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 663 * @param Thigh: Calibration Source Time High Selection
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 664 * @param Fifty: Calibration Source Duty Cycle Mode Selection
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 665 * @returns 0-if no error. A non-zero value indicates an error.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 666 *
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 667 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 668 int max30001_CAL_InitStart(uint8_t En_Vcal, uint8_t Vmode, uint8_t Vmag,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 669 uint8_t Fcal, uint16_t Thigh, uint8_t Fifty);
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 670
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 671 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 672 * @brief This function disables the VCAL signal
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 673 * @returns 0-if no error. A non-zero value indicates an error.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 674 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 675 int max30001_CAL_Stop(void);
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 676
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 677 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 678 * @brief This function handles the assignment of the two interrupt pins (INTB & INT2B) with various
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 679 * @brief functions/behaviors of the MAX30001. Also, each pin can be configured for different drive capability.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 680 * @brief Uses Registers: EN_INT-0x02 and EN_INT2-0x03.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 681 * @param max30001_intrpt_Locatio_t <argument>: All the arguments with the aforementioned enumeration essentially
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 682 * can be configured to generate an interrupt on either INTB or INT2B or NONE.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 683 * @param max30001_intrpt_type_t intb_Type: INTB Port Type (EN_INT Selections).
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 684 * @param max30001_intrpt_type _t int2b_Type: INT2B Port Type (EN_INT2 Selections)
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 685 * @returns 0-if no error. A non-zero value indicates an error.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 686 *
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 687 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 688 int max30001_INT_assignment(max30001_intrpt_Location_t en_enint_loc, max30001_intrpt_Location_t en_eovf_loc, max30001_intrpt_Location_t en_fstint_loc,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 689 max30001_intrpt_Location_t en_dcloffint_loc, max30001_intrpt_Location_t en_bint_loc, max30001_intrpt_Location_t en_bovf_loc,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 690 max30001_intrpt_Location_t en_bover_loc, max30001_intrpt_Location_t en_bundr_loc, max30001_intrpt_Location_t en_bcgmon_loc,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 691 max30001_intrpt_Location_t en_pint_loc, max30001_intrpt_Location_t en_povf_loc, max30001_intrpt_Location_t en_pedge_loc,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 692 max30001_intrpt_Location_t en_lonint_loc, max30001_intrpt_Location_t en_rrint_loc, max30001_intrpt_Location_t en_samp_loc,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 693 max30001_intrpt_type_t intb_Type, max30001_intrpt_type_t int2b_Type);
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 694
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 695
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 696
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 697 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 698 * @brief For MAX30001/3 ONLY
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 699 * @brief This function sets up the MAX30001 for the ECG measurements.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 700 * @brief Registers used: CNFG_EMUX, CNFG_GEN, MNGR_INT, CNFG_ECG.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 701 * @param En_ecg: ECG Channel Enable <CNFG_GEN register bits>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 702 * @param Openp: Open the ECGN Input Switch (most often used for testing and calibration studies) <CNFG_EMUX register bits>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 703 * @param Openn: Open the ECGN Input Switch (most often used for testing and calibration studies) <CNFG_EMUX register bits>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 704 * @param Calp_sel: ECGP Calibration Selection <CNFG_EMUX register bits>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 705 * @param Caln_sel: ECGN Calibration Selection <CNFG_EMUX register bits>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 706 * @param E_fit: ECG FIFO Interrupt Threshold (issues EINT based on number of unread FIFO records) <CNFG_GEN register bits>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 707 * @param Clr_rrint: RTOR R Detect Interrupt (RRINT) Clear Behavior <CNFG_GEN register bits>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 708 * @param Rate: ECG Data Rate
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 709 * @param Gain: ECG Channel Gain Setting
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 710 * @param Dhpf: ECG Channel Digital High Pass Filter Cutoff Frequency
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 711 * @param Dlpf: ECG Channel Digital Low Pass Filter Cutoff Frequency
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 712 * @returns 0-if no error. A non-zero value indicates an error.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 713 *
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 714 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 715 int max30001_ECG_InitStart(uint8_t En_ecg, uint8_t Openp, uint8_t Openn,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 716 uint8_t Pol, uint8_t Calp_sel, uint8_t Caln_sel,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 717 uint8_t E_fit, uint8_t Rate, uint8_t Gain,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 718 uint8_t Dhpf, uint8_t Dlpf);
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 719
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 720 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 721 * @brief For MAX30001/3 ONLY
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 722 * @brief This function enables the Fast mode feature of the ECG.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 723 * @brief Registers used: MNGR_INT-0x04, MNGR_DYN-0x05
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 724 * @param Clr_Fast: FAST MODE Interrupt Clear Behavior <MNGR_INT Register>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 725 * @param Fast: ECG Channel Fast Recovery Mode Selection (ECG High Pass Filter Bypass) <MNGR_DYN Register>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 726 * @param Fast_Th: Automatic Fast Recovery Threshold
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 727 * @returns 0-if no error. A non-zero value indicates an error.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 728 *
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 729 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 730 int max30001_ECGFast_Init(uint8_t Clr_Fast, uint8_t Fast, uint8_t Fast_Th);
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 731
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 732 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 733 * @brief For MAX30001/3 ONLY
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 734 * @brief This function disables the ECG.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 735 * @brief Uses Register CNFG_GEN-0x10.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 736 * @returns 0-if no error. A non-zero value indicates an error.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 737 *
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 738 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 739 int max30001_Stop_ECG(void);
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 740
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 741 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 742 * @brief For MAX30001 ONLY
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 743 * @brief This function sets up the MAX30001 for pace signal detection.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 744 * @brief If both PACE and BIOZ are turned ON, then make sure Fcgen is set for 80K or 40K in the
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 745 * @brief max30001_BIOZ_InitStart() function. However, if Only PACE is on but BIOZ off, then Fcgen can be set
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 746 * @brief for 80K only, in the max30001_BIOZ_InitStart() function
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 747 * @brief Registers used: MNGR_INT-0x04, CNFG_GEN-0x37, CNFG_PACE-0x1A.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 748 * @param En_pace : PACE Channel Enable <CNFG_GEN Register>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 749 * @param Clr_pedge : PACE Edge Detect Interrupt (PEDGE) Clear Behavior <MNGR_INT Register>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 750 * @param Pol: PACE Input Polarity Selection <CNFG_PACE Register>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 751 * @param Gn_diff_off: PACE Differentiator Mode <CNFG_PACE Register>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 752 * @param Gain: PACE Channel Gain Selection <CNFG_PACE Register>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 753 * @param Aout_lbw: PACE Analog Output Buffer Bandwidth Mode <CNFG_PACE Register>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 754 * @param Aout: PACE Single Ended Analog Output Buffer Signal Monitoring Selection <CNFG_PACE Register>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 755 * @param Dacp (4bits): PACE Detector Positive Comparator Threshold <CNFG_PACE Register>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 756 * @param Dacn(4bits): PACE Detector Negative Comparator Threshold <CNFG_PACE Register>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 757 * @returns 0-if no error. A non-zero value indicates an error <CNFG_PACE Register>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 758 *
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 759 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 760 int max30001_PACE_InitStart(uint8_t En_pace, uint8_t Clr_pedge, uint8_t Pol,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 761 uint8_t Gn_diff_off, uint8_t Gain,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 762 uint8_t Aout_lbw, uint8_t Aout, uint8_t Dacp,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 763 uint8_t Dacn);
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 764
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 765 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 766 *@brief For MAX30001 ONLY
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 767 *@param This function disables the PACE. Uses Register CNFG_GEN-0x10.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 768 *@returns 0-if no error. A non-zero value indicates an error.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 769 *
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 770 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 771 int max30001_Stop_PACE(void);
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 772
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 773 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 774 * @brief For MAX30001/2 ONLY
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 775 * @brief This function sets up the MAX30001 for BIOZ measurement.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 776 * @brief Registers used: MNGR_INT-0x04, CNFG_GEN-0X10, CNFG_BMUX-0x17,CNFG_BIOZ-0x18.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 777 * @param En_bioz: BIOZ Channel Enable <CNFG_GEN Register>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 778 * @param Openp: Open the BIP Input Switch <CNFG_BMUX Register>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 779 * @param Openn: Open the BIN Input Switch <CNFG_BMUX Register>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 780 * @param Calp_sel: BIP Calibration Selection <CNFG_BMUX Register>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 781 * @param Caln_sel: BIN Calibration Selection <CNFG_BMUX Register>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 782 * @param CG_mode: BIOZ Current Generator Mode Selection <CNFG_BMUX Register>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 783 * @param B_fit: BIOZ FIFO Interrupt Threshold (issues BINT based on number of unread FIFO records) <MNGR_INT Register>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 784 * @param Rate: BIOZ Data Rate <CNFG_BIOZ Register>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 785 * @param Ahpf: BIOZ/PACE Channel Analog High Pass Filter Cutoff Frequency and Bypass <CNFG_BIOZ Register>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 786 * @param Ext_rbias: External Resistor Bias Enable <CNFG_BIOZ Register>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 787 * @param Gain: BIOZ Channel Gain Setting <CNFG_BIOZ Register>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 788 * @param Dhpf: BIOZ Channel Digital High Pass Filter Cutoff Frequency <CNFG_BIOZ Register>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 789 * @param Dlpf: BIOZ Channel Digital Low Pass Filter Cutoff Frequency <CNFG_BIOZ Register>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 790 * @param Fcgen: BIOZ Current Generator Modulation Frequency <CNFG_BIOZ Register>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 791 * @param Cgmon: BIOZ Current Generator Monitor <CNFG_BIOZ Register>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 792 * @param Cgmag: BIOZ Current Generator Magnitude <CNFG_BIOZ Register>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 793 * @param Phoff: BIOZ Current Generator Modulation Phase Offset <CNFG_BIOZ Register>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 794 * @param Inapow_mode: BIOZ Channel Instrumentation Amplifier (INA) Power Mode <CNFG_BIOZ Register>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 795 * @returns 0-if no error. A non-zero value indicates an error.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 796 *
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 797 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 798 int max30001_BIOZ_InitStart(uint8_t En_bioz, uint8_t Openp, uint8_t Openn,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 799 uint8_t Calp_sel, uint8_t Caln_sel,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 800 uint8_t CG_mode,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 801 /* uint8_t En_bioz,*/ uint8_t B_fit, uint8_t Rate,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 802 uint8_t Ahpf, uint8_t Ext_rbias, uint8_t Gain,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 803 uint8_t Dhpf, uint8_t Dlpf, uint8_t Fcgen,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 804 uint8_t Cgmon, uint8_t Cgmag, uint8_t Phoff, uint8_t Inapow_mode);
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 805
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 806 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 807 * @brief For MAX30001/2 ONLY
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 808 * @brief This function disables the BIOZ. Uses Register CNFG_GEN-0x10.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 809 * @returns 0-if no error. A non-zero value indicates an error.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 810 * @returns 0-if no error. A non-zero value indicates an error.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 811 *
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 812 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 813 int max30001_Stop_BIOZ(void);
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 814
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 815 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 816 * @brief For MAX30001/2 ONLY
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 817 * @brief BIOZ modulated Resistance Built-in-Self-Test, Registers used: CNFG_BMUX-0x17
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 818 * @param En_bist: Enable Modulated Resistance Built-in-Self-test <CNFG_BMUX Register>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 819 * @param Rnom: BIOZ RMOD BIST Nominal Resistance Selection <CNFG_BMUX Register>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 820 * @param Rmod: BIOZ RMOD BIST Modulated Resistance Selection <CNFG_BMUX Register>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 821 * @param Fbist: BIOZ RMOD BIST Frequency Selection <CNFG_BMUX Register>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 822 * @returns 0-if no error. A non-zero value indicates an error.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 823 *
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 824 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 825 int max30001_BIOZ_InitBist(uint8_t En_bist, uint8_t Rnom, uint8_t Rmod,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 826 uint8_t Fbist);
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 827
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 828 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 829 * @brief For MAX30001/3/4 ONLY
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 830 * @brief Sets up the device for RtoR measurement
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 831 * @param EN_rtor: ECG RTOR Detection Enable <RTOR1 Register>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 832 * @param Wndw: R to R Window Averaging (Window Width = RTOR_WNDW[3:0]*8mS) <RTOR1 Register>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 833 * @param Gain: R to R Gain (where Gain = 2^RTOR_GAIN[3:0], plus an auto-scale option) <RTOR1 Register>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 834 * @param Pavg: R to R Peak Averaging Weight Factor <RTOR1 Register>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 835 * @param Ptsf: R to R Peak Threshold Scaling Factor <RTOR1 Register>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 836 * @param Hoff: R to R minimum Hold Off <RTOR2 Register>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 837 * @param Ravg: R to R Interval Averaging Weight Factor <RTOR2 Register>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 838 * @param Rhsf: R to R Interval Hold Off Scaling Factor <RTOR2 Register>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 839 * @param Clr_rrint: RTOR Detect Interrupt Clear behaviour <MNGR_INT Register>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 840 * @returns 0-if no error. A non-zero value indicates an error.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 841 *
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 842 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 843 int max30001_RtoR_InitStart(uint8_t En_rtor, uint8_t Wndw, uint8_t Gain,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 844 uint8_t Pavg, uint8_t Ptsf, uint8_t Hoff,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 845 uint8_t Ravg, uint8_t Rhsf, uint8_t Clr_rrint);
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 846
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 847 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 848 * @brief For MAX30001/3/4 ONLY
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 849 * @brief This function disables the RtoR. Uses Register CNFG_RTOR1-0x1D
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 850 * @returns 0-if no error. A non-zero value indicates an error.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 851 *
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 852 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 853 int max30001_Stop_RtoR(void);
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 854
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 855 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 856 * @brief This is a function that waits for the PLL to lock; once a lock is achieved it exits out. (For convenience only)
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 857 * @returns 0-if no error. A non-zero value indicates an error.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 858 *
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 859 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 860 int max30001_PLL_lock(void);
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 861
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 862 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 863 * @brief This function causes the MAX30001 to reset. Uses Register SW_RST-0x08
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 864 * @return 0-if no error. A non-zero value indicates an error.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 865 *
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 866 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 867 int max30001_sw_rst(void);
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 868
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 869 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 870 * @brief This function provides a SYNCH operation. Uses Register SYCNH-0x09. Please refer to the data sheet for
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 871 * @brief the details on how to use this.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 872 * @returns 0-if no error. A non-zero value indicates an error.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 873 *
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 874 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 875 int max30001_synch(void);
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 876
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 877 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 878 * @brief This function performs a FIFO Reset. Uses Register FIFO_RST-0x0A. Please refer to the data sheet
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 879 * @brief for the details on how to use this.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 880 * @returns 0-if no error. A non-zero value indicates an error.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 881 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 882 int max300001_fifo_rst(void);
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 883
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 884 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 885 *
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 886 * @brief This is a callback function which collects all the data from the ECG, BIOZ, PACE and RtoR. It also handles
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 887 * @brief Lead On/Off. This function is passed through the argument of max30001_COMMinit().
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 888 * @returns 0-if no error. A non-zero value indicates an error.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 889 *
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 890 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 891 int max30001_int_handler(void);
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 892
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 893 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 894 * @brief This is function called from the max30001_int_handler() function and processes all the ECG, BIOZ, PACE
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 895 * @brief and the RtoR data and sticks them in appropriate arrays and variables each unsigned 32 bits.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 896 * @param ECG data will be in the array (input): max30001_ECG_FIFO_buffer[]
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 897 * @param Pace data will be in the array (input): max30001_PACE[]
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 898 * @param RtoRdata will be in the variable (input): max30001_RtoR_data
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 899 * @param BIOZ data will be in the array (input): max30001_BIOZ_FIFO_buffer[]
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 900 * @param global max30001_ECG_FIFO_buffer[]
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 901 * @param global max30001_PACE[]
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 902 * @param global max30001_BIOZ_FIFO_buffer[]
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 903 * @param global max30001_RtoR_data
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 904 * @param global max30001_DCLeadOff
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 905 * @param global max30001_ACLeadOff
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 906 * @param global max30001_LeadON
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 907 * @returns 0-if no error. A non-zero value indicates an error.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 908 *
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 909 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 910 int max30001_FIFO_LeadONOff_Read(void);
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 911
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 912 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 913 * @brief This function allows writing to a register.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 914 * @param addr: Address of the register to write to
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 915 * @param data: 24-bit data read from the register.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 916 * @returns 0-if no error. A non-zero value indicates an error.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 917 *
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 918 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 919 int max30001_reg_write(MAX30001_REG_map_t addr, uint32_t data);
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 920
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 921 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 922 * @brief This function allows reading from a register
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 923 * @param addr: Address of the register to read from.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 924 * @param *return_data: pointer to the value read from the register.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 925 * @returns 0-if no error. A non-zero value indicates an error.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 926 *
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 927 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 928 int max30001_reg_read(MAX30001_REG_map_t addr, uint32_t *return_data);
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 929
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 930 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 931 * @brief This function enables the DC Lead Off detection. Either ECG or BIOZ can be detected, one at a time.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 932 * @brief Registers Used: CNFG_GEN-0x10
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 933 * @param En_dcloff: BIOZ Digital Lead Off Detection Enable
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 934 * @param Ipol: DC Lead Off Current Polarity (if current sources are enabled/connected)
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 935 * @param Imag: DC Lead off current Magnitude Selection
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 936 * @param Vth: DC Lead Off Voltage Threshold Selection
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 937 * @returns 0-if no error. A non-zero value indicates an error.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 938 *
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 939 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 940 int max30001_Enable_DcLeadOFF_Init(int8_t En_dcloff, int8_t Ipol, int8_t Imag,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 941 int8_t Vth);
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 942
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 943 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 944 * @brief This function disables the DC Lead OFF feature, whichever is active.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 945 * @returns 0-if no error. A non-zero value indicates an error.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 946 *
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 947 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 948 int max30001_Disable_DcLeadOFF(void);
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 949
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 950 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 951 * @brief This function sets up the BIOZ for AC Lead Off test.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 952 * @brief Registers Used: CNFG_GEN-0x10, MNGR_DYN-0x05
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 953 * @param En_bloff: BIOZ Digital Lead Off Detection Enable <CNFG_GEN register>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 954 * @param Bloff_hi_it: DC Lead Off Current Polarity (if current sources are enabled/connected) <MNGR_DYN register>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 955 * @param Bloff_lo_it: DC Lead off current Magnitude Selection <MNGR_DYN register>
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 956 * @returns 0-if no error. A non-zero value indicates an error.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 957 *
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 958 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 959 int max30001_BIOZ_Enable_ACLeadOFF_Init(uint8_t En_bloff, uint8_t Bloff_hi_it,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 960 uint8_t Bloff_lo_it);
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 961
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 962 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 963 * @brief This function Turns of the BIOZ AC Lead OFF feature
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 964 * @brief Registers Used: CNFG_GEN-0x10
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 965 * @returns 0-if no error. A non-zero value indicates an error.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 966 *
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 967 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 968 int max30001_BIOZ_Disable_ACleadOFF(void);
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 969
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 970 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 971 * @brief This function enables the Current Gnerator Monitor
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 972 * @brief Registers Used: CNFG_BIOZ-0x18
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 973 * @returns 0-if no error. A non-zero value indicates an error.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 974 *
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 975 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 976 int max30001_BIOZ_Enable_BCGMON(void);
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 977
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 978 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 979 *
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 980 * @brief This function enables the Lead ON detection. Either ECG or BIOZ can be detected, one at a time.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 981 * @brief Also, the en_bioz, en_ecg, en_pace setting is saved so that when this feature is disabled through the
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 982 * @brief max30001_Disable_LeadON() function (or otherwise) the enable/disable state of those features can be retrieved.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 983 * @param Channel: ECG or BIOZ detection
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 984 * @returns 0-if everything is good. A non-zero value indicates an error.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 985 *
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 986 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 987 int max30001_Enable_LeadON(int8_t Channel);
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 988
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 989 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 990 * @brief This function turns off the Lead ON feature, whichever one is active. Also, retrieves the en_bioz,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 991 * @brief en_ecg, en_pace and sets it back to as it was.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 992 * @param 0-if everything is good. A non-zero value indicates an error.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 993 *
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 994 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 995 int max30001_Disable_LeadON(void);
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 996
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 997 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 998 *
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 999 * @brief This function is toggled every 2 seconds to switch between ECG Lead ON and BIOZ Lead ON detect
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1000 * @brief Adjust LEADOFF_SERVICE_TIME to determine the duration between the toggles.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1001 * @param CurrentTime - This gets fed the time by RTC_GetValue function
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1002 *
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1003 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1004 void max30001_ServiceLeadON(uint32_t currentTime);
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1005
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1006 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1007 *
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1008 * @brief This function is toggled every 2 seconds to switch between ECG DC Lead Off and BIOZ DC Lead Off
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1009 * @brief Adjust LEADOFF_SERVICE_TIME to determine the duration between the toggles.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1010 * @param CurrentTime - This gets fed the time by RTC_GetValue function
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1011 *
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1012 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1013 void max30001_ServiceLeadoff(uint32_t currentTime);
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1014
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1015 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1016 *
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1017 * @brief This function sets current RtoR values and fmstr values in a pointer structure
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1018 * @param hspValMax30001 - Pointer to a structure where to store the values
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1019 *
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1020 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1021 void max30001_ReadHeartrateData(max30001_t *_hspValMax30001);
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1022
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1023 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1024 * @brief type definition for data interrupt
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1025 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1026 typedef void (*PtrFunction)(uint32_t id, uint32_t *buffer, uint32_t length);
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1027
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1028 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1029 * @brief Used to connect a callback for when interrupt data is available
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1030 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1031 void onDataAvailable(PtrFunction _onDataAvailable);
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1032
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1033 static MAX30001 *instance;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1034
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1035 private:
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1036 void dataAvailable(uint32_t id, uint32_t *buffer, uint32_t length);
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1037 /// interrupt handler for async spi events
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1038 static void spiHandler(int events);
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1039 /// wrapper method to transmit and recieve SPI data
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1040 int SPI_Transmit(const uint8_t *tx_buf, uint32_t tx_size, uint8_t *rx_buf,
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1041 uint32_t rx_size);
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1042 uint32_t readPace(int group, uint8_t* result);
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1043
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1044 //jjj 14MAR17
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1045 //pointer to DigitalOut for cs
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1046 DigitalOut * m_cs;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1047 //jjj
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1048 /// pointer to mbed SPI object
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1049 SPI *m_spi;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1050 /// is this object the owner of the spi object
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1051 bool spi_owner;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1052 /// buffer to use for async transfers
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1053 uint8_t buffer[ASYNC_SPI_BUFFER_SIZE];
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1054 /// function pointer to the async callback
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1055 event_callback_t functionpointer;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1056 /// callback function when interrupt data is available
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1057 PtrFunction onDataAvailableCallback;
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1058
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1059 }; // End of MAX30001 Class
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1060
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1061 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1062 * @brief Preventive measure used to dismiss interrupts that fire too early during
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1063 * @brief initialization on INTB line
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1064 *
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1065 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1066 void MAX30001Mid_IntB_Handler(void);
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1067
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1068 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1069 * @brief Preventive measure used to dismiss interrupts that fire too early during
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1070 * @brief initialization on INT2B line
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1071 *
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1072 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1073 void MAX30001Mid_Int2B_Handler(void);
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1074
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1075 /**
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1076 * @brief Allows Interrupts to be accepted as valid.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1077 * @param state: 1-Allow interrupts, Any-Don't allow interrupts.
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1078 *
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1079 */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1080 void MAX30001_AllowInterrupts(int state);
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1081
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1082 #endif /* MAX30001_H_ */
Emre.Eken@IST-LT-35101.maxim-ic.internal 0:8e4630a71eb1 1083