Daniel Geonsi Jeong
MAX77801 Library. The MAX77801 is a high-current, high-efficiency buck-boost Regulator. The datasheet is available at https://datasheets.maximintegrated.com/en/ds/MAX77801.pdf. This library provides apis to control MAX77801.
Dependents: MAX77801_Demo MAX77801_Demo
max8971.h@1:96e05ce748c1, 2018-06-26 (annotated)
- Committer:
- daniel_gs_jeong
- Date:
- Tue Jun 26 08:05:21 2018 +0000
- Revision:
- 1:96e05ce748c1
MAX8971 1-Cell Li+ DC-DC Charger Driver. This Driver was tested using MAX32630FTHR Board.
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| daniel_gs_jeong | 1:96e05ce748c1 | 1 | /******************************************************************************* |
| daniel_gs_jeong | 1:96e05ce748c1 | 2 | * Copyright (C) 2018 Maxim Integrated Products, Inc., All Rights Reserved. |
| daniel_gs_jeong | 1:96e05ce748c1 | 3 | * |
| daniel_gs_jeong | 1:96e05ce748c1 | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| daniel_gs_jeong | 1:96e05ce748c1 | 5 | * copy of this software and associated documentation files (the "Software"), |
| daniel_gs_jeong | 1:96e05ce748c1 | 6 | * to deal in the Software without restriction, including without limitation |
| daniel_gs_jeong | 1:96e05ce748c1 | 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| daniel_gs_jeong | 1:96e05ce748c1 | 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| daniel_gs_jeong | 1:96e05ce748c1 | 9 | * Software is furnished to do so, subject to the following conditions: |
| daniel_gs_jeong | 1:96e05ce748c1 | 10 | * |
| daniel_gs_jeong | 1:96e05ce748c1 | 11 | * The above copyright notice and this permission notice shall be included |
| daniel_gs_jeong | 1:96e05ce748c1 | 12 | * in all copies or substantial portions of the Software. |
| daniel_gs_jeong | 1:96e05ce748c1 | 13 | * |
| daniel_gs_jeong | 1:96e05ce748c1 | 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
| daniel_gs_jeong | 1:96e05ce748c1 | 15 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| daniel_gs_jeong | 1:96e05ce748c1 | 16 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
| daniel_gs_jeong | 1:96e05ce748c1 | 17 | * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES |
| daniel_gs_jeong | 1:96e05ce748c1 | 18 | * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| daniel_gs_jeong | 1:96e05ce748c1 | 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| daniel_gs_jeong | 1:96e05ce748c1 | 20 | * OTHER DEALINGS IN THE SOFTWARE. |
| daniel_gs_jeong | 1:96e05ce748c1 | 21 | * |
| daniel_gs_jeong | 1:96e05ce748c1 | 22 | * Except as contained in this notice, the name of Maxim Integrated |
| daniel_gs_jeong | 1:96e05ce748c1 | 23 | * Products, Inc. shall not be used except as stated in the Maxim Integrated |
| daniel_gs_jeong | 1:96e05ce748c1 | 24 | * Products, Inc. Branding Policy. |
| daniel_gs_jeong | 1:96e05ce748c1 | 25 | * |
| daniel_gs_jeong | 1:96e05ce748c1 | 26 | * The mere transfer of this software does not imply any licenses |
| daniel_gs_jeong | 1:96e05ce748c1 | 27 | * of trade secrets, proprietary technology, copyrights, patents, |
| daniel_gs_jeong | 1:96e05ce748c1 | 28 | * trademarks, maskwork rights, or any other form of intellectual |
| daniel_gs_jeong | 1:96e05ce748c1 | 29 | * property whatsoever. Maxim Integrated Products, Inc. retains all |
| daniel_gs_jeong | 1:96e05ce748c1 | 30 | * ownership rights. |
| daniel_gs_jeong | 1:96e05ce748c1 | 31 | ******************************************************************************* |
| daniel_gs_jeong | 1:96e05ce748c1 | 32 | */ |
| daniel_gs_jeong | 1:96e05ce748c1 | 33 | #ifndef _max8971_H_ |
| daniel_gs_jeong | 1:96e05ce748c1 | 34 | #define _max8971_H_ |
| daniel_gs_jeong | 1:96e05ce748c1 | 35 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 36 | #include "mbed.h" |
| daniel_gs_jeong | 1:96e05ce748c1 | 37 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 38 | class MAX8971 |
| daniel_gs_jeong | 1:96e05ce748c1 | 39 | { |
| daniel_gs_jeong | 1:96e05ce748c1 | 40 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 41 | public: |
| daniel_gs_jeong | 1:96e05ce748c1 | 42 | /** |
| daniel_gs_jeong | 1:96e05ce748c1 | 43 | * @brief Register Addresses |
| daniel_gs_jeong | 1:96e05ce748c1 | 44 | * @details Enumerated max8971 register addresses |
| daniel_gs_jeong | 1:96e05ce748c1 | 45 | */ |
| daniel_gs_jeong | 1:96e05ce748c1 | 46 | typedef enum { |
| daniel_gs_jeong | 1:96e05ce748c1 | 47 | REG_CHGINT_INT = 0x0F, |
| daniel_gs_jeong | 1:96e05ce748c1 | 48 | REG_CHGINT_MASK = 0x01, |
| daniel_gs_jeong | 1:96e05ce748c1 | 49 | REG_CHG_STAT, |
| daniel_gs_jeong | 1:96e05ce748c1 | 50 | REG_DETAILS1, |
| daniel_gs_jeong | 1:96e05ce748c1 | 51 | REG_DETAILS2, |
| daniel_gs_jeong | 1:96e05ce748c1 | 52 | REG_CHGCNTL1, |
| daniel_gs_jeong | 1:96e05ce748c1 | 53 | REG_FCHGCRNT, |
| daniel_gs_jeong | 1:96e05ce748c1 | 54 | REG_DCCRNT, |
| daniel_gs_jeong | 1:96e05ce748c1 | 55 | REG_TOPOFF, |
| daniel_gs_jeong | 1:96e05ce748c1 | 56 | REG_TEMPREG, |
| daniel_gs_jeong | 1:96e05ce748c1 | 57 | REG_PROTCMD |
| daniel_gs_jeong | 1:96e05ce748c1 | 58 | } registers_t; |
| daniel_gs_jeong | 1:96e05ce748c1 | 59 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 60 | /** |
| daniel_gs_jeong | 1:96e05ce748c1 | 61 | * @brief Interrupt Unmasked/Masked |
| daniel_gs_jeong | 1:96e05ce748c1 | 62 | * @details Enumerated Interrupt Unmasked/Masked |
| daniel_gs_jeong | 1:96e05ce748c1 | 63 | */ |
| daniel_gs_jeong | 1:96e05ce748c1 | 64 | typedef enum { |
| daniel_gs_jeong | 1:96e05ce748c1 | 65 | VAL_INT_UNMASKED = 0x00, |
| daniel_gs_jeong | 1:96e05ce748c1 | 66 | VAL_INT_MASKED |
| daniel_gs_jeong | 1:96e05ce748c1 | 67 | } int_mask_t; |
| daniel_gs_jeong | 1:96e05ce748c1 | 68 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 69 | /** |
| daniel_gs_jeong | 1:96e05ce748c1 | 70 | * @brief Interrupt Unmasked/Masked |
| daniel_gs_jeong | 1:96e05ce748c1 | 71 | * @details Enumerated Interrupt Unmasked/Masked |
| daniel_gs_jeong | 1:96e05ce748c1 | 72 | */ |
| daniel_gs_jeong | 1:96e05ce748c1 | 73 | typedef enum { |
| daniel_gs_jeong | 1:96e05ce748c1 | 74 | VAL_AICL_I_BIT = 7, |
| daniel_gs_jeong | 1:96e05ce748c1 | 75 | VAL_TOP_OFF_BIT = 6, |
| daniel_gs_jeong | 1:96e05ce748c1 | 76 | VAL_DC_OVP_BIT = 5, |
| daniel_gs_jeong | 1:96e05ce748c1 | 77 | VAL_DC_UVP_BIT = 4, |
| daniel_gs_jeong | 1:96e05ce748c1 | 78 | VAL_CHG_I_BIT = 3, |
| daniel_gs_jeong | 1:96e05ce748c1 | 79 | VAL_BAT_I_BIT = 2, |
| daniel_gs_jeong | 1:96e05ce748c1 | 80 | VAL_THM_I_BIT = 1, |
| daniel_gs_jeong | 1:96e05ce748c1 | 81 | VAL_POWERUP_BIT = 0, |
| daniel_gs_jeong | 1:96e05ce748c1 | 82 | } int_bit_t; |
| daniel_gs_jeong | 1:96e05ce748c1 | 83 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 84 | /** |
| daniel_gs_jeong | 1:96e05ce748c1 | 85 | * @brief ENABLE/DISABLE |
| daniel_gs_jeong | 1:96e05ce748c1 | 86 | * @details Enumerated ENABLE/DISABLE |
| daniel_gs_jeong | 1:96e05ce748c1 | 87 | */ |
| daniel_gs_jeong | 1:96e05ce748c1 | 88 | typedef enum { |
| daniel_gs_jeong | 1:96e05ce748c1 | 89 | VAL_DISABLE = 0x00, |
| daniel_gs_jeong | 1:96e05ce748c1 | 90 | VAL_ENABLE |
| daniel_gs_jeong | 1:96e05ce748c1 | 91 | } enable_t; |
| daniel_gs_jeong | 1:96e05ce748c1 | 92 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 93 | /** |
| daniel_gs_jeong | 1:96e05ce748c1 | 94 | * @brief Fast Charge Timer |
| daniel_gs_jeong | 1:96e05ce748c1 | 95 | * @details Enumerated Fast Charge Timer Duration |
| daniel_gs_jeong | 1:96e05ce748c1 | 96 | */ |
| daniel_gs_jeong | 1:96e05ce748c1 | 97 | typedef enum { |
| daniel_gs_jeong | 1:96e05ce748c1 | 98 | VAL_FC_TIMER_DISABLE = 0x00, |
| daniel_gs_jeong | 1:96e05ce748c1 | 99 | VAL_FC_TIMER_4_HOURS, |
| daniel_gs_jeong | 1:96e05ce748c1 | 100 | VAL_FC_TIMER_5_HOURS, |
| daniel_gs_jeong | 1:96e05ce748c1 | 101 | VAL_FC_TIMER_6_HOURS, |
| daniel_gs_jeong | 1:96e05ce748c1 | 102 | VAL_FC_TIMER_7_HOURS, |
| daniel_gs_jeong | 1:96e05ce748c1 | 103 | VAL_FC_TIMER_8_HOURS, |
| daniel_gs_jeong | 1:96e05ce748c1 | 104 | VAL_FC_TIMER_9_HOURS, |
| daniel_gs_jeong | 1:96e05ce748c1 | 105 | VAL_FC_TIMER_10_HOURS |
| daniel_gs_jeong | 1:96e05ce748c1 | 106 | } fast_charge_timer_t; |
| daniel_gs_jeong | 1:96e05ce748c1 | 107 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 108 | /** |
| daniel_gs_jeong | 1:96e05ce748c1 | 109 | * @brief Fast Charge Restart Threshold |
| daniel_gs_jeong | 1:96e05ce748c1 | 110 | * @details Enumerated Fast Charge Restart Threshold |
| daniel_gs_jeong | 1:96e05ce748c1 | 111 | */ |
| daniel_gs_jeong | 1:96e05ce748c1 | 112 | typedef enum { |
| daniel_gs_jeong | 1:96e05ce748c1 | 113 | VAL_FC_RESTART_MINUS_150mV = 0x00, |
| daniel_gs_jeong | 1:96e05ce748c1 | 114 | VAL_FC_RESTART_MINUS_100mV, |
| daniel_gs_jeong | 1:96e05ce748c1 | 115 | } fast_charge_restart_threshold_t; |
| daniel_gs_jeong | 1:96e05ce748c1 | 116 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 117 | /** |
| daniel_gs_jeong | 1:96e05ce748c1 | 118 | * @brief Topoff timer |
| daniel_gs_jeong | 1:96e05ce748c1 | 119 | * @details Enumerated Topoff Timer |
| daniel_gs_jeong | 1:96e05ce748c1 | 120 | */ |
| daniel_gs_jeong | 1:96e05ce748c1 | 121 | typedef enum { |
| daniel_gs_jeong | 1:96e05ce748c1 | 122 | VAL_TOPOFF_TIMER_0_MIN = 0x00, |
| daniel_gs_jeong | 1:96e05ce748c1 | 123 | VAL_TOPOFF_TIMER_10_MIN, |
| daniel_gs_jeong | 1:96e05ce748c1 | 124 | VAL_TOPOFF_TIMER_20_MIN, |
| daniel_gs_jeong | 1:96e05ce748c1 | 125 | VAL_TOPOFF_TIMER_30_MIN, |
| daniel_gs_jeong | 1:96e05ce748c1 | 126 | VAL_TOPOFF_TIMER_40_MIN, |
| daniel_gs_jeong | 1:96e05ce748c1 | 127 | VAL_TOPOFF_TIMER_50_MIN, |
| daniel_gs_jeong | 1:96e05ce748c1 | 128 | VAL_TOPOFF_TIMER_60_MIN, |
| daniel_gs_jeong | 1:96e05ce748c1 | 129 | VAL_TOPOFF_TIMER_70_MIN |
| daniel_gs_jeong | 1:96e05ce748c1 | 130 | } top_off_timer_t; |
| daniel_gs_jeong | 1:96e05ce748c1 | 131 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 132 | /** |
| daniel_gs_jeong | 1:96e05ce748c1 | 133 | * @brief Topoff Current Threshold |
| daniel_gs_jeong | 1:96e05ce748c1 | 134 | * @details Enumerated Topoff Current Threshold |
| daniel_gs_jeong | 1:96e05ce748c1 | 135 | */ |
| daniel_gs_jeong | 1:96e05ce748c1 | 136 | typedef enum { |
| daniel_gs_jeong | 1:96e05ce748c1 | 137 | VAL_TOPOFF_CURRENT_TH_50_mA = 0x00, |
| daniel_gs_jeong | 1:96e05ce748c1 | 138 | VAL_TOPOFF_CURRENT_TH_100_mA, |
| daniel_gs_jeong | 1:96e05ce748c1 | 139 | VAL_TOPOFF_CURRENT_TH_150_mA, |
| daniel_gs_jeong | 1:96e05ce748c1 | 140 | VAL_TOPOFF_CURRENT_TH_200_mA |
| daniel_gs_jeong | 1:96e05ce748c1 | 141 | } top_off_current_threshold_t; |
| daniel_gs_jeong | 1:96e05ce748c1 | 142 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 143 | /** |
| daniel_gs_jeong | 1:96e05ce748c1 | 144 | * @brief Charge Termination Voltage |
| daniel_gs_jeong | 1:96e05ce748c1 | 145 | * @details Enumerated Charge Termination Voltage |
| daniel_gs_jeong | 1:96e05ce748c1 | 146 | */ |
| daniel_gs_jeong | 1:96e05ce748c1 | 147 | typedef enum { |
| daniel_gs_jeong | 1:96e05ce748c1 | 148 | VAL_CHARGE_TERM_4200_mV = 0x00, |
| daniel_gs_jeong | 1:96e05ce748c1 | 149 | VAL_CHARGE_TERM_4100_mV, |
| daniel_gs_jeong | 1:96e05ce748c1 | 150 | VAL_CHARGE_TERM_4350_mV, |
| daniel_gs_jeong | 1:96e05ce748c1 | 151 | VAL_CHARGE_TERM_4150_mV |
| daniel_gs_jeong | 1:96e05ce748c1 | 152 | } charger_termination_voltage_t; |
| daniel_gs_jeong | 1:96e05ce748c1 | 153 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 154 | /** |
| daniel_gs_jeong | 1:96e05ce748c1 | 155 | * @brief Die Temperature Thermal Regualation Loop Set Point |
| daniel_gs_jeong | 1:96e05ce748c1 | 156 | * @details Enumerated Die Temperature Thermal Regualation Loop Set Point |
| daniel_gs_jeong | 1:96e05ce748c1 | 157 | */ |
| daniel_gs_jeong | 1:96e05ce748c1 | 158 | typedef enum { |
| daniel_gs_jeong | 1:96e05ce748c1 | 159 | VAL_DIE_TEMP_REG_POINT_105_DEG = 0x00, |
| daniel_gs_jeong | 1:96e05ce748c1 | 160 | VAL_DIE_TEMP_REG_POINT_90_DEG, |
| daniel_gs_jeong | 1:96e05ce748c1 | 161 | VAL_DIE_TEMP_REG_POINT_120_DEG, |
| daniel_gs_jeong | 1:96e05ce748c1 | 162 | VAL_DIE_TEMP_REG_POINT_DISABLE, |
| daniel_gs_jeong | 1:96e05ce748c1 | 163 | } die_temp_reggulation_point_t; |
| daniel_gs_jeong | 1:96e05ce748c1 | 164 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 165 | /** |
| daniel_gs_jeong | 1:96e05ce748c1 | 166 | * @brief Thermistor Monitor Configuration |
| daniel_gs_jeong | 1:96e05ce748c1 | 167 | * @details Enumerated Thermistor Monitor Configuration |
| daniel_gs_jeong | 1:96e05ce748c1 | 168 | */ |
| daniel_gs_jeong | 1:96e05ce748c1 | 169 | typedef enum { |
| daniel_gs_jeong | 1:96e05ce748c1 | 170 | VAL_THERMISTOR_MONITOR_ENABLE = 0x00, |
| daniel_gs_jeong | 1:96e05ce748c1 | 171 | VAL_THERMISTOR_MONITOR_DISABLE, |
| daniel_gs_jeong | 1:96e05ce748c1 | 172 | } thermistor_monitor_config_t; |
| daniel_gs_jeong | 1:96e05ce748c1 | 173 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 174 | /** |
| daniel_gs_jeong | 1:96e05ce748c1 | 175 | * @brief JEITA Safety |
| daniel_gs_jeong | 1:96e05ce748c1 | 176 | * @details Enumerated JEITA Safety Region Selection |
| daniel_gs_jeong | 1:96e05ce748c1 | 177 | */ |
| daniel_gs_jeong | 1:96e05ce748c1 | 178 | typedef enum { |
| daniel_gs_jeong | 1:96e05ce748c1 | 179 | VAL_JEITA_SAFETY_REGION_1 = 0x00, |
| daniel_gs_jeong | 1:96e05ce748c1 | 180 | VAL_JEITA_SAFETY_REGION_2, |
| daniel_gs_jeong | 1:96e05ce748c1 | 181 | } jeita_safety_selection_t; |
| daniel_gs_jeong | 1:96e05ce748c1 | 182 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 183 | /** |
| daniel_gs_jeong | 1:96e05ce748c1 | 184 | * @brief Charger Setting Protection |
| daniel_gs_jeong | 1:96e05ce748c1 | 185 | * @details Enumerated Charger Setting Protection |
| daniel_gs_jeong | 1:96e05ce748c1 | 186 | */ |
| daniel_gs_jeong | 1:96e05ce748c1 | 187 | typedef enum { |
| daniel_gs_jeong | 1:96e05ce748c1 | 188 | VAL_CHARGER_SETTING_LOCKED = 0x00, |
| daniel_gs_jeong | 1:96e05ce748c1 | 189 | VAL_CHARGER_SETTING_UNLOCKED = 0x03 |
| daniel_gs_jeong | 1:96e05ce748c1 | 190 | } charger_setting_protection_t; |
| daniel_gs_jeong | 1:96e05ce748c1 | 191 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 192 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 193 | /** |
| daniel_gs_jeong | 1:96e05ce748c1 | 194 | * max8971 constructor. |
| daniel_gs_jeong | 1:96e05ce748c1 | 195 | * |
| daniel_gs_jeong | 1:96e05ce748c1 | 196 | * @param i2c I2C object to use. |
| daniel_gs_jeong | 1:96e05ce748c1 | 197 | */ |
| daniel_gs_jeong | 1:96e05ce748c1 | 198 | MAX8971(I2C *i2c); |
| daniel_gs_jeong | 1:96e05ce748c1 | 199 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 200 | /** |
| daniel_gs_jeong | 1:96e05ce748c1 | 201 | * max8971 destructor. |
| daniel_gs_jeong | 1:96e05ce748c1 | 202 | */ |
| daniel_gs_jeong | 1:96e05ce748c1 | 203 | ~MAX8971(); |
| daniel_gs_jeong | 1:96e05ce748c1 | 204 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 205 | /** |
| daniel_gs_jeong | 1:96e05ce748c1 | 206 | * @brief Initialize max8971 |
| daniel_gs_jeong | 1:96e05ce748c1 | 207 | */ |
| daniel_gs_jeong | 1:96e05ce748c1 | 208 | int32_t init(); |
| daniel_gs_jeong | 1:96e05ce748c1 | 209 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 210 | /** |
| daniel_gs_jeong | 1:96e05ce748c1 | 211 | * @brief Write Register |
| daniel_gs_jeong | 1:96e05ce748c1 | 212 | * @details Writes data to max8971 register |
| daniel_gs_jeong | 1:96e05ce748c1 | 213 | * |
| daniel_gs_jeong | 1:96e05ce748c1 | 214 | * @param reg_addr Register to write |
| daniel_gs_jeong | 1:96e05ce748c1 | 215 | * @param reg_data Data to write |
| daniel_gs_jeong | 1:96e05ce748c1 | 216 | * @returns 0 if no errors, -1 if error. |
| daniel_gs_jeong | 1:96e05ce748c1 | 217 | */ |
| daniel_gs_jeong | 1:96e05ce748c1 | 218 | int32_t write_register(MAX8971::registers_t reg_addr, char reg_data); |
| daniel_gs_jeong | 1:96e05ce748c1 | 219 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 220 | /** |
| daniel_gs_jeong | 1:96e05ce748c1 | 221 | * @brief Read Register |
| daniel_gs_jeong | 1:96e05ce748c1 | 222 | * @details Reads data from max8971 register |
| daniel_gs_jeong | 1:96e05ce748c1 | 223 | * |
| daniel_gs_jeong | 1:96e05ce748c1 | 224 | * @param reg_addr Register to read |
| daniel_gs_jeong | 1:96e05ce748c1 | 225 | * @returns data if no errors, -1 if error. |
| daniel_gs_jeong | 1:96e05ce748c1 | 226 | */ |
| daniel_gs_jeong | 1:96e05ce748c1 | 227 | int32_t read_register(MAX8971::registers_t reg_addr); |
| daniel_gs_jeong | 1:96e05ce748c1 | 228 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 229 | /** |
| daniel_gs_jeong | 1:96e05ce748c1 | 230 | * @brief Update Register data |
| daniel_gs_jeong | 1:96e05ce748c1 | 231 | * @details Update bits data of a register |
| daniel_gs_jeong | 1:96e05ce748c1 | 232 | * |
| daniel_gs_jeong | 1:96e05ce748c1 | 233 | * @param reg_no Register Number to be updated |
| daniel_gs_jeong | 1:96e05ce748c1 | 234 | * @param mask Mask Data |
| daniel_gs_jeong | 1:96e05ce748c1 | 235 | * @param reg_data bit data |
| daniel_gs_jeong | 1:96e05ce748c1 | 236 | * @returns 0 if no errors, -1 if error. |
| daniel_gs_jeong | 1:96e05ce748c1 | 237 | */ |
| daniel_gs_jeong | 1:96e05ce748c1 | 238 | int32_t update_register |
| daniel_gs_jeong | 1:96e05ce748c1 | 239 | (MAX8971::registers_t reg_no, char reg_mask, char reg_data); |
| daniel_gs_jeong | 1:96e05ce748c1 | 240 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 241 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 242 | /** |
| daniel_gs_jeong | 1:96e05ce748c1 | 243 | * @brief Get Interrupt |
| daniel_gs_jeong | 1:96e05ce748c1 | 244 | * @details Get status register data |
| daniel_gs_jeong | 1:96e05ce748c1 | 245 | * BIT7 : AICL_I DC Interrupt |
| daniel_gs_jeong | 1:96e05ce748c1 | 246 | * BIT6 : TOPOFF Topoff Interrupt |
| daniel_gs_jeong | 1:96e05ce748c1 | 247 | * BIT5 : DC Overvolatage Interrupt |
| daniel_gs_jeong | 1:96e05ce748c1 | 248 | * BIT4 : DC Undervoltage Interrupt |
| daniel_gs_jeong | 1:96e05ce748c1 | 249 | * BIT3 : Charge Current Interrupt |
| daniel_gs_jeong | 1:96e05ce748c1 | 250 | * BIT2 : Battery Interrupt |
| daniel_gs_jeong | 1:96e05ce748c1 | 251 | * BIT1 : Thermistor Interrupt |
| daniel_gs_jeong | 1:96e05ce748c1 | 252 | * BIT0 : Power-Up OK Interrupt |
| daniel_gs_jeong | 1:96e05ce748c1 | 253 | * @param None |
| daniel_gs_jeong | 1:96e05ce748c1 | 254 | * @returns Interrupt register data. |
| daniel_gs_jeong | 1:96e05ce748c1 | 255 | */ |
| daniel_gs_jeong | 1:96e05ce748c1 | 256 | int32_t get_interrupt(); |
| daniel_gs_jeong | 1:96e05ce748c1 | 257 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 258 | /** |
| daniel_gs_jeong | 1:96e05ce748c1 | 259 | * @brief Set Interrupt Mask |
| daniel_gs_jeong | 1:96e05ce748c1 | 260 | * @details Get status register data |
| daniel_gs_jeong | 1:96e05ce748c1 | 261 | * BIT7 : AICL_I DC Interrupt |
| daniel_gs_jeong | 1:96e05ce748c1 | 262 | * BIT6 : TOPOFF Topoff Interrupt |
| daniel_gs_jeong | 1:96e05ce748c1 | 263 | * BIT5 : DC Overvolatage Interrupt |
| daniel_gs_jeong | 1:96e05ce748c1 | 264 | * BIT4 : DC Undervoltage Interrupt |
| daniel_gs_jeong | 1:96e05ce748c1 | 265 | * BIT3 : Charge Current Interrupt |
| daniel_gs_jeong | 1:96e05ce748c1 | 266 | * BIT2 : Battery Interrupt |
| daniel_gs_jeong | 1:96e05ce748c1 | 267 | * BIT1 : Thermistor Interrupt |
| daniel_gs_jeong | 1:96e05ce748c1 | 268 | * BIT0 : Reserved |
| daniel_gs_jeong | 1:96e05ce748c1 | 269 | * @param Register Number, Interrupt Bit |
| daniel_gs_jeong | 1:96e05ce748c1 | 270 | * @returns Interrupt register data. |
| daniel_gs_jeong | 1:96e05ce748c1 | 271 | */ |
| daniel_gs_jeong | 1:96e05ce748c1 | 272 | int32_t set_interrupt_mask |
| daniel_gs_jeong | 1:96e05ce748c1 | 273 | (MAX8971::registers_t reg_no, MAX8971::int_bit_t interrupt_bit); |
| daniel_gs_jeong | 1:96e05ce748c1 | 274 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 275 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 276 | /** |
| daniel_gs_jeong | 1:96e05ce748c1 | 277 | * @brief Set Interrupt UnMask |
| daniel_gs_jeong | 1:96e05ce748c1 | 278 | * @details Get status register data |
| daniel_gs_jeong | 1:96e05ce748c1 | 279 | * BIT7 : AICL_I DC Interrupt |
| daniel_gs_jeong | 1:96e05ce748c1 | 280 | * BIT6 : TOPOFF Topoff Interrupt |
| daniel_gs_jeong | 1:96e05ce748c1 | 281 | * BIT5 : DC Overvolatage Interrupt |
| daniel_gs_jeong | 1:96e05ce748c1 | 282 | * BIT4 : DC Undervoltage Interrupt |
| daniel_gs_jeong | 1:96e05ce748c1 | 283 | * BIT3 : Charge Current Interrupt |
| daniel_gs_jeong | 1:96e05ce748c1 | 284 | * BIT2 : Battery Interrupt |
| daniel_gs_jeong | 1:96e05ce748c1 | 285 | * BIT1 : Thermistor Interrupt |
| daniel_gs_jeong | 1:96e05ce748c1 | 286 | * BIT0 : Reserved |
| daniel_gs_jeong | 1:96e05ce748c1 | 287 | * @param Register Number, Interrupt Bit |
| daniel_gs_jeong | 1:96e05ce748c1 | 288 | * @returns Interrupt register data. |
| daniel_gs_jeong | 1:96e05ce748c1 | 289 | */ |
| daniel_gs_jeong | 1:96e05ce748c1 | 290 | int32_t set_interrupt_unmask |
| daniel_gs_jeong | 1:96e05ce748c1 | 291 | (MAX8971::registers_t reg_no, MAX8971::int_bit_t interrupt_bit); |
| daniel_gs_jeong | 1:96e05ce748c1 | 292 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 293 | /** |
| daniel_gs_jeong | 1:96e05ce748c1 | 294 | * @brief Get status |
| daniel_gs_jeong | 1:96e05ce748c1 | 295 | * @details Get status register data |
| daniel_gs_jeong | 1:96e05ce748c1 | 296 | * BIT7 : DCV_OK DC Input Voltage Status |
| daniel_gs_jeong | 1:96e05ce748c1 | 297 | * BIT6 : DCI_OK DC Input Current Status |
| daniel_gs_jeong | 1:96e05ce748c1 | 298 | * BIT5 : DCOVP_OK DC OVP Status |
| daniel_gs_jeong | 1:96e05ce748c1 | 299 | * BIT4 : DCUVP_OK DC UVP Status |
| daniel_gs_jeong | 1:96e05ce748c1 | 300 | * BIT3 : CHG_OK Charger Status |
| daniel_gs_jeong | 1:96e05ce748c1 | 301 | * BIT2 : BAT_OK Battery Status |
| daniel_gs_jeong | 1:96e05ce748c1 | 302 | * BIT1 : THM_OK Thermistor Status |
| daniel_gs_jeong | 1:96e05ce748c1 | 303 | * BIT0 : RESERVED |
| daniel_gs_jeong | 1:96e05ce748c1 | 304 | * @param None |
| daniel_gs_jeong | 1:96e05ce748c1 | 305 | * @returns status register data. |
| daniel_gs_jeong | 1:96e05ce748c1 | 306 | */ |
| daniel_gs_jeong | 1:96e05ce748c1 | 307 | int32_t get_status(); |
| daniel_gs_jeong | 1:96e05ce748c1 | 308 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 309 | /** |
| daniel_gs_jeong | 1:96e05ce748c1 | 310 | * @brief Get Details 1 |
| daniel_gs_jeong | 1:96e05ce748c1 | 311 | * @details Get Details 1 register data |
| daniel_gs_jeong | 1:96e05ce748c1 | 312 | * BIT7 : DC Details |
| daniel_gs_jeong | 1:96e05ce748c1 | 313 | * BIT6 : DC Current |
| daniel_gs_jeong | 1:96e05ce748c1 | 314 | * BIT5 : DC OVP |
| daniel_gs_jeong | 1:96e05ce748c1 | 315 | * BIT4 : DC UVP |
| daniel_gs_jeong | 1:96e05ce748c1 | 316 | * BIT3 : RESERVED |
| daniel_gs_jeong | 1:96e05ce748c1 | 317 | * BIT2-0 : Thermistor Details |
| daniel_gs_jeong | 1:96e05ce748c1 | 318 | * @param None |
| daniel_gs_jeong | 1:96e05ce748c1 | 319 | * @returns status register data. |
| daniel_gs_jeong | 1:96e05ce748c1 | 320 | */ |
| daniel_gs_jeong | 1:96e05ce748c1 | 321 | int32_t get_details1(); |
| daniel_gs_jeong | 1:96e05ce748c1 | 322 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 323 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 324 | /** |
| daniel_gs_jeong | 1:96e05ce748c1 | 325 | * @brief Get Details 2 |
| daniel_gs_jeong | 1:96e05ce748c1 | 326 | * @details Get Details 2 register data |
| daniel_gs_jeong | 1:96e05ce748c1 | 327 | * BIT7-6 : Reserved |
| daniel_gs_jeong | 1:96e05ce748c1 | 328 | * BIT5-4 : Battery Details |
| daniel_gs_jeong | 1:96e05ce748c1 | 329 | * BIT3-0 : Charger Details |
| daniel_gs_jeong | 1:96e05ce748c1 | 330 | * @param None |
| daniel_gs_jeong | 1:96e05ce748c1 | 331 | * @returns status details 2 register data. |
| daniel_gs_jeong | 1:96e05ce748c1 | 332 | */ |
| daniel_gs_jeong | 1:96e05ce748c1 | 333 | int32_t get_details2(); |
| daniel_gs_jeong | 1:96e05ce748c1 | 334 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 335 | /** |
| daniel_gs_jeong | 1:96e05ce748c1 | 336 | * @brief Set DCMON_DIS |
| daniel_gs_jeong | 1:96e05ce748c1 | 337 | * @details Set to disable the monitoring of input voltage |
| daniel_gs_jeong | 1:96e05ce748c1 | 338 | * by the input power limiter |
| daniel_gs_jeong | 1:96e05ce748c1 | 339 | * @param None |
| daniel_gs_jeong | 1:96e05ce748c1 | 340 | * @returns DCMON_DIS bit data. |
| daniel_gs_jeong | 1:96e05ce748c1 | 341 | */ |
| daniel_gs_jeong | 1:96e05ce748c1 | 342 | int32_t set_disable_dc_monitor(); |
| daniel_gs_jeong | 1:96e05ce748c1 | 343 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 344 | /** |
| daniel_gs_jeong | 1:96e05ce748c1 | 345 | * @brief UnSet DCMON_DIS |
| daniel_gs_jeong | 1:96e05ce748c1 | 346 | * @details UnSet to enable the monitoring of input voltage |
| daniel_gs_jeong | 1:96e05ce748c1 | 347 | * by the input power limiter |
| daniel_gs_jeong | 1:96e05ce748c1 | 348 | * @param None |
| daniel_gs_jeong | 1:96e05ce748c1 | 349 | * @returns DCMON_DIS bit data. |
| daniel_gs_jeong | 1:96e05ce748c1 | 350 | */ |
| daniel_gs_jeong | 1:96e05ce748c1 | 351 | int32_t unset_disable_dc_monitor(); |
| daniel_gs_jeong | 1:96e05ce748c1 | 352 | /** |
| daniel_gs_jeong | 1:96e05ce748c1 | 353 | * @brief Set USB SUSPEND |
| daniel_gs_jeong | 1:96e05ce748c1 | 354 | * @details Set to USB Suspend bit |
| daniel_gs_jeong | 1:96e05ce748c1 | 355 | * @param None |
| daniel_gs_jeong | 1:96e05ce748c1 | 356 | * @returns USB SUSPEND bit data. |
| daniel_gs_jeong | 1:96e05ce748c1 | 357 | */ |
| daniel_gs_jeong | 1:96e05ce748c1 | 358 | int32_t set_usb_suspend(); |
| daniel_gs_jeong | 1:96e05ce748c1 | 359 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 360 | /** |
| daniel_gs_jeong | 1:96e05ce748c1 | 361 | * @brief UnSet USB SUSPEND |
| daniel_gs_jeong | 1:96e05ce748c1 | 362 | * @details UnSet to USB Suspend bit |
| daniel_gs_jeong | 1:96e05ce748c1 | 363 | * @param None |
| daniel_gs_jeong | 1:96e05ce748c1 | 364 | * @returns USB SUSPEND bit data. |
| daniel_gs_jeong | 1:96e05ce748c1 | 365 | */ |
| daniel_gs_jeong | 1:96e05ce748c1 | 366 | int32_t unset_usb_suspend(); |
| daniel_gs_jeong | 1:96e05ce748c1 | 367 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 368 | /** |
| daniel_gs_jeong | 1:96e05ce748c1 | 369 | * @brief Set Fast Charge Current |
| daniel_gs_jeong | 1:96e05ce748c1 | 370 | * @details Set to CHGCC bit to control Fast Charge Current |
| daniel_gs_jeong | 1:96e05ce748c1 | 371 | * @param int 0-1550 |
| daniel_gs_jeong | 1:96e05ce748c1 | 372 | * @returns Fast Charge Current. |
| daniel_gs_jeong | 1:96e05ce748c1 | 373 | */ |
| daniel_gs_jeong | 1:96e05ce748c1 | 374 | int32_t set_fast_charge_current(int current); |
| daniel_gs_jeong | 1:96e05ce748c1 | 375 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 376 | /** |
| daniel_gs_jeong | 1:96e05ce748c1 | 377 | * @brief Set Fast Charge Timer Duration |
| daniel_gs_jeong | 1:96e05ce748c1 | 378 | * @details Set to FCHGT bit to control Fast Charge Timer |
| daniel_gs_jeong | 1:96e05ce748c1 | 379 | * @param fast_charge_timer_t |
| daniel_gs_jeong | 1:96e05ce748c1 | 380 | * @returns Fast Charge Timer Bit Data. |
| daniel_gs_jeong | 1:96e05ce748c1 | 381 | */ |
| daniel_gs_jeong | 1:96e05ce748c1 | 382 | int32_t set_fast_charge_timer(MAX8971::fast_charge_timer_t fc_time); |
| daniel_gs_jeong | 1:96e05ce748c1 | 383 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 384 | /** |
| daniel_gs_jeong | 1:96e05ce748c1 | 385 | * @brief Set Input Current Limit |
| daniel_gs_jeong | 1:96e05ce748c1 | 386 | * @details Set to DCILMT to control Input Current Limit |
| daniel_gs_jeong | 1:96e05ce748c1 | 387 | * 0x00 - 0x09 : 100mA |
| daniel_gs_jeong | 1:96e05ce748c1 | 388 | * 0x10 - 1x3C : 250 mA - 1500 mA with 25m A |
| daniel_gs_jeong | 1:96e05ce748c1 | 389 | * @param int 0-1500 |
| daniel_gs_jeong | 1:96e05ce748c1 | 390 | * @returns DCILMT bit Data. |
| daniel_gs_jeong | 1:96e05ce748c1 | 391 | */ |
| daniel_gs_jeong | 1:96e05ce748c1 | 392 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 393 | /** |
| daniel_gs_jeong | 1:96e05ce748c1 | 394 | * @brief Set Fast Restart Threshold |
| daniel_gs_jeong | 1:96e05ce748c1 | 395 | * @details Set to CHGRSTRT bit to control Fast Restart Threshold |
| daniel_gs_jeong | 1:96e05ce748c1 | 396 | * @param fast_charge_restart_threshold_t |
| daniel_gs_jeong | 1:96e05ce748c1 | 397 | * @returns CHGRSTRT bit Data. |
| daniel_gs_jeong | 1:96e05ce748c1 | 398 | */ |
| daniel_gs_jeong | 1:96e05ce748c1 | 399 | int32_t set_fast_charge_restart_threshold |
| daniel_gs_jeong | 1:96e05ce748c1 | 400 | (MAX8971::fast_charge_restart_threshold_t voltage); |
| daniel_gs_jeong | 1:96e05ce748c1 | 401 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 402 | int32_t set_input_current_limit(int limit); |
| daniel_gs_jeong | 1:96e05ce748c1 | 403 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 404 | /** |
| daniel_gs_jeong | 1:96e05ce748c1 | 405 | * @brief Set Topoff Timer |
| daniel_gs_jeong | 1:96e05ce748c1 | 406 | * @details Set to TOFFT bit to control Topoff Timer |
| daniel_gs_jeong | 1:96e05ce748c1 | 407 | * @param top_off_timer_t |
| daniel_gs_jeong | 1:96e05ce748c1 | 408 | * @returns TOFFT bit Data. |
| daniel_gs_jeong | 1:96e05ce748c1 | 409 | */ |
| daniel_gs_jeong | 1:96e05ce748c1 | 410 | int32_t set_top_off_timer(MAX8971::top_off_timer_t time); |
| daniel_gs_jeong | 1:96e05ce748c1 | 411 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 412 | /** |
| daniel_gs_jeong | 1:96e05ce748c1 | 413 | * @brief Set Topoff Current Threshold |
| daniel_gs_jeong | 1:96e05ce748c1 | 414 | * @details Set to TOFFS bit to control Topoff Current Threshold |
| daniel_gs_jeong | 1:96e05ce748c1 | 415 | * @param top_off_current_threshold_t |
| daniel_gs_jeong | 1:96e05ce748c1 | 416 | * @returns TOFFS bit Data. |
| daniel_gs_jeong | 1:96e05ce748c1 | 417 | */ |
| daniel_gs_jeong | 1:96e05ce748c1 | 418 | int32_t set_top_off_current_threshold |
| daniel_gs_jeong | 1:96e05ce748c1 | 419 | (MAX8971::top_off_current_threshold_t current); |
| daniel_gs_jeong | 1:96e05ce748c1 | 420 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 421 | /** |
| daniel_gs_jeong | 1:96e05ce748c1 | 422 | * @brief Set Charge Termination Voltage |
| daniel_gs_jeong | 1:96e05ce748c1 | 423 | * @details Set to CHGCV bit to control Charge Termination Voltage in CV Mode |
| daniel_gs_jeong | 1:96e05ce748c1 | 424 | * @param charger_termination_voltage_t |
| daniel_gs_jeong | 1:96e05ce748c1 | 425 | * @returns CHGCV bit Data. |
| daniel_gs_jeong | 1:96e05ce748c1 | 426 | */ |
| daniel_gs_jeong | 1:96e05ce748c1 | 427 | int32_t set_charge_termination_voltage |
| daniel_gs_jeong | 1:96e05ce748c1 | 428 | (MAX8971::charger_termination_voltage_t voltage); |
| daniel_gs_jeong | 1:96e05ce748c1 | 429 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 430 | /** |
| daniel_gs_jeong | 1:96e05ce748c1 | 431 | * @brief Set Die-Temperature Regulation Loop Set Point |
| daniel_gs_jeong | 1:96e05ce748c1 | 432 | * @details Set REGTEMP bit to control |
| daniel_gs_jeong | 1:96e05ce748c1 | 433 | * Die-Temperature Regulation Loop Set Point |
| daniel_gs_jeong | 1:96e05ce748c1 | 434 | * @param die_temp_reggulation_point_t |
| daniel_gs_jeong | 1:96e05ce748c1 | 435 | * @returns REGTEMP bit Data. |
| daniel_gs_jeong | 1:96e05ce748c1 | 436 | */ |
| daniel_gs_jeong | 1:96e05ce748c1 | 437 | int32_t set_charge_termination_voltage |
| daniel_gs_jeong | 1:96e05ce748c1 | 438 | (MAX8971::die_temp_reggulation_point_t degree); |
| daniel_gs_jeong | 1:96e05ce748c1 | 439 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 440 | /** |
| daniel_gs_jeong | 1:96e05ce748c1 | 441 | * @brief Set Thermistor Monitor Configuration |
| daniel_gs_jeong | 1:96e05ce748c1 | 442 | * @details Set THM_CNFG bit to control the Thermistor Monitor Configuration |
| daniel_gs_jeong | 1:96e05ce748c1 | 443 | * @param thermistor_monitor_config_t |
| daniel_gs_jeong | 1:96e05ce748c1 | 444 | * @returns REGTEMP bit Data. |
| daniel_gs_jeong | 1:96e05ce748c1 | 445 | */ |
| daniel_gs_jeong | 1:96e05ce748c1 | 446 | int32_t set_thermistor_monitor |
| daniel_gs_jeong | 1:96e05ce748c1 | 447 | (MAX8971::thermistor_monitor_config_t enable); |
| daniel_gs_jeong | 1:96e05ce748c1 | 448 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 449 | /** |
| daniel_gs_jeong | 1:96e05ce748c1 | 450 | * @brief Set JEITA Safty Region |
| daniel_gs_jeong | 1:96e05ce748c1 | 451 | * @details Set SAFETYREG bit to control the JEITA Safty Region |
| daniel_gs_jeong | 1:96e05ce748c1 | 452 | * @param jeita_safety_selection_t |
| daniel_gs_jeong | 1:96e05ce748c1 | 453 | * @returns SAFETYREG bit Data. |
| daniel_gs_jeong | 1:96e05ce748c1 | 454 | */ |
| daniel_gs_jeong | 1:96e05ce748c1 | 455 | int32_t set_jeita_safety_region |
| daniel_gs_jeong | 1:96e05ce748c1 | 456 | (MAX8971::jeita_safety_selection_t enable); |
| daniel_gs_jeong | 1:96e05ce748c1 | 457 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 458 | /** |
| daniel_gs_jeong | 1:96e05ce748c1 | 459 | * @brief Set Charger-Setting Protection |
| daniel_gs_jeong | 1:96e05ce748c1 | 460 | * @details Set CPROT bit to control Charger-Setting Protection |
| daniel_gs_jeong | 1:96e05ce748c1 | 461 | * @param charger_setting_protection_t |
| daniel_gs_jeong | 1:96e05ce748c1 | 462 | * @returns CPROT bit Data. |
| daniel_gs_jeong | 1:96e05ce748c1 | 463 | */ |
| daniel_gs_jeong | 1:96e05ce748c1 | 464 | int32_t set_charger_setting_protection |
| daniel_gs_jeong | 1:96e05ce748c1 | 465 | (MAX8971::charger_setting_protection_t enable); |
| daniel_gs_jeong | 1:96e05ce748c1 | 466 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 467 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 468 | private: |
| daniel_gs_jeong | 1:96e05ce748c1 | 469 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 470 | I2C *i2c_; |
| daniel_gs_jeong | 1:96e05ce748c1 | 471 | bool i2c_owner; |
| daniel_gs_jeong | 1:96e05ce748c1 | 472 | |
| daniel_gs_jeong | 1:96e05ce748c1 | 473 | }; |
| daniel_gs_jeong | 1:96e05ce748c1 | 474 | #endif /* _max8971_H_ */ |
High-Efficiency Buck-Boost Regulator MAX77801