walid chebbi / Mbed 2 deprecated LSM9DS1_works_copy

test

Dependencies:   mbed PinDetect

LSM9DS1_Registers.h@3:35ac8fecbd90, 2020-03-02 (annotated)

Committer:
chebbi
Date:
Mon Mar 02 10:05:21 2020 +0000
Revision:
3:35ac8fecbd90
Parent:
0:e8167f37725c 
test

Who changed what in which revision?

UserRevisionLine numberNew contents of line
jmar7 0:e8167f37725c 1 /******************************************************************************
jmar7 0:e8167f37725c 2 LSM9DS1_Registers.h
jmar7 0:e8167f37725c 3 SFE_LSM9DS1 Library - LSM9DS1 Register Map
jmar7 0:e8167f37725c 4 Jim Lindblom @ SparkFun Electronics
jmar7 0:e8167f37725c 5 Original Creation Date: April 21, 2015
jmar7 0:e8167f37725c 6 https://github.com/sparkfun/LSM9DS1_Breakout
jmar7 0:e8167f37725c 7
jmar7 0:e8167f37725c 8 This file defines all registers internal to the gyro/accel and magnetometer
jmar7 0:e8167f37725c 9 devices in the LSM9DS1.
jmar7 0:e8167f37725c 10
jmar7 0:e8167f37725c 11 Development environment specifics:
jmar7 0:e8167f37725c 12 IDE: Arduino 1.6.0
jmar7 0:e8167f37725c 13 Hardware Platform: Arduino Uno
jmar7 0:e8167f37725c 14 LSM9DS1 Breakout Version: 1.0
jmar7 0:e8167f37725c 15
jmar7 0:e8167f37725c 16 This code is beerware; if you see me (or any other SparkFun employee) at the
jmar7 0:e8167f37725c 17 local, and you've found our code helpful, please buy us a round!
jmar7 0:e8167f37725c 18
jmar7 0:e8167f37725c 19 Distributed as-is; no warranty is given.
jmar7 0:e8167f37725c 20 ******************************************************************************/
jmar7 0:e8167f37725c 21
jmar7 0:e8167f37725c 22 #ifndef __LSM9DS1_Registers_H__
jmar7 0:e8167f37725c 23 #define __LSM9DS1_Registers_H__
jmar7 0:e8167f37725c 24
jmar7 0:e8167f37725c 25 /////////////////////////////////////////
jmar7 0:e8167f37725c 26 // LSM9DS1 Accel/Gyro (XL/G) Registers //
jmar7 0:e8167f37725c 27 /////////////////////////////////////////
jmar7 0:e8167f37725c 28 #define ACT_THS 0x04
jmar7 0:e8167f37725c 29 #define ACT_DUR 0x05
jmar7 0:e8167f37725c 30 #define INT_GEN_CFG_XL 0x06
jmar7 0:e8167f37725c 31 #define INT_GEN_THS_X_XL 0x07
jmar7 0:e8167f37725c 32 #define INT_GEN_THS_Y_XL 0x08
jmar7 0:e8167f37725c 33 #define INT_GEN_THS_Z_XL 0x09
jmar7 0:e8167f37725c 34 #define INT_GEN_DUR_XL 0x0A
jmar7 0:e8167f37725c 35 #define REFERENCE_G 0x0B
jmar7 0:e8167f37725c 36 #define INT1_CTRL 0x0C
jmar7 0:e8167f37725c 37 #define INT2_CTRL 0x0D
jmar7 0:e8167f37725c 38 #define WHO_AM_I_XG 0x0F
jmar7 0:e8167f37725c 39 #define CTRL_REG1_G 0x10
jmar7 0:e8167f37725c 40 #define CTRL_REG2_G 0x11
jmar7 0:e8167f37725c 41 #define CTRL_REG3_G 0x12
jmar7 0:e8167f37725c 42 #define ORIENT_CFG_G 0x13
jmar7 0:e8167f37725c 43 #define INT_GEN_SRC_G 0x14
jmar7 0:e8167f37725c 44 #define OUT_TEMP_L 0x15
jmar7 0:e8167f37725c 45 #define OUT_TEMP_H 0x16
jmar7 0:e8167f37725c 46 #define STATUS_REG_0 0x17
jmar7 0:e8167f37725c 47 #define OUT_X_L_G 0x18
jmar7 0:e8167f37725c 48 #define OUT_X_H_G 0x19
jmar7 0:e8167f37725c 49 #define OUT_Y_L_G 0x1A
jmar7 0:e8167f37725c 50 #define OUT_Y_H_G 0x1B
jmar7 0:e8167f37725c 51 #define OUT_Z_L_G 0x1C
jmar7 0:e8167f37725c 52 #define OUT_Z_H_G 0x1D
jmar7 0:e8167f37725c 53 #define CTRL_REG4 0x1E
jmar7 0:e8167f37725c 54 #define CTRL_REG5_XL 0x1F
jmar7 0:e8167f37725c 55 #define CTRL_REG6_XL 0x20
jmar7 0:e8167f37725c 56 #define CTRL_REG7_XL 0x21
jmar7 0:e8167f37725c 57 #define CTRL_REG8 0x22
jmar7 0:e8167f37725c 58 #define CTRL_REG9 0x23
jmar7 0:e8167f37725c 59 #define CTRL_REG10 0x24
jmar7 0:e8167f37725c 60 #define INT_GEN_SRC_XL 0x26
jmar7 0:e8167f37725c 61 #define STATUS_REG_1 0x27
jmar7 0:e8167f37725c 62 #define OUT_X_L_XL 0x28
jmar7 0:e8167f37725c 63 #define OUT_X_H_XL 0x29
jmar7 0:e8167f37725c 64 #define OUT_Y_L_XL 0x2A
jmar7 0:e8167f37725c 65 #define OUT_Y_H_XL 0x2B
jmar7 0:e8167f37725c 66 #define OUT_Z_L_XL 0x2C
jmar7 0:e8167f37725c 67 #define OUT_Z_H_XL 0x2D
jmar7 0:e8167f37725c 68 #define FIFO_CTRL 0x2E
jmar7 0:e8167f37725c 69 #define FIFO_SRC 0x2F
jmar7 0:e8167f37725c 70 #define INT_GEN_CFG_G 0x30
jmar7 0:e8167f37725c 71 #define INT_GEN_THS_XH_G 0x31
jmar7 0:e8167f37725c 72 #define INT_GEN_THS_XL_G 0x32
jmar7 0:e8167f37725c 73 #define INT_GEN_THS_YH_G 0x33
jmar7 0:e8167f37725c 74 #define INT_GEN_THS_YL_G 0x34
jmar7 0:e8167f37725c 75 #define INT_GEN_THS_ZH_G 0x35
jmar7 0:e8167f37725c 76 #define INT_GEN_THS_ZL_G 0x36
jmar7 0:e8167f37725c 77 #define INT_GEN_DUR_G 0x37
jmar7 0:e8167f37725c 78
jmar7 0:e8167f37725c 79 ///////////////////////////////
jmar7 0:e8167f37725c 80 // LSM9DS1 Magneto Registers //
jmar7 0:e8167f37725c 81 ///////////////////////////////
jmar7 0:e8167f37725c 82 #define OFFSET_X_REG_L_M 0x05
jmar7 0:e8167f37725c 83 #define OFFSET_X_REG_H_M 0x06
jmar7 0:e8167f37725c 84 #define OFFSET_Y_REG_L_M 0x07
jmar7 0:e8167f37725c 85 #define OFFSET_Y_REG_H_M 0x08
jmar7 0:e8167f37725c 86 #define OFFSET_Z_REG_L_M 0x09
jmar7 0:e8167f37725c 87 #define OFFSET_Z_REG_H_M 0x0A
jmar7 0:e8167f37725c 88 #define WHO_AM_I_M 0x0F
jmar7 0:e8167f37725c 89 #define CTRL_REG1_M 0x20
jmar7 0:e8167f37725c 90 #define CTRL_REG2_M 0x21
jmar7 0:e8167f37725c 91 #define CTRL_REG3_M 0x22
jmar7 0:e8167f37725c 92 #define CTRL_REG4_M 0x23
jmar7 0:e8167f37725c 93 #define CTRL_REG5_M 0x24
jmar7 0:e8167f37725c 94 #define STATUS_REG_M 0x27
jmar7 0:e8167f37725c 95 #define OUT_X_L_M 0x28
jmar7 0:e8167f37725c 96 #define OUT_X_H_M 0x29
jmar7 0:e8167f37725c 97 #define OUT_Y_L_M 0x2A
jmar7 0:e8167f37725c 98 #define OUT_Y_H_M 0x2B
jmar7 0:e8167f37725c 99 #define OUT_Z_L_M 0x2C
jmar7 0:e8167f37725c 100 #define OUT_Z_H_M 0x2D
jmar7 0:e8167f37725c 101 #define INT_CFG_M 0x30
jmar7 0:e8167f37725c 102 #define INT_SRC_M 0x30
jmar7 0:e8167f37725c 103 #define INT_THS_L_M 0x32
jmar7 0:e8167f37725c 104 #define INT_THS_H_M 0x33
jmar7 0:e8167f37725c 105
jmar7 0:e8167f37725c 106 ////////////////////////////////
jmar7 0:e8167f37725c 107 // LSM9DS1 WHO_AM_I Responses //
jmar7 0:e8167f37725c 108 ////////////////////////////////
jmar7 0:e8167f37725c 109 #define WHO_AM_I_AG_RSP 0x68
jmar7 0:e8167f37725c 110 #define WHO_AM_I_M_RSP 0x3D
jmar7 0:e8167f37725c 111
jmar7 0:e8167f37725c 112 #endif