charles macneill
Initial release. Mbed library for VL53L1CB
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vl53l1_api_core.c
00001 00002 /******************************************************************************* 00003 * Copyright (c) 2020, STMicroelectronics - All Rights Reserved 00004 00005 This file is part of VL53L1 Core and is dual licensed, 00006 either 'STMicroelectronics 00007 Proprietary license' 00008 or 'BSD 3-clause "New" or "Revised" License' , at your option. 00009 00010 ******************************************************************************** 00011 00012 'STMicroelectronics Proprietary license' 00013 00014 ******************************************************************************** 00015 00016 License terms: STMicroelectronics Proprietary in accordance with licensing 00017 terms at www.st.com/sla0081 00018 00019 STMicroelectronics confidential 00020 Reproduction and Communication of this document is strictly prohibited unless 00021 specifically authorized in writing by STMicroelectronics. 00022 00023 00024 ******************************************************************************** 00025 00026 Alternatively, VL53L1 Core may be distributed under the terms of 00027 'BSD 3-clause "New" or "Revised" License', in which case the following 00028 provisions apply instead of the ones 00029 mentioned above : 00030 00031 ******************************************************************************** 00032 00033 License terms: BSD 3-clause "New" or "Revised" License. 00034 00035 Redistribution and use in source and binary forms, with or without 00036 modification, are permitted provided that the following conditions are met: 00037 00038 1. Redistributions of source code must retain the above copyright notice, this 00039 list of conditions and the following disclaimer. 00040 00041 2. Redistributions in binary form must reproduce the above copyright notice, 00042 this list of conditions and the following disclaimer in the documentation 00043 and/or other materials provided with the distribution. 00044 00045 3. Neither the name of the copyright holder nor the names of its contributors 00046 may be used to endorse or promote products derived from this software 00047 without specific prior written permission. 00048 00049 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00050 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00051 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00052 DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 00053 FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00054 DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 00055 SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00056 CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00057 OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00058 OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00059 00060 00061 ******************************************************************************** 00062 00063 */ 00064 00065 00066 00067 00068 00069 #include "vl53l1_ll_def.h" 00070 #include "vl53l1_ll_device.h" 00071 #include "vl53l1_platform.h" 00072 #include "vl53l1_platform_ipp.h" 00073 #include "vl53l1_register_map.h" 00074 #include "vl53l1_register_settings.h" 00075 #include "vl53l1_register_funcs.h" 00076 #include "vl53l1_hist_map.h" 00077 #include "vl53l1_hist_structs.h" 00078 #include "vl53l1_nvm_map.h" 00079 #include "vl53l1_nvm_structs.h" 00080 #include "vl53l1_nvm.h" 00081 #include "vl53l1_core.h" 00082 #include "vl53l1_wait.h" 00083 #include "vl53l1_zone_presets.h" 00084 #include "vl53l1_api_preset_modes.h" 00085 #include "vl53l1_silicon_core.h" 00086 #include "vl53l1_api_core.h" 00087 #include "vl53l1_tuning_parm_defaults.h" 00088 00089 #ifdef VL53L1_LOG_ENABLE 00090 #include "vl53l1_api_debug.h" 00091 #endif 00092 00093 #define LOG_FUNCTION_START(fmt, ...) \ 00094 _LOG_FUNCTION_START(VL53L1_TRACE_MODULE_CORE, fmt, ##__VA_ARGS__) 00095 #define LOG_FUNCTION_END(status, ...) \ 00096 _LOG_FUNCTION_END(VL53L1_TRACE_MODULE_CORE, status, ##__VA_ARGS__) 00097 #define LOG_FUNCTION_END_FMT(status, fmt, ...) \ 00098 _LOG_FUNCTION_END_FMT(VL53L1_TRACE_MODULE_CORE, status, \ 00099 fmt, ##__VA_ARGS__) 00100 00101 #define trace_print(level, ...) \ 00102 _LOG_TRACE_PRINT(VL53L1_TRACE_MODULE_CORE, \ 00103 level, VL53L1_TRACE_FUNCTION_NONE, ##__VA_ARGS__) 00104 00105 #define VL53L1_MAX_I2C_XFER_SIZE 256 00106 00107 static VL53L1_Error select_offset_per_vcsel(VL53L1_LLDriverData_t *pdev, 00108 int16_t *poffset) { 00109 VL53L1_Error status = VL53L1_ERROR_NONE; 00110 int16_t tA, tB; 00111 uint8_t isc; 00112 00113 switch (pdev->preset_mode) { 00114 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_SHORT_RANGE: 00115 tA = pdev->per_vcsel_cal_data.short_a_offset_mm; 00116 tB = pdev->per_vcsel_cal_data.short_b_offset_mm; 00117 break; 00118 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MEDIUM_RANGE: 00119 tA = pdev->per_vcsel_cal_data.medium_a_offset_mm; 00120 tB = pdev->per_vcsel_cal_data.medium_b_offset_mm; 00121 break; 00122 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_LONG_RANGE: 00123 tA = pdev->per_vcsel_cal_data.long_a_offset_mm; 00124 tB = pdev->per_vcsel_cal_data.long_b_offset_mm; 00125 break; 00126 default: 00127 status = VL53L1_ERROR_INVALID_PARAMS; 00128 *poffset = 0; 00129 break; 00130 } 00131 00132 isc = pdev->ll_state.cfg_internal_stream_count; 00133 if (status == VL53L1_ERROR_NONE) 00134 *poffset = (isc & 0x01) ? tA : tB; 00135 00136 return status; 00137 } 00138 00139 static void vl53l1_diff_histo_stddev(VL53L1_LLDriverData_t *pdev, 00140 VL53L1_histogram_bin_data_t *pdata, uint8_t timing, uint8_t HighIndex, 00141 uint8_t prev_pos, int32_t *pdiff_histo_stddev) { 00142 uint16_t bin = 0; 00143 int32_t total_rate_pre = 0; 00144 int32_t total_rate_cur = 0; 00145 int32_t PrevBin, CurrBin; 00146 00147 total_rate_pre = 0; 00148 total_rate_cur = 0; 00149 00150 00151 for (bin = timing * 4; bin < HighIndex; bin++) { 00152 total_rate_pre += 00153 pdev->multi_bins_rec[prev_pos][timing][bin]; 00154 total_rate_cur += pdata->bin_data[bin]; 00155 } 00156 00157 if ((total_rate_pre != 0) && (total_rate_cur != 0)) 00158 for (bin = timing * 4; bin < HighIndex; bin++) { 00159 PrevBin = pdev->multi_bins_rec[prev_pos][timing][bin]; 00160 PrevBin = (PrevBin * 1000) / total_rate_pre; 00161 CurrBin = pdata->bin_data[bin] * 1000 / total_rate_cur; 00162 *pdiff_histo_stddev += (PrevBin - CurrBin) * 00163 (PrevBin - CurrBin); 00164 } 00165 } 00166 00167 static void vl53l1_histo_merge(VL53L1_DEV Dev, 00168 VL53L1_histogram_bin_data_t *pdata) { 00169 VL53L1_LLDriverData_t *pdev = 00170 VL53L1DevStructGetLLDriverHandle(Dev); 00171 uint16_t bin = 0; 00172 uint8_t i = 0; 00173 int32_t TuningBinRecSize = 0; 00174 uint8_t recom_been_reset = 0; 00175 uint8_t timing = 0; 00176 int32_t rmt = 0; 00177 int32_t diff_histo_stddev = 0; 00178 uint8_t HighIndex, prev_pos; 00179 uint8_t BuffSize = VL53L1_HISTOGRAM_BUFFER_SIZE; 00180 uint8_t pos; 00181 00182 VL53L1_get_tuning_parm(Dev, VL53L1_TUNINGPARM_HIST_MERGE_MAX_SIZE, 00183 &TuningBinRecSize); 00184 00185 VL53L1_get_tuning_parm(Dev, VL53L1_TUNINGPARM_RESET_MERGE_THRESHOLD, 00186 &rmt); 00187 00188 00189 if (pdev->pos_before_next_recom == 0) { 00190 00191 timing = 1 - pdata->result__stream_count % 2; 00192 00193 diff_histo_stddev = 0; 00194 HighIndex = BuffSize - timing * 4; 00195 if (pdev->bin_rec_pos > 0) 00196 prev_pos = pdev->bin_rec_pos - 1; 00197 else 00198 prev_pos = (TuningBinRecSize - 1); 00199 00200 if (pdev->multi_bins_rec[prev_pos][timing][4] > 0) 00201 vl53l1_diff_histo_stddev(pdev, pdata, 00202 timing, HighIndex, prev_pos, 00203 &diff_histo_stddev); 00204 00205 if (diff_histo_stddev >= rmt) { 00206 memset(pdev->multi_bins_rec, 0, 00207 sizeof(pdev->multi_bins_rec)); 00208 pdev->bin_rec_pos = 0; 00209 00210 recom_been_reset = 1; 00211 00212 if (timing == 0) 00213 pdev->pos_before_next_recom = 00214 VL53L1_FRAME_WAIT_EVENT; 00215 else 00216 pdev->pos_before_next_recom = 00217 VL53L1_FRAME_WAIT_EVENT + 1; 00218 } else { 00219 00220 pos = pdev->bin_rec_pos; 00221 for (i = 0; i < BuffSize; i++) 00222 pdev->multi_bins_rec[pos][timing][i] = 00223 pdata->bin_data[i]; 00224 } 00225 00226 if (pdev->bin_rec_pos == (TuningBinRecSize - 1) && timing == 1) 00227 pdev->bin_rec_pos = 0; 00228 else if (timing == 1) 00229 pdev->bin_rec_pos++; 00230 00231 if (!((recom_been_reset == 1) && (timing == 0)) && 00232 (pdev->pos_before_next_recom == 0)) { 00233 00234 for (bin = 0; bin < BuffSize; bin++) 00235 pdata->bin_data[bin] = 0; 00236 00237 for (bin = 0; bin < BuffSize; bin++) 00238 for (i = 0; i < TuningBinRecSize; i++) 00239 pdata->bin_data[bin] += 00240 (pdev->multi_bins_rec[i][timing][bin]); 00241 } 00242 } else { 00243 00244 pdev->pos_before_next_recom--; 00245 if (pdev->pos_before_next_recom == 255) 00246 pdev->pos_before_next_recom = 0; 00247 } 00248 } 00249 00250 VL53L1_Error VL53L1_load_patch( 00251 VL53L1_DEV Dev) { 00252 VL53L1_Error status = VL53L1_ERROR_NONE; 00253 int32_t patch_tuning = 0; 00254 uint8_t comms_buffer[256]; 00255 uint32_t patch_power; 00256 00257 LOG_FUNCTION_START(""); 00258 00259 if (status == VL53L1_ERROR_NONE) 00260 status = VL53L1_WrByte(Dev, 00261 VL53L1_FIRMWARE__ENABLE, 0x00); 00262 00263 if (status == VL53L1_ERROR_NONE) 00264 VL53L1_enable_powerforce(Dev); 00265 00266 VL53L1_get_tuning_parm(Dev, VL53L1_TUNINGPARM_PHASECAL_PATCH_POWER, 00267 &patch_tuning); 00268 00269 switch (patch_tuning) { 00270 case 0: 00271 patch_power = 0x00; 00272 break; 00273 case 1: 00274 patch_power = 0x10; 00275 break; 00276 case 2: 00277 patch_power = 0x20; 00278 break; 00279 case 3: 00280 patch_power = 0x40; 00281 break; 00282 default: 00283 patch_power = 0x00; 00284 } 00285 00286 if (status == VL53L1_ERROR_NONE) { 00287 00288 comms_buffer[0] = 0x29; 00289 comms_buffer[1] = 0xC9; 00290 comms_buffer[2] = 0x0E; 00291 comms_buffer[3] = 0x40; 00292 comms_buffer[4] = 0x28; 00293 comms_buffer[5] = patch_power; 00294 00295 status = VL53L1_WriteMulti(Dev, 00296 VL53L1_PATCH__OFFSET_0, comms_buffer, 6); 00297 } 00298 00299 if (status == VL53L1_ERROR_NONE) { 00300 comms_buffer[0] = 0x03; 00301 comms_buffer[1] = 0x6D; 00302 comms_buffer[2] = 0x03; 00303 comms_buffer[3] = 0x6F; 00304 comms_buffer[4] = 0x07; 00305 comms_buffer[5] = 0x29; 00306 status = VL53L1_WriteMulti(Dev, 00307 VL53L1_PATCH__ADDRESS_0, comms_buffer, 6); 00308 } 00309 00310 if (status == VL53L1_ERROR_NONE) { 00311 comms_buffer[0] = 0x00; 00312 comms_buffer[1] = 0x07; 00313 status = VL53L1_WriteMulti(Dev, 00314 VL53L1_PATCH__JMP_ENABLES, comms_buffer, 2); 00315 } 00316 00317 if (status == VL53L1_ERROR_NONE) { 00318 comms_buffer[0] = 0x00; 00319 comms_buffer[1] = 0x07; 00320 status = VL53L1_WriteMulti(Dev, 00321 VL53L1_PATCH__DATA_ENABLES, comms_buffer, 2); 00322 } 00323 00324 if (status == VL53L1_ERROR_NONE) 00325 status = VL53L1_WrByte(Dev, 00326 VL53L1_PATCH__CTRL, 0x01); 00327 00328 if (status == VL53L1_ERROR_NONE) 00329 status = VL53L1_WrByte(Dev, 00330 VL53L1_FIRMWARE__ENABLE, 0x01); 00331 00332 LOG_FUNCTION_END(status); 00333 00334 return status; 00335 } 00336 00337 VL53L1_Error VL53L1_unload_patch( 00338 VL53L1_DEV Dev) { 00339 VL53L1_Error status = VL53L1_ERROR_NONE; 00340 00341 if (status == VL53L1_ERROR_NONE) 00342 status = VL53L1_WrByte(Dev, 00343 VL53L1_FIRMWARE__ENABLE, 0x00); 00344 00345 if (status == VL53L1_ERROR_NONE) 00346 VL53L1_disable_powerforce(Dev); 00347 00348 if (status == VL53L1_ERROR_NONE) 00349 status = VL53L1_WrByte(Dev, 00350 VL53L1_PATCH__CTRL, 0x00); 00351 00352 if (status == VL53L1_ERROR_NONE) 00353 status = VL53L1_WrByte(Dev, 00354 VL53L1_FIRMWARE__ENABLE, 0x01); 00355 00356 LOG_FUNCTION_END(status); 00357 00358 return status; 00359 } 00360 00361 VL53L1_Error VL53L1_get_version( 00362 VL53L1_DEV Dev, 00363 VL53L1_ll_version_t *pdata) 00364 { 00365 00366 00367 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 00368 00369 VL53L1_init_version(Dev); 00370 00371 memcpy(pdata, &(pdev->version), sizeof(VL53L1_ll_version_t)); 00372 00373 return VL53L1_ERROR_NONE; 00374 } 00375 00376 00377 VL53L1_Error VL53L1_get_device_firmware_version( 00378 VL53L1_DEV Dev, 00379 uint16_t *pfw_version) 00380 { 00381 00382 00383 VL53L1_Error status = VL53L1_ERROR_NONE; 00384 00385 LOG_FUNCTION_START(""); 00386 00387 if (status == VL53L1_ERROR_NONE) 00388 status = VL53L1_disable_firmware(Dev); 00389 00390 if (status == VL53L1_ERROR_NONE) 00391 status = VL53L1_RdWord( 00392 Dev, 00393 VL53L1_MCU_GENERAL_PURPOSE__GP_0, 00394 pfw_version); 00395 00396 if (status == VL53L1_ERROR_NONE) 00397 status = VL53L1_enable_firmware(Dev); 00398 00399 LOG_FUNCTION_END(status); 00400 00401 return status; 00402 } 00403 00404 00405 VL53L1_Error VL53L1_data_init( 00406 VL53L1_DEV Dev, 00407 uint8_t read_p2p_data) 00408 { 00409 00410 00411 VL53L1_Error status = VL53L1_ERROR_NONE; 00412 VL53L1_LLDriverData_t *pdev = 00413 VL53L1DevStructGetLLDriverHandle(Dev); 00414 VL53L1_LLDriverResults_t *pres = 00415 VL53L1DevStructGetLLResultsHandle(Dev); 00416 00417 00418 00419 VL53L1_zone_objects_t *pobjects; 00420 00421 uint8_t i = 0; 00422 00423 LOG_FUNCTION_START(""); 00424 00425 VL53L1_init_ll_driver_state( 00426 Dev, 00427 VL53L1_DEVICESTATE_UNKNOWN); 00428 00429 pres->range_results.max_results = VL53L1_MAX_RANGE_RESULTS; 00430 pres->range_results.active_results = 0; 00431 pres->zone_results.max_zones = VL53L1_MAX_USER_ZONES; 00432 pres->zone_results.active_zones = 0; 00433 00434 for (i = 0; i < VL53L1_MAX_USER_ZONES; i++) { 00435 pobjects = &(pres->zone_results.VL53L1_p_002[i]); 00436 pobjects->xmonitor.VL53L1_p_020 = 0; 00437 pobjects->xmonitor.VL53L1_p_021 = 0; 00438 pobjects->xmonitor.VL53L1_p_014 = 0; 00439 pobjects->xmonitor.range_status = 00440 VL53L1_DEVICEERROR_NOUPDATE; 00441 } 00442 00443 00444 00445 pres->zone_hists.max_zones = VL53L1_MAX_USER_ZONES; 00446 pres->zone_hists.active_zones = 0; 00447 00448 00449 00450 pres->zone_cal.max_zones = VL53L1_MAX_USER_ZONES; 00451 pres->zone_cal.active_zones = 0; 00452 for (i = 0; i < VL53L1_MAX_USER_ZONES; i++) { 00453 pres->zone_cal.VL53L1_p_002[i].no_of_samples = 0; 00454 pres->zone_cal.VL53L1_p_002[i].effective_spads = 0; 00455 pres->zone_cal.VL53L1_p_002[i].peak_rate_mcps = 0; 00456 pres->zone_cal.VL53L1_p_002[i].median_range_mm = 0; 00457 pres->zone_cal.VL53L1_p_002[i].range_mm_offset = 0; 00458 } 00459 00460 pdev->wait_method = VL53L1_WAIT_METHOD_BLOCKING; 00461 pdev->preset_mode = VL53L1_DEVICEPRESETMODE_STANDARD_RANGING; 00462 pdev->zone_preset = VL53L1_DEVICEZONEPRESET_NONE; 00463 pdev->measurement_mode = VL53L1_DEVICEMEASUREMENTMODE_STOP; 00464 00465 pdev->offset_calibration_mode = 00466 VL53L1_OFFSETCALIBRATIONMODE__MM1_MM2__STANDARD; 00467 pdev->offset_correction_mode = 00468 VL53L1_OFFSETCORRECTIONMODE__MM1_MM2_OFFSETS; 00469 pdev->dmax_mode = 00470 VL53L1_DEVICEDMAXMODE__FMT_CAL_DATA; 00471 00472 pdev->phasecal_config_timeout_us = 1000; 00473 pdev->mm_config_timeout_us = 2000; 00474 pdev->range_config_timeout_us = 13000; 00475 pdev->inter_measurement_period_ms = 100; 00476 pdev->dss_config__target_total_rate_mcps = 0x0A00; 00477 pdev->debug_mode = 0x00; 00478 00479 pdev->offset_results.max_results = VL53L1_MAX_OFFSET_RANGE_RESULTS; 00480 pdev->offset_results.active_results = 0; 00481 00482 00483 00484 pdev->gain_cal.standard_ranging_gain_factor = 00485 VL53L1_TUNINGPARM_LITE_RANGING_GAIN_FACTOR_DEFAULT; 00486 pdev->gain_cal.histogram_ranging_gain_factor = 00487 VL53L1_TUNINGPARM_HIST_GAIN_FACTOR_DEFAULT; 00488 00489 00490 VL53L1_init_version(Dev); 00491 00492 00493 memset(pdev->multi_bins_rec, 0, sizeof(pdev->multi_bins_rec)); 00494 pdev->bin_rec_pos = 0; 00495 pdev->pos_before_next_recom = 0; 00496 00497 00498 00499 if (read_p2p_data > 0 && status == VL53L1_ERROR_NONE) 00500 status = VL53L1_read_p2p_data(Dev); 00501 00502 00503 if (status == VL53L1_ERROR_NONE) 00504 status = VL53L1_init_refspadchar_config_struct( 00505 &(pdev->refspadchar)); 00506 00507 00508 if (status == VL53L1_ERROR_NONE) 00509 status = VL53L1_init_ssc_config_struct( 00510 &(pdev->ssc_cfg)); 00511 00512 00513 if (status == VL53L1_ERROR_NONE) 00514 status = VL53L1_init_xtalk_config_struct( 00515 &(pdev->customer), 00516 &(pdev->xtalk_cfg)); 00517 00518 00519 if (status == VL53L1_ERROR_NONE) 00520 status = VL53L1_init_xtalk_extract_config_struct( 00521 &(pdev->xtalk_extract_cfg)); 00522 00523 00524 if (status == VL53L1_ERROR_NONE) 00525 status = VL53L1_init_offset_cal_config_struct( 00526 &(pdev->offsetcal_cfg)); 00527 00528 00529 if (status == VL53L1_ERROR_NONE) 00530 status = VL53L1_init_zone_cal_config_struct( 00531 &(pdev->zonecal_cfg)); 00532 00533 00534 if (status == VL53L1_ERROR_NONE) 00535 status = VL53L1_init_hist_post_process_config_struct( 00536 pdev->xtalk_cfg.global_crosstalk_compensation_enable, 00537 &(pdev->histpostprocess)); 00538 00539 00540 if (status == VL53L1_ERROR_NONE) 00541 status = VL53L1_init_hist_gen3_dmax_config_struct( 00542 &(pdev->dmax_cfg)); 00543 00544 00545 if (status == VL53L1_ERROR_NONE) 00546 status = VL53L1_init_tuning_parm_storage_struct( 00547 &(pdev->tuning_parms)); 00548 00549 00550 00551 if (status == VL53L1_ERROR_NONE) 00552 status = VL53L1_set_preset_mode( 00553 Dev, 00554 pdev->preset_mode, 00555 pdev->dss_config__target_total_rate_mcps, 00556 pdev->phasecal_config_timeout_us, 00557 pdev->mm_config_timeout_us, 00558 pdev->range_config_timeout_us, 00559 pdev->inter_measurement_period_ms); 00560 00561 00562 VL53L1_init_histogram_bin_data_struct( 00563 0, 00564 VL53L1_HISTOGRAM_BUFFER_SIZE, 00565 &(pdev->hist_data)); 00566 00567 VL53L1_init_histogram_bin_data_struct( 00568 0, 00569 VL53L1_HISTOGRAM_BUFFER_SIZE, 00570 &(pdev->hist_xtalk)); 00571 00572 00573 VL53L1_init_xtalk_bin_data_struct( 00574 0, 00575 VL53L1_XTALK_HISTO_BINS, 00576 &(pdev->xtalk_shapes.xtalk_shape)); 00577 00578 00579 00580 VL53L1_xtalk_cal_data_init( 00581 Dev 00582 ); 00583 00584 00585 00586 VL53L1_dynamic_xtalk_correction_data_init( 00587 Dev 00588 ); 00589 00590 00591 00592 VL53L1_low_power_auto_data_init( 00593 Dev 00594 ); 00595 00596 #ifdef VL53L1_LOG_ENABLE 00597 00598 00599 00600 VL53L1_print_static_nvm_managed( 00601 &(pdev->stat_nvm), 00602 "data_init():pdev->lldata.stat_nvm.", 00603 VL53L1_TRACE_MODULE_DATA_INIT); 00604 00605 VL53L1_print_customer_nvm_managed( 00606 &(pdev->customer), 00607 "data_init():pdev->lldata.customer.", 00608 VL53L1_TRACE_MODULE_DATA_INIT); 00609 00610 VL53L1_print_nvm_copy_data( 00611 &(pdev->nvm_copy_data), 00612 "data_init():pdev->lldata.nvm_copy_data.", 00613 VL53L1_TRACE_MODULE_DATA_INIT); 00614 00615 VL53L1_print_dmax_calibration_data( 00616 &(pdev->fmt_dmax_cal), 00617 "data_init():pdev->lldata.fmt_dmax_cal.", 00618 VL53L1_TRACE_MODULE_DATA_INIT); 00619 00620 VL53L1_print_dmax_calibration_data( 00621 &(pdev->cust_dmax_cal), 00622 "data_init():pdev->lldata.cust_dmax_cal.", 00623 VL53L1_TRACE_MODULE_DATA_INIT); 00624 00625 VL53L1_print_additional_offset_cal_data( 00626 &(pdev->add_off_cal_data), 00627 "data_init():pdev->lldata.add_off_cal_data.", 00628 VL53L1_TRACE_MODULE_DATA_INIT); 00629 00630 VL53L1_print_user_zone( 00631 &(pdev->mm_roi), 00632 "data_init():pdev->lldata.mm_roi.", 00633 VL53L1_TRACE_MODULE_DATA_INIT); 00634 00635 VL53L1_print_optical_centre( 00636 &(pdev->optical_centre), 00637 "data_init():pdev->lldata.optical_centre.", 00638 VL53L1_TRACE_MODULE_DATA_INIT); 00639 00640 VL53L1_print_cal_peak_rate_map( 00641 &(pdev->cal_peak_rate_map), 00642 "data_init():pdev->lldata.cal_peak_rate_map.", 00643 VL53L1_TRACE_MODULE_DATA_INIT); 00644 00645 #endif 00646 00647 LOG_FUNCTION_END(status); 00648 00649 return status; 00650 } 00651 00652 00653 VL53L1_Error VL53L1_read_p2p_data( 00654 VL53L1_DEV Dev) 00655 { 00656 00657 00658 00659 VL53L1_Error status = VL53L1_ERROR_NONE; 00660 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 00661 VL53L1_hist_post_process_config_t *pHP = &(pdev->histpostprocess); 00662 VL53L1_customer_nvm_managed_t *pN = &(pdev->customer); 00663 VL53L1_additional_offset_cal_data_t *pCD = &(pdev->add_off_cal_data); 00664 00665 VL53L1_decoded_nvm_fmt_range_data_t fmt_rrd; 00666 00667 LOG_FUNCTION_START(""); 00668 00669 if (status == VL53L1_ERROR_NONE) 00670 status = VL53L1_get_static_nvm_managed( 00671 Dev, 00672 &(pdev->stat_nvm)); 00673 00674 if (status == VL53L1_ERROR_NONE) 00675 status = VL53L1_get_customer_nvm_managed( 00676 Dev, 00677 &(pdev->customer)); 00678 00679 if (status == VL53L1_ERROR_NONE) { 00680 00681 status = VL53L1_get_nvm_copy_data( 00682 Dev, 00683 &(pdev->nvm_copy_data)); 00684 00685 00686 if (status == VL53L1_ERROR_NONE) 00687 VL53L1_copy_rtn_good_spads_to_buffer( 00688 &(pdev->nvm_copy_data), 00689 &(pdev->rtn_good_spads[0])); 00690 } 00691 00692 00693 00694 if (status == VL53L1_ERROR_NONE) { 00695 pHP->algo__crosstalk_compensation_plane_offset_kcps = 00696 pN->algo__crosstalk_compensation_plane_offset_kcps; 00697 pHP->algo__crosstalk_compensation_x_plane_gradient_kcps = 00698 pN->algo__crosstalk_compensation_x_plane_gradient_kcps; 00699 pHP->algo__crosstalk_compensation_y_plane_gradient_kcps = 00700 pN->algo__crosstalk_compensation_y_plane_gradient_kcps; 00701 } 00702 00703 00704 if (status == VL53L1_ERROR_NONE) 00705 status = 00706 VL53L1_read_nvm_optical_centre( 00707 Dev, 00708 &(pdev->optical_centre)); 00709 00710 00711 00712 if (status == VL53L1_ERROR_NONE) 00713 status = 00714 VL53L1_read_nvm_cal_peak_rate_map( 00715 Dev, 00716 &(pdev->cal_peak_rate_map)); 00717 00718 00719 00720 if (status == VL53L1_ERROR_NONE) { 00721 00722 status = 00723 VL53L1_read_nvm_additional_offset_cal_data( 00724 Dev, 00725 &(pdev->add_off_cal_data)); 00726 00727 00728 00729 if (pCD->result__mm_inner_peak_signal_count_rtn_mcps == 0 && 00730 pCD->result__mm_outer_peak_signal_count_rtn_mcps == 0) { 00731 00732 pCD->result__mm_inner_peak_signal_count_rtn_mcps 00733 = 0x0080; 00734 pCD->result__mm_outer_peak_signal_count_rtn_mcps 00735 = 0x0180; 00736 00737 00738 00739 VL53L1_calc_mm_effective_spads( 00740 pdev->nvm_copy_data.roi_config__mode_roi_centre_spad, 00741 pdev->nvm_copy_data.roi_config__mode_roi_xy_size, 00742 0xC7, 00743 0xFF, 00744 &(pdev->rtn_good_spads[0]), 00745 VL53L1_RTN_SPAD_APERTURE_TRANSMISSION, 00746 &(pCD->result__mm_inner_actual_effective_spads), 00747 &(pCD->result__mm_outer_actual_effective_spads)); 00748 } 00749 } 00750 00751 00752 if (status == VL53L1_ERROR_NONE) { 00753 00754 status = 00755 VL53L1_read_nvm_fmt_range_results_data( 00756 Dev, 00757 VL53L1_NVM__FMT__RANGE_RESULTS__140MM_DARK, 00758 &fmt_rrd); 00759 00760 if (status == VL53L1_ERROR_NONE) { 00761 pdev->fmt_dmax_cal.ref__actual_effective_spads = 00762 fmt_rrd.result__actual_effective_rtn_spads; 00763 pdev->fmt_dmax_cal.ref__peak_signal_count_rate_mcps = 00764 fmt_rrd.result__peak_signal_count_rate_rtn_mcps; 00765 pdev->fmt_dmax_cal.ref__distance_mm = 00766 fmt_rrd.measured_distance_mm; 00767 00768 00769 if (pdev->cal_peak_rate_map.cal_reflectance_pc != 0) { 00770 pdev->fmt_dmax_cal.ref_reflectance_pc = 00771 pdev->cal_peak_rate_map.cal_reflectance_pc; 00772 } else { 00773 pdev->fmt_dmax_cal.ref_reflectance_pc = 0x0014; 00774 } 00775 00776 00777 pdev->fmt_dmax_cal.coverglass_transmission = 0x0100; 00778 } 00779 } 00780 00781 00782 if (status == VL53L1_ERROR_NONE) 00783 status = 00784 VL53L1_RdWord( 00785 Dev, 00786 VL53L1_RESULT__OSC_CALIBRATE_VAL, 00787 &(pdev->dbg_results.result__osc_calibrate_val)); 00788 00789 00790 00791 if (pdev->stat_nvm.osc_measured__fast_osc__frequency < 0x1000) { 00792 trace_print( 00793 VL53L1_TRACE_LEVEL_WARNING, 00794 "\nInvalid %s value (0x%04X) - forcing to 0x%04X\n\n", 00795 "pdev->stat_nvm.osc_measured__fast_osc__frequency", 00796 pdev->stat_nvm.osc_measured__fast_osc__frequency, 00797 0xBCCC); 00798 pdev->stat_nvm.osc_measured__fast_osc__frequency = 0xBCCC; 00799 } 00800 00801 00802 00803 if (status == VL53L1_ERROR_NONE) 00804 status = 00805 VL53L1_get_mode_mitigation_roi( 00806 Dev, 00807 &(pdev->mm_roi)); 00808 00809 00810 00811 if (pdev->optical_centre.x_centre == 0 && 00812 pdev->optical_centre.y_centre == 0) { 00813 pdev->optical_centre.x_centre = 00814 pdev->mm_roi.x_centre << 4; 00815 pdev->optical_centre.y_centre = 00816 pdev->mm_roi.y_centre << 4; 00817 } 00818 00819 LOG_FUNCTION_END(status); 00820 00821 return status; 00822 } 00823 00824 00825 VL53L1_Error VL53L1_software_reset( 00826 VL53L1_DEV Dev) 00827 { 00828 00829 00830 VL53L1_Error status = VL53L1_ERROR_NONE; 00831 00832 LOG_FUNCTION_START(""); 00833 00834 00835 if (status == VL53L1_ERROR_NONE) 00836 status = VL53L1_WrByte( 00837 Dev, 00838 VL53L1_SOFT_RESET, 00839 0x00); 00840 00841 00842 if (status == VL53L1_ERROR_NONE) 00843 status = 00844 VL53L1_WaitUs( 00845 Dev, 00846 VL53L1_SOFTWARE_RESET_DURATION_US); 00847 00848 00849 if (status == VL53L1_ERROR_NONE) 00850 status = VL53L1_WrByte( 00851 Dev, 00852 VL53L1_SOFT_RESET, 00853 0x01); 00854 00855 00856 if (status == VL53L1_ERROR_NONE) 00857 status = VL53L1_wait_for_boot_completion(Dev); 00858 00859 LOG_FUNCTION_END(status); 00860 00861 return status; 00862 } 00863 00864 00865 VL53L1_Error VL53L1_set_part_to_part_data( 00866 VL53L1_DEV Dev, 00867 VL53L1_calibration_data_t *pcal_data) 00868 { 00869 00870 00871 VL53L1_Error status = VL53L1_ERROR_NONE; 00872 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 00873 VL53L1_xtalk_config_t *pC = &(pdev->xtalk_cfg); 00874 VL53L1_hist_post_process_config_t *pHP = &(pdev->histpostprocess); 00875 VL53L1_customer_nvm_managed_t *pN = &(pdev->customer); 00876 00877 uint32_t tempu32; 00878 00879 LOG_FUNCTION_START(""); 00880 00881 if (pcal_data->struct_version != 00882 VL53L1_LL_CALIBRATION_DATA_STRUCT_VERSION) { 00883 status = VL53L1_ERROR_INVALID_PARAMS; 00884 } 00885 00886 if (status == VL53L1_ERROR_NONE) { 00887 00888 00889 memcpy( 00890 &(pdev->customer), 00891 &(pcal_data->customer), 00892 sizeof(VL53L1_customer_nvm_managed_t)); 00893 00894 00895 memcpy( 00896 &(pdev->add_off_cal_data), 00897 &(pcal_data->add_off_cal_data), 00898 sizeof(VL53L1_additional_offset_cal_data_t)); 00899 00900 00901 memcpy( 00902 &(pdev->fmt_dmax_cal), 00903 &(pcal_data->fmt_dmax_cal), 00904 sizeof(VL53L1_dmax_calibration_data_t)); 00905 00906 00907 memcpy( 00908 &(pdev->cust_dmax_cal), 00909 &(pcal_data->cust_dmax_cal), 00910 sizeof(VL53L1_dmax_calibration_data_t)); 00911 00912 00913 memcpy( 00914 &(pdev->xtalk_shapes), 00915 &(pcal_data->xtalkhisto), 00916 sizeof(VL53L1_xtalk_histogram_data_t)); 00917 00918 00919 memcpy( 00920 &(pdev->gain_cal), 00921 &(pcal_data->gain_cal), 00922 sizeof(VL53L1_gain_calibration_data_t)); 00923 00924 00925 memcpy( 00926 &(pdev->cal_peak_rate_map), 00927 &(pcal_data->cal_peak_rate_map), 00928 sizeof(VL53L1_cal_peak_rate_map_t)); 00929 00930 00931 memcpy( 00932 &(pdev->per_vcsel_cal_data), 00933 &(pcal_data->per_vcsel_cal_data), 00934 sizeof(VL53L1_per_vcsel_period_offset_cal_data_t)); 00935 00936 00937 00938 pC->algo__crosstalk_compensation_plane_offset_kcps = 00939 pN->algo__crosstalk_compensation_plane_offset_kcps; 00940 pC->algo__crosstalk_compensation_x_plane_gradient_kcps = 00941 pN->algo__crosstalk_compensation_x_plane_gradient_kcps; 00942 pC->algo__crosstalk_compensation_y_plane_gradient_kcps = 00943 pN->algo__crosstalk_compensation_y_plane_gradient_kcps; 00944 00945 pHP->algo__crosstalk_compensation_plane_offset_kcps = 00946 VL53L1_calc_crosstalk_plane_offset_with_margin( 00947 pC->algo__crosstalk_compensation_plane_offset_kcps, 00948 pC->histogram_mode_crosstalk_margin_kcps); 00949 00950 pHP->algo__crosstalk_compensation_x_plane_gradient_kcps = 00951 pC->algo__crosstalk_compensation_x_plane_gradient_kcps; 00952 pHP->algo__crosstalk_compensation_y_plane_gradient_kcps = 00953 pC->algo__crosstalk_compensation_y_plane_gradient_kcps; 00954 00955 00956 00957 if (pC->global_crosstalk_compensation_enable == 0x00) { 00958 pN->algo__crosstalk_compensation_plane_offset_kcps = 00959 0x00; 00960 pN->algo__crosstalk_compensation_x_plane_gradient_kcps = 00961 0x00; 00962 pN->algo__crosstalk_compensation_y_plane_gradient_kcps = 00963 0x00; 00964 } else { 00965 tempu32 = 00966 VL53L1_calc_crosstalk_plane_offset_with_margin( 00967 pC->algo__crosstalk_compensation_plane_offset_kcps, 00968 pC->lite_mode_crosstalk_margin_kcps); 00969 00970 00971 if (tempu32 > 0xFFFF) 00972 tempu32 = 0xFFFF; 00973 00974 pN->algo__crosstalk_compensation_plane_offset_kcps = 00975 (uint16_t)tempu32; 00976 } 00977 } 00978 00979 LOG_FUNCTION_END(status); 00980 00981 return status; 00982 } 00983 00984 00985 VL53L1_Error VL53L1_get_part_to_part_data( 00986 VL53L1_DEV Dev, 00987 VL53L1_calibration_data_t *pcal_data) 00988 { 00989 00990 00991 VL53L1_Error status = VL53L1_ERROR_NONE; 00992 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 00993 VL53L1_xtalk_config_t *pC = &(pdev->xtalk_cfg); 00994 VL53L1_customer_nvm_managed_t *pCN = &(pcal_data->customer); 00995 00996 LOG_FUNCTION_START(""); 00997 00998 pcal_data->struct_version = 00999 VL53L1_LL_CALIBRATION_DATA_STRUCT_VERSION; 01000 01001 01002 memcpy( 01003 &(pcal_data->customer), 01004 &(pdev->customer), 01005 sizeof(VL53L1_customer_nvm_managed_t)); 01006 01007 01008 01009 01010 if (pC->algo__crosstalk_compensation_plane_offset_kcps > 0xFFFF) { 01011 pCN->algo__crosstalk_compensation_plane_offset_kcps = 01012 0xFFFF; 01013 } else { 01014 pCN->algo__crosstalk_compensation_plane_offset_kcps = 01015 (uint16_t)pC->algo__crosstalk_compensation_plane_offset_kcps; 01016 } 01017 pCN->algo__crosstalk_compensation_x_plane_gradient_kcps = 01018 pC->algo__crosstalk_compensation_x_plane_gradient_kcps; 01019 pCN->algo__crosstalk_compensation_y_plane_gradient_kcps = 01020 pC->algo__crosstalk_compensation_y_plane_gradient_kcps; 01021 01022 01023 memcpy( 01024 &(pcal_data->fmt_dmax_cal), 01025 &(pdev->fmt_dmax_cal), 01026 sizeof(VL53L1_dmax_calibration_data_t)); 01027 01028 01029 memcpy( 01030 &(pcal_data->cust_dmax_cal), 01031 &(pdev->cust_dmax_cal), 01032 sizeof(VL53L1_dmax_calibration_data_t)); 01033 01034 01035 memcpy( 01036 &(pcal_data->add_off_cal_data), 01037 &(pdev->add_off_cal_data), 01038 sizeof(VL53L1_additional_offset_cal_data_t)); 01039 01040 01041 memcpy( 01042 &(pcal_data->optical_centre), 01043 &(pdev->optical_centre), 01044 sizeof(VL53L1_optical_centre_t)); 01045 01046 01047 memcpy( 01048 &(pcal_data->xtalkhisto), 01049 &(pdev->xtalk_shapes), 01050 sizeof(VL53L1_xtalk_histogram_data_t)); 01051 01052 01053 memcpy( 01054 &(pcal_data->gain_cal), 01055 &(pdev->gain_cal), 01056 sizeof(VL53L1_gain_calibration_data_t)); 01057 01058 01059 memcpy( 01060 &(pcal_data->cal_peak_rate_map), 01061 &(pdev->cal_peak_rate_map), 01062 sizeof(VL53L1_cal_peak_rate_map_t)); 01063 01064 01065 memcpy( 01066 &(pcal_data->per_vcsel_cal_data), 01067 &(pdev->per_vcsel_cal_data), 01068 sizeof(VL53L1_per_vcsel_period_offset_cal_data_t)); 01069 01070 LOG_FUNCTION_END(status); 01071 01072 return status; 01073 } 01074 01075 01076 VL53L1_Error VL53L1_set_inter_measurement_period_ms( 01077 VL53L1_DEV Dev, 01078 uint32_t inter_measurement_period_ms) 01079 { 01080 01081 01082 VL53L1_Error status = VL53L1_ERROR_NONE; 01083 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 01084 01085 LOG_FUNCTION_START(""); 01086 01087 if (pdev->dbg_results.result__osc_calibrate_val == 0) 01088 status = VL53L1_ERROR_DIVISION_BY_ZERO; 01089 01090 if (status == VL53L1_ERROR_NONE) { 01091 pdev->inter_measurement_period_ms = inter_measurement_period_ms; 01092 pdev->tim_cfg.system__intermeasurement_period = 01093 inter_measurement_period_ms * 01094 (uint32_t)pdev->dbg_results.result__osc_calibrate_val; 01095 } 01096 01097 LOG_FUNCTION_END(status); 01098 01099 return status; 01100 } 01101 01102 01103 VL53L1_Error VL53L1_get_inter_measurement_period_ms( 01104 VL53L1_DEV Dev, 01105 uint32_t *pinter_measurement_period_ms) 01106 { 01107 01108 01109 VL53L1_Error status = VL53L1_ERROR_NONE; 01110 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 01111 01112 LOG_FUNCTION_START(""); 01113 01114 if (pdev->dbg_results.result__osc_calibrate_val == 0) 01115 status = VL53L1_ERROR_DIVISION_BY_ZERO; 01116 01117 if (status == VL53L1_ERROR_NONE) 01118 *pinter_measurement_period_ms = 01119 pdev->tim_cfg.system__intermeasurement_period / 01120 (uint32_t)pdev->dbg_results.result__osc_calibrate_val; 01121 01122 01123 LOG_FUNCTION_END(status); 01124 01125 return status; 01126 } 01127 01128 01129 VL53L1_Error VL53L1_set_timeouts_us( 01130 VL53L1_DEV Dev, 01131 uint32_t phasecal_config_timeout_us, 01132 uint32_t mm_config_timeout_us, 01133 uint32_t range_config_timeout_us) 01134 { 01135 01136 01137 VL53L1_Error status = VL53L1_ERROR_NONE; 01138 VL53L1_LLDriverData_t *pdev = 01139 VL53L1DevStructGetLLDriverHandle(Dev); 01140 01141 LOG_FUNCTION_START(""); 01142 01143 if (pdev->stat_nvm.osc_measured__fast_osc__frequency == 0) 01144 status = VL53L1_ERROR_DIVISION_BY_ZERO; 01145 01146 if (status == VL53L1_ERROR_NONE) { 01147 01148 pdev->phasecal_config_timeout_us = phasecal_config_timeout_us; 01149 pdev->mm_config_timeout_us = mm_config_timeout_us; 01150 pdev->range_config_timeout_us = range_config_timeout_us; 01151 01152 status = 01153 VL53L1_calc_timeout_register_values( 01154 phasecal_config_timeout_us, 01155 mm_config_timeout_us, 01156 range_config_timeout_us, 01157 pdev->stat_nvm.osc_measured__fast_osc__frequency, 01158 &(pdev->gen_cfg), 01159 &(pdev->tim_cfg)); 01160 } 01161 01162 LOG_FUNCTION_END(status); 01163 01164 return status; 01165 } 01166 01167 01168 VL53L1_Error VL53L1_get_timeouts_us( 01169 VL53L1_DEV Dev, 01170 uint32_t *pphasecal_config_timeout_us, 01171 uint32_t *pmm_config_timeout_us, 01172 uint32_t *prange_config_timeout_us) 01173 { 01174 01175 01176 VL53L1_Error status = VL53L1_ERROR_NONE; 01177 VL53L1_LLDriverData_t *pdev = 01178 VL53L1DevStructGetLLDriverHandle(Dev); 01179 01180 uint32_t macro_period_us = 0; 01181 uint16_t timeout_encoded = 0; 01182 01183 LOG_FUNCTION_START(""); 01184 01185 if (pdev->stat_nvm.osc_measured__fast_osc__frequency == 0) 01186 status = VL53L1_ERROR_DIVISION_BY_ZERO; 01187 01188 if (status == VL53L1_ERROR_NONE) { 01189 01190 01191 macro_period_us = 01192 VL53L1_calc_macro_period_us( 01193 pdev->stat_nvm.osc_measured__fast_osc__frequency, 01194 pdev->tim_cfg.range_config__vcsel_period_a); 01195 01196 01197 01198 *pphasecal_config_timeout_us = 01199 VL53L1_calc_timeout_us( 01200 (uint32_t)pdev->gen_cfg.phasecal_config__timeout_macrop, 01201 macro_period_us); 01202 01203 01204 01205 timeout_encoded = 01206 (uint16_t)pdev->tim_cfg.mm_config__timeout_macrop_a_hi; 01207 timeout_encoded = (timeout_encoded << 8) + 01208 (uint16_t)pdev->tim_cfg.mm_config__timeout_macrop_a_lo; 01209 01210 *pmm_config_timeout_us = 01211 VL53L1_calc_decoded_timeout_us( 01212 timeout_encoded, 01213 macro_period_us); 01214 01215 01216 01217 timeout_encoded = 01218 (uint16_t)pdev->tim_cfg.range_config__timeout_macrop_a_hi; 01219 timeout_encoded = (timeout_encoded << 8) + 01220 (uint16_t)pdev->tim_cfg.range_config__timeout_macrop_a_lo; 01221 01222 *prange_config_timeout_us = 01223 VL53L1_calc_decoded_timeout_us( 01224 timeout_encoded, 01225 macro_period_us); 01226 01227 pdev->phasecal_config_timeout_us = *pphasecal_config_timeout_us; 01228 pdev->mm_config_timeout_us = *pmm_config_timeout_us; 01229 pdev->range_config_timeout_us = *prange_config_timeout_us; 01230 01231 } 01232 01233 LOG_FUNCTION_END(status); 01234 01235 return status; 01236 } 01237 01238 01239 VL53L1_Error VL53L1_set_calibration_repeat_period( 01240 VL53L1_DEV Dev, 01241 uint16_t cal_config__repeat_period) 01242 { 01243 01244 01245 VL53L1_Error status = VL53L1_ERROR_NONE; 01246 VL53L1_LLDriverData_t *pdev = 01247 VL53L1DevStructGetLLDriverHandle(Dev); 01248 01249 pdev->gen_cfg.cal_config__repeat_rate = cal_config__repeat_period; 01250 01251 return status; 01252 01253 } 01254 01255 01256 VL53L1_Error VL53L1_get_calibration_repeat_period( 01257 VL53L1_DEV Dev, 01258 uint16_t *pcal_config__repeat_period) 01259 { 01260 01261 01262 VL53L1_Error status = VL53L1_ERROR_NONE; 01263 VL53L1_LLDriverData_t *pdev = 01264 VL53L1DevStructGetLLDriverHandle(Dev); 01265 01266 *pcal_config__repeat_period = pdev->gen_cfg.cal_config__repeat_rate; 01267 01268 return status; 01269 01270 } 01271 01272 01273 VL53L1_Error VL53L1_set_sequence_config_bit( 01274 VL53L1_DEV Dev, 01275 VL53L1_DeviceSequenceConfig bit_id, 01276 uint8_t value) 01277 { 01278 01279 01280 VL53L1_Error status = VL53L1_ERROR_NONE; 01281 VL53L1_LLDriverData_t *pdev = 01282 VL53L1DevStructGetLLDriverHandle(Dev); 01283 01284 uint8_t bit_mask = 0x01; 01285 uint8_t clr_mask = 0xFF - bit_mask; 01286 uint8_t bit_value = value & bit_mask; 01287 01288 if (bit_id <= VL53L1_DEVICESEQUENCECONFIG_RANGE) { 01289 01290 if (bit_id > 0) { 01291 bit_mask = 0x01 << bit_id; 01292 bit_value = bit_value << bit_id; 01293 clr_mask = 0xFF - bit_mask; 01294 } 01295 01296 pdev->dyn_cfg.system__sequence_config = 01297 (pdev->dyn_cfg.system__sequence_config & clr_mask) | 01298 bit_value; 01299 01300 } else { 01301 status = VL53L1_ERROR_INVALID_PARAMS; 01302 } 01303 01304 return status; 01305 01306 } 01307 01308 01309 VL53L1_Error VL53L1_get_sequence_config_bit( 01310 VL53L1_DEV Dev, 01311 VL53L1_DeviceSequenceConfig bit_id, 01312 uint8_t *pvalue) 01313 { 01314 01315 01316 VL53L1_Error status = VL53L1_ERROR_NONE; 01317 VL53L1_LLDriverData_t *pdev = 01318 VL53L1DevStructGetLLDriverHandle(Dev); 01319 01320 uint8_t bit_mask = 0x01; 01321 01322 if (bit_id <= VL53L1_DEVICESEQUENCECONFIG_RANGE) { 01323 01324 if (bit_id > 0) 01325 bit_mask = 0x01 << bit_id; 01326 01327 *pvalue = 01328 pdev->dyn_cfg.system__sequence_config & bit_mask; 01329 01330 if (bit_id > 0) 01331 *pvalue = *pvalue >> bit_id; 01332 01333 } else { 01334 status = VL53L1_ERROR_INVALID_PARAMS; 01335 } 01336 01337 return status; 01338 } 01339 01340 01341 VL53L1_Error VL53L1_set_interrupt_polarity( 01342 VL53L1_DEV Dev, 01343 VL53L1_DeviceInterruptPolarity interrupt_polarity) 01344 { 01345 01346 01347 VL53L1_Error status = VL53L1_ERROR_NONE; 01348 VL53L1_LLDriverData_t *pdev = 01349 VL53L1DevStructGetLLDriverHandle(Dev); 01350 01351 pdev->stat_cfg.gpio_hv_mux__ctrl = 01352 (pdev->stat_cfg.gpio_hv_mux__ctrl & 01353 VL53L1_DEVICEINTERRUPTPOLARITY_CLEAR_MASK) | 01354 (interrupt_polarity & 01355 VL53L1_DEVICEINTERRUPTPOLARITY_BIT_MASK); 01356 01357 return status; 01358 01359 } 01360 01361 01362 VL53L1_Error VL53L1_set_refspadchar_config_struct( 01363 VL53L1_DEV Dev, 01364 VL53L1_refspadchar_config_t *pdata) 01365 { 01366 01367 01368 VL53L1_Error status = VL53L1_ERROR_NONE; 01369 VL53L1_LLDriverData_t *pdev = 01370 VL53L1DevStructGetLLDriverHandle(Dev); 01371 01372 LOG_FUNCTION_START(""); 01373 01374 pdev->refspadchar.device_test_mode = pdata->device_test_mode; 01375 pdev->refspadchar.VL53L1_p_009 = pdata->VL53L1_p_009; 01376 pdev->refspadchar.timeout_us = pdata->timeout_us; 01377 pdev->refspadchar.target_count_rate_mcps = 01378 pdata->target_count_rate_mcps; 01379 pdev->refspadchar.min_count_rate_limit_mcps = 01380 pdata->min_count_rate_limit_mcps; 01381 pdev->refspadchar.max_count_rate_limit_mcps = 01382 pdata->max_count_rate_limit_mcps; 01383 01384 LOG_FUNCTION_END(status); 01385 01386 return status; 01387 } 01388 01389 VL53L1_Error VL53L1_get_refspadchar_config_struct( 01390 VL53L1_DEV Dev, 01391 VL53L1_refspadchar_config_t *pdata) 01392 { 01393 01394 01395 VL53L1_Error status = VL53L1_ERROR_NONE; 01396 VL53L1_LLDriverData_t *pdev = 01397 VL53L1DevStructGetLLDriverHandle(Dev); 01398 01399 LOG_FUNCTION_START(""); 01400 01401 pdata->device_test_mode = pdev->refspadchar.device_test_mode; 01402 pdata->VL53L1_p_009 = pdev->refspadchar.VL53L1_p_009; 01403 pdata->timeout_us = pdev->refspadchar.timeout_us; 01404 pdata->target_count_rate_mcps = 01405 pdev->refspadchar.target_count_rate_mcps; 01406 pdata->min_count_rate_limit_mcps = 01407 pdev->refspadchar.min_count_rate_limit_mcps; 01408 pdata->max_count_rate_limit_mcps = 01409 pdev->refspadchar.max_count_rate_limit_mcps; 01410 01411 LOG_FUNCTION_END(status); 01412 01413 return status; 01414 } 01415 01416 01417 01418 VL53L1_Error VL53L1_set_range_ignore_threshold( 01419 VL53L1_DEV Dev, 01420 uint8_t range_ignore_thresh_mult, 01421 uint16_t range_ignore_threshold_mcps) 01422 { 01423 01424 01425 VL53L1_Error status = VL53L1_ERROR_NONE; 01426 VL53L1_LLDriverData_t *pdev = 01427 VL53L1DevStructGetLLDriverHandle(Dev); 01428 01429 pdev->xtalk_cfg.crosstalk_range_ignore_threshold_rate_mcps = 01430 range_ignore_threshold_mcps; 01431 01432 pdev->xtalk_cfg.crosstalk_range_ignore_threshold_mult = 01433 range_ignore_thresh_mult; 01434 01435 return status; 01436 01437 } 01438 01439 VL53L1_Error VL53L1_get_range_ignore_threshold( 01440 VL53L1_DEV Dev, 01441 uint8_t *prange_ignore_thresh_mult, 01442 uint16_t *prange_ignore_threshold_mcps_internal, 01443 uint16_t *prange_ignore_threshold_mcps_current) 01444 { 01445 01446 01447 VL53L1_Error status = VL53L1_ERROR_NONE; 01448 VL53L1_LLDriverData_t *pdev = 01449 VL53L1DevStructGetLLDriverHandle(Dev); 01450 01451 *prange_ignore_thresh_mult = 01452 pdev->xtalk_cfg.crosstalk_range_ignore_threshold_mult; 01453 01454 *prange_ignore_threshold_mcps_current = 01455 pdev->stat_cfg.algo__range_ignore_threshold_mcps; 01456 01457 *prange_ignore_threshold_mcps_internal = 01458 pdev->xtalk_cfg.crosstalk_range_ignore_threshold_rate_mcps; 01459 01460 return status; 01461 01462 } 01463 01464 01465 01466 VL53L1_Error VL53L1_get_interrupt_polarity( 01467 VL53L1_DEV Dev, 01468 VL53L1_DeviceInterruptPolarity *pinterrupt_polarity) 01469 { 01470 01471 01472 VL53L1_Error status = VL53L1_ERROR_NONE; 01473 VL53L1_LLDriverData_t *pdev = 01474 VL53L1DevStructGetLLDriverHandle(Dev); 01475 01476 *pinterrupt_polarity = 01477 pdev->stat_cfg.gpio_hv_mux__ctrl & 01478 VL53L1_DEVICEINTERRUPTPOLARITY_BIT_MASK; 01479 01480 return status; 01481 01482 } 01483 01484 01485 VL53L1_Error VL53L1_set_user_zone( 01486 VL53L1_DEV Dev, 01487 VL53L1_user_zone_t *puser_zone) 01488 { 01489 01490 01491 VL53L1_Error status = VL53L1_ERROR_NONE; 01492 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 01493 01494 LOG_FUNCTION_START(""); 01495 01496 01497 VL53L1_encode_row_col( 01498 puser_zone->y_centre, 01499 puser_zone->x_centre, 01500 &(pdev->dyn_cfg.roi_config__user_roi_centre_spad)); 01501 01502 01503 VL53L1_encode_zone_size( 01504 puser_zone->width, 01505 puser_zone->height, 01506 &(pdev->dyn_cfg.roi_config__user_roi_requested_global_xy_size)); 01507 01508 01509 01510 LOG_FUNCTION_END(status); 01511 01512 return status; 01513 } 01514 01515 01516 VL53L1_Error VL53L1_get_user_zone( 01517 VL53L1_DEV Dev, 01518 VL53L1_user_zone_t *puser_zone) 01519 { 01520 01521 01522 VL53L1_Error status = VL53L1_ERROR_NONE; 01523 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 01524 01525 LOG_FUNCTION_START(""); 01526 01527 01528 VL53L1_decode_row_col( 01529 pdev->dyn_cfg.roi_config__user_roi_centre_spad, 01530 &(puser_zone->y_centre), 01531 &(puser_zone->x_centre)); 01532 01533 01534 VL53L1_decode_zone_size( 01535 pdev->dyn_cfg.roi_config__user_roi_requested_global_xy_size, 01536 &(puser_zone->width), 01537 &(puser_zone->height)); 01538 01539 LOG_FUNCTION_END(status); 01540 01541 return status; 01542 } 01543 01544 01545 01546 VL53L1_Error VL53L1_get_mode_mitigation_roi( 01547 VL53L1_DEV Dev, 01548 VL53L1_user_zone_t *pmm_roi) 01549 { 01550 01551 01552 VL53L1_Error status = VL53L1_ERROR_NONE; 01553 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 01554 01555 uint8_t x = 0; 01556 uint8_t y = 0; 01557 uint8_t xy_size = 0; 01558 01559 LOG_FUNCTION_START(""); 01560 01561 01562 VL53L1_decode_row_col( 01563 pdev->nvm_copy_data.roi_config__mode_roi_centre_spad, 01564 &y, 01565 &x); 01566 01567 pmm_roi->x_centre = x; 01568 pmm_roi->y_centre = y; 01569 01570 01571 xy_size = pdev->nvm_copy_data.roi_config__mode_roi_xy_size; 01572 01573 pmm_roi->height = xy_size >> 4; 01574 pmm_roi->width = xy_size & 0x0F; 01575 01576 LOG_FUNCTION_END(status); 01577 01578 return status; 01579 } 01580 01581 01582 VL53L1_Error VL53L1_set_zone_config( 01583 VL53L1_DEV Dev, 01584 VL53L1_zone_config_t *pzone_cfg) 01585 { 01586 01587 01588 01589 VL53L1_Error status = VL53L1_ERROR_NONE; 01590 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 01591 01592 LOG_FUNCTION_START(""); 01593 01594 01595 memcpy(&(pdev->zone_cfg.user_zones), &(pzone_cfg->user_zones), 01596 sizeof(pdev->zone_cfg.user_zones)); 01597 01598 01599 pdev->zone_cfg.max_zones = pzone_cfg->max_zones; 01600 pdev->zone_cfg.active_zones = pzone_cfg->active_zones; 01601 01602 status = VL53L1_init_zone_config_histogram_bins(&pdev->zone_cfg); 01603 01604 01605 01606 if (pzone_cfg->active_zones == 0) 01607 pdev->gen_cfg.global_config__stream_divider = 0; 01608 else if (pzone_cfg->active_zones < VL53L1_MAX_USER_ZONES) 01609 pdev->gen_cfg.global_config__stream_divider = 01610 pzone_cfg->active_zones + 1; 01611 else 01612 pdev->gen_cfg.global_config__stream_divider = 01613 VL53L1_MAX_USER_ZONES + 1; 01614 01615 LOG_FUNCTION_END(status); 01616 01617 return status; 01618 01619 } 01620 01621 01622 VL53L1_Error VL53L1_get_zone_config( 01623 VL53L1_DEV Dev, 01624 VL53L1_zone_config_t *pzone_cfg) 01625 { 01626 01627 01628 VL53L1_Error status = VL53L1_ERROR_NONE; 01629 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 01630 01631 LOG_FUNCTION_START(""); 01632 01633 01634 memcpy(pzone_cfg, &(pdev->zone_cfg), sizeof(VL53L1_zone_config_t)); 01635 01636 LOG_FUNCTION_END(status); 01637 01638 return status; 01639 } 01640 01641 VL53L1_Error VL53L1_get_preset_mode_timing_cfg( 01642 VL53L1_DEV Dev, 01643 VL53L1_DevicePresetModes device_preset_mode, 01644 uint16_t *pdss_config__target_total_rate_mcps, 01645 uint32_t *pphasecal_config_timeout_us, 01646 uint32_t *pmm_config_timeout_us, 01647 uint32_t *prange_config_timeout_us) 01648 { 01649 VL53L1_Error status = VL53L1_ERROR_NONE; 01650 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 01651 01652 LOG_FUNCTION_START(""); 01653 01654 01655 switch (device_preset_mode) { 01656 01657 case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING: 01658 case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING_SHORT_RANGE: 01659 case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING_LONG_RANGE: 01660 case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING_MM1_CAL: 01661 case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING_MM2_CAL: 01662 case VL53L1_DEVICEPRESETMODE_OLT: 01663 *pdss_config__target_total_rate_mcps = 01664 pdev->tuning_parms.tp_dss_target_lite_mcps; 01665 *pphasecal_config_timeout_us = 01666 pdev->tuning_parms.tp_phasecal_timeout_lite_us; 01667 *pmm_config_timeout_us = 01668 pdev->tuning_parms.tp_mm_timeout_lite_us; 01669 *prange_config_timeout_us = 01670 pdev->tuning_parms.tp_range_timeout_lite_us; 01671 break; 01672 01673 case VL53L1_DEVICEPRESETMODE_TIMED_RANGING: 01674 case VL53L1_DEVICEPRESETMODE_TIMED_RANGING_SHORT_RANGE: 01675 case VL53L1_DEVICEPRESETMODE_TIMED_RANGING_LONG_RANGE: 01676 case VL53L1_DEVICEPRESETMODE_SINGLESHOT_RANGING: 01677 *pdss_config__target_total_rate_mcps = 01678 pdev->tuning_parms.tp_dss_target_timed_mcps; 01679 *pphasecal_config_timeout_us = 01680 pdev->tuning_parms.tp_phasecal_timeout_timed_us; 01681 *pmm_config_timeout_us = 01682 pdev->tuning_parms.tp_mm_timeout_timed_us; 01683 *prange_config_timeout_us = 01684 pdev->tuning_parms.tp_range_timeout_timed_us; 01685 break; 01686 01687 case VL53L1_DEVICEPRESETMODE_LOWPOWERAUTO_SHORT_RANGE: 01688 case VL53L1_DEVICEPRESETMODE_LOWPOWERAUTO_MEDIUM_RANGE: 01689 case VL53L1_DEVICEPRESETMODE_LOWPOWERAUTO_LONG_RANGE: 01690 *pdss_config__target_total_rate_mcps = 01691 pdev->tuning_parms.tp_dss_target_timed_mcps; 01692 *pphasecal_config_timeout_us = 01693 pdev->tuning_parms.tp_phasecal_timeout_timed_us; 01694 *pmm_config_timeout_us = 01695 pdev->tuning_parms.tp_mm_timeout_lpa_us; 01696 *prange_config_timeout_us = 01697 pdev->tuning_parms.tp_range_timeout_lpa_us; 01698 break; 01699 01700 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING: 01701 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_WITH_MM1: 01702 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_WITH_MM2: 01703 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_MM1_CAL: 01704 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_MM2_CAL: 01705 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_REF_ARRAY: 01706 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_LONG_RANGE: 01707 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_LONG_RANGE_MM1: 01708 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_LONG_RANGE_MM2: 01709 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_CHARACTERISATION: 01710 *pdss_config__target_total_rate_mcps = 01711 pdev->tuning_parms.tp_dss_target_histo_mcps; 01712 *pphasecal_config_timeout_us = 01713 pdev->tuning_parms.tp_phasecal_timeout_hist_long_us; 01714 *pmm_config_timeout_us = 01715 pdev->tuning_parms.tp_mm_timeout_histo_us; 01716 *prange_config_timeout_us = 01717 pdev->tuning_parms.tp_range_timeout_histo_us; 01718 01719 break; 01720 01721 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MULTIZONE: 01722 *pdss_config__target_total_rate_mcps = 01723 pdev->tuning_parms.tp_dss_target_histo_mz_mcps; 01724 *pphasecal_config_timeout_us = 01725 pdev->tuning_parms.tp_phasecal_timeout_mz_med_us; 01726 *pmm_config_timeout_us = 01727 pdev->tuning_parms.tp_mm_timeout_mz_us; 01728 *prange_config_timeout_us = 01729 pdev->tuning_parms.tp_range_timeout_mz_us; 01730 break; 01731 01732 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MULTIZONE_SHORT_RANGE: 01733 *pdss_config__target_total_rate_mcps = 01734 pdev->tuning_parms.tp_dss_target_histo_mz_mcps; 01735 *pphasecal_config_timeout_us = 01736 pdev->tuning_parms.tp_phasecal_timeout_mz_short_us; 01737 *pmm_config_timeout_us = 01738 pdev->tuning_parms.tp_mm_timeout_mz_us; 01739 *prange_config_timeout_us = 01740 pdev->tuning_parms.tp_range_timeout_mz_us; 01741 break; 01742 01743 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MULTIZONE_LONG_RANGE: 01744 *pdss_config__target_total_rate_mcps = 01745 pdev->tuning_parms.tp_dss_target_histo_mz_mcps; 01746 *pphasecal_config_timeout_us = 01747 pdev->tuning_parms.tp_phasecal_timeout_mz_long_us; 01748 *pmm_config_timeout_us = 01749 pdev->tuning_parms.tp_mm_timeout_mz_us; 01750 *prange_config_timeout_us = 01751 pdev->tuning_parms.tp_range_timeout_mz_us; 01752 break; 01753 01754 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_SHORT_TIMING: 01755 *pdss_config__target_total_rate_mcps = 01756 pdev->tuning_parms.tp_dss_target_histo_mcps; 01757 *pphasecal_config_timeout_us = 01758 pdev->tuning_parms.tp_phasecal_timeout_hist_short_us; 01759 *pmm_config_timeout_us = 01760 pdev->tuning_parms.tp_mm_timeout_histo_us; 01761 *prange_config_timeout_us = 01762 pdev->tuning_parms.tp_range_timeout_histo_us; 01763 break; 01764 01765 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MEDIUM_RANGE: 01766 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MEDIUM_RANGE_MM1: 01767 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MEDIUM_RANGE_MM2: 01768 *pdss_config__target_total_rate_mcps = 01769 pdev->tuning_parms.tp_dss_target_histo_mcps; 01770 *pphasecal_config_timeout_us = 01771 pdev->tuning_parms.tp_phasecal_timeout_hist_med_us; 01772 *pmm_config_timeout_us = 01773 pdev->tuning_parms.tp_mm_timeout_histo_us; 01774 *prange_config_timeout_us = 01775 pdev->tuning_parms.tp_range_timeout_histo_us; 01776 break; 01777 01778 01779 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_SHORT_RANGE: 01780 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_SHORT_RANGE_MM1: 01781 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_SHORT_RANGE_MM2: 01782 *pdss_config__target_total_rate_mcps = 01783 pdev->tuning_parms.tp_dss_target_histo_mcps; 01784 *pphasecal_config_timeout_us = 01785 pdev->tuning_parms.tp_phasecal_timeout_hist_short_us; 01786 *pmm_config_timeout_us = 01787 pdev->tuning_parms.tp_mm_timeout_histo_us; 01788 *prange_config_timeout_us = 01789 pdev->tuning_parms.tp_range_timeout_histo_us; 01790 break; 01791 01792 case VL53L1_DEVICEPRESETMODE_SPECIAL_HISTOGRAM_SHORT_RANGE: 01793 *pdss_config__target_total_rate_mcps = 01794 pdev->tuning_parms.tp_dss_target_very_short_mcps; 01795 *pphasecal_config_timeout_us = 01796 pdev->tuning_parms.tp_phasecal_timeout_hist_short_us; 01797 *pmm_config_timeout_us = 01798 pdev->tuning_parms.tp_mm_timeout_histo_us; 01799 *prange_config_timeout_us = 01800 pdev->tuning_parms.tp_range_timeout_histo_us; 01801 break; 01802 01803 default: 01804 status = VL53L1_ERROR_INVALID_PARAMS; 01805 break; 01806 01807 } 01808 01809 LOG_FUNCTION_END(status); 01810 01811 return status; 01812 } 01813 01814 01815 VL53L1_Error VL53L1_set_preset_mode( 01816 VL53L1_DEV Dev, 01817 VL53L1_DevicePresetModes device_preset_mode, 01818 uint16_t dss_config__target_total_rate_mcps, 01819 uint32_t phasecal_config_timeout_us, 01820 uint32_t mm_config_timeout_us, 01821 uint32_t range_config_timeout_us, 01822 uint32_t inter_measurement_period_ms) 01823 { 01824 01825 01826 VL53L1_Error status = VL53L1_ERROR_NONE; 01827 VL53L1_LLDriverData_t *pdev = 01828 VL53L1DevStructGetLLDriverHandle(Dev); 01829 VL53L1_LLDriverResults_t *pres = 01830 VL53L1DevStructGetLLResultsHandle(Dev); 01831 01832 VL53L1_hist_post_process_config_t *phistpostprocess = 01833 &(pdev->histpostprocess); 01834 01835 VL53L1_static_config_t *pstatic = &(pdev->stat_cfg); 01836 VL53L1_histogram_config_t *phistogram = &(pdev->hist_cfg); 01837 VL53L1_general_config_t *pgeneral = &(pdev->gen_cfg); 01838 VL53L1_timing_config_t *ptiming = &(pdev->tim_cfg); 01839 VL53L1_dynamic_config_t *pdynamic = &(pdev->dyn_cfg); 01840 VL53L1_system_control_t *psystem = &(pdev->sys_ctrl); 01841 VL53L1_zone_config_t *pzone_cfg = &(pdev->zone_cfg); 01842 VL53L1_tuning_parm_storage_t *ptuning_parms = &(pdev->tuning_parms); 01843 VL53L1_low_power_auto_data_t *plpadata = 01844 &(pdev->low_power_auto_data); 01845 01846 LOG_FUNCTION_START(""); 01847 01848 01849 pdev->preset_mode = device_preset_mode; 01850 pdev->mm_config_timeout_us = mm_config_timeout_us; 01851 pdev->range_config_timeout_us = range_config_timeout_us; 01852 pdev->inter_measurement_period_ms = inter_measurement_period_ms; 01853 01854 01855 01856 VL53L1_init_ll_driver_state( 01857 Dev, 01858 VL53L1_DEVICESTATE_SW_STANDBY); 01859 01860 01861 01862 switch (device_preset_mode) { 01863 01864 case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING: 01865 status = VL53L1_preset_mode_standard_ranging( 01866 pstatic, 01867 phistogram, 01868 pgeneral, 01869 ptiming, 01870 pdynamic, 01871 psystem, 01872 ptuning_parms, 01873 pzone_cfg); 01874 break; 01875 01876 case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING_SHORT_RANGE: 01877 status = VL53L1_preset_mode_standard_ranging_short_range( 01878 pstatic, 01879 phistogram, 01880 pgeneral, 01881 ptiming, 01882 pdynamic, 01883 psystem, 01884 ptuning_parms, 01885 pzone_cfg); 01886 break; 01887 01888 case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING_LONG_RANGE: 01889 status = VL53L1_preset_mode_standard_ranging_long_range( 01890 pstatic, 01891 phistogram, 01892 pgeneral, 01893 ptiming, 01894 pdynamic, 01895 psystem, 01896 ptuning_parms, 01897 pzone_cfg); 01898 break; 01899 01900 case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING_MM1_CAL: 01901 status = VL53L1_preset_mode_standard_ranging_mm1_cal( 01902 pstatic, 01903 phistogram, 01904 pgeneral, 01905 ptiming, 01906 pdynamic, 01907 psystem, 01908 ptuning_parms, 01909 pzone_cfg); 01910 break; 01911 01912 case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING_MM2_CAL: 01913 status = VL53L1_preset_mode_standard_ranging_mm2_cal( 01914 pstatic, 01915 phistogram, 01916 pgeneral, 01917 ptiming, 01918 pdynamic, 01919 psystem, 01920 ptuning_parms, 01921 pzone_cfg); 01922 break; 01923 01924 case VL53L1_DEVICEPRESETMODE_TIMED_RANGING: 01925 status = VL53L1_preset_mode_timed_ranging( 01926 pstatic, 01927 phistogram, 01928 pgeneral, 01929 ptiming, 01930 pdynamic, 01931 psystem, 01932 ptuning_parms, 01933 pzone_cfg); 01934 break; 01935 01936 case VL53L1_DEVICEPRESETMODE_TIMED_RANGING_SHORT_RANGE: 01937 status = VL53L1_preset_mode_timed_ranging_short_range( 01938 pstatic, 01939 phistogram, 01940 pgeneral, 01941 ptiming, 01942 pdynamic, 01943 psystem, 01944 ptuning_parms, 01945 pzone_cfg); 01946 break; 01947 01948 case VL53L1_DEVICEPRESETMODE_TIMED_RANGING_LONG_RANGE: 01949 status = VL53L1_preset_mode_timed_ranging_long_range( 01950 pstatic, 01951 phistogram, 01952 pgeneral, 01953 ptiming, 01954 pdynamic, 01955 psystem, 01956 ptuning_parms, 01957 pzone_cfg); 01958 break; 01959 01960 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING: 01961 status = VL53L1_preset_mode_histogram_ranging( 01962 phistpostprocess, 01963 pstatic, 01964 phistogram, 01965 pgeneral, 01966 ptiming, 01967 pdynamic, 01968 psystem, 01969 ptuning_parms, 01970 pzone_cfg); 01971 break; 01972 01973 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_WITH_MM1: 01974 status = VL53L1_preset_mode_histogram_ranging_with_mm1( 01975 phistpostprocess, 01976 pstatic, 01977 phistogram, 01978 pgeneral, 01979 ptiming, 01980 pdynamic, 01981 psystem, 01982 ptuning_parms, 01983 pzone_cfg); 01984 break; 01985 01986 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_WITH_MM2: 01987 status = VL53L1_preset_mode_histogram_ranging_with_mm2( 01988 phistpostprocess, 01989 pstatic, 01990 phistogram, 01991 pgeneral, 01992 ptiming, 01993 pdynamic, 01994 psystem, 01995 ptuning_parms, 01996 pzone_cfg); 01997 break; 01998 01999 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_MM1_CAL: 02000 status = VL53L1_preset_mode_histogram_ranging_mm1_cal( 02001 phistpostprocess, 02002 pstatic, 02003 phistogram, 02004 pgeneral, 02005 ptiming, 02006 pdynamic, 02007 psystem, 02008 ptuning_parms, 02009 pzone_cfg); 02010 break; 02011 02012 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_MM2_CAL: 02013 status = VL53L1_preset_mode_histogram_ranging_mm2_cal( 02014 phistpostprocess, 02015 pstatic, 02016 phistogram, 02017 pgeneral, 02018 ptiming, 02019 pdynamic, 02020 psystem, 02021 ptuning_parms, 02022 pzone_cfg); 02023 break; 02024 02025 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MULTIZONE: 02026 status = VL53L1_preset_mode_histogram_multizone( 02027 phistpostprocess, 02028 pstatic, 02029 phistogram, 02030 pgeneral, 02031 ptiming, 02032 pdynamic, 02033 psystem, 02034 ptuning_parms, 02035 pzone_cfg); 02036 break; 02037 02038 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MULTIZONE_SHORT_RANGE: 02039 status = VL53L1_preset_mode_histogram_multizone_short_range( 02040 phistpostprocess, 02041 pstatic, 02042 phistogram, 02043 pgeneral, 02044 ptiming, 02045 pdynamic, 02046 psystem, 02047 ptuning_parms, 02048 pzone_cfg); 02049 break; 02050 02051 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MULTIZONE_LONG_RANGE: 02052 status = VL53L1_preset_mode_histogram_multizone_long_range( 02053 phistpostprocess, 02054 pstatic, 02055 phistogram, 02056 pgeneral, 02057 ptiming, 02058 pdynamic, 02059 psystem, 02060 ptuning_parms, 02061 pzone_cfg); 02062 break; 02063 02064 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_REF_ARRAY: 02065 status = VL53L1_preset_mode_histogram_ranging_ref( 02066 phistpostprocess, 02067 pstatic, 02068 phistogram, 02069 pgeneral, 02070 ptiming, 02071 pdynamic, 02072 psystem, 02073 ptuning_parms, 02074 pzone_cfg); 02075 break; 02076 02077 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_SHORT_TIMING: 02078 status = VL53L1_preset_mode_histogram_ranging_short_timing( 02079 phistpostprocess, 02080 pstatic, 02081 phistogram, 02082 pgeneral, 02083 ptiming, 02084 pdynamic, 02085 psystem, 02086 ptuning_parms, 02087 pzone_cfg); 02088 break; 02089 02090 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_LONG_RANGE: 02091 status = VL53L1_preset_mode_histogram_long_range( 02092 phistpostprocess, 02093 pstatic, 02094 phistogram, 02095 pgeneral, 02096 ptiming, 02097 pdynamic, 02098 psystem, 02099 ptuning_parms, 02100 pzone_cfg); 02101 break; 02102 02103 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_LONG_RANGE_MM1: 02104 status = VL53L1_preset_mode_histogram_long_range_mm1( 02105 phistpostprocess, 02106 pstatic, 02107 phistogram, 02108 pgeneral, 02109 ptiming, 02110 pdynamic, 02111 psystem, 02112 ptuning_parms, 02113 pzone_cfg); 02114 break; 02115 02116 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_LONG_RANGE_MM2: 02117 status = VL53L1_preset_mode_histogram_long_range_mm2( 02118 phistpostprocess, 02119 pstatic, 02120 phistogram, 02121 pgeneral, 02122 ptiming, 02123 pdynamic, 02124 psystem, 02125 ptuning_parms, 02126 pzone_cfg); 02127 break; 02128 02129 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MEDIUM_RANGE: 02130 status = VL53L1_preset_mode_histogram_medium_range( 02131 phistpostprocess, 02132 pstatic, 02133 phistogram, 02134 pgeneral, 02135 ptiming, 02136 pdynamic, 02137 psystem, 02138 ptuning_parms, 02139 pzone_cfg); 02140 break; 02141 02142 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MEDIUM_RANGE_MM1: 02143 status = VL53L1_preset_mode_histogram_medium_range_mm1( 02144 phistpostprocess, 02145 pstatic, 02146 phistogram, 02147 pgeneral, 02148 ptiming, 02149 pdynamic, 02150 psystem, 02151 ptuning_parms, 02152 pzone_cfg); 02153 break; 02154 02155 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MEDIUM_RANGE_MM2: 02156 status = VL53L1_preset_mode_histogram_medium_range_mm2( 02157 phistpostprocess, 02158 pstatic, 02159 phistogram, 02160 pgeneral, 02161 ptiming, 02162 pdynamic, 02163 psystem, 02164 ptuning_parms, 02165 pzone_cfg); 02166 break; 02167 02168 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_SHORT_RANGE: 02169 status = VL53L1_preset_mode_histogram_short_range( 02170 phistpostprocess, 02171 pstatic, 02172 phistogram, 02173 pgeneral, 02174 ptiming, 02175 pdynamic, 02176 psystem, 02177 ptuning_parms, 02178 pzone_cfg); 02179 break; 02180 02181 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_SHORT_RANGE_MM1: 02182 status = VL53L1_preset_mode_histogram_short_range_mm1( 02183 phistpostprocess, 02184 pstatic, 02185 phistogram, 02186 pgeneral, 02187 ptiming, 02188 pdynamic, 02189 psystem, 02190 ptuning_parms, 02191 pzone_cfg); 02192 break; 02193 02194 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_SHORT_RANGE_MM2: 02195 status = VL53L1_preset_mode_histogram_short_range_mm2( 02196 phistpostprocess, 02197 pstatic, 02198 phistogram, 02199 pgeneral, 02200 ptiming, 02201 pdynamic, 02202 psystem, 02203 ptuning_parms, 02204 pzone_cfg); 02205 break; 02206 02207 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_CHARACTERISATION: 02208 status = VL53L1_preset_mode_histogram_characterisation( 02209 phistpostprocess, 02210 pstatic, 02211 phistogram, 02212 pgeneral, 02213 ptiming, 02214 pdynamic, 02215 psystem, 02216 ptuning_parms, 02217 pzone_cfg); 02218 break; 02219 02220 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_XTALK_PLANAR: 02221 status = VL53L1_preset_mode_histogram_xtalk_planar( 02222 phistpostprocess, 02223 pstatic, 02224 phistogram, 02225 pgeneral, 02226 ptiming, 02227 pdynamic, 02228 psystem, 02229 ptuning_parms, 02230 pzone_cfg); 02231 break; 02232 02233 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_XTALK_MM1: 02234 status = VL53L1_preset_mode_histogram_xtalk_mm1( 02235 phistpostprocess, 02236 pstatic, 02237 phistogram, 02238 pgeneral, 02239 ptiming, 02240 pdynamic, 02241 psystem, 02242 ptuning_parms, 02243 pzone_cfg); 02244 break; 02245 02246 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_XTALK_MM2: 02247 status = VL53L1_preset_mode_histogram_xtalk_mm2( 02248 phistpostprocess, 02249 pstatic, 02250 phistogram, 02251 pgeneral, 02252 ptiming, 02253 pdynamic, 02254 psystem, 02255 ptuning_parms, 02256 pzone_cfg); 02257 break; 02258 02259 case VL53L1_DEVICEPRESETMODE_OLT: 02260 status = VL53L1_preset_mode_olt( 02261 pstatic, 02262 phistogram, 02263 pgeneral, 02264 ptiming, 02265 pdynamic, 02266 psystem, 02267 ptuning_parms, 02268 pzone_cfg); 02269 break; 02270 02271 case VL53L1_DEVICEPRESETMODE_SINGLESHOT_RANGING: 02272 status = VL53L1_preset_mode_singleshot_ranging( 02273 pstatic, 02274 phistogram, 02275 pgeneral, 02276 ptiming, 02277 pdynamic, 02278 psystem, 02279 ptuning_parms, 02280 pzone_cfg); 02281 break; 02282 02283 case VL53L1_DEVICEPRESETMODE_LOWPOWERAUTO_SHORT_RANGE: 02284 status = VL53L1_preset_mode_low_power_auto_short_ranging( 02285 pstatic, 02286 phistogram, 02287 pgeneral, 02288 ptiming, 02289 pdynamic, 02290 psystem, 02291 ptuning_parms, 02292 pzone_cfg, 02293 plpadata); 02294 break; 02295 02296 case VL53L1_DEVICEPRESETMODE_LOWPOWERAUTO_MEDIUM_RANGE: 02297 status = VL53L1_preset_mode_low_power_auto_ranging( 02298 pstatic, 02299 phistogram, 02300 pgeneral, 02301 ptiming, 02302 pdynamic, 02303 psystem, 02304 ptuning_parms, 02305 pzone_cfg, 02306 plpadata); 02307 break; 02308 02309 case VL53L1_DEVICEPRESETMODE_LOWPOWERAUTO_LONG_RANGE: 02310 status = VL53L1_preset_mode_low_power_auto_long_ranging( 02311 pstatic, 02312 phistogram, 02313 pgeneral, 02314 ptiming, 02315 pdynamic, 02316 psystem, 02317 ptuning_parms, 02318 pzone_cfg, 02319 plpadata); 02320 break; 02321 02322 02323 case VL53L1_DEVICEPRESETMODE_SPECIAL_HISTOGRAM_SHORT_RANGE: 02324 status = VL53L1_preset_mode_special_histogram_short_range( 02325 phistpostprocess, 02326 pstatic, 02327 phistogram, 02328 pgeneral, 02329 ptiming, 02330 pdynamic, 02331 psystem, 02332 ptuning_parms, 02333 pzone_cfg); 02334 break; 02335 02336 default: 02337 status = VL53L1_ERROR_INVALID_PARAMS; 02338 break; 02339 02340 } 02341 02342 02343 02344 if (status == VL53L1_ERROR_NONE) { 02345 02346 pstatic->dss_config__target_total_rate_mcps = 02347 dss_config__target_total_rate_mcps; 02348 pdev->dss_config__target_total_rate_mcps = 02349 dss_config__target_total_rate_mcps; 02350 02351 } 02352 02353 02354 02355 if (status == VL53L1_ERROR_NONE) 02356 status = 02357 VL53L1_set_timeouts_us( 02358 Dev, 02359 phasecal_config_timeout_us, 02360 mm_config_timeout_us, 02361 range_config_timeout_us); 02362 02363 if (status == VL53L1_ERROR_NONE) 02364 status = 02365 VL53L1_set_inter_measurement_period_ms( 02366 Dev, 02367 inter_measurement_period_ms); 02368 02369 02370 02371 V53L1_init_zone_results_structure( 02372 pdev->zone_cfg.active_zones+1, 02373 &(pres->zone_results)); 02374 02375 LOG_FUNCTION_END(status); 02376 02377 return status; 02378 } 02379 02380 02381 VL53L1_Error VL53L1_set_zone_preset( 02382 VL53L1_DEV Dev, 02383 VL53L1_DeviceZonePreset zone_preset) 02384 { 02385 02386 02387 VL53L1_Error status = VL53L1_ERROR_NONE; 02388 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 02389 02390 VL53L1_general_config_t *pgeneral = &(pdev->gen_cfg); 02391 VL53L1_zone_config_t *pzone_cfg = &(pdev->zone_cfg); 02392 02393 LOG_FUNCTION_START(""); 02394 02395 02396 pdev->zone_preset = zone_preset; 02397 02398 02399 02400 switch (zone_preset) { 02401 02402 case VL53L1_DEVICEZONEPRESET_XTALK_PLANAR: 02403 status = 02404 VL53L1_zone_preset_xtalk_planar( 02405 pgeneral, 02406 pzone_cfg); 02407 break; 02408 02409 case VL53L1_DEVICEZONEPRESET_1X1_SIZE_16X16: 02410 status = 02411 VL53L1_init_zone_config_structure( 02412 8, 1, 1, 02413 8, 1, 1, 02414 15, 15, 02415 pzone_cfg); 02416 break; 02417 02418 case VL53L1_DEVICEZONEPRESET_1X2_SIZE_16X8: 02419 status = 02420 VL53L1_init_zone_config_structure( 02421 8, 1, 1, 02422 4, 8, 2, 02423 15, 7, 02424 pzone_cfg); 02425 break; 02426 02427 case VL53L1_DEVICEZONEPRESET_2X1_SIZE_8X16: 02428 status = 02429 VL53L1_init_zone_config_structure( 02430 4, 8, 2, 02431 8, 1, 1, 02432 7, 15, 02433 pzone_cfg); 02434 break; 02435 02436 case VL53L1_DEVICEZONEPRESET_2X2_SIZE_8X8: 02437 status = 02438 VL53L1_init_zone_config_structure( 02439 4, 8, 2, 02440 4, 8, 2, 02441 7, 7, 02442 pzone_cfg); 02443 break; 02444 02445 case VL53L1_DEVICEZONEPRESET_3X3_SIZE_5X5: 02446 status = 02447 VL53L1_init_zone_config_structure( 02448 2, 5, 3, 02449 2, 5, 3, 02450 4, 4, 02451 pzone_cfg); 02452 break; 02453 02454 case VL53L1_DEVICEZONEPRESET_4X4_SIZE_4X4: 02455 status = 02456 VL53L1_init_zone_config_structure( 02457 2, 4, 4, 02458 2, 4, 4, 02459 3, 3, 02460 pzone_cfg); 02461 break; 02462 02463 case VL53L1_DEVICEZONEPRESET_5X5_SIZE_4X4: 02464 status = 02465 VL53L1_init_zone_config_structure( 02466 2, 3, 5, 02467 2, 3, 5, 02468 3, 3, 02469 pzone_cfg); 02470 break; 02471 02472 case VL53L1_DEVICEZONEPRESET_11X11_SIZE_5X5: 02473 status = 02474 VL53L1_init_zone_config_structure( 02475 3, 1, 11, 02476 3, 1, 11, 02477 4, 4, 02478 pzone_cfg); 02479 break; 02480 02481 case VL53L1_DEVICEZONEPRESET_13X13_SIZE_4X4: 02482 status = 02483 VL53L1_init_zone_config_structure( 02484 2, 1, 13, 02485 2, 1, 13, 02486 3, 3, 02487 pzone_cfg); 02488 02489 break; 02490 02491 case VL53L1_DEVICEZONEPRESET_1X1_SIZE_4X4_POS_8X8: 02492 status = 02493 VL53L1_init_zone_config_structure( 02494 8, 1, 1, 02495 8, 1, 1, 02496 3, 3, 02497 pzone_cfg); 02498 break; 02499 02500 } 02501 02502 02503 02504 if (pzone_cfg->active_zones == 0) 02505 pdev->gen_cfg.global_config__stream_divider = 0; 02506 else if (pzone_cfg->active_zones < VL53L1_MAX_USER_ZONES) 02507 pdev->gen_cfg.global_config__stream_divider = 02508 pzone_cfg->active_zones + 1; 02509 else 02510 pdev->gen_cfg.global_config__stream_divider = 02511 VL53L1_MAX_USER_ZONES + 1; 02512 02513 LOG_FUNCTION_END(status); 02514 02515 return status; 02516 } 02517 02518 02519 VL53L1_Error VL53L1_enable_xtalk_compensation( 02520 VL53L1_DEV Dev) 02521 { 02522 02523 02524 VL53L1_Error status = VL53L1_ERROR_NONE; 02525 uint32_t tempu32; 02526 02527 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 02528 VL53L1_xtalk_config_t *pC = &(pdev->xtalk_cfg); 02529 VL53L1_hist_post_process_config_t *pHP = &(pdev->histpostprocess); 02530 VL53L1_customer_nvm_managed_t *pN = &(pdev->customer); 02531 02532 LOG_FUNCTION_START(""); 02533 02534 02535 tempu32 = VL53L1_calc_crosstalk_plane_offset_with_margin( 02536 pC->algo__crosstalk_compensation_plane_offset_kcps, 02537 pC->lite_mode_crosstalk_margin_kcps); 02538 if (tempu32 > 0xFFFF) 02539 tempu32 = 0xFFFF; 02540 02541 pN->algo__crosstalk_compensation_plane_offset_kcps = 02542 (uint16_t)tempu32; 02543 02544 pN->algo__crosstalk_compensation_x_plane_gradient_kcps = 02545 pC->algo__crosstalk_compensation_x_plane_gradient_kcps; 02546 02547 pN->algo__crosstalk_compensation_y_plane_gradient_kcps = 02548 pC->algo__crosstalk_compensation_y_plane_gradient_kcps; 02549 02550 02551 pHP->algo__crosstalk_compensation_plane_offset_kcps = 02552 VL53L1_calc_crosstalk_plane_offset_with_margin( 02553 pC->algo__crosstalk_compensation_plane_offset_kcps, 02554 pC->histogram_mode_crosstalk_margin_kcps); 02555 02556 pHP->algo__crosstalk_compensation_x_plane_gradient_kcps 02557 = pC->algo__crosstalk_compensation_x_plane_gradient_kcps; 02558 pHP->algo__crosstalk_compensation_y_plane_gradient_kcps 02559 = pC->algo__crosstalk_compensation_y_plane_gradient_kcps; 02560 02561 02562 02563 pC->global_crosstalk_compensation_enable = 0x01; 02564 02565 pHP->algo__crosstalk_compensation_enable = 02566 pC->global_crosstalk_compensation_enable; 02567 02568 02569 02570 02571 if (status == VL53L1_ERROR_NONE) { 02572 pC->crosstalk_range_ignore_threshold_rate_mcps = 02573 VL53L1_calc_range_ignore_threshold( 02574 pC->algo__crosstalk_compensation_plane_offset_kcps, 02575 pC->algo__crosstalk_compensation_x_plane_gradient_kcps, 02576 pC->algo__crosstalk_compensation_y_plane_gradient_kcps, 02577 pC->crosstalk_range_ignore_threshold_mult); 02578 } 02579 02580 02581 02582 if (status == VL53L1_ERROR_NONE) 02583 status = 02584 VL53L1_set_customer_nvm_managed( 02585 Dev, 02586 &(pdev->customer)); 02587 02588 LOG_FUNCTION_END(status); 02589 02590 return status; 02591 02592 } 02593 02594 void VL53L1_get_xtalk_compensation_enable( 02595 VL53L1_DEV Dev, 02596 uint8_t *pcrosstalk_compensation_enable) 02597 { 02598 02599 02600 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 02601 02602 LOG_FUNCTION_START(""); 02603 02604 02605 02606 *pcrosstalk_compensation_enable = 02607 pdev->xtalk_cfg.global_crosstalk_compensation_enable; 02608 02609 } 02610 02611 02612 VL53L1_Error VL53L1_get_lite_xtalk_margin_kcps( 02613 VL53L1_DEV Dev, 02614 int16_t *pxtalk_margin) 02615 { 02616 02617 02618 02619 VL53L1_Error status = VL53L1_ERROR_NONE; 02620 02621 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 02622 02623 LOG_FUNCTION_START(""); 02624 02625 *pxtalk_margin = pdev->xtalk_cfg.lite_mode_crosstalk_margin_kcps; 02626 02627 LOG_FUNCTION_END(status); 02628 02629 return status; 02630 02631 } 02632 02633 VL53L1_Error VL53L1_set_lite_xtalk_margin_kcps( 02634 VL53L1_DEV Dev, 02635 int16_t xtalk_margin) 02636 { 02637 02638 02639 02640 VL53L1_Error status = VL53L1_ERROR_NONE; 02641 02642 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 02643 02644 LOG_FUNCTION_START(""); 02645 02646 pdev->xtalk_cfg.lite_mode_crosstalk_margin_kcps = xtalk_margin; 02647 02648 LOG_FUNCTION_END(status); 02649 02650 return status; 02651 } 02652 02653 02654 VL53L1_Error VL53L1_get_histogram_xtalk_margin_kcps( 02655 VL53L1_DEV Dev, 02656 int16_t *pxtalk_margin) 02657 { 02658 02659 02660 02661 VL53L1_Error status = VL53L1_ERROR_NONE; 02662 02663 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 02664 02665 LOG_FUNCTION_START(""); 02666 02667 *pxtalk_margin = pdev->xtalk_cfg.histogram_mode_crosstalk_margin_kcps; 02668 02669 LOG_FUNCTION_END(status); 02670 02671 return status; 02672 02673 } 02674 02675 VL53L1_Error VL53L1_set_histogram_xtalk_margin_kcps( 02676 VL53L1_DEV Dev, 02677 int16_t xtalk_margin) 02678 { 02679 02680 02681 02682 VL53L1_Error status = VL53L1_ERROR_NONE; 02683 02684 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 02685 02686 LOG_FUNCTION_START(""); 02687 02688 pdev->xtalk_cfg.histogram_mode_crosstalk_margin_kcps = xtalk_margin; 02689 02690 LOG_FUNCTION_END(status); 02691 02692 return status; 02693 } 02694 02695 VL53L1_Error VL53L1_restore_xtalk_nvm_default( 02696 VL53L1_DEV Dev) 02697 { 02698 02699 02700 02701 VL53L1_Error status = VL53L1_ERROR_NONE; 02702 02703 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 02704 VL53L1_xtalk_config_t *pC = &(pdev->xtalk_cfg); 02705 02706 LOG_FUNCTION_START(""); 02707 02708 pC->algo__crosstalk_compensation_plane_offset_kcps = 02709 pC->nvm_default__crosstalk_compensation_plane_offset_kcps; 02710 pC->algo__crosstalk_compensation_x_plane_gradient_kcps = 02711 pC->nvm_default__crosstalk_compensation_x_plane_gradient_kcps; 02712 pC->algo__crosstalk_compensation_y_plane_gradient_kcps = 02713 pC->nvm_default__crosstalk_compensation_y_plane_gradient_kcps; 02714 02715 LOG_FUNCTION_END(status); 02716 02717 return status; 02718 } 02719 02720 VL53L1_Error VL53L1_disable_xtalk_compensation( 02721 VL53L1_DEV Dev) 02722 { 02723 02724 02725 VL53L1_Error status = VL53L1_ERROR_NONE; 02726 02727 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 02728 VL53L1_hist_post_process_config_t *pHP = &(pdev->histpostprocess); 02729 VL53L1_customer_nvm_managed_t *pN = &(pdev->customer); 02730 02731 LOG_FUNCTION_START(""); 02732 02733 02734 pN->algo__crosstalk_compensation_plane_offset_kcps = 02735 0x00; 02736 02737 pN->algo__crosstalk_compensation_x_plane_gradient_kcps = 02738 0x00; 02739 02740 pN->algo__crosstalk_compensation_y_plane_gradient_kcps = 02741 0x00; 02742 02743 02744 02745 pdev->xtalk_cfg.global_crosstalk_compensation_enable = 0x00; 02746 02747 pHP->algo__crosstalk_compensation_enable = 02748 pdev->xtalk_cfg.global_crosstalk_compensation_enable; 02749 02750 02751 02752 if (status == VL53L1_ERROR_NONE) { 02753 pdev->xtalk_cfg.crosstalk_range_ignore_threshold_rate_mcps = 02754 0x0000; 02755 } 02756 02757 02758 02759 if (status == VL53L1_ERROR_NONE) { 02760 status = 02761 VL53L1_set_customer_nvm_managed( 02762 Dev, 02763 &(pdev->customer)); 02764 } 02765 LOG_FUNCTION_END(status); 02766 02767 return status; 02768 02769 } 02770 02771 02772 VL53L1_Error VL53L1_get_histogram_phase_consistency( 02773 VL53L1_DEV Dev, 02774 uint8_t *pphase_consistency) 02775 { 02776 02777 02778 02779 VL53L1_Error status = VL53L1_ERROR_NONE; 02780 02781 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 02782 VL53L1_hist_post_process_config_t *pHP = &(pdev->histpostprocess); 02783 02784 LOG_FUNCTION_START(""); 02785 02786 *pphase_consistency = 02787 pHP->algo__consistency_check__phase_tolerance; 02788 02789 LOG_FUNCTION_END(status); 02790 02791 return status; 02792 02793 } 02794 02795 VL53L1_Error VL53L1_set_histogram_phase_consistency( 02796 VL53L1_DEV Dev, 02797 uint8_t phase_consistency) 02798 { 02799 02800 02801 02802 VL53L1_Error status = VL53L1_ERROR_NONE; 02803 02804 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 02805 02806 LOG_FUNCTION_START(""); 02807 02808 pdev->histpostprocess.algo__consistency_check__phase_tolerance = 02809 phase_consistency; 02810 02811 LOG_FUNCTION_END(status); 02812 02813 return status; 02814 02815 } 02816 02817 VL53L1_Error VL53L1_get_histogram_event_consistency( 02818 VL53L1_DEV Dev, 02819 uint8_t *pevent_consistency) 02820 { 02821 02822 02823 02824 VL53L1_Error status = VL53L1_ERROR_NONE; 02825 02826 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 02827 02828 LOG_FUNCTION_START(""); 02829 02830 *pevent_consistency = 02831 pdev->histpostprocess.algo__consistency_check__event_sigma; 02832 02833 LOG_FUNCTION_END(status); 02834 02835 return status; 02836 02837 } 02838 02839 VL53L1_Error VL53L1_set_histogram_event_consistency( 02840 VL53L1_DEV Dev, 02841 uint8_t event_consistency) 02842 { 02843 02844 02845 02846 VL53L1_Error status = VL53L1_ERROR_NONE; 02847 02848 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 02849 02850 LOG_FUNCTION_START(""); 02851 02852 pdev->histpostprocess.algo__consistency_check__event_sigma = 02853 event_consistency; 02854 02855 LOG_FUNCTION_END(status); 02856 02857 return status; 02858 02859 } 02860 02861 VL53L1_Error VL53L1_get_histogram_ambient_threshold_sigma( 02862 VL53L1_DEV Dev, 02863 uint8_t *pamb_thresh_sigma) 02864 { 02865 02866 02867 02868 VL53L1_Error status = VL53L1_ERROR_NONE; 02869 02870 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 02871 02872 LOG_FUNCTION_START(""); 02873 02874 *pamb_thresh_sigma = 02875 pdev->histpostprocess.ambient_thresh_sigma1; 02876 02877 LOG_FUNCTION_END(status); 02878 02879 return status; 02880 02881 } 02882 02883 VL53L1_Error VL53L1_set_histogram_ambient_threshold_sigma( 02884 VL53L1_DEV Dev, 02885 uint8_t amb_thresh_sigma) 02886 { 02887 02888 02889 02890 VL53L1_Error status = VL53L1_ERROR_NONE; 02891 02892 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 02893 02894 LOG_FUNCTION_START(""); 02895 02896 pdev->histpostprocess.ambient_thresh_sigma1 = 02897 amb_thresh_sigma; 02898 02899 LOG_FUNCTION_END(status); 02900 02901 return status; 02902 02903 } 02904 02905 VL53L1_Error VL53L1_get_lite_sigma_threshold( 02906 VL53L1_DEV Dev, 02907 uint16_t *plite_sigma) 02908 { 02909 02910 02911 02912 VL53L1_Error status = VL53L1_ERROR_NONE; 02913 02914 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 02915 02916 LOG_FUNCTION_START(""); 02917 02918 *plite_sigma = 02919 pdev->tim_cfg.range_config__sigma_thresh; 02920 02921 LOG_FUNCTION_END(status); 02922 02923 return status; 02924 02925 } 02926 02927 VL53L1_Error VL53L1_set_lite_sigma_threshold( 02928 VL53L1_DEV Dev, 02929 uint16_t lite_sigma) 02930 { 02931 02932 02933 02934 VL53L1_Error status = VL53L1_ERROR_NONE; 02935 02936 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 02937 02938 LOG_FUNCTION_START(""); 02939 02940 pdev->tim_cfg.range_config__sigma_thresh = lite_sigma; 02941 02942 LOG_FUNCTION_END(status); 02943 02944 return status; 02945 02946 } 02947 02948 VL53L1_Error VL53L1_get_lite_min_count_rate( 02949 VL53L1_DEV Dev, 02950 uint16_t *plite_mincountrate) 02951 { 02952 02953 02954 02955 VL53L1_Error status = VL53L1_ERROR_NONE; 02956 02957 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 02958 02959 LOG_FUNCTION_START(""); 02960 02961 *plite_mincountrate = 02962 pdev->tim_cfg.range_config__min_count_rate_rtn_limit_mcps; 02963 02964 LOG_FUNCTION_END(status); 02965 02966 return status; 02967 02968 } 02969 02970 VL53L1_Error VL53L1_set_lite_min_count_rate( 02971 VL53L1_DEV Dev, 02972 uint16_t lite_mincountrate) 02973 { 02974 02975 02976 02977 VL53L1_Error status = VL53L1_ERROR_NONE; 02978 02979 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 02980 02981 LOG_FUNCTION_START(""); 02982 02983 pdev->tim_cfg.range_config__min_count_rate_rtn_limit_mcps = 02984 lite_mincountrate; 02985 02986 LOG_FUNCTION_END(status); 02987 02988 return status; 02989 02990 } 02991 02992 02993 VL53L1_Error VL53L1_get_xtalk_detect_config( 02994 VL53L1_DEV Dev, 02995 int16_t *pmax_valid_range_mm, 02996 int16_t *pmin_valid_range_mm, 02997 uint16_t *pmax_valid_rate_kcps, 02998 uint16_t *pmax_sigma_mm) 02999 { 03000 03001 03002 03003 VL53L1_Error status = VL53L1_ERROR_NONE; 03004 03005 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 03006 03007 LOG_FUNCTION_START(""); 03008 03009 *pmax_valid_range_mm = 03010 pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_range_mm; 03011 *pmin_valid_range_mm = 03012 pdev->xtalk_cfg.algo__crosstalk_detect_min_valid_range_mm; 03013 *pmax_valid_rate_kcps = 03014 pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_rate_kcps; 03015 *pmax_sigma_mm = 03016 pdev->xtalk_cfg.algo__crosstalk_detect_max_sigma_mm; 03017 03018 LOG_FUNCTION_END(status); 03019 03020 return status; 03021 03022 } 03023 03024 VL53L1_Error VL53L1_set_xtalk_detect_config( 03025 VL53L1_DEV Dev, 03026 int16_t max_valid_range_mm, 03027 int16_t min_valid_range_mm, 03028 uint16_t max_valid_rate_kcps, 03029 uint16_t max_sigma_mm) 03030 { 03031 03032 03033 03034 VL53L1_Error status = VL53L1_ERROR_NONE; 03035 03036 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 03037 03038 LOG_FUNCTION_START(""); 03039 03040 pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_range_mm = 03041 max_valid_range_mm; 03042 pdev->xtalk_cfg.algo__crosstalk_detect_min_valid_range_mm = 03043 min_valid_range_mm; 03044 pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_rate_kcps = 03045 max_valid_rate_kcps; 03046 pdev->xtalk_cfg.algo__crosstalk_detect_max_sigma_mm = 03047 max_sigma_mm; 03048 03049 LOG_FUNCTION_END(status); 03050 03051 return status; 03052 03053 } 03054 03055 VL53L1_Error VL53L1_get_target_order_mode( 03056 VL53L1_DEV Dev, 03057 VL53L1_HistTargetOrder *phist_target_order) 03058 { 03059 03060 03061 03062 VL53L1_Error status = VL53L1_ERROR_NONE; 03063 03064 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 03065 03066 LOG_FUNCTION_START(""); 03067 03068 *phist_target_order = 03069 pdev->histpostprocess.hist_target_order; 03070 03071 LOG_FUNCTION_END(status); 03072 03073 return status; 03074 03075 } 03076 03077 VL53L1_Error VL53L1_set_target_order_mode( 03078 VL53L1_DEV Dev, 03079 VL53L1_HistTargetOrder hist_target_order) 03080 { 03081 03082 03083 03084 VL53L1_Error status = VL53L1_ERROR_NONE; 03085 03086 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 03087 03088 LOG_FUNCTION_START(""); 03089 03090 pdev->histpostprocess.hist_target_order = hist_target_order; 03091 03092 LOG_FUNCTION_END(status); 03093 03094 return status; 03095 03096 } 03097 03098 03099 VL53L1_Error VL53L1_get_dmax_reflectance_values( 03100 VL53L1_DEV Dev, 03101 VL53L1_dmax_reflectance_array_t *pdmax_reflectances) 03102 { 03103 03104 VL53L1_Error status = VL53L1_ERROR_NONE; 03105 03106 uint8_t i = 0; 03107 03108 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 03109 03110 LOG_FUNCTION_START(""); 03111 03112 03113 03114 for (i = 0; i < VL53L1_MAX_AMBIENT_DMAX_VALUES; i++) { 03115 pdmax_reflectances->target_reflectance_for_dmax[i] = 03116 pdev->dmax_cfg.target_reflectance_for_dmax_calc[i]; 03117 } 03118 03119 LOG_FUNCTION_END(status); 03120 03121 return status; 03122 03123 } 03124 03125 VL53L1_Error VL53L1_set_dmax_reflectance_values( 03126 VL53L1_DEV Dev, 03127 VL53L1_dmax_reflectance_array_t *pdmax_reflectances) 03128 { 03129 03130 VL53L1_Error status = VL53L1_ERROR_NONE; 03131 03132 uint8_t i = 0; 03133 03134 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 03135 03136 LOG_FUNCTION_START(""); 03137 03138 03139 03140 for (i = 0; i < VL53L1_MAX_AMBIENT_DMAX_VALUES; i++) { 03141 pdev->dmax_cfg.target_reflectance_for_dmax_calc[i] = 03142 pdmax_reflectances->target_reflectance_for_dmax[i]; 03143 } 03144 03145 LOG_FUNCTION_END(status); 03146 03147 return status; 03148 03149 } 03150 03151 VL53L1_Error VL53L1_get_vhv_loopbound( 03152 VL53L1_DEV Dev, 03153 uint8_t *pvhv_loopbound) 03154 { 03155 03156 03157 03158 VL53L1_Error status = VL53L1_ERROR_NONE; 03159 03160 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 03161 03162 LOG_FUNCTION_START(""); 03163 03164 *pvhv_loopbound = 03165 pdev->stat_nvm.vhv_config__timeout_macrop_loop_bound / 4; 03166 03167 LOG_FUNCTION_END(status); 03168 03169 return status; 03170 03171 } 03172 03173 03174 03175 VL53L1_Error VL53L1_set_vhv_loopbound( 03176 VL53L1_DEV Dev, 03177 uint8_t vhv_loopbound) 03178 { 03179 03180 03181 03182 VL53L1_Error status = VL53L1_ERROR_NONE; 03183 03184 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 03185 03186 LOG_FUNCTION_START(""); 03187 03188 pdev->stat_nvm.vhv_config__timeout_macrop_loop_bound = 03189 (pdev->stat_nvm.vhv_config__timeout_macrop_loop_bound & 0x03) + 03190 (vhv_loopbound * 4); 03191 03192 LOG_FUNCTION_END(status); 03193 03194 return status; 03195 03196 } 03197 03198 03199 03200 VL53L1_Error VL53L1_get_vhv_config( 03201 VL53L1_DEV Dev, 03202 uint8_t *pvhv_init_en, 03203 uint8_t *pvhv_init_value) 03204 { 03205 03206 03207 03208 03209 03210 VL53L1_Error status = VL53L1_ERROR_NONE; 03211 03212 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 03213 03214 LOG_FUNCTION_START(""); 03215 03216 *pvhv_init_en = (pdev->stat_nvm.vhv_config__init & 0x80) >> 7; 03217 *pvhv_init_value = 03218 (pdev->stat_nvm.vhv_config__init & 0x7F); 03219 03220 LOG_FUNCTION_END(status); 03221 03222 return status; 03223 03224 } 03225 03226 03227 03228 VL53L1_Error VL53L1_set_vhv_config( 03229 VL53L1_DEV Dev, 03230 uint8_t vhv_init_en, 03231 uint8_t vhv_init_value) 03232 { 03233 03234 03235 03236 VL53L1_Error status = VL53L1_ERROR_NONE; 03237 03238 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 03239 03240 LOG_FUNCTION_START(""); 03241 03242 pdev->stat_nvm.vhv_config__init = 03243 ((vhv_init_en & 0x01) << 7) + 03244 (vhv_init_value & 0x7F); 03245 03246 LOG_FUNCTION_END(status); 03247 03248 return status; 03249 03250 } 03251 03252 03253 03254 VL53L1_Error VL53L1_init_and_start_range( 03255 VL53L1_DEV Dev, 03256 uint8_t measurement_mode, 03257 VL53L1_DeviceConfigLevel device_config_level) 03258 { 03259 03260 03261 VL53L1_Error status = VL53L1_ERROR_NONE; 03262 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 03263 VL53L1_LLDriverResults_t *pres = 03264 VL53L1DevStructGetLLResultsHandle(Dev); 03265 03266 uint8_t buffer[VL53L1_MAX_I2C_XFER_SIZE]; 03267 03268 VL53L1_static_nvm_managed_t *pstatic_nvm = &(pdev->stat_nvm); 03269 VL53L1_customer_nvm_managed_t *pcustomer_nvm = &(pdev->customer); 03270 VL53L1_static_config_t *pstatic = &(pdev->stat_cfg); 03271 VL53L1_general_config_t *pgeneral = &(pdev->gen_cfg); 03272 VL53L1_timing_config_t *ptiming = &(pdev->tim_cfg); 03273 VL53L1_dynamic_config_t *pdynamic = &(pdev->dyn_cfg); 03274 VL53L1_system_control_t *psystem = &(pdev->sys_ctrl); 03275 03276 VL53L1_ll_driver_state_t *pstate = &(pdev->ll_state); 03277 VL53L1_customer_nvm_managed_t *pN = &(pdev->customer); 03278 03279 uint8_t *pbuffer = &buffer[0]; 03280 uint16_t i = 0; 03281 uint16_t i2c_index = 0; 03282 uint16_t i2c_buffer_offset_bytes = 0; 03283 uint16_t i2c_buffer_size_bytes = 0; 03284 03285 LOG_FUNCTION_START(""); 03286 03287 03288 pdev->measurement_mode = measurement_mode; 03289 03290 03291 03292 psystem->system__mode_start = 03293 (psystem->system__mode_start & 03294 VL53L1_DEVICEMEASUREMENTMODE_STOP_MASK) | 03295 measurement_mode; 03296 03297 03298 03299 status = 03300 VL53L1_set_user_zone( 03301 Dev, 03302 &(pdev->zone_cfg.user_zones[pdev->ll_state.cfg_zone_id])); 03303 03304 03305 if (pdev->zone_cfg.active_zones > 0) { 03306 status = 03307 VL53L1_set_zone_dss_config( 03308 Dev, 03309 &(pres->zone_dyn_cfgs.VL53L1_p_002[pdev->ll_state.cfg_zone_id]) 03310 ); 03311 } 03312 03313 03314 03315 03316 if (((pdev->sys_ctrl.system__mode_start & 03317 VL53L1_DEVICESCHEDULERMODE_HISTOGRAM) == 0x00) && 03318 (pdev->xtalk_cfg.global_crosstalk_compensation_enable 03319 == 0x01)) { 03320 pdev->stat_cfg.algo__range_ignore_threshold_mcps = 03321 pdev->xtalk_cfg.crosstalk_range_ignore_threshold_rate_mcps; 03322 } 03323 03324 03325 03326 03327 03328 if (pdev->low_power_auto_data.low_power_auto_range_count == 0xFF) 03329 pdev->low_power_auto_data.low_power_auto_range_count = 0x0; 03330 03331 03332 if ((pdev->low_power_auto_data.is_low_power_auto_mode == 1) && 03333 (pdev->low_power_auto_data.low_power_auto_range_count == 0)) { 03334 03335 pdev->low_power_auto_data.saved_interrupt_config = 03336 pdev->gen_cfg.system__interrupt_config_gpio; 03337 03338 pdev->gen_cfg.system__interrupt_config_gpio = 1 << 5; 03339 03340 if ((pdev->dyn_cfg.system__sequence_config & ( 03341 VL53L1_SEQUENCE_MM1_EN | VL53L1_SEQUENCE_MM2_EN)) == 03342 0x0) { 03343 pN->algo__part_to_part_range_offset_mm = 03344 (pN->mm_config__outer_offset_mm << 2); 03345 } else { 03346 pN->algo__part_to_part_range_offset_mm = 0x0; 03347 } 03348 03349 03350 if (device_config_level < 03351 VL53L1_DEVICECONFIGLEVEL_CUSTOMER_ONWARDS) { 03352 device_config_level = 03353 VL53L1_DEVICECONFIGLEVEL_CUSTOMER_ONWARDS; 03354 } 03355 } 03356 03357 if ((pdev->low_power_auto_data.is_low_power_auto_mode == 1) && 03358 (pdev->low_power_auto_data.low_power_auto_range_count == 1)) { 03359 03360 pdev->gen_cfg.system__interrupt_config_gpio = 03361 pdev->low_power_auto_data.saved_interrupt_config; 03362 03363 03364 device_config_level = VL53L1_DEVICECONFIGLEVEL_FULL; 03365 } 03366 03367 03368 03369 03370 03371 if (status == VL53L1_ERROR_NONE) 03372 status = VL53L1_save_cfg_data(Dev); 03373 03374 03375 03376 switch (device_config_level) { 03377 case VL53L1_DEVICECONFIGLEVEL_FULL: 03378 i2c_index = VL53L1_STATIC_NVM_MANAGED_I2C_INDEX; 03379 break; 03380 case VL53L1_DEVICECONFIGLEVEL_CUSTOMER_ONWARDS: 03381 i2c_index = VL53L1_CUSTOMER_NVM_MANAGED_I2C_INDEX; 03382 break; 03383 case VL53L1_DEVICECONFIGLEVEL_STATIC_ONWARDS: 03384 i2c_index = VL53L1_STATIC_CONFIG_I2C_INDEX; 03385 break; 03386 case VL53L1_DEVICECONFIGLEVEL_GENERAL_ONWARDS: 03387 i2c_index = VL53L1_GENERAL_CONFIG_I2C_INDEX; 03388 break; 03389 case VL53L1_DEVICECONFIGLEVEL_TIMING_ONWARDS: 03390 i2c_index = VL53L1_TIMING_CONFIG_I2C_INDEX; 03391 break; 03392 case VL53L1_DEVICECONFIGLEVEL_DYNAMIC_ONWARDS: 03393 i2c_index = VL53L1_DYNAMIC_CONFIG_I2C_INDEX; 03394 break; 03395 default: 03396 i2c_index = VL53L1_SYSTEM_CONTROL_I2C_INDEX; 03397 break; 03398 } 03399 03400 03401 03402 i2c_buffer_size_bytes = 03403 (VL53L1_SYSTEM_CONTROL_I2C_INDEX + 03404 VL53L1_SYSTEM_CONTROL_I2C_SIZE_BYTES) - 03405 i2c_index; 03406 03407 03408 03409 pbuffer = &buffer[0]; 03410 for (i = 0; i < i2c_buffer_size_bytes; i++) 03411 *pbuffer++ = 0; 03412 03413 03414 03415 if (device_config_level >= VL53L1_DEVICECONFIGLEVEL_FULL && 03416 status == VL53L1_ERROR_NONE) { 03417 03418 i2c_buffer_offset_bytes = 03419 VL53L1_STATIC_NVM_MANAGED_I2C_INDEX - i2c_index; 03420 03421 status = 03422 VL53L1_i2c_encode_static_nvm_managed( 03423 pstatic_nvm, 03424 VL53L1_STATIC_NVM_MANAGED_I2C_SIZE_BYTES, 03425 &buffer[i2c_buffer_offset_bytes]); 03426 } 03427 03428 if (device_config_level >= VL53L1_DEVICECONFIGLEVEL_CUSTOMER_ONWARDS && 03429 status == VL53L1_ERROR_NONE) { 03430 03431 i2c_buffer_offset_bytes = 03432 VL53L1_CUSTOMER_NVM_MANAGED_I2C_INDEX - i2c_index; 03433 03434 status = 03435 VL53L1_i2c_encode_customer_nvm_managed( 03436 pcustomer_nvm, 03437 VL53L1_CUSTOMER_NVM_MANAGED_I2C_SIZE_BYTES, 03438 &buffer[i2c_buffer_offset_bytes]); 03439 } 03440 03441 if (device_config_level >= VL53L1_DEVICECONFIGLEVEL_STATIC_ONWARDS && 03442 status == VL53L1_ERROR_NONE) { 03443 03444 i2c_buffer_offset_bytes = 03445 VL53L1_STATIC_CONFIG_I2C_INDEX - i2c_index; 03446 03447 status = 03448 VL53L1_i2c_encode_static_config( 03449 pstatic, 03450 VL53L1_STATIC_CONFIG_I2C_SIZE_BYTES, 03451 &buffer[i2c_buffer_offset_bytes]); 03452 } 03453 03454 if (device_config_level >= VL53L1_DEVICECONFIGLEVEL_GENERAL_ONWARDS && 03455 status == VL53L1_ERROR_NONE) { 03456 03457 i2c_buffer_offset_bytes = 03458 VL53L1_GENERAL_CONFIG_I2C_INDEX - i2c_index; 03459 03460 status = 03461 VL53L1_i2c_encode_general_config( 03462 pgeneral, 03463 VL53L1_GENERAL_CONFIG_I2C_SIZE_BYTES, 03464 &buffer[i2c_buffer_offset_bytes]); 03465 } 03466 03467 if (device_config_level >= VL53L1_DEVICECONFIGLEVEL_TIMING_ONWARDS && 03468 status == VL53L1_ERROR_NONE) { 03469 03470 i2c_buffer_offset_bytes = 03471 VL53L1_TIMING_CONFIG_I2C_INDEX - i2c_index; 03472 03473 status = 03474 VL53L1_i2c_encode_timing_config( 03475 ptiming, 03476 VL53L1_TIMING_CONFIG_I2C_SIZE_BYTES, 03477 &buffer[i2c_buffer_offset_bytes]); 03478 } 03479 03480 if (device_config_level >= VL53L1_DEVICECONFIGLEVEL_DYNAMIC_ONWARDS && 03481 status == VL53L1_ERROR_NONE) { 03482 03483 i2c_buffer_offset_bytes = 03484 VL53L1_DYNAMIC_CONFIG_I2C_INDEX - i2c_index; 03485 03486 03487 if ((psystem->system__mode_start & 03488 VL53L1_DEVICEMEASUREMENTMODE_BACKTOBACK) == 03489 VL53L1_DEVICEMEASUREMENTMODE_BACKTOBACK) { 03490 pdynamic->system__grouped_parameter_hold_0 = 03491 pstate->cfg_gph_id | 0x01; 03492 pdynamic->system__grouped_parameter_hold_1 = 03493 pstate->cfg_gph_id | 0x01; 03494 pdynamic->system__grouped_parameter_hold = 03495 pstate->cfg_gph_id; 03496 } 03497 status = 03498 VL53L1_i2c_encode_dynamic_config( 03499 pdynamic, 03500 VL53L1_DYNAMIC_CONFIG_I2C_SIZE_BYTES, 03501 &buffer[i2c_buffer_offset_bytes]); 03502 } 03503 03504 if (status == VL53L1_ERROR_NONE) { 03505 03506 i2c_buffer_offset_bytes = 03507 VL53L1_SYSTEM_CONTROL_I2C_INDEX - i2c_index; 03508 03509 status = 03510 VL53L1_i2c_encode_system_control( 03511 psystem, 03512 VL53L1_SYSTEM_CONTROL_I2C_SIZE_BYTES, 03513 &buffer[i2c_buffer_offset_bytes]); 03514 } 03515 03516 03517 03518 if (status == VL53L1_ERROR_NONE) { 03519 status = 03520 VL53L1_WriteMulti( 03521 Dev, 03522 i2c_index, 03523 buffer, 03524 (uint32_t)i2c_buffer_size_bytes); 03525 } 03526 03527 03528 if (status == VL53L1_ERROR_NONE) 03529 status = VL53L1_update_ll_driver_rd_state(Dev); 03530 03531 if (status == VL53L1_ERROR_NONE) 03532 status = VL53L1_update_ll_driver_cfg_state(Dev); 03533 03534 LOG_FUNCTION_END(status); 03535 03536 return status; 03537 } 03538 03539 03540 VL53L1_Error VL53L1_stop_range( 03541 VL53L1_DEV Dev) 03542 { 03543 03544 03545 VL53L1_Error status = VL53L1_ERROR_NONE; 03546 03547 VL53L1_LLDriverData_t *pdev = 03548 VL53L1DevStructGetLLDriverHandle(Dev); 03549 VL53L1_LLDriverResults_t *pres = 03550 VL53L1DevStructGetLLResultsHandle(Dev); 03551 03552 03553 03554 pdev->sys_ctrl.system__mode_start = 03555 (pdev->sys_ctrl.system__mode_start & 03556 VL53L1_DEVICEMEASUREMENTMODE_STOP_MASK) | 03557 VL53L1_DEVICEMEASUREMENTMODE_ABORT; 03558 03559 status = VL53L1_set_system_control( 03560 Dev, 03561 &pdev->sys_ctrl); 03562 03563 03564 pdev->sys_ctrl.system__mode_start = 03565 (pdev->sys_ctrl.system__mode_start & 03566 VL53L1_DEVICEMEASUREMENTMODE_STOP_MASK); 03567 03568 03569 VL53L1_init_ll_driver_state( 03570 Dev, 03571 VL53L1_DEVICESTATE_SW_STANDBY); 03572 03573 03574 V53L1_init_zone_results_structure( 03575 pdev->zone_cfg.active_zones+1, 03576 &(pres->zone_results)); 03577 03578 03579 V53L1_init_zone_dss_configs(Dev); 03580 03581 03582 if (pdev->low_power_auto_data.is_low_power_auto_mode == 1) 03583 VL53L1_low_power_auto_data_stop_range(Dev); 03584 03585 return status; 03586 } 03587 03588 03589 VL53L1_Error VL53L1_get_measurement_results( 03590 VL53L1_DEV Dev, 03591 VL53L1_DeviceResultsLevel device_results_level) 03592 { 03593 03594 03595 VL53L1_Error status = VL53L1_ERROR_NONE; 03596 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 03597 03598 uint8_t buffer[VL53L1_MAX_I2C_XFER_SIZE]; 03599 03600 VL53L1_system_results_t *psystem_results = &(pdev->sys_results); 03601 VL53L1_core_results_t *pcore_results = &(pdev->core_results); 03602 VL53L1_debug_results_t *pdebug_results = &(pdev->dbg_results); 03603 03604 uint16_t i2c_index = VL53L1_SYSTEM_RESULTS_I2C_INDEX; 03605 uint16_t i2c_buffer_offset_bytes = 0; 03606 uint16_t i2c_buffer_size_bytes = 0; 03607 03608 LOG_FUNCTION_START(""); 03609 03610 03611 03612 switch (device_results_level) { 03613 case VL53L1_DEVICERESULTSLEVEL_FULL: 03614 i2c_buffer_size_bytes = 03615 (VL53L1_DEBUG_RESULTS_I2C_INDEX + 03616 VL53L1_DEBUG_RESULTS_I2C_SIZE_BYTES) - 03617 i2c_index; 03618 break; 03619 case VL53L1_DEVICERESULTSLEVEL_UPTO_CORE: 03620 i2c_buffer_size_bytes = 03621 (VL53L1_CORE_RESULTS_I2C_INDEX + 03622 VL53L1_CORE_RESULTS_I2C_SIZE_BYTES) - 03623 i2c_index; 03624 break; 03625 default: 03626 i2c_buffer_size_bytes = 03627 VL53L1_SYSTEM_RESULTS_I2C_SIZE_BYTES; 03628 break; 03629 } 03630 03631 03632 03633 if (status == VL53L1_ERROR_NONE) 03634 status = 03635 VL53L1_ReadMulti( 03636 Dev, 03637 i2c_index, 03638 buffer, 03639 (uint32_t)i2c_buffer_size_bytes); 03640 03641 03642 03643 if (device_results_level >= VL53L1_DEVICERESULTSLEVEL_FULL && 03644 status == VL53L1_ERROR_NONE) { 03645 03646 i2c_buffer_offset_bytes = 03647 VL53L1_DEBUG_RESULTS_I2C_INDEX - i2c_index; 03648 03649 status = 03650 VL53L1_i2c_decode_debug_results( 03651 VL53L1_DEBUG_RESULTS_I2C_SIZE_BYTES, 03652 &buffer[i2c_buffer_offset_bytes], 03653 pdebug_results); 03654 } 03655 03656 if (device_results_level >= VL53L1_DEVICERESULTSLEVEL_UPTO_CORE && 03657 status == VL53L1_ERROR_NONE) { 03658 03659 i2c_buffer_offset_bytes = 03660 VL53L1_CORE_RESULTS_I2C_INDEX - i2c_index; 03661 03662 status = 03663 VL53L1_i2c_decode_core_results( 03664 VL53L1_CORE_RESULTS_I2C_SIZE_BYTES, 03665 &buffer[i2c_buffer_offset_bytes], 03666 pcore_results); 03667 } 03668 03669 if (status == VL53L1_ERROR_NONE) { 03670 03671 i2c_buffer_offset_bytes = 0; 03672 status = 03673 VL53L1_i2c_decode_system_results( 03674 VL53L1_SYSTEM_RESULTS_I2C_SIZE_BYTES, 03675 &buffer[i2c_buffer_offset_bytes], 03676 psystem_results); 03677 } 03678 03679 LOG_FUNCTION_END(status); 03680 03681 return status; 03682 } 03683 03684 03685 VL53L1_Error VL53L1_get_device_results( 03686 VL53L1_DEV Dev, 03687 VL53L1_DeviceResultsLevel device_results_level, 03688 VL53L1_range_results_t *prange_results) 03689 { 03690 03691 03692 VL53L1_Error status = VL53L1_ERROR_NONE; 03693 03694 VL53L1_LLDriverData_t *pdev = 03695 VL53L1DevStructGetLLDriverHandle(Dev); 03696 VL53L1_LLDriverResults_t *pres = 03697 VL53L1DevStructGetLLResultsHandle(Dev); 03698 03699 VL53L1_range_results_t *presults = 03700 &(pres->range_results); 03701 VL53L1_zone_objects_t *pobjects = 03702 &(pres->zone_results.VL53L1_p_002[0]); 03703 VL53L1_ll_driver_state_t *pstate = 03704 &(pdev->ll_state); 03705 VL53L1_zone_config_t *pzone_cfg = 03706 &(pdev->zone_cfg); 03707 VL53L1_zone_hist_info_t *phist_info = 03708 &(pres->zone_hists.VL53L1_p_002[0]); 03709 03710 VL53L1_dmax_calibration_data_t dmax_cal; 03711 VL53L1_dmax_calibration_data_t *pdmax_cal = &dmax_cal; 03712 VL53L1_hist_post_process_config_t *pHP = &(pdev->histpostprocess); 03713 VL53L1_xtalk_config_t *pC = &(pdev->xtalk_cfg); 03714 VL53L1_low_power_auto_data_t *pL = &(pdev->low_power_auto_data); 03715 VL53L1_histogram_bin_data_t *pHD = &(pdev->hist_data); 03716 VL53L1_customer_nvm_managed_t *pN = &(pdev->customer); 03717 VL53L1_zone_histograms_t *pZH = &(pres->zone_hists); 03718 VL53L1_xtalk_calibration_results_t *pXCR = &(pdev->xtalk_cal); 03719 uint8_t tmp8; 03720 uint8_t zid; 03721 uint8_t i; 03722 uint8_t histo_merge_nb, idx; 03723 uint8_t merge_enabled; 03724 VL53L1_range_data_t *pdata; 03725 03726 LOG_FUNCTION_START(""); 03727 03728 merge_enabled = (pdev->tuning_parms.tp_hist_merge == 1) && 03729 (VL53L1DevDataGet(Dev, CurrentParameters.PresetMode) == 03730 VL53L1_PRESETMODE_RANGING); 03731 03732 03733 if ((pdev->sys_ctrl.system__mode_start & 03734 VL53L1_DEVICESCHEDULERMODE_HISTOGRAM) 03735 == VL53L1_DEVICESCHEDULERMODE_HISTOGRAM) { 03736 03737 03738 03739 status = VL53L1_get_histogram_bin_data( 03740 Dev, 03741 &(pdev->hist_data)); 03742 03743 03744 03745 03746 if (status == VL53L1_ERROR_NONE && 03747 pHD->number_of_ambient_bins == 0) { 03748 zid = pdev->ll_state.rd_zone_id; 03749 status = VL53L1_hist_copy_and_scale_ambient_info( 03750 &(pZH->VL53L1_p_002[zid]), 03751 &(pdev->hist_data)); 03752 } 03753 03754 03755 if (status != VL53L1_ERROR_NONE) 03756 goto UPDATE_DYNAMIC_CONFIG; 03757 03758 VL53L1_compute_histo_merge_nb(Dev, &histo_merge_nb); 03759 if (histo_merge_nb == 0) 03760 histo_merge_nb = 1; 03761 idx = histo_merge_nb - 1; 03762 if (merge_enabled) 03763 pC->algo__crosstalk_compensation_plane_offset_kcps = 03764 pXCR->algo__xtalk_cpo_HistoMerge_kcps[idx]; 03765 03766 pHP->gain_factor = 03767 pdev->gain_cal.histogram_ranging_gain_factor; 03768 03769 pHP->algo__crosstalk_compensation_plane_offset_kcps = 03770 VL53L1_calc_crosstalk_plane_offset_with_margin( 03771 pC->algo__crosstalk_compensation_plane_offset_kcps, 03772 pC->histogram_mode_crosstalk_margin_kcps); 03773 03774 pHP->algo__crosstalk_compensation_x_plane_gradient_kcps = 03775 pC->algo__crosstalk_compensation_x_plane_gradient_kcps; 03776 pHP->algo__crosstalk_compensation_y_plane_gradient_kcps = 03777 pC->algo__crosstalk_compensation_y_plane_gradient_kcps; 03778 03779 pdev->dmax_cfg.ambient_thresh_sigma = 03780 pHP->ambient_thresh_sigma1; 03781 pdev->dmax_cfg.min_ambient_thresh_events = 03782 pHP->min_ambient_thresh_events; 03783 pdev->dmax_cfg.signal_total_events_limit = 03784 pHP->signal_total_events_limit; 03785 pdev->dmax_cfg.dss_config__target_total_rate_mcps = 03786 pdev->stat_cfg.dss_config__target_total_rate_mcps; 03787 pdev->dmax_cfg.dss_config__aperture_attenuation = 03788 pdev->gen_cfg.dss_config__aperture_attenuation; 03789 03790 pHP->algo__crosstalk_detect_max_valid_range_mm = 03791 pC->algo__crosstalk_detect_max_valid_range_mm; 03792 pHP->algo__crosstalk_detect_min_valid_range_mm = 03793 pC->algo__crosstalk_detect_min_valid_range_mm; 03794 pHP->algo__crosstalk_detect_max_valid_rate_kcps = 03795 pC->algo__crosstalk_detect_max_valid_rate_kcps; 03796 pHP->algo__crosstalk_detect_max_sigma_mm = 03797 pC->algo__crosstalk_detect_max_sigma_mm; 03798 03799 03800 03801 VL53L1_copy_rtn_good_spads_to_buffer( 03802 &(pdev->nvm_copy_data), 03803 &(pdev->rtn_good_spads[0])); 03804 03805 03806 03807 switch (pdev->offset_correction_mode) { 03808 03809 case VL53L1_OFFSETCORRECTIONMODE__MM1_MM2_OFFSETS: 03810 tmp8 = pdev->gen_cfg.dss_config__aperture_attenuation; 03811 03812 VL53L1_hist_combine_mm1_mm2_offsets( 03813 pN->mm_config__inner_offset_mm, 03814 pN->mm_config__outer_offset_mm, 03815 pdev->nvm_copy_data.roi_config__mode_roi_centre_spad, 03816 pdev->nvm_copy_data.roi_config__mode_roi_xy_size, 03817 pHD->roi_config__user_roi_centre_spad, 03818 pHD->roi_config__user_roi_requested_global_xy_size, 03819 &(pdev->add_off_cal_data), 03820 &(pdev->rtn_good_spads[0]), 03821 (uint16_t)tmp8, 03822 &(pHP->range_offset_mm)); 03823 break; 03824 case VL53L1_OFFSETCORRECTIONMODE__PER_ZONE_OFFSETS: 03825 zid = pdev->ll_state.rd_zone_id; 03826 pHP->range_offset_mm = (int16_t)( 03827 pres->zone_cal.VL53L1_p_002[zid].range_mm_offset); 03828 break; 03829 case VL53L1_OFFSETCORRECTIONMODE__PER_VCSEL_OFFSETS: 03830 select_offset_per_vcsel( 03831 pdev, 03832 &(pHP->range_offset_mm)); 03833 pHP->range_offset_mm *= 4; 03834 break; 03835 default: 03836 pHP->range_offset_mm = 0; 03837 break; 03838 03839 } 03840 03841 03842 03843 if (status != VL53L1_ERROR_NONE) 03844 goto UPDATE_DYNAMIC_CONFIG; 03845 03846 03847 VL53L1_calc_max_effective_spads( 03848 pHD->roi_config__user_roi_centre_spad, 03849 pHD->roi_config__user_roi_requested_global_xy_size, 03850 &(pdev->rtn_good_spads[0]), 03851 (uint16_t)pdev->gen_cfg.dss_config__aperture_attenuation, 03852 &(pdev->dmax_cfg.max_effective_spads)); 03853 03854 status = 03855 VL53L1_get_dmax_calibration_data( 03856 Dev, 03857 pdev->dmax_mode, 03858 pdev->ll_state.rd_zone_id, 03859 pdmax_cal); 03860 03861 03862 03863 if (status != VL53L1_ERROR_NONE) 03864 goto UPDATE_DYNAMIC_CONFIG; 03865 03866 status = VL53L1_ipp_hist_process_data( 03867 Dev, 03868 pdmax_cal, 03869 &(pdev->dmax_cfg), 03870 &(pdev->histpostprocess), 03871 &(pdev->hist_data), 03872 &(pdev->xtalk_shapes), 03873 pdev->wArea1, 03874 pdev->wArea2, 03875 &histo_merge_nb, 03876 presults); 03877 03878 if ((merge_enabled) && (histo_merge_nb > 1)) 03879 for (i = 0; i < VL53L1_MAX_RANGE_RESULTS; i++) { 03880 pdata = &(presults->VL53L1_p_002[i]); 03881 pdata->VL53L1_p_020 /= histo_merge_nb; 03882 pdata->VL53L1_p_021 /= histo_merge_nb; 03883 pdata->VL53L1_p_013 /= histo_merge_nb; 03884 pdata->peak_signal_count_rate_mcps /= histo_merge_nb; 03885 pdata->avg_signal_count_rate_mcps /= histo_merge_nb; 03886 pdata->ambient_count_rate_mcps /= histo_merge_nb; 03887 pdata->VL53L1_p_012 /= histo_merge_nb; 03888 } 03889 03890 03891 if (status != VL53L1_ERROR_NONE) 03892 goto UPDATE_DYNAMIC_CONFIG; 03893 03894 status = VL53L1_hist_wrap_dmax( 03895 &(pdev->histpostprocess), 03896 &(pdev->hist_data), 03897 &(presults->wrap_dmax_mm)); 03898 03899 03900 if (status != VL53L1_ERROR_NONE) 03901 goto UPDATE_DYNAMIC_CONFIG; 03902 03903 zid = pdev->ll_state.rd_zone_id; 03904 status = VL53L1_hist_phase_consistency_check( 03905 Dev, 03906 &(pZH->VL53L1_p_002[zid]), 03907 &(pres->zone_results.VL53L1_p_002[zid]), 03908 presults); 03909 03910 03911 if (status != VL53L1_ERROR_NONE) 03912 goto UPDATE_DYNAMIC_CONFIG; 03913 03914 zid = pdev->ll_state.rd_zone_id; 03915 status = VL53L1_hist_xmonitor_consistency_check( 03916 Dev, 03917 &(pZH->VL53L1_p_002[zid]), 03918 &(pres->zone_results.VL53L1_p_002[zid]), 03919 &(presults->xmonitor)); 03920 03921 03922 if (status != VL53L1_ERROR_NONE) 03923 goto UPDATE_DYNAMIC_CONFIG; 03924 03925 03926 zid = pdev->ll_state.rd_zone_id; 03927 pZH->max_zones = VL53L1_MAX_USER_ZONES; 03928 pZH->active_zones = 03929 pdev->zone_cfg.active_zones+1; 03930 pHD->zone_id = zid; 03931 03932 if (zid < 03933 pres->zone_results.max_zones) { 03934 03935 phist_info = 03936 &(pZH->VL53L1_p_002[zid]); 03937 03938 phist_info->rd_device_state = 03939 pHD->rd_device_state; 03940 03941 phist_info->number_of_ambient_bins = 03942 pHD->number_of_ambient_bins; 03943 03944 phist_info->result__dss_actual_effective_spads = 03945 pHD->result__dss_actual_effective_spads; 03946 03947 phist_info->VL53L1_p_009 = 03948 pHD->VL53L1_p_009; 03949 03950 phist_info->total_periods_elapsed = 03951 pHD->total_periods_elapsed; 03952 03953 phist_info->ambient_events_sum = 03954 pHD->ambient_events_sum; 03955 } 03956 03957 03958 03959 if (status != VL53L1_ERROR_NONE) 03960 goto UPDATE_DYNAMIC_CONFIG; 03961 03962 VL53L1_hist_copy_results_to_sys_and_core( 03963 &(pdev->hist_data), 03964 presults, 03965 &(pdev->sys_results), 03966 &(pdev->core_results)); 03967 03968 03969 UPDATE_DYNAMIC_CONFIG: 03970 if (pzone_cfg->active_zones > 0) { 03971 if (pstate->rd_device_state != 03972 VL53L1_DEVICESTATE_RANGING_WAIT_GPH_SYNC) { 03973 if (status == VL53L1_ERROR_NONE) { 03974 status = VL53L1_dynamic_zone_update( 03975 Dev, presults); 03976 } 03977 } 03978 03979 03980 for (i = 0; i < VL53L1_MAX_USER_ZONES; i++) { 03981 pzone_cfg->bin_config[i] = 03982 ((pdev->ll_state.cfg_internal_stream_count) 03983 & 0x01) ? 03984 VL53L1_ZONECONFIG_BINCONFIG__HIGHAMB : 03985 VL53L1_ZONECONFIG_BINCONFIG__LOWAMB; 03986 } 03987 03988 if (status == VL53L1_ERROR_NONE) 03989 status = VL53L1_multizone_hist_bins_update(Dev); 03990 03991 } 03992 03993 03994 03995 if (status == VL53L1_ERROR_NONE) 03996 status = VL53L1_dynamic_xtalk_correction_corrector(Dev); 03997 03998 #ifdef VL53L1_LOG_ENABLE 03999 if (status == VL53L1_ERROR_NONE) 04000 VL53L1_print_histogram_bin_data( 04001 &(pdev->hist_data), 04002 "get_device_results():pdev->lldata.hist_data.", 04003 VL53L1_TRACE_MODULE_HISTOGRAM_DATA); 04004 #endif 04005 04006 if (merge_enabled) 04007 pC->algo__crosstalk_compensation_plane_offset_kcps = 04008 pXCR->algo__xtalk_cpo_HistoMerge_kcps[0]; 04009 } else { 04010 04011 if (status == VL53L1_ERROR_NONE) 04012 status = VL53L1_get_measurement_results( 04013 Dev, 04014 device_results_level); 04015 04016 if (status == VL53L1_ERROR_NONE) 04017 VL53L1_copy_sys_and_core_results_to_range_results( 04018 (int32_t)pdev->gain_cal.standard_ranging_gain_factor, 04019 &(pdev->sys_results), 04020 &(pdev->core_results), 04021 presults); 04022 04023 04024 04025 if (pL->is_low_power_auto_mode == 1) { 04026 04027 if ((status == VL53L1_ERROR_NONE) && 04028 (pL->low_power_auto_range_count == 0)) { 04029 04030 status = 04031 VL53L1_low_power_auto_setup_manual_calibration( 04032 Dev); 04033 pL->low_power_auto_range_count = 1; 04034 } else if ((status == VL53L1_ERROR_NONE) && 04035 (pL->low_power_auto_range_count == 1)) { 04036 pL->low_power_auto_range_count = 2; 04037 } 04038 04039 04040 if ((pL->low_power_auto_range_count != 0xFF) && 04041 (status == VL53L1_ERROR_NONE)) { 04042 status = VL53L1_low_power_auto_update_DSS( 04043 Dev); 04044 } 04045 } 04046 04047 } 04048 04049 04050 presults->cfg_device_state = pdev->ll_state.cfg_device_state; 04051 presults->rd_device_state = pdev->ll_state.rd_device_state; 04052 presults->zone_id = pdev->ll_state.rd_zone_id; 04053 04054 if (status == VL53L1_ERROR_NONE) { 04055 04056 04057 pres->zone_results.max_zones = VL53L1_MAX_USER_ZONES; 04058 pres->zone_results.active_zones = pdev->zone_cfg.active_zones+1; 04059 zid = pdev->ll_state.rd_zone_id; 04060 04061 if (zid < pres->zone_results.max_zones) { 04062 04063 pobjects = 04064 &(pres->zone_results.VL53L1_p_002[zid]); 04065 04066 pobjects->cfg_device_state = 04067 presults->cfg_device_state; 04068 pobjects->rd_device_state = presults->rd_device_state; 04069 pobjects->zone_id = presults->zone_id; 04070 pobjects->stream_count = presults->stream_count; 04071 04072 04073 04074 pobjects->xmonitor.VL53L1_p_020 = 04075 presults->xmonitor.VL53L1_p_020; 04076 pobjects->xmonitor.VL53L1_p_021 = 04077 presults->xmonitor.VL53L1_p_021; 04078 pobjects->xmonitor.VL53L1_p_014 = 04079 presults->xmonitor.VL53L1_p_014; 04080 pobjects->xmonitor.range_status = 04081 presults->xmonitor.range_status; 04082 04083 pobjects->max_objects = presults->max_results; 04084 pobjects->active_objects = presults->active_results; 04085 04086 for (i = 0; i < presults->active_results; i++) { 04087 pobjects->VL53L1_p_002[i].VL53L1_p_020 = 04088 presults->VL53L1_p_002[i].VL53L1_p_020; 04089 pobjects->VL53L1_p_002[i].VL53L1_p_021 = 04090 presults->VL53L1_p_002[i].VL53L1_p_021; 04091 pobjects->VL53L1_p_002[i].VL53L1_p_014 = 04092 presults->VL53L1_p_002[i].VL53L1_p_014; 04093 pobjects->VL53L1_p_002[i].range_status = 04094 presults->VL53L1_p_002[i].range_status; 04095 } 04096 04097 04098 } 04099 } 04100 04101 04102 04103 memcpy( 04104 prange_results, 04105 presults, 04106 sizeof(VL53L1_range_results_t)); 04107 04108 04109 04110 if (status == VL53L1_ERROR_NONE) 04111 status = VL53L1_check_ll_driver_rd_state(Dev); 04112 04113 #ifdef VL53L1_LOG_ENABLE 04114 if (status == VL53L1_ERROR_NONE) 04115 VL53L1_print_range_results( 04116 presults, 04117 "get_device_results():pdev->llresults.range_results.", 04118 VL53L1_TRACE_MODULE_RANGE_RESULTS_DATA); 04119 #endif 04120 04121 LOG_FUNCTION_END(status); 04122 04123 return status; 04124 } 04125 04126 04127 VL53L1_Error VL53L1_clear_interrupt_and_enable_next_range( 04128 VL53L1_DEV Dev, 04129 uint8_t measurement_mode) 04130 { 04131 04132 04133 04134 VL53L1_Error status = VL53L1_ERROR_NONE; 04135 04136 LOG_FUNCTION_START(""); 04137 04138 04139 04140 04141 04142 04143 04144 04145 04146 04147 if (status == VL53L1_ERROR_NONE) 04148 status = VL53L1_init_and_start_range( 04149 Dev, 04150 measurement_mode, 04151 VL53L1_DEVICECONFIGLEVEL_GENERAL_ONWARDS); 04152 04153 LOG_FUNCTION_END(status); 04154 04155 return status; 04156 } 04157 04158 04159 VL53L1_Error VL53L1_get_histogram_bin_data( 04160 VL53L1_DEV Dev, 04161 VL53L1_histogram_bin_data_t *pdata) 04162 { 04163 04164 04165 VL53L1_Error status = VL53L1_ERROR_NONE; 04166 VL53L1_LLDriverData_t *pdev = 04167 VL53L1DevStructGetLLDriverHandle(Dev); 04168 VL53L1_LLDriverResults_t *pres = 04169 VL53L1DevStructGetLLResultsHandle(Dev); 04170 04171 VL53L1_zone_private_dyn_cfg_t *pzone_dyn_cfg; 04172 04173 VL53L1_static_nvm_managed_t *pstat_nvm = &(pdev->stat_nvm); 04174 VL53L1_static_config_t *pstat_cfg = &(pdev->stat_cfg); 04175 VL53L1_general_config_t *pgen_cfg = &(pdev->gen_cfg); 04176 VL53L1_timing_config_t *ptim_cfg = &(pdev->tim_cfg); 04177 VL53L1_range_results_t *presults = &(pres->range_results); 04178 04179 uint8_t buffer[VL53L1_MAX_I2C_XFER_SIZE]; 04180 uint8_t *pbuffer = &buffer[0]; 04181 uint8_t bin_23_0 = 0x00; 04182 uint16_t bin = 0; 04183 uint16_t i2c_buffer_offset_bytes = 0; 04184 uint16_t encoded_timeout = 0; 04185 uint32_t pll_period_us = 0; 04186 uint32_t periods_elapsed_tmp = 0; 04187 uint8_t i = 0; 04188 int32_t hist_merge = 0; 04189 04190 LOG_FUNCTION_START(""); 04191 04192 04193 04194 if (status == VL53L1_ERROR_NONE) 04195 status = VL53L1_ReadMulti( 04196 Dev, 04197 VL53L1_HISTOGRAM_BIN_DATA_I2C_INDEX, 04198 pbuffer, 04199 VL53L1_HISTOGRAM_BIN_DATA_I2C_SIZE_BYTES); 04200 04201 04202 04203 pdata->result__interrupt_status = *(pbuffer + 0); 04204 pdata->result__range_status = *(pbuffer + 1); 04205 pdata->result__report_status = *(pbuffer + 2); 04206 pdata->result__stream_count = *(pbuffer + 3); 04207 pdata->result__dss_actual_effective_spads = 04208 VL53L1_i2c_decode_uint16_t(2, pbuffer + 4); 04209 04210 04211 04212 i2c_buffer_offset_bytes = 04213 VL53L1_PHASECAL_RESULT__REFERENCE_PHASE - 04214 VL53L1_HISTOGRAM_BIN_DATA_I2C_INDEX; 04215 04216 pbuffer = &buffer[i2c_buffer_offset_bytes]; 04217 04218 pdata->phasecal_result__reference_phase = 04219 VL53L1_i2c_decode_uint16_t(2, pbuffer); 04220 04221 i2c_buffer_offset_bytes = 04222 VL53L1_PHASECAL_RESULT__VCSEL_START - 04223 VL53L1_HISTOGRAM_BIN_DATA_I2C_INDEX; 04224 04225 pdata->phasecal_result__vcsel_start = buffer[i2c_buffer_offset_bytes]; 04226 04227 04228 04229 pdev->dbg_results.phasecal_result__reference_phase = 04230 pdata->phasecal_result__reference_phase; 04231 pdev->dbg_results.phasecal_result__vcsel_start = 04232 pdata->phasecal_result__vcsel_start; 04233 04234 04235 04236 i2c_buffer_offset_bytes = 04237 VL53L1_RESULT__HISTOGRAM_BIN_23_0_MSB - 04238 VL53L1_HISTOGRAM_BIN_DATA_I2C_INDEX; 04239 04240 bin_23_0 = buffer[i2c_buffer_offset_bytes] << 2; 04241 04242 i2c_buffer_offset_bytes = 04243 VL53L1_RESULT__HISTOGRAM_BIN_23_0_LSB - 04244 VL53L1_HISTOGRAM_BIN_DATA_I2C_INDEX; 04245 04246 bin_23_0 += buffer[i2c_buffer_offset_bytes]; 04247 04248 i2c_buffer_offset_bytes = 04249 VL53L1_RESULT__HISTOGRAM_BIN_23_0 - 04250 VL53L1_HISTOGRAM_BIN_DATA_I2C_INDEX; 04251 04252 buffer[i2c_buffer_offset_bytes] = bin_23_0; 04253 04254 04255 04256 i2c_buffer_offset_bytes = 04257 VL53L1_RESULT__HISTOGRAM_BIN_0_2 - 04258 VL53L1_HISTOGRAM_BIN_DATA_I2C_INDEX; 04259 04260 pbuffer = &buffer[i2c_buffer_offset_bytes]; 04261 for (bin = 0; bin < VL53L1_HISTOGRAM_BUFFER_SIZE; bin++) { 04262 pdata->bin_data[bin] = 04263 (int32_t)VL53L1_i2c_decode_uint32_t(3, pbuffer); 04264 pbuffer += 3; 04265 } 04266 04267 VL53L1_get_tuning_parm(Dev, VL53L1_TUNINGPARM_HIST_MERGE, 04268 &hist_merge); 04269 04270 if (pdata->result__stream_count == 0) { 04271 04272 memset(pdev->multi_bins_rec, 0, sizeof(pdev->multi_bins_rec)); 04273 pdev->bin_rec_pos = 0; 04274 pdev->pos_before_next_recom = 0; 04275 } 04276 04277 if (hist_merge == 1) 04278 vl53l1_histo_merge(Dev, pdata); 04279 04280 04281 pdata->zone_id = pdev->ll_state.rd_zone_id; 04282 pdata->VL53L1_p_022 = 0; 04283 pdata->VL53L1_p_023 = VL53L1_HISTOGRAM_BUFFER_SIZE; 04284 pdata->VL53L1_p_024 = VL53L1_HISTOGRAM_BUFFER_SIZE; 04285 04286 pdata->cal_config__vcsel_start = pgen_cfg->cal_config__vcsel_start; 04287 04288 04289 04290 pdata->vcsel_width = 04291 ((uint16_t)pgen_cfg->global_config__vcsel_width) << 4; 04292 pdata->vcsel_width += 04293 (uint16_t)pstat_cfg->ana_config__vcsel_pulse_width_offset; 04294 04295 04296 pdata->VL53L1_p_019 = 04297 pstat_nvm->osc_measured__fast_osc__frequency; 04298 04299 04300 04301 VL53L1_hist_get_bin_sequence_config(Dev, pdata); 04302 04303 04304 04305 if (pdev->ll_state.rd_timing_status == 0) { 04306 04307 encoded_timeout = 04308 (ptim_cfg->range_config__timeout_macrop_a_hi << 8) 04309 + ptim_cfg->range_config__timeout_macrop_a_lo; 04310 pdata->VL53L1_p_009 = ptim_cfg->range_config__vcsel_period_a; 04311 } else { 04312 04313 encoded_timeout = 04314 (ptim_cfg->range_config__timeout_macrop_b_hi << 8) 04315 + ptim_cfg->range_config__timeout_macrop_b_lo; 04316 pdata->VL53L1_p_009 = ptim_cfg->range_config__vcsel_period_b; 04317 } 04318 04319 04320 04321 pdata->number_of_ambient_bins = 0; 04322 04323 for (i = 0; i < 6; i++) { 04324 if ((pdata->bin_seq[i] & 0x07) == 0x07) 04325 pdata->number_of_ambient_bins = 04326 pdata->number_of_ambient_bins + 0x04; 04327 } 04328 04329 pdata->total_periods_elapsed = 04330 VL53L1_decode_timeout(encoded_timeout); 04331 04332 04333 04334 04335 pll_period_us = 04336 VL53L1_calc_pll_period_us(pdata->VL53L1_p_019); 04337 04338 04339 04340 periods_elapsed_tmp = pdata->total_periods_elapsed + 1; 04341 04342 04343 04344 pdata->peak_duration_us = 04345 VL53L1_duration_maths( 04346 pll_period_us, 04347 (uint32_t)pdata->vcsel_width, 04348 VL53L1_RANGING_WINDOW_VCSEL_PERIODS, 04349 periods_elapsed_tmp); 04350 04351 pdata->woi_duration_us = 0; 04352 04353 04354 04355 VL53L1_hist_calc_zero_distance_phase(pdata); 04356 04357 04358 04359 VL53L1_hist_estimate_ambient_from_ambient_bins(pdata); 04360 04361 04362 04363 pdata->cfg_device_state = pdev->ll_state.cfg_device_state; 04364 pdata->rd_device_state = pdev->ll_state.rd_device_state; 04365 04366 04367 04368 pzone_dyn_cfg = &(pres->zone_dyn_cfgs.VL53L1_p_002[pdata->zone_id]); 04369 04370 pdata->roi_config__user_roi_centre_spad = 04371 pzone_dyn_cfg->roi_config__user_roi_centre_spad; 04372 pdata->roi_config__user_roi_requested_global_xy_size = 04373 pzone_dyn_cfg->roi_config__user_roi_requested_global_xy_size; 04374 04375 04376 04377 presults->device_status = VL53L1_DEVICEERROR_NOUPDATE; 04378 04379 04380 04381 switch (pdata->result__range_status & 04382 VL53L1_RANGE_STATUS__RANGE_STATUS_MASK) { 04383 04384 case VL53L1_DEVICEERROR_VCSELCONTINUITYTESTFAILURE: 04385 case VL53L1_DEVICEERROR_VCSELWATCHDOGTESTFAILURE: 04386 case VL53L1_DEVICEERROR_NOVHVVALUEFOUND: 04387 case VL53L1_DEVICEERROR_USERROICLIP: 04388 case VL53L1_DEVICEERROR_MULTCLIPFAIL: 04389 04390 presults->device_status = (pdata->result__range_status & 04391 VL53L1_RANGE_STATUS__RANGE_STATUS_MASK); 04392 04393 status = VL53L1_ERROR_RANGE_ERROR; 04394 04395 break; 04396 04397 } 04398 04399 LOG_FUNCTION_END(status); 04400 04401 return status; 04402 } 04403 04404 04405 void VL53L1_copy_sys_and_core_results_to_range_results( 04406 int32_t gain_factor, 04407 VL53L1_system_results_t *psys, 04408 VL53L1_core_results_t *pcore, 04409 VL53L1_range_results_t *presults) 04410 { 04411 uint8_t i = 0; 04412 04413 VL53L1_range_data_t *pdata; 04414 int32_t range_mm = 0; 04415 uint32_t tmpu32 = 0; 04416 uint16_t rpscr_crosstalk_corrected_mcps_sd0; 04417 uint16_t rmmo_effective_spads_sd0; 04418 uint16_t rmmi_effective_spads_sd0; 04419 04420 LOG_FUNCTION_START(""); 04421 04422 04423 04424 presults->zone_id = 0; 04425 presults->stream_count = psys->result__stream_count; 04426 presults->wrap_dmax_mm = 0; 04427 presults->max_results = VL53L1_MAX_RANGE_RESULTS; 04428 presults->active_results = 1; 04429 rpscr_crosstalk_corrected_mcps_sd0 = 04430 psys->result__peak_signal_count_rate_crosstalk_corrected_mcps_sd0; 04431 rmmo_effective_spads_sd0 = 04432 psys->result__mm_outer_actual_effective_spads_sd0; 04433 rmmi_effective_spads_sd0 = 04434 psys->result__mm_inner_actual_effective_spads_sd0; 04435 04436 04437 for (i = 0; i < VL53L1_MAX_AMBIENT_DMAX_VALUES; i++) 04438 presults->VL53L1_p_007[i] = 0; 04439 04440 pdata = &(presults->VL53L1_p_002[0]); 04441 04442 for (i = 0; i < 2; i++) { 04443 04444 pdata->range_id = i; 04445 pdata->time_stamp = 0; 04446 04447 if ((psys->result__stream_count == 0) && 04448 ((psys->result__range_status & 04449 VL53L1_RANGE_STATUS__RANGE_STATUS_MASK) == 04450 VL53L1_DEVICEERROR_RANGECOMPLETE)) { 04451 pdata->range_status = 04452 VL53L1_DEVICEERROR_RANGECOMPLETE_NO_WRAP_CHECK; 04453 } else { 04454 pdata->range_status = 04455 psys->result__range_status & 04456 VL53L1_RANGE_STATUS__RANGE_STATUS_MASK; 04457 } 04458 04459 pdata->VL53L1_p_015 = 0; 04460 pdata->VL53L1_p_022 = 0; 04461 pdata->VL53L1_p_025 = 0; 04462 pdata->VL53L1_p_026 = 0; 04463 pdata->VL53L1_p_016 = 0; 04464 pdata->VL53L1_p_027 = 0; 04465 04466 switch (i) { 04467 04468 case 0: 04469 if (psys->result__report_status == 04470 VL53L1_DEVICEREPORTSTATUS_MM1) 04471 pdata->VL53L1_p_006 = 04472 rmmi_effective_spads_sd0; 04473 else if (psys->result__report_status == 04474 VL53L1_DEVICEREPORTSTATUS_MM2) 04475 pdata->VL53L1_p_006 = 04476 rmmo_effective_spads_sd0; 04477 else 04478 pdata->VL53L1_p_006 = 04479 psys->result__dss_actual_effective_spads_sd0; 04480 04481 pdata->peak_signal_count_rate_mcps = 04482 rpscr_crosstalk_corrected_mcps_sd0; 04483 pdata->avg_signal_count_rate_mcps = 04484 psys->result__avg_signal_count_rate_mcps_sd0; 04485 pdata->ambient_count_rate_mcps = 04486 psys->result__ambient_count_rate_mcps_sd0; 04487 04488 04489 04490 04491 tmpu32 = ((uint32_t)psys->result__sigma_sd0 << 5); 04492 if (tmpu32 > 0xFFFF) 04493 tmpu32 = 0xFFFF; 04494 04495 pdata->VL53L1_p_005 = (uint16_t)tmpu32; 04496 04497 04498 04499 pdata->VL53L1_p_014 = 04500 psys->result__phase_sd0; 04501 04502 range_mm = (int32_t)( 04503 psys->result__final_crosstalk_corrected_range_mm_sd0); 04504 04505 04506 range_mm *= gain_factor; 04507 range_mm += 0x0400; 04508 range_mm /= 0x0800; 04509 04510 pdata->median_range_mm = (int16_t)range_mm; 04511 04512 pdata->VL53L1_p_021 = 04513 pcore->result_core__ranging_total_events_sd0; 04514 pdata->VL53L1_p_013 = 04515 pcore->result_core__signal_total_events_sd0; 04516 pdata->total_periods_elapsed = 04517 pcore->result_core__total_periods_elapsed_sd0; 04518 pdata->VL53L1_p_020 = 04519 pcore->result_core__ambient_window_events_sd0; 04520 04521 break; 04522 case 1: 04523 04524 pdata->VL53L1_p_006 = 04525 psys->result__dss_actual_effective_spads_sd1; 04526 pdata->peak_signal_count_rate_mcps = 04527 psys->result__peak_signal_count_rate_mcps_sd1; 04528 pdata->avg_signal_count_rate_mcps = 04529 0xFFFF; 04530 pdata->ambient_count_rate_mcps = 04531 psys->result__ambient_count_rate_mcps_sd1; 04532 04533 04534 04535 04536 tmpu32 = ((uint32_t)psys->result__sigma_sd1 << 5); 04537 if (tmpu32 > 0xFFFF) 04538 tmpu32 = 0xFFFF; 04539 04540 pdata->VL53L1_p_005 = (uint16_t)tmpu32; 04541 04542 04543 04544 pdata->VL53L1_p_014 = 04545 psys->result__phase_sd1; 04546 04547 range_mm = (int32_t)( 04548 psys->result__final_crosstalk_corrected_range_mm_sd1); 04549 04550 04551 range_mm *= gain_factor; 04552 range_mm += 0x0400; 04553 range_mm /= 0x0800; 04554 04555 pdata->median_range_mm = (int16_t)range_mm; 04556 04557 pdata->VL53L1_p_021 = 04558 pcore->result_core__ranging_total_events_sd1; 04559 pdata->VL53L1_p_013 = 04560 pcore->result_core__signal_total_events_sd1; 04561 pdata->total_periods_elapsed = 04562 pcore->result_core__total_periods_elapsed_sd1; 04563 pdata->VL53L1_p_020 = 04564 pcore->result_core__ambient_window_events_sd1; 04565 04566 break; 04567 } 04568 04569 04570 pdata->VL53L1_p_028 = pdata->VL53L1_p_014; 04571 pdata->VL53L1_p_029 = pdata->VL53L1_p_014; 04572 pdata->min_range_mm = pdata->median_range_mm; 04573 pdata->max_range_mm = pdata->median_range_mm; 04574 04575 pdata++; 04576 } 04577 04578 04579 04580 presults->device_status = VL53L1_DEVICEERROR_NOUPDATE; 04581 04582 04583 04584 switch (psys->result__range_status & 04585 VL53L1_RANGE_STATUS__RANGE_STATUS_MASK) { 04586 04587 case VL53L1_DEVICEERROR_VCSELCONTINUITYTESTFAILURE: 04588 case VL53L1_DEVICEERROR_VCSELWATCHDOGTESTFAILURE: 04589 case VL53L1_DEVICEERROR_NOVHVVALUEFOUND: 04590 case VL53L1_DEVICEERROR_USERROICLIP: 04591 case VL53L1_DEVICEERROR_MULTCLIPFAIL: 04592 04593 presults->device_status = (psys->result__range_status & 04594 VL53L1_RANGE_STATUS__RANGE_STATUS_MASK); 04595 04596 presults->VL53L1_p_002[0].range_status = 04597 VL53L1_DEVICEERROR_NOUPDATE; 04598 break; 04599 04600 } 04601 04602 LOG_FUNCTION_END(0); 04603 } 04604 04605 04606 VL53L1_Error VL53L1_set_zone_dss_config( 04607 VL53L1_DEV Dev, 04608 VL53L1_zone_private_dyn_cfg_t *pzone_dyn_cfg) 04609 { 04610 04611 04612 04613 VL53L1_Error status = VL53L1_ERROR_NONE; 04614 04615 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 04616 VL53L1_ll_driver_state_t *pstate = &(pdev->ll_state); 04617 04618 LOG_FUNCTION_START(""); 04619 04620 if (pstate->cfg_device_state == 04621 VL53L1_DEVICESTATE_RANGING_DSS_MANUAL) { 04622 pdev->gen_cfg.dss_config__roi_mode_control = 04623 VL53L1_DSS_CONTROL__MODE_EFFSPADS; 04624 pdev->gen_cfg.dss_config__manual_effective_spads_select = 04625 pzone_dyn_cfg->dss_requested_effective_spad_count; 04626 } else { 04627 pdev->gen_cfg.dss_config__roi_mode_control = 04628 VL53L1_DSS_CONTROL__MODE_TARGET_RATE; 04629 } 04630 04631 LOG_FUNCTION_END(status); 04632 return status; 04633 } 04634 04635 04636 VL53L1_Error VL53L1_calc_ambient_dmax( 04637 VL53L1_DEV Dev, 04638 uint16_t target_reflectance, 04639 int16_t *pambient_dmax_mm) 04640 { 04641 VL53L1_Error status = VL53L1_ERROR_NONE; 04642 04643 VL53L1_LLDriverData_t *pdev = 04644 VL53L1DevStructGetLLDriverHandle(Dev); 04645 04646 VL53L1_dmax_calibration_data_t dmax_cal; 04647 VL53L1_dmax_calibration_data_t *pdmax_cal = &dmax_cal; 04648 04649 LOG_FUNCTION_START(""); 04650 04651 04652 04653 status = 04654 VL53L1_get_dmax_calibration_data( 04655 Dev, 04656 pdev->debug_mode, 04657 pdev->ll_state.rd_zone_id, 04658 pdmax_cal); 04659 04660 04661 04662 if (status == VL53L1_ERROR_NONE) 04663 status = 04664 VL53L1_ipp_hist_ambient_dmax( 04665 Dev, 04666 target_reflectance, 04667 &(pdev->fmt_dmax_cal), 04668 &(pdev->dmax_cfg), 04669 &(pdev->hist_data), 04670 pambient_dmax_mm); 04671 04672 LOG_FUNCTION_END(status); 04673 04674 return status; 04675 } 04676 04677 04678 04679 VL53L1_Error VL53L1_set_GPIO_interrupt_config( 04680 VL53L1_DEV Dev, 04681 VL53L1_GPIO_Interrupt_Mode intr_mode_distance, 04682 VL53L1_GPIO_Interrupt_Mode intr_mode_rate, 04683 uint8_t intr_new_measure_ready, 04684 uint8_t intr_no_target, 04685 uint8_t intr_combined_mode, 04686 uint16_t thresh_distance_high, 04687 uint16_t thresh_distance_low, 04688 uint16_t thresh_rate_high, 04689 uint16_t thresh_rate_low 04690 ) 04691 { 04692 VL53L1_Error status = VL53L1_ERROR_NONE; 04693 04694 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 04695 VL53L1_GPIO_interrupt_config_t *pintconf = 04696 &(pdev->gpio_interrupt_config); 04697 04698 LOG_FUNCTION_START(""); 04699 04700 04701 pintconf->intr_mode_distance = intr_mode_distance; 04702 pintconf->intr_mode_rate = intr_mode_rate; 04703 pintconf->intr_new_measure_ready = intr_new_measure_ready; 04704 pintconf->intr_no_target = intr_no_target; 04705 pintconf->intr_combined_mode = intr_combined_mode; 04706 pintconf->threshold_distance_high = thresh_distance_high; 04707 pintconf->threshold_distance_low = thresh_distance_low; 04708 pintconf->threshold_rate_high = thresh_rate_high; 04709 pintconf->threshold_rate_low = thresh_rate_low; 04710 04711 04712 pdev->gen_cfg.system__interrupt_config_gpio = 04713 VL53L1_encode_GPIO_interrupt_config(pintconf); 04714 04715 04716 04717 status = VL53L1_set_GPIO_thresholds_from_struct( 04718 Dev, 04719 pintconf); 04720 04721 LOG_FUNCTION_END(status); 04722 return status; 04723 } 04724 04725 04726 04727 VL53L1_Error VL53L1_set_GPIO_interrupt_config_struct( 04728 VL53L1_DEV Dev, 04729 VL53L1_GPIO_interrupt_config_t intconf) 04730 { 04731 VL53L1_Error status = VL53L1_ERROR_NONE; 04732 04733 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 04734 VL53L1_GPIO_interrupt_config_t *pintconf = 04735 &(pdev->gpio_interrupt_config); 04736 04737 LOG_FUNCTION_START(""); 04738 04739 04740 memcpy(pintconf, &(intconf), sizeof(VL53L1_GPIO_interrupt_config_t)); 04741 04742 04743 pdev->gen_cfg.system__interrupt_config_gpio = 04744 VL53L1_encode_GPIO_interrupt_config(pintconf); 04745 04746 04747 status = VL53L1_set_GPIO_thresholds_from_struct( 04748 Dev, 04749 pintconf); 04750 04751 LOG_FUNCTION_END(status); 04752 return status; 04753 } 04754 04755 04756 04757 VL53L1_Error VL53L1_get_GPIO_interrupt_config( 04758 VL53L1_DEV Dev, 04759 VL53L1_GPIO_interrupt_config_t *pintconf) 04760 { 04761 VL53L1_Error status = VL53L1_ERROR_NONE; 04762 04763 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 04764 04765 LOG_FUNCTION_START(""); 04766 04767 04768 pdev->gpio_interrupt_config = VL53L1_decode_GPIO_interrupt_config( 04769 pdev->gen_cfg.system__interrupt_config_gpio); 04770 04771 04772 pdev->gpio_interrupt_config.threshold_distance_high = 04773 pdev->dyn_cfg.system__thresh_high; 04774 pdev->gpio_interrupt_config.threshold_distance_low = 04775 pdev->dyn_cfg.system__thresh_low; 04776 04777 pdev->gpio_interrupt_config.threshold_rate_high = 04778 pdev->gen_cfg.system__thresh_rate_high; 04779 pdev->gpio_interrupt_config.threshold_rate_low = 04780 pdev->gen_cfg.system__thresh_rate_low; 04781 04782 if (pintconf == &(pdev->gpio_interrupt_config)) { 04783 04784 } else { 04785 04786 04787 memcpy(pintconf, &(pdev->gpio_interrupt_config), 04788 sizeof(VL53L1_GPIO_interrupt_config_t)); 04789 } 04790 04791 LOG_FUNCTION_END(status); 04792 return status; 04793 } 04794 04795 04796 VL53L1_Error VL53L1_set_dmax_mode( 04797 VL53L1_DEV Dev, 04798 VL53L1_DeviceDmaxMode dmax_mode) 04799 { 04800 04801 04802 VL53L1_Error status = VL53L1_ERROR_NONE; 04803 04804 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 04805 04806 LOG_FUNCTION_START(""); 04807 04808 pdev->dmax_mode = dmax_mode; 04809 04810 LOG_FUNCTION_END(status); 04811 04812 return status; 04813 } 04814 04815 04816 VL53L1_Error VL53L1_get_dmax_mode( 04817 VL53L1_DEV Dev, 04818 VL53L1_DeviceDmaxMode *pdmax_mode) 04819 { 04820 04821 04822 VL53L1_Error status = VL53L1_ERROR_NONE; 04823 04824 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 04825 04826 LOG_FUNCTION_START(""); 04827 04828 *pdmax_mode = pdev->dmax_mode; 04829 04830 LOG_FUNCTION_END(status); 04831 04832 return status; 04833 } 04834 04835 04836 VL53L1_Error VL53L1_get_dmax_calibration_data( 04837 VL53L1_DEV Dev, 04838 VL53L1_DeviceDmaxMode dmax_mode, 04839 uint8_t zone_id, 04840 VL53L1_dmax_calibration_data_t *pdmax_cal) 04841 { 04842 04843 04844 VL53L1_Error status = VL53L1_ERROR_NONE; 04845 04846 VL53L1_LLDriverData_t *pdev = 04847 VL53L1DevStructGetLLDriverHandle(Dev); 04848 VL53L1_LLDriverResults_t *pres = 04849 VL53L1DevStructGetLLResultsHandle(Dev); 04850 04851 LOG_FUNCTION_START(""); 04852 04853 switch (dmax_mode) { 04854 04855 case VL53L1_DEVICEDMAXMODE__PER_ZONE_CAL_DATA: 04856 pdmax_cal->ref__actual_effective_spads = 04857 (uint16_t)pres->zone_cal.VL53L1_p_002[zone_id].effective_spads; 04858 pdmax_cal->ref__peak_signal_count_rate_mcps = 04859 (uint16_t)pres->zone_cal.VL53L1_p_002[zone_id].peak_rate_mcps; 04860 pdmax_cal->ref__distance_mm = 04861 pres->zone_cal.cal_distance_mm; 04862 pdmax_cal->ref_reflectance_pc = 04863 pres->zone_cal.cal_reflectance_pc; 04864 pdmax_cal->coverglass_transmission = 0x0100; 04865 break; 04866 04867 case VL53L1_DEVICEDMAXMODE__CUST_CAL_DATA: 04868 memcpy( 04869 pdmax_cal, 04870 &(pdev->cust_dmax_cal), 04871 sizeof(VL53L1_dmax_calibration_data_t)); 04872 break; 04873 04874 case VL53L1_DEVICEDMAXMODE__FMT_CAL_DATA: 04875 memcpy( 04876 pdmax_cal, 04877 &(pdev->fmt_dmax_cal), 04878 sizeof(VL53L1_dmax_calibration_data_t)); 04879 break; 04880 04881 default: 04882 status = VL53L1_ERROR_INVALID_PARAMS; 04883 break; 04884 04885 } 04886 04887 LOG_FUNCTION_END(status); 04888 04889 return status; 04890 } 04891 04892 04893 VL53L1_Error VL53L1_set_hist_dmax_config( 04894 VL53L1_DEV Dev, 04895 VL53L1_hist_gen3_dmax_config_t *pdmax_cfg) 04896 { 04897 04898 04899 04900 VL53L1_Error status = VL53L1_ERROR_NONE; 04901 04902 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 04903 04904 LOG_FUNCTION_START(""); 04905 04906 04907 memcpy( 04908 &(pdev->dmax_cfg), 04909 pdmax_cfg, 04910 sizeof(VL53L1_hist_gen3_dmax_config_t)); 04911 04912 LOG_FUNCTION_END(status); 04913 04914 return status; 04915 } 04916 04917 04918 VL53L1_Error VL53L1_get_hist_dmax_config( 04919 VL53L1_DEV Dev, 04920 VL53L1_hist_gen3_dmax_config_t *pdmax_cfg) 04921 { 04922 04923 04924 04925 VL53L1_Error status = VL53L1_ERROR_NONE; 04926 04927 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 04928 04929 LOG_FUNCTION_START(""); 04930 04931 04932 memcpy( 04933 pdmax_cfg, 04934 &(pdev->dmax_cfg), 04935 sizeof(VL53L1_hist_gen3_dmax_config_t)); 04936 04937 LOG_FUNCTION_END(status); 04938 04939 return status; 04940 } 04941 04942 04943 VL53L1_Error VL53L1_set_offset_calibration_mode( 04944 VL53L1_DEV Dev, 04945 VL53L1_OffsetCalibrationMode offset_cal_mode) 04946 { 04947 04948 04949 04950 VL53L1_Error status = VL53L1_ERROR_NONE; 04951 04952 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 04953 04954 LOG_FUNCTION_START(""); 04955 04956 pdev->offset_calibration_mode = offset_cal_mode; 04957 04958 LOG_FUNCTION_END(status); 04959 04960 return status; 04961 } 04962 04963 04964 VL53L1_Error VL53L1_get_offset_calibration_mode( 04965 VL53L1_DEV Dev, 04966 VL53L1_OffsetCalibrationMode *poffset_cal_mode) 04967 { 04968 04969 04970 04971 VL53L1_Error status = VL53L1_ERROR_NONE; 04972 04973 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 04974 04975 LOG_FUNCTION_START(""); 04976 04977 *poffset_cal_mode = pdev->offset_calibration_mode; 04978 04979 LOG_FUNCTION_END(status); 04980 04981 return status; 04982 } 04983 04984 04985 VL53L1_Error VL53L1_set_offset_correction_mode( 04986 VL53L1_DEV Dev, 04987 VL53L1_OffsetCorrectionMode offset_cor_mode) 04988 { 04989 04990 04991 04992 VL53L1_Error status = VL53L1_ERROR_NONE; 04993 04994 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 04995 04996 LOG_FUNCTION_START(""); 04997 04998 pdev->offset_correction_mode = offset_cor_mode; 04999 05000 LOG_FUNCTION_END(status); 05001 05002 return status; 05003 } 05004 05005 05006 VL53L1_Error VL53L1_get_offset_correction_mode( 05007 VL53L1_DEV Dev, 05008 VL53L1_OffsetCorrectionMode *poffset_cor_mode) 05009 { 05010 05011 05012 05013 VL53L1_Error status = VL53L1_ERROR_NONE; 05014 05015 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 05016 05017 LOG_FUNCTION_START(""); 05018 05019 *poffset_cor_mode = pdev->offset_correction_mode; 05020 05021 LOG_FUNCTION_END(status); 05022 05023 return status; 05024 } 05025 05026 05027 05028 05029 VL53L1_Error VL53L1_set_zone_calibration_data( 05030 VL53L1_DEV Dev, 05031 VL53L1_zone_calibration_results_t *pzone_cal) 05032 { 05033 05034 05035 05036 VL53L1_Error status = VL53L1_ERROR_NONE; 05037 05038 VL53L1_LLDriverResults_t *pres = VL53L1DevStructGetLLResultsHandle(Dev); 05039 05040 LOG_FUNCTION_START(""); 05041 05042 if (pzone_cal->struct_version != 05043 VL53L1_LL_ZONE_CALIBRATION_DATA_STRUCT_VERSION) 05044 status = VL53L1_ERROR_INVALID_PARAMS; 05045 05046 05047 if (status == VL53L1_ERROR_NONE) 05048 05049 memcpy( 05050 &(pres->zone_cal), 05051 pzone_cal, 05052 sizeof(VL53L1_zone_calibration_results_t)); 05053 05054 LOG_FUNCTION_END(status); 05055 05056 return status; 05057 } 05058 05059 05060 VL53L1_Error VL53L1_get_zone_calibration_data( 05061 VL53L1_DEV Dev, 05062 VL53L1_zone_calibration_results_t *pzone_cal) 05063 { 05064 05065 05066 05067 VL53L1_Error status = VL53L1_ERROR_NONE; 05068 05069 VL53L1_LLDriverResults_t *pres = VL53L1DevStructGetLLResultsHandle(Dev); 05070 05071 LOG_FUNCTION_START(""); 05072 05073 05074 memcpy( 05075 pzone_cal, 05076 &(pres->zone_cal), 05077 sizeof(VL53L1_zone_calibration_results_t)); 05078 05079 pzone_cal->struct_version = 05080 VL53L1_LL_ZONE_CALIBRATION_DATA_STRUCT_VERSION; 05081 05082 LOG_FUNCTION_END(status); 05083 05084 return status; 05085 } 05086 05087 05088 VL53L1_Error VL53L1_get_tuning_debug_data( 05089 VL53L1_DEV Dev, 05090 VL53L1_tuning_parameters_t *ptun_data) 05091 { 05092 05093 05094 VL53L1_Error status = VL53L1_ERROR_NONE; 05095 05096 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 05097 VL53L1_hist_post_process_config_t *pHP = &(pdev->histpostprocess); 05098 VL53L1_xtalkextract_config_t *pXC = &(pdev->xtalk_extract_cfg); 05099 05100 LOG_FUNCTION_START(""); 05101 05102 ptun_data->vl53l1_tuningparm_version = 05103 pdev->tuning_parms.tp_tuning_parm_version; 05104 05105 ptun_data->vl53l1_tuningparm_key_table_version = 05106 pdev->tuning_parms.tp_tuning_parm_key_table_version; 05107 05108 05109 ptun_data->vl53l1_tuningparm_lld_version = 05110 pdev->tuning_parms.tp_tuning_parm_lld_version; 05111 05112 ptun_data->vl53l1_tuningparm_hist_algo_select = 05113 pHP->hist_algo_select; 05114 05115 ptun_data->vl53l1_tuningparm_hist_target_order = 05116 pHP->hist_target_order; 05117 05118 ptun_data->vl53l1_tuningparm_hist_filter_woi_0 = 05119 pHP->filter_woi0; 05120 05121 ptun_data->vl53l1_tuningparm_hist_filter_woi_1 = 05122 pHP->filter_woi1; 05123 05124 ptun_data->vl53l1_tuningparm_hist_amb_est_method = 05125 pHP->hist_amb_est_method; 05126 05127 ptun_data->vl53l1_tuningparm_hist_amb_thresh_sigma_0 = 05128 pHP->ambient_thresh_sigma0; 05129 05130 ptun_data->vl53l1_tuningparm_hist_amb_thresh_sigma_1 = 05131 pHP->ambient_thresh_sigma1; 05132 05133 ptun_data->vl53l1_tuningparm_hist_min_amb_thresh_events = 05134 pHP->min_ambient_thresh_events; 05135 05136 ptun_data->vl53l1_tuningparm_hist_amb_events_scaler = 05137 pHP->ambient_thresh_events_scaler; 05138 05139 ptun_data->vl53l1_tuningparm_hist_noise_threshold = 05140 pHP->noise_threshold; 05141 05142 ptun_data->vl53l1_tuningparm_hist_signal_total_events_limit = 05143 pHP->signal_total_events_limit; 05144 05145 ptun_data->vl53l1_tuningparm_hist_sigma_est_ref_mm = 05146 pHP->sigma_estimator__sigma_ref_mm; 05147 05148 ptun_data->vl53l1_tuningparm_hist_sigma_thresh_mm = 05149 pHP->sigma_thresh; 05150 05151 ptun_data->vl53l1_tuningparm_hist_gain_factor = 05152 pdev->gain_cal.histogram_ranging_gain_factor; 05153 05154 ptun_data->vl53l1_tuningparm_consistency_hist_phase_tolerance = 05155 pHP->algo__consistency_check__phase_tolerance; 05156 05157 ptun_data->vl53l1_tuningparm_consistency_hist_min_max_tolerance_mm = 05158 pHP->algo__consistency_check__min_max_tolerance; 05159 05160 ptun_data->vl53l1_tuningparm_consistency_hist_event_sigma = 05161 pHP->algo__consistency_check__event_sigma; 05162 05163 ptun_data->vl53l1_tuningparm_consistency_hist_event_sigma_min_spad_limit 05164 = pHP->algo__consistency_check__event_min_spad_count; 05165 05166 ptun_data->vl53l1_tuningparm_initial_phase_rtn_histo_long_range = 05167 pdev->tuning_parms.tp_init_phase_rtn_hist_long; 05168 05169 ptun_data->vl53l1_tuningparm_initial_phase_rtn_histo_med_range = 05170 pdev->tuning_parms.tp_init_phase_rtn_hist_med; 05171 05172 ptun_data->vl53l1_tuningparm_initial_phase_rtn_histo_short_range = 05173 pdev->tuning_parms.tp_init_phase_rtn_hist_short; 05174 05175 ptun_data->vl53l1_tuningparm_initial_phase_ref_histo_long_range = 05176 pdev->tuning_parms.tp_init_phase_ref_hist_long; 05177 05178 ptun_data->vl53l1_tuningparm_initial_phase_ref_histo_med_range = 05179 pdev->tuning_parms.tp_init_phase_ref_hist_med; 05180 05181 ptun_data->vl53l1_tuningparm_initial_phase_ref_histo_short_range = 05182 pdev->tuning_parms.tp_init_phase_ref_hist_short; 05183 05184 ptun_data->vl53l1_tuningparm_xtalk_detect_min_valid_range_mm = 05185 pdev->xtalk_cfg.algo__crosstalk_detect_min_valid_range_mm; 05186 05187 ptun_data->vl53l1_tuningparm_xtalk_detect_max_valid_range_mm = 05188 pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_range_mm; 05189 05190 ptun_data->vl53l1_tuningparm_xtalk_detect_max_sigma_mm = 05191 pdev->xtalk_cfg.algo__crosstalk_detect_max_sigma_mm; 05192 05193 ptun_data->vl53l1_tuningparm_xtalk_detect_min_max_tolerance = 05194 pHP->algo__crosstalk_detect_min_max_tolerance; 05195 05196 ptun_data->vl53l1_tuningparm_xtalk_detect_max_valid_rate_kcps = 05197 pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_rate_kcps; 05198 05199 ptun_data->vl53l1_tuningparm_xtalk_detect_event_sigma = 05200 pHP->algo__crosstalk_detect_event_sigma; 05201 05202 ptun_data->vl53l1_tuningparm_hist_xtalk_margin_kcps = 05203 pdev->xtalk_cfg.histogram_mode_crosstalk_margin_kcps; 05204 05205 ptun_data->vl53l1_tuningparm_consistency_lite_phase_tolerance = 05206 pdev->tuning_parms.tp_consistency_lite_phase_tolerance; 05207 05208 ptun_data->vl53l1_tuningparm_phasecal_target = 05209 pdev->tuning_parms.tp_phasecal_target; 05210 05211 ptun_data->vl53l1_tuningparm_lite_cal_repeat_rate = 05212 pdev->tuning_parms.tp_cal_repeat_rate; 05213 05214 ptun_data->vl53l1_tuningparm_lite_ranging_gain_factor = 05215 pdev->gain_cal.standard_ranging_gain_factor; 05216 05217 ptun_data->vl53l1_tuningparm_lite_min_clip_mm = 05218 pdev->tuning_parms.tp_lite_min_clip; 05219 05220 ptun_data->vl53l1_tuningparm_lite_long_sigma_thresh_mm = 05221 pdev->tuning_parms.tp_lite_long_sigma_thresh_mm; 05222 05223 ptun_data->vl53l1_tuningparm_lite_med_sigma_thresh_mm = 05224 pdev->tuning_parms.tp_lite_med_sigma_thresh_mm; 05225 05226 ptun_data->vl53l1_tuningparm_lite_short_sigma_thresh_mm = 05227 pdev->tuning_parms.tp_lite_short_sigma_thresh_mm; 05228 05229 ptun_data->vl53l1_tuningparm_lite_long_min_count_rate_rtn_mcps = 05230 pdev->tuning_parms.tp_lite_long_min_count_rate_rtn_mcps; 05231 05232 ptun_data->vl53l1_tuningparm_lite_med_min_count_rate_rtn_mcps = 05233 pdev->tuning_parms.tp_lite_med_min_count_rate_rtn_mcps; 05234 05235 ptun_data->vl53l1_tuningparm_lite_short_min_count_rate_rtn_mcps = 05236 pdev->tuning_parms.tp_lite_short_min_count_rate_rtn_mcps; 05237 05238 ptun_data->vl53l1_tuningparm_lite_sigma_est_pulse_width = 05239 pdev->tuning_parms.tp_lite_sigma_est_pulse_width_ns; 05240 05241 ptun_data->vl53l1_tuningparm_lite_sigma_est_amb_width_ns = 05242 pdev->tuning_parms.tp_lite_sigma_est_amb_width_ns; 05243 05244 ptun_data->vl53l1_tuningparm_lite_sigma_ref_mm = 05245 pdev->tuning_parms.tp_lite_sigma_ref_mm; 05246 05247 ptun_data->vl53l1_tuningparm_lite_rit_mult = 05248 pdev->xtalk_cfg.crosstalk_range_ignore_threshold_mult; 05249 05250 ptun_data->vl53l1_tuningparm_lite_seed_config = 05251 pdev->tuning_parms.tp_lite_seed_cfg; 05252 05253 ptun_data->vl53l1_tuningparm_lite_quantifier = 05254 pdev->tuning_parms.tp_lite_quantifier; 05255 05256 ptun_data->vl53l1_tuningparm_lite_first_order_select = 05257 pdev->tuning_parms.tp_lite_first_order_select; 05258 05259 ptun_data->vl53l1_tuningparm_lite_xtalk_margin_kcps = 05260 pdev->xtalk_cfg.lite_mode_crosstalk_margin_kcps; 05261 05262 ptun_data->vl53l1_tuningparm_initial_phase_rtn_lite_long_range = 05263 pdev->tuning_parms.tp_init_phase_rtn_lite_long; 05264 05265 ptun_data->vl53l1_tuningparm_initial_phase_rtn_lite_med_range = 05266 pdev->tuning_parms.tp_init_phase_rtn_lite_med; 05267 05268 ptun_data->vl53l1_tuningparm_initial_phase_rtn_lite_short_range = 05269 pdev->tuning_parms.tp_init_phase_rtn_lite_short; 05270 05271 ptun_data->vl53l1_tuningparm_initial_phase_ref_lite_long_range = 05272 pdev->tuning_parms.tp_init_phase_ref_lite_long; 05273 05274 ptun_data->vl53l1_tuningparm_initial_phase_ref_lite_med_range = 05275 pdev->tuning_parms.tp_init_phase_ref_lite_med; 05276 05277 ptun_data->vl53l1_tuningparm_initial_phase_ref_lite_short_range = 05278 pdev->tuning_parms.tp_init_phase_ref_lite_short; 05279 05280 ptun_data->vl53l1_tuningparm_timed_seed_config = 05281 pdev->tuning_parms.tp_timed_seed_cfg; 05282 05283 ptun_data->vl53l1_tuningparm_dmax_cfg_signal_thresh_sigma = 05284 pdev->dmax_cfg.signal_thresh_sigma; 05285 05286 ptun_data->vl53l1_tuningparm_dmax_cfg_reflectance_array_0 = 05287 pdev->dmax_cfg.target_reflectance_for_dmax_calc[0]; 05288 05289 ptun_data->vl53l1_tuningparm_dmax_cfg_reflectance_array_1 = 05290 pdev->dmax_cfg.target_reflectance_for_dmax_calc[1]; 05291 05292 ptun_data->vl53l1_tuningparm_dmax_cfg_reflectance_array_2 = 05293 pdev->dmax_cfg.target_reflectance_for_dmax_calc[2]; 05294 05295 ptun_data->vl53l1_tuningparm_dmax_cfg_reflectance_array_3 = 05296 pdev->dmax_cfg.target_reflectance_for_dmax_calc[3]; 05297 05298 ptun_data->vl53l1_tuningparm_dmax_cfg_reflectance_array_4 = 05299 pdev->dmax_cfg.target_reflectance_for_dmax_calc[4]; 05300 05301 ptun_data->vl53l1_tuningparm_vhv_loopbound = 05302 pdev->stat_nvm.vhv_config__timeout_macrop_loop_bound; 05303 05304 ptun_data->vl53l1_tuningparm_refspadchar_device_test_mode = 05305 pdev->refspadchar.device_test_mode; 05306 05307 ptun_data->vl53l1_tuningparm_refspadchar_vcsel_period = 05308 pdev->refspadchar.VL53L1_p_009; 05309 05310 ptun_data->vl53l1_tuningparm_refspadchar_phasecal_timeout_us = 05311 pdev->refspadchar.timeout_us; 05312 05313 ptun_data->vl53l1_tuningparm_refspadchar_target_count_rate_mcps = 05314 pdev->refspadchar.target_count_rate_mcps; 05315 05316 ptun_data->vl53l1_tuningparm_refspadchar_min_countrate_limit_mcps = 05317 pdev->refspadchar.min_count_rate_limit_mcps; 05318 05319 ptun_data->vl53l1_tuningparm_refspadchar_max_countrate_limit_mcps = 05320 pdev->refspadchar.max_count_rate_limit_mcps; 05321 05322 ptun_data->vl53l1_tuningparm_xtalk_extract_num_of_samples = 05323 pXC->num_of_samples; 05324 05325 ptun_data->vl53l1_tuningparm_xtalk_extract_min_filter_thresh_mm = 05326 pXC->algo__crosstalk_extract_min_valid_range_mm; 05327 05328 ptun_data->vl53l1_tuningparm_xtalk_extract_max_filter_thresh_mm = 05329 pXC->algo__crosstalk_extract_max_valid_range_mm; 05330 05331 ptun_data->vl53l1_tuningparm_xtalk_extract_dss_rate_mcps = 05332 pXC->dss_config__target_total_rate_mcps; 05333 05334 ptun_data->vl53l1_tuningparm_xtalk_extract_phasecal_timeout_us = 05335 pXC->phasecal_config_timeout_us; 05336 05337 ptun_data->vl53l1_tuningparm_xtalk_extract_max_valid_rate_kcps = 05338 pXC->algo__crosstalk_extract_max_valid_rate_kcps; 05339 05340 ptun_data->vl53l1_tuningparm_xtalk_extract_sigma_threshold_mm = 05341 pXC->algo__crosstalk_extract_max_sigma_mm; 05342 05343 ptun_data->vl53l1_tuningparm_xtalk_extract_dss_timeout_us = 05344 pXC->mm_config_timeout_us; 05345 05346 ptun_data->vl53l1_tuningparm_xtalk_extract_bin_timeout_us = 05347 pXC->range_config_timeout_us; 05348 05349 ptun_data->vl53l1_tuningparm_offset_cal_dss_rate_mcps = 05350 pdev->offsetcal_cfg.dss_config__target_total_rate_mcps; 05351 05352 ptun_data->vl53l1_tuningparm_offset_cal_phasecal_timeout_us = 05353 pdev->offsetcal_cfg.phasecal_config_timeout_us; 05354 05355 ptun_data->vl53l1_tuningparm_offset_cal_mm_timeout_us = 05356 pdev->offsetcal_cfg.mm_config_timeout_us; 05357 05358 ptun_data->vl53l1_tuningparm_offset_cal_range_timeout_us = 05359 pdev->offsetcal_cfg.range_config_timeout_us; 05360 05361 ptun_data->vl53l1_tuningparm_offset_cal_pre_samples = 05362 pdev->offsetcal_cfg.pre_num_of_samples; 05363 05364 ptun_data->vl53l1_tuningparm_offset_cal_mm1_samples = 05365 pdev->offsetcal_cfg.mm1_num_of_samples; 05366 05367 ptun_data->vl53l1_tuningparm_offset_cal_mm2_samples = 05368 pdev->offsetcal_cfg.mm2_num_of_samples; 05369 05370 ptun_data->vl53l1_tuningparm_zone_cal_dss_rate_mcps = 05371 pdev->zonecal_cfg.dss_config__target_total_rate_mcps; 05372 05373 ptun_data->vl53l1_tuningparm_zone_cal_phasecal_timeout_us = 05374 pdev->zonecal_cfg.phasecal_config_timeout_us; 05375 05376 ptun_data->vl53l1_tuningparm_zone_cal_dss_timeout_us = 05377 pdev->zonecal_cfg.mm_config_timeout_us; 05378 05379 ptun_data->vl53l1_tuningparm_zone_cal_phasecal_num_samples = 05380 pdev->zonecal_cfg.phasecal_num_of_samples; 05381 05382 ptun_data->vl53l1_tuningparm_zone_cal_range_timeout_us = 05383 pdev->zonecal_cfg.range_config_timeout_us; 05384 05385 ptun_data->vl53l1_tuningparm_zone_cal_zone_num_samples = 05386 pdev->zonecal_cfg.zone_num_of_samples; 05387 05388 ptun_data->vl53l1_tuningparm_spadmap_vcsel_period = 05389 pdev->ssc_cfg.VL53L1_p_009; 05390 05391 ptun_data->vl53l1_tuningparm_spadmap_vcsel_start = 05392 pdev->ssc_cfg.vcsel_start; 05393 05394 ptun_data->vl53l1_tuningparm_spadmap_rate_limit_mcps = 05395 pdev->ssc_cfg.rate_limit_mcps; 05396 05397 ptun_data->vl53l1_tuningparm_lite_dss_config_target_total_rate_mcps = 05398 pdev->tuning_parms.tp_dss_target_lite_mcps; 05399 05400 ptun_data->vl53l1_tuningparm_ranging_dss_config_target_total_rate_mcps = 05401 pdev->tuning_parms.tp_dss_target_histo_mcps; 05402 05403 ptun_data->vl53l1_tuningparm_mz_dss_config_target_total_rate_mcps = 05404 pdev->tuning_parms.tp_dss_target_histo_mz_mcps; 05405 05406 ptun_data->vl53l1_tuningparm_timed_dss_config_target_total_rate_mcps = 05407 pdev->tuning_parms.tp_dss_target_timed_mcps; 05408 05409 ptun_data->vl53l1_tuningparm_lite_phasecal_config_timeout_us = 05410 pdev->tuning_parms.tp_phasecal_timeout_lite_us; 05411 05412 ptun_data->vl53l1_tuningparm_ranging_long_phasecal_config_timeout_us = 05413 pdev->tuning_parms.tp_phasecal_timeout_hist_long_us; 05414 05415 ptun_data->vl53l1_tuningparm_ranging_med_phasecal_config_timeout_us = 05416 pdev->tuning_parms.tp_phasecal_timeout_hist_med_us; 05417 05418 ptun_data->vl53l1_tuningparm_ranging_short_phasecal_config_timeout_us = 05419 pdev->tuning_parms.tp_phasecal_timeout_hist_short_us; 05420 05421 ptun_data->vl53l1_tuningparm_mz_long_phasecal_config_timeout_us = 05422 pdev->tuning_parms.tp_phasecal_timeout_mz_long_us; 05423 05424 ptun_data->vl53l1_tuningparm_mz_med_phasecal_config_timeout_us = 05425 pdev->tuning_parms.tp_phasecal_timeout_mz_med_us; 05426 05427 ptun_data->vl53l1_tuningparm_mz_short_phasecal_config_timeout_us = 05428 pdev->tuning_parms.tp_phasecal_timeout_mz_short_us; 05429 05430 ptun_data->vl53l1_tuningparm_timed_phasecal_config_timeout_us = 05431 pdev->tuning_parms.tp_phasecal_timeout_timed_us; 05432 05433 ptun_data->vl53l1_tuningparm_lite_mm_config_timeout_us = 05434 pdev->tuning_parms.tp_mm_timeout_lite_us; 05435 05436 ptun_data->vl53l1_tuningparm_ranging_mm_config_timeout_us = 05437 pdev->tuning_parms.tp_mm_timeout_histo_us; 05438 05439 ptun_data->vl53l1_tuningparm_mz_mm_config_timeout_us = 05440 pdev->tuning_parms.tp_mm_timeout_mz_us; 05441 05442 ptun_data->vl53l1_tuningparm_timed_mm_config_timeout_us = 05443 pdev->tuning_parms.tp_mm_timeout_timed_us; 05444 05445 ptun_data->vl53l1_tuningparm_lite_range_config_timeout_us = 05446 pdev->tuning_parms.tp_range_timeout_lite_us; 05447 05448 ptun_data->vl53l1_tuningparm_ranging_range_config_timeout_us = 05449 pdev->tuning_parms.tp_range_timeout_histo_us; 05450 05451 ptun_data->vl53l1_tuningparm_mz_range_config_timeout_us = 05452 pdev->tuning_parms.tp_range_timeout_mz_us; 05453 05454 ptun_data->vl53l1_tuningparm_timed_range_config_timeout_us = 05455 pdev->tuning_parms.tp_range_timeout_timed_us; 05456 05457 ptun_data->vl53l1_tuningparm_dynxtalk_smudge_margin = 05458 pdev->smudge_correct_config.smudge_margin; 05459 05460 ptun_data->vl53l1_tuningparm_dynxtalk_noise_margin = 05461 pdev->smudge_correct_config.noise_margin; 05462 05463 ptun_data->vl53l1_tuningparm_dynxtalk_xtalk_offset_limit = 05464 pdev->smudge_correct_config.user_xtalk_offset_limit; 05465 05466 ptun_data->vl53l1_tuningparm_dynxtalk_xtalk_offset_limit_hi = 05467 pdev->smudge_correct_config.user_xtalk_offset_limit_hi; 05468 05469 ptun_data->vl53l1_tuningparm_dynxtalk_sample_limit = 05470 pdev->smudge_correct_config.sample_limit; 05471 05472 ptun_data->vl53l1_tuningparm_dynxtalk_single_xtalk_delta = 05473 pdev->smudge_correct_config.single_xtalk_delta; 05474 05475 ptun_data->vl53l1_tuningparm_dynxtalk_averaged_xtalk_delta = 05476 pdev->smudge_correct_config.averaged_xtalk_delta; 05477 05478 ptun_data->vl53l1_tuningparm_dynxtalk_clip_limit = 05479 pdev->smudge_correct_config.smudge_corr_clip_limit; 05480 05481 ptun_data->vl53l1_tuningparm_dynxtalk_scaler_calc_method = 05482 pdev->smudge_correct_config.scaler_calc_method; 05483 05484 ptun_data->vl53l1_tuningparm_dynxtalk_xgradient_scaler = 05485 pdev->smudge_correct_config.x_gradient_scaler; 05486 05487 ptun_data->vl53l1_tuningparm_dynxtalk_ygradient_scaler = 05488 pdev->smudge_correct_config.y_gradient_scaler; 05489 05490 ptun_data->vl53l1_tuningparm_dynxtalk_user_scaler_set = 05491 pdev->smudge_correct_config.user_scaler_set; 05492 05493 ptun_data->vl53l1_tuningparm_dynxtalk_smudge_cor_single_apply = 05494 pdev->smudge_correct_config.smudge_corr_single_apply; 05495 05496 ptun_data->vl53l1_tuningparm_dynxtalk_xtalk_amb_threshold = 05497 pdev->smudge_correct_config.smudge_corr_ambient_threshold; 05498 05499 ptun_data->vl53l1_tuningparm_dynxtalk_nodetect_amb_threshold_kcps = 05500 pdev->smudge_correct_config.nodetect_ambient_threshold; 05501 05502 ptun_data->vl53l1_tuningparm_dynxtalk_nodetect_sample_limit = 05503 pdev->smudge_correct_config.nodetect_sample_limit; 05504 05505 ptun_data->vl53l1_tuningparm_dynxtalk_nodetect_xtalk_offset_kcps = 05506 pdev->smudge_correct_config.nodetect_xtalk_offset; 05507 05508 ptun_data->vl53l1_tuningparm_dynxtalk_nodetect_min_range_mm = 05509 pdev->smudge_correct_config.nodetect_min_range_mm; 05510 05511 ptun_data->vl53l1_tuningparm_lowpowerauto_vhv_loop_bound = 05512 pdev->low_power_auto_data.vhv_loop_bound; 05513 05514 ptun_data->vl53l1_tuningparm_lowpowerauto_mm_config_timeout_us = 05515 pdev->tuning_parms.tp_mm_timeout_lpa_us; 05516 05517 ptun_data->vl53l1_tuningparm_lowpowerauto_range_config_timeout_us = 05518 pdev->tuning_parms.tp_range_timeout_lpa_us; 05519 05520 ptun_data->vl53l1_tuningparm_very_short_dss_rate_mcps = 05521 pdev->tuning_parms.tp_dss_target_very_short_mcps; 05522 05523 ptun_data->vl53l1_tuningparm_phasecal_patch_power = 05524 pdev->tuning_parms.tp_phasecal_patch_power; 05525 05526 LOG_FUNCTION_END(status); 05527 05528 return status; 05529 } 05530 05531 05532 05533 05534 05535 VL53L1_Error VL53L1_get_tuning_parm( 05536 VL53L1_DEV Dev, 05537 VL53L1_TuningParms tuning_parm_key, 05538 int32_t *ptuning_parm_value) 05539 { 05540 05541 05542 05543 VL53L1_Error status = VL53L1_ERROR_NONE; 05544 05545 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 05546 VL53L1_hist_post_process_config_t *pHP = &(pdev->histpostprocess); 05547 VL53L1_xtalkextract_config_t *pXC = &(pdev->xtalk_extract_cfg); 05548 05549 LOG_FUNCTION_START(""); 05550 05551 switch (tuning_parm_key) { 05552 05553 case VL53L1_TUNINGPARM_VERSION: 05554 *ptuning_parm_value = 05555 (int32_t)pdev->tuning_parms.tp_tuning_parm_version; 05556 break; 05557 case VL53L1_TUNINGPARM_KEY_TABLE_VERSION: 05558 *ptuning_parm_value = 05559 (int32_t)pdev->tuning_parms.tp_tuning_parm_key_table_version; 05560 break; 05561 case VL53L1_TUNINGPARM_LLD_VERSION: 05562 *ptuning_parm_value = 05563 (int32_t)pdev->tuning_parms.tp_tuning_parm_lld_version; 05564 break; 05565 case VL53L1_TUNINGPARM_HIST_ALGO_SELECT: 05566 *ptuning_parm_value = 05567 (int32_t)pHP->hist_algo_select; 05568 break; 05569 case VL53L1_TUNINGPARM_HIST_TARGET_ORDER: 05570 *ptuning_parm_value = 05571 (int32_t)pHP->hist_target_order; 05572 break; 05573 case VL53L1_TUNINGPARM_HIST_FILTER_WOI_0: 05574 *ptuning_parm_value = 05575 (int32_t)pHP->filter_woi0; 05576 break; 05577 case VL53L1_TUNINGPARM_HIST_FILTER_WOI_1: 05578 *ptuning_parm_value = 05579 (int32_t)pHP->filter_woi1; 05580 break; 05581 case VL53L1_TUNINGPARM_HIST_AMB_EST_METHOD: 05582 *ptuning_parm_value = 05583 (int32_t)pHP->hist_amb_est_method; 05584 break; 05585 case VL53L1_TUNINGPARM_HIST_AMB_THRESH_SIGMA_0: 05586 *ptuning_parm_value = 05587 (int32_t)pHP->ambient_thresh_sigma0; 05588 break; 05589 case VL53L1_TUNINGPARM_HIST_AMB_THRESH_SIGMA_1: 05590 *ptuning_parm_value = 05591 (int32_t)pHP->ambient_thresh_sigma1; 05592 break; 05593 case VL53L1_TUNINGPARM_HIST_MIN_AMB_THRESH_EVENTS: 05594 *ptuning_parm_value = 05595 (int32_t)pHP->min_ambient_thresh_events; 05596 break; 05597 case VL53L1_TUNINGPARM_HIST_AMB_EVENTS_SCALER: 05598 *ptuning_parm_value = 05599 (int32_t)pHP->ambient_thresh_events_scaler; 05600 break; 05601 case VL53L1_TUNINGPARM_HIST_NOISE_THRESHOLD: 05602 *ptuning_parm_value = 05603 (int32_t)pHP->noise_threshold; 05604 break; 05605 case VL53L1_TUNINGPARM_HIST_SIGNAL_TOTAL_EVENTS_LIMIT: 05606 *ptuning_parm_value = 05607 (int32_t)pHP->signal_total_events_limit; 05608 break; 05609 case VL53L1_TUNINGPARM_HIST_SIGMA_EST_REF_MM: 05610 *ptuning_parm_value = 05611 (int32_t)pHP->sigma_estimator__sigma_ref_mm; 05612 break; 05613 case VL53L1_TUNINGPARM_HIST_SIGMA_THRESH_MM: 05614 *ptuning_parm_value = 05615 (int32_t)pHP->sigma_thresh; 05616 break; 05617 case VL53L1_TUNINGPARM_HIST_GAIN_FACTOR: 05618 *ptuning_parm_value = 05619 (int32_t)pdev->gain_cal.histogram_ranging_gain_factor; 05620 break; 05621 case VL53L1_TUNINGPARM_CONSISTENCY_HIST_PHASE_TOLERANCE: 05622 *ptuning_parm_value = 05623 (int32_t)pHP->algo__consistency_check__phase_tolerance; 05624 break; 05625 case VL53L1_TUNINGPARM_CONSISTENCY_HIST_MIN_MAX_TOLERANCE_MM: 05626 *ptuning_parm_value = 05627 (int32_t)pHP->algo__consistency_check__min_max_tolerance; 05628 break; 05629 case VL53L1_TUNINGPARM_CONSISTENCY_HIST_EVENT_SIGMA: 05630 *ptuning_parm_value = 05631 (int32_t)pHP->algo__consistency_check__event_sigma; 05632 break; 05633 case VL53L1_TUNINGPARM_CONSISTENCY_HIST_EVENT_SIGMA_MIN_SPAD_LIMIT: 05634 *ptuning_parm_value = 05635 (int32_t)pHP->algo__consistency_check__event_min_spad_count; 05636 break; 05637 case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_LONG_RANGE: 05638 *ptuning_parm_value = 05639 (int32_t)pdev->tuning_parms.tp_init_phase_rtn_hist_long; 05640 break; 05641 case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_MED_RANGE: 05642 *ptuning_parm_value = 05643 (int32_t)pdev->tuning_parms.tp_init_phase_rtn_hist_med; 05644 break; 05645 case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_SHORT_RANGE: 05646 *ptuning_parm_value = 05647 (int32_t)pdev->tuning_parms.tp_init_phase_rtn_hist_short; 05648 break; 05649 case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_HISTO_LONG_RANGE: 05650 *ptuning_parm_value = 05651 (int32_t)pdev->tuning_parms.tp_init_phase_ref_hist_long; 05652 break; 05653 case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_HISTO_MED_RANGE: 05654 *ptuning_parm_value = 05655 (int32_t)pdev->tuning_parms.tp_init_phase_ref_hist_med; 05656 break; 05657 case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_HISTO_SHORT_RANGE: 05658 *ptuning_parm_value = 05659 (int32_t)pdev->tuning_parms.tp_init_phase_ref_hist_short; 05660 break; 05661 case VL53L1_TUNINGPARM_XTALK_DETECT_MIN_VALID_RANGE_MM: 05662 *ptuning_parm_value = (int32_t)( 05663 pdev->xtalk_cfg.algo__crosstalk_detect_min_valid_range_mm); 05664 break; 05665 case VL53L1_TUNINGPARM_XTALK_DETECT_MAX_VALID_RANGE_MM: 05666 *ptuning_parm_value = (int32_t)( 05667 pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_range_mm); 05668 break; 05669 case VL53L1_TUNINGPARM_XTALK_DETECT_MAX_SIGMA_MM: 05670 *ptuning_parm_value = 05671 (int32_t)pdev->xtalk_cfg.algo__crosstalk_detect_max_sigma_mm; 05672 break; 05673 case VL53L1_TUNINGPARM_XTALK_DETECT_MIN_MAX_TOLERANCE: 05674 *ptuning_parm_value = 05675 (int32_t)pHP->algo__crosstalk_detect_min_max_tolerance; 05676 break; 05677 case VL53L1_TUNINGPARM_XTALK_DETECT_MAX_VALID_RATE_KCPS: 05678 *ptuning_parm_value = (int32_t)( 05679 pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_rate_kcps); 05680 break; 05681 case VL53L1_TUNINGPARM_XTALK_DETECT_EVENT_SIGMA: 05682 *ptuning_parm_value = 05683 (int32_t)pHP->algo__crosstalk_detect_event_sigma; 05684 break; 05685 case VL53L1_TUNINGPARM_HIST_XTALK_MARGIN_KCPS: 05686 *ptuning_parm_value = 05687 (int32_t)pdev->xtalk_cfg.histogram_mode_crosstalk_margin_kcps; 05688 break; 05689 case VL53L1_TUNINGPARM_CONSISTENCY_LITE_PHASE_TOLERANCE: 05690 *ptuning_parm_value = 05691 (int32_t)pdev->tuning_parms.tp_consistency_lite_phase_tolerance; 05692 break; 05693 case VL53L1_TUNINGPARM_PHASECAL_TARGET: 05694 *ptuning_parm_value = 05695 (int32_t)pdev->tuning_parms.tp_phasecal_target; 05696 break; 05697 case VL53L1_TUNINGPARM_LITE_CAL_REPEAT_RATE: 05698 *ptuning_parm_value = 05699 (int32_t)pdev->tuning_parms.tp_cal_repeat_rate; 05700 break; 05701 case VL53L1_TUNINGPARM_LITE_RANGING_GAIN_FACTOR: 05702 *ptuning_parm_value = 05703 (int32_t)pdev->gain_cal.standard_ranging_gain_factor; 05704 break; 05705 case VL53L1_TUNINGPARM_LITE_MIN_CLIP_MM: 05706 *ptuning_parm_value = 05707 (int32_t)pdev->tuning_parms.tp_lite_min_clip; 05708 break; 05709 case VL53L1_TUNINGPARM_LITE_LONG_SIGMA_THRESH_MM: 05710 *ptuning_parm_value = 05711 (int32_t)pdev->tuning_parms.tp_lite_long_sigma_thresh_mm; 05712 break; 05713 case VL53L1_TUNINGPARM_LITE_MED_SIGMA_THRESH_MM: 05714 *ptuning_parm_value = 05715 (int32_t)pdev->tuning_parms.tp_lite_med_sigma_thresh_mm; 05716 break; 05717 case VL53L1_TUNINGPARM_LITE_SHORT_SIGMA_THRESH_MM: 05718 *ptuning_parm_value = 05719 (int32_t)pdev->tuning_parms.tp_lite_short_sigma_thresh_mm; 05720 break; 05721 case VL53L1_TUNINGPARM_LITE_LONG_MIN_COUNT_RATE_RTN_MCPS: 05722 *ptuning_parm_value = (int32_t)( 05723 pdev->tuning_parms.tp_lite_long_min_count_rate_rtn_mcps); 05724 break; 05725 case VL53L1_TUNINGPARM_LITE_MED_MIN_COUNT_RATE_RTN_MCPS: 05726 *ptuning_parm_value = 05727 (int32_t)pdev->tuning_parms.tp_lite_med_min_count_rate_rtn_mcps; 05728 break; 05729 case VL53L1_TUNINGPARM_LITE_SHORT_MIN_COUNT_RATE_RTN_MCPS: 05730 *ptuning_parm_value = (int32_t)( 05731 pdev->tuning_parms.tp_lite_short_min_count_rate_rtn_mcps); 05732 break; 05733 case VL53L1_TUNINGPARM_LITE_SIGMA_EST_PULSE_WIDTH: 05734 *ptuning_parm_value = 05735 (int32_t)pdev->tuning_parms.tp_lite_sigma_est_pulse_width_ns; 05736 break; 05737 case VL53L1_TUNINGPARM_LITE_SIGMA_EST_AMB_WIDTH_NS: 05738 *ptuning_parm_value = 05739 (int32_t)pdev->tuning_parms.tp_lite_sigma_est_amb_width_ns; 05740 break; 05741 case VL53L1_TUNINGPARM_LITE_SIGMA_REF_MM: 05742 *ptuning_parm_value = 05743 (int32_t)pdev->tuning_parms.tp_lite_sigma_ref_mm; 05744 break; 05745 case VL53L1_TUNINGPARM_LITE_RIT_MULT: 05746 *ptuning_parm_value = 05747 (int32_t)pdev->xtalk_cfg.crosstalk_range_ignore_threshold_mult; 05748 break; 05749 case VL53L1_TUNINGPARM_LITE_SEED_CONFIG: 05750 *ptuning_parm_value = 05751 (int32_t)pdev->tuning_parms.tp_lite_seed_cfg; 05752 break; 05753 case VL53L1_TUNINGPARM_LITE_QUANTIFIER: 05754 *ptuning_parm_value = 05755 (int32_t)pdev->tuning_parms.tp_lite_quantifier; 05756 break; 05757 case VL53L1_TUNINGPARM_LITE_FIRST_ORDER_SELECT: 05758 *ptuning_parm_value = 05759 (int32_t)pdev->tuning_parms.tp_lite_first_order_select; 05760 break; 05761 case VL53L1_TUNINGPARM_LITE_XTALK_MARGIN_KCPS: 05762 *ptuning_parm_value = 05763 (int32_t)pdev->xtalk_cfg.lite_mode_crosstalk_margin_kcps; 05764 break; 05765 case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_LITE_LONG_RANGE: 05766 *ptuning_parm_value = 05767 (int32_t)pdev->tuning_parms.tp_init_phase_rtn_lite_long; 05768 break; 05769 case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_LITE_MED_RANGE: 05770 *ptuning_parm_value = 05771 (int32_t)pdev->tuning_parms.tp_init_phase_rtn_lite_med; 05772 break; 05773 case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_LITE_SHORT_RANGE: 05774 *ptuning_parm_value = 05775 (int32_t)pdev->tuning_parms.tp_init_phase_rtn_lite_short; 05776 break; 05777 case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_LITE_LONG_RANGE: 05778 *ptuning_parm_value = 05779 (int32_t)pdev->tuning_parms.tp_init_phase_ref_lite_long; 05780 break; 05781 case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_LITE_MED_RANGE: 05782 *ptuning_parm_value = 05783 (int32_t)pdev->tuning_parms.tp_init_phase_ref_lite_med; 05784 break; 05785 case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_LITE_SHORT_RANGE: 05786 *ptuning_parm_value = 05787 (int32_t)pdev->tuning_parms.tp_init_phase_ref_lite_short; 05788 break; 05789 case VL53L1_TUNINGPARM_TIMED_SEED_CONFIG: 05790 *ptuning_parm_value = 05791 (int32_t)pdev->tuning_parms.tp_timed_seed_cfg; 05792 break; 05793 case VL53L1_TUNINGPARM_DMAX_CFG_SIGNAL_THRESH_SIGMA: 05794 *ptuning_parm_value = 05795 (int32_t)pdev->dmax_cfg.signal_thresh_sigma; 05796 break; 05797 case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_0: 05798 *ptuning_parm_value = 05799 (int32_t)pdev->dmax_cfg.target_reflectance_for_dmax_calc[0]; 05800 break; 05801 case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_1: 05802 *ptuning_parm_value = 05803 (int32_t)pdev->dmax_cfg.target_reflectance_for_dmax_calc[1]; 05804 break; 05805 case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_2: 05806 *ptuning_parm_value = 05807 (int32_t)pdev->dmax_cfg.target_reflectance_for_dmax_calc[2]; 05808 break; 05809 case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_3: 05810 *ptuning_parm_value = 05811 (int32_t)pdev->dmax_cfg.target_reflectance_for_dmax_calc[3]; 05812 break; 05813 case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_4: 05814 *ptuning_parm_value = 05815 (int32_t)pdev->dmax_cfg.target_reflectance_for_dmax_calc[4]; 05816 break; 05817 case VL53L1_TUNINGPARM_VHV_LOOPBOUND: 05818 *ptuning_parm_value = 05819 (int32_t)pdev->stat_nvm.vhv_config__timeout_macrop_loop_bound; 05820 break; 05821 case VL53L1_TUNINGPARM_REFSPADCHAR_DEVICE_TEST_MODE: 05822 *ptuning_parm_value = 05823 (int32_t)pdev->refspadchar.device_test_mode; 05824 break; 05825 case VL53L1_TUNINGPARM_REFSPADCHAR_VCSEL_PERIOD: 05826 *ptuning_parm_value = 05827 (int32_t)pdev->refspadchar.VL53L1_p_009; 05828 break; 05829 case VL53L1_TUNINGPARM_REFSPADCHAR_PHASECAL_TIMEOUT_US: 05830 *ptuning_parm_value = 05831 (int32_t)pdev->refspadchar.timeout_us; 05832 break; 05833 case VL53L1_TUNINGPARM_REFSPADCHAR_TARGET_COUNT_RATE_MCPS: 05834 *ptuning_parm_value = 05835 (int32_t)pdev->refspadchar.target_count_rate_mcps; 05836 break; 05837 case VL53L1_TUNINGPARM_REFSPADCHAR_MIN_COUNTRATE_LIMIT_MCPS: 05838 *ptuning_parm_value = 05839 (int32_t)pdev->refspadchar.min_count_rate_limit_mcps; 05840 break; 05841 case VL53L1_TUNINGPARM_REFSPADCHAR_MAX_COUNTRATE_LIMIT_MCPS: 05842 *ptuning_parm_value = 05843 (int32_t)pdev->refspadchar.max_count_rate_limit_mcps; 05844 break; 05845 case VL53L1_TUNINGPARM_XTALK_EXTRACT_NUM_OF_SAMPLES: 05846 *ptuning_parm_value = 05847 (int32_t)pXC->num_of_samples; 05848 break; 05849 case VL53L1_TUNINGPARM_XTALK_EXTRACT_MIN_FILTER_THRESH_MM: 05850 *ptuning_parm_value = 05851 (int32_t)pXC->algo__crosstalk_extract_min_valid_range_mm; 05852 break; 05853 case VL53L1_TUNINGPARM_XTALK_EXTRACT_MAX_FILTER_THRESH_MM: 05854 *ptuning_parm_value = 05855 (int32_t)pXC->algo__crosstalk_extract_max_valid_range_mm; 05856 break; 05857 case VL53L1_TUNINGPARM_XTALK_EXTRACT_DSS_RATE_MCPS: 05858 *ptuning_parm_value = 05859 (int32_t)pXC->dss_config__target_total_rate_mcps; 05860 break; 05861 case VL53L1_TUNINGPARM_XTALK_EXTRACT_PHASECAL_TIMEOUT_US: 05862 *ptuning_parm_value = 05863 (int32_t)pXC->phasecal_config_timeout_us; 05864 break; 05865 case VL53L1_TUNINGPARM_XTALK_EXTRACT_MAX_VALID_RATE_KCPS: 05866 *ptuning_parm_value = 05867 (int32_t)pXC->algo__crosstalk_extract_max_valid_rate_kcps; 05868 break; 05869 case VL53L1_TUNINGPARM_XTALK_EXTRACT_SIGMA_THRESHOLD_MM: 05870 *ptuning_parm_value = 05871 (int32_t)pXC->algo__crosstalk_extract_max_sigma_mm; 05872 break; 05873 case VL53L1_TUNINGPARM_XTALK_EXTRACT_DSS_TIMEOUT_US: 05874 *ptuning_parm_value = 05875 (int32_t)pXC->mm_config_timeout_us; 05876 break; 05877 case VL53L1_TUNINGPARM_XTALK_EXTRACT_BIN_TIMEOUT_US: 05878 *ptuning_parm_value = 05879 (int32_t)pXC->range_config_timeout_us; 05880 break; 05881 case VL53L1_TUNINGPARM_OFFSET_CAL_DSS_RATE_MCPS: 05882 *ptuning_parm_value = 05883 (int32_t)pdev->offsetcal_cfg.dss_config__target_total_rate_mcps; 05884 break; 05885 case VL53L1_TUNINGPARM_OFFSET_CAL_PHASECAL_TIMEOUT_US: 05886 *ptuning_parm_value = 05887 (int32_t)pdev->offsetcal_cfg.phasecal_config_timeout_us; 05888 break; 05889 case VL53L1_TUNINGPARM_OFFSET_CAL_MM_TIMEOUT_US: 05890 *ptuning_parm_value = 05891 (int32_t)pdev->offsetcal_cfg.mm_config_timeout_us; 05892 break; 05893 case VL53L1_TUNINGPARM_OFFSET_CAL_RANGE_TIMEOUT_US: 05894 *ptuning_parm_value = 05895 (int32_t)pdev->offsetcal_cfg.range_config_timeout_us; 05896 break; 05897 case VL53L1_TUNINGPARM_OFFSET_CAL_PRE_SAMPLES: 05898 *ptuning_parm_value = 05899 (int32_t)pdev->offsetcal_cfg.pre_num_of_samples; 05900 break; 05901 case VL53L1_TUNINGPARM_OFFSET_CAL_MM1_SAMPLES: 05902 *ptuning_parm_value = 05903 (int32_t)pdev->offsetcal_cfg.mm1_num_of_samples; 05904 break; 05905 case VL53L1_TUNINGPARM_OFFSET_CAL_MM2_SAMPLES: 05906 *ptuning_parm_value = 05907 (int32_t)pdev->offsetcal_cfg.mm2_num_of_samples; 05908 break; 05909 case VL53L1_TUNINGPARM_ZONE_CAL_DSS_RATE_MCPS: 05910 *ptuning_parm_value = 05911 (int32_t)pdev->zonecal_cfg.dss_config__target_total_rate_mcps; 05912 break; 05913 case VL53L1_TUNINGPARM_ZONE_CAL_PHASECAL_TIMEOUT_US: 05914 *ptuning_parm_value = 05915 (int32_t)pdev->zonecal_cfg.phasecal_config_timeout_us; 05916 break; 05917 case VL53L1_TUNINGPARM_ZONE_CAL_DSS_TIMEOUT_US: 05918 *ptuning_parm_value = 05919 (int32_t)pdev->zonecal_cfg.mm_config_timeout_us; 05920 break; 05921 case VL53L1_TUNINGPARM_ZONE_CAL_PHASECAL_NUM_SAMPLES: 05922 *ptuning_parm_value = 05923 (int32_t)pdev->zonecal_cfg.phasecal_num_of_samples; 05924 break; 05925 case VL53L1_TUNINGPARM_ZONE_CAL_RANGE_TIMEOUT_US: 05926 *ptuning_parm_value = 05927 (int32_t)pdev->zonecal_cfg.range_config_timeout_us; 05928 break; 05929 case VL53L1_TUNINGPARM_ZONE_CAL_ZONE_NUM_SAMPLES: 05930 *ptuning_parm_value = 05931 (int32_t)pdev->zonecal_cfg.zone_num_of_samples; 05932 break; 05933 case VL53L1_TUNINGPARM_SPADMAP_VCSEL_PERIOD: 05934 *ptuning_parm_value = 05935 (int32_t)pdev->ssc_cfg.VL53L1_p_009; 05936 break; 05937 case VL53L1_TUNINGPARM_SPADMAP_VCSEL_START: 05938 *ptuning_parm_value = 05939 (int32_t)pdev->ssc_cfg.vcsel_start; 05940 break; 05941 case VL53L1_TUNINGPARM_SPADMAP_RATE_LIMIT_MCPS: 05942 *ptuning_parm_value = 05943 (int32_t)pdev->ssc_cfg.rate_limit_mcps; 05944 break; 05945 case VL53L1_TUNINGPARM_LITE_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS: 05946 *ptuning_parm_value = 05947 (int32_t)pdev->tuning_parms.tp_dss_target_lite_mcps; 05948 break; 05949 case VL53L1_TUNINGPARM_RANGING_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS: 05950 *ptuning_parm_value = 05951 (int32_t)pdev->tuning_parms.tp_dss_target_histo_mcps; 05952 break; 05953 case VL53L1_TUNINGPARM_MZ_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS: 05954 *ptuning_parm_value = 05955 (int32_t)pdev->tuning_parms.tp_dss_target_histo_mz_mcps; 05956 break; 05957 case VL53L1_TUNINGPARM_TIMED_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS: 05958 *ptuning_parm_value = 05959 (int32_t)pdev->tuning_parms.tp_dss_target_timed_mcps; 05960 break; 05961 case VL53L1_TUNINGPARM_LITE_PHASECAL_CONFIG_TIMEOUT_US: 05962 *ptuning_parm_value = 05963 (int32_t)pdev->tuning_parms.tp_phasecal_timeout_lite_us; 05964 break; 05965 case VL53L1_TUNINGPARM_RANGING_LONG_PHASECAL_CONFIG_TIMEOUT_US: 05966 *ptuning_parm_value = 05967 (int32_t)pdev->tuning_parms.tp_phasecal_timeout_hist_long_us; 05968 break; 05969 case VL53L1_TUNINGPARM_RANGING_MED_PHASECAL_CONFIG_TIMEOUT_US: 05970 *ptuning_parm_value = 05971 (int32_t)pdev->tuning_parms.tp_phasecal_timeout_hist_med_us; 05972 break; 05973 case VL53L1_TUNINGPARM_RANGING_SHORT_PHASECAL_CONFIG_TIMEOUT_US: 05974 *ptuning_parm_value = 05975 (int32_t)pdev->tuning_parms.tp_phasecal_timeout_hist_short_us; 05976 break; 05977 case VL53L1_TUNINGPARM_MZ_LONG_PHASECAL_CONFIG_TIMEOUT_US: 05978 *ptuning_parm_value = 05979 (int32_t)pdev->tuning_parms.tp_phasecal_timeout_mz_long_us; 05980 break; 05981 case VL53L1_TUNINGPARM_MZ_MED_PHASECAL_CONFIG_TIMEOUT_US: 05982 *ptuning_parm_value = 05983 (int32_t)pdev->tuning_parms.tp_phasecal_timeout_mz_med_us; 05984 break; 05985 case VL53L1_TUNINGPARM_MZ_SHORT_PHASECAL_CONFIG_TIMEOUT_US: 05986 *ptuning_parm_value = 05987 (int32_t)pdev->tuning_parms.tp_phasecal_timeout_mz_short_us; 05988 break; 05989 case VL53L1_TUNINGPARM_TIMED_PHASECAL_CONFIG_TIMEOUT_US: 05990 *ptuning_parm_value = 05991 (int32_t)pdev->tuning_parms.tp_phasecal_timeout_timed_us; 05992 break; 05993 case VL53L1_TUNINGPARM_LITE_MM_CONFIG_TIMEOUT_US: 05994 *ptuning_parm_value = 05995 (int32_t)pdev->tuning_parms.tp_mm_timeout_lite_us; 05996 break; 05997 case VL53L1_TUNINGPARM_RANGING_MM_CONFIG_TIMEOUT_US: 05998 *ptuning_parm_value = 05999 (int32_t)pdev->tuning_parms.tp_mm_timeout_histo_us; 06000 break; 06001 case VL53L1_TUNINGPARM_MZ_MM_CONFIG_TIMEOUT_US: 06002 *ptuning_parm_value = 06003 (int32_t)pdev->tuning_parms.tp_mm_timeout_mz_us; 06004 break; 06005 case VL53L1_TUNINGPARM_TIMED_MM_CONFIG_TIMEOUT_US: 06006 *ptuning_parm_value = 06007 (int32_t)pdev->tuning_parms.tp_mm_timeout_timed_us; 06008 break; 06009 case VL53L1_TUNINGPARM_LITE_RANGE_CONFIG_TIMEOUT_US: 06010 *ptuning_parm_value = 06011 (int32_t)pdev->tuning_parms.tp_range_timeout_lite_us; 06012 break; 06013 case VL53L1_TUNINGPARM_RANGING_RANGE_CONFIG_TIMEOUT_US: 06014 *ptuning_parm_value = 06015 (int32_t)pdev->tuning_parms.tp_range_timeout_histo_us; 06016 break; 06017 case VL53L1_TUNINGPARM_MZ_RANGE_CONFIG_TIMEOUT_US: 06018 *ptuning_parm_value = 06019 (int32_t)pdev->tuning_parms.tp_range_timeout_mz_us; 06020 break; 06021 case VL53L1_TUNINGPARM_TIMED_RANGE_CONFIG_TIMEOUT_US: 06022 *ptuning_parm_value = 06023 (int32_t)pdev->tuning_parms.tp_range_timeout_timed_us; 06024 break; 06025 case VL53L1_TUNINGPARM_DYNXTALK_SMUDGE_MARGIN: 06026 *ptuning_parm_value = 06027 (int32_t)pdev->smudge_correct_config.smudge_margin; 06028 break; 06029 case VL53L1_TUNINGPARM_DYNXTALK_NOISE_MARGIN: 06030 *ptuning_parm_value = 06031 (int32_t)pdev->smudge_correct_config.noise_margin; 06032 break; 06033 case VL53L1_TUNINGPARM_DYNXTALK_XTALK_OFFSET_LIMIT: 06034 *ptuning_parm_value = 06035 (int32_t)pdev->smudge_correct_config.user_xtalk_offset_limit; 06036 break; 06037 case VL53L1_TUNINGPARM_DYNXTALK_XTALK_OFFSET_LIMIT_HI: 06038 *ptuning_parm_value = 06039 (int32_t)pdev->smudge_correct_config.user_xtalk_offset_limit_hi; 06040 break; 06041 case VL53L1_TUNINGPARM_DYNXTALK_SAMPLE_LIMIT: 06042 *ptuning_parm_value = 06043 (int32_t)pdev->smudge_correct_config.sample_limit; 06044 break; 06045 case VL53L1_TUNINGPARM_DYNXTALK_SINGLE_XTALK_DELTA: 06046 *ptuning_parm_value = 06047 (int32_t)pdev->smudge_correct_config.single_xtalk_delta; 06048 break; 06049 case VL53L1_TUNINGPARM_DYNXTALK_AVERAGED_XTALK_DELTA: 06050 *ptuning_parm_value = 06051 (int32_t)pdev->smudge_correct_config.averaged_xtalk_delta; 06052 break; 06053 case VL53L1_TUNINGPARM_DYNXTALK_CLIP_LIMIT: 06054 *ptuning_parm_value = 06055 (int32_t)pdev->smudge_correct_config.smudge_corr_clip_limit; 06056 break; 06057 case VL53L1_TUNINGPARM_DYNXTALK_SCALER_CALC_METHOD: 06058 *ptuning_parm_value = 06059 (int32_t)pdev->smudge_correct_config.scaler_calc_method; 06060 break; 06061 case VL53L1_TUNINGPARM_DYNXTALK_XGRADIENT_SCALER: 06062 *ptuning_parm_value = 06063 (int32_t)pdev->smudge_correct_config.x_gradient_scaler; 06064 break; 06065 case VL53L1_TUNINGPARM_DYNXTALK_YGRADIENT_SCALER: 06066 *ptuning_parm_value = 06067 (int32_t)pdev->smudge_correct_config.y_gradient_scaler; 06068 break; 06069 case VL53L1_TUNINGPARM_DYNXTALK_USER_SCALER_SET: 06070 *ptuning_parm_value = 06071 (int32_t)pdev->smudge_correct_config.user_scaler_set; 06072 break; 06073 case VL53L1_TUNINGPARM_DYNXTALK_SMUDGE_COR_SINGLE_APPLY: 06074 *ptuning_parm_value = 06075 (int32_t)pdev->smudge_correct_config.smudge_corr_single_apply; 06076 break; 06077 case VL53L1_TUNINGPARM_DYNXTALK_XTALK_AMB_THRESHOLD: 06078 *ptuning_parm_value = (int32_t)( 06079 pdev->smudge_correct_config.smudge_corr_ambient_threshold); 06080 break; 06081 case VL53L1_TUNINGPARM_DYNXTALK_NODETECT_AMB_THRESHOLD_KCPS: 06082 *ptuning_parm_value = 06083 (int32_t)pdev->smudge_correct_config.nodetect_ambient_threshold; 06084 break; 06085 case VL53L1_TUNINGPARM_DYNXTALK_NODETECT_SAMPLE_LIMIT: 06086 *ptuning_parm_value = 06087 (int32_t)pdev->smudge_correct_config.nodetect_sample_limit; 06088 break; 06089 case VL53L1_TUNINGPARM_DYNXTALK_NODETECT_XTALK_OFFSET_KCPS: 06090 *ptuning_parm_value = 06091 (int32_t)pdev->smudge_correct_config.nodetect_xtalk_offset; 06092 break; 06093 case VL53L1_TUNINGPARM_DYNXTALK_NODETECT_MIN_RANGE_MM: 06094 *ptuning_parm_value = 06095 (int32_t)pdev->smudge_correct_config.nodetect_min_range_mm; 06096 break; 06097 case VL53L1_TUNINGPARM_LOWPOWERAUTO_VHV_LOOP_BOUND: 06098 *ptuning_parm_value = 06099 (int32_t)pdev->low_power_auto_data.vhv_loop_bound; 06100 break; 06101 case VL53L1_TUNINGPARM_LOWPOWERAUTO_MM_CONFIG_TIMEOUT_US: 06102 *ptuning_parm_value = 06103 (int32_t)pdev->tuning_parms.tp_mm_timeout_lpa_us; 06104 break; 06105 case VL53L1_TUNINGPARM_LOWPOWERAUTO_RANGE_CONFIG_TIMEOUT_US: 06106 *ptuning_parm_value = 06107 (int32_t)pdev->tuning_parms.tp_range_timeout_lpa_us; 06108 break; 06109 case VL53L1_TUNINGPARM_VERY_SHORT_DSS_RATE_MCPS: 06110 *ptuning_parm_value = 06111 (int32_t)pdev->tuning_parms.tp_dss_target_very_short_mcps; 06112 break; 06113 case VL53L1_TUNINGPARM_PHASECAL_PATCH_POWER: 06114 *ptuning_parm_value = 06115 (int32_t) pdev->tuning_parms.tp_phasecal_patch_power; 06116 break; 06117 case VL53L1_TUNINGPARM_HIST_MERGE: 06118 *ptuning_parm_value = 06119 (int32_t) pdev->tuning_parms.tp_hist_merge; 06120 break; 06121 case VL53L1_TUNINGPARM_RESET_MERGE_THRESHOLD: 06122 *ptuning_parm_value = 06123 (int32_t) pdev->tuning_parms.tp_reset_merge_threshold; 06124 break; 06125 case VL53L1_TUNINGPARM_HIST_MERGE_MAX_SIZE: 06126 *ptuning_parm_value = 06127 (int32_t) pdev->tuning_parms.tp_hist_merge_max_size; 06128 break; 06129 case VL53L1_TUNINGPARM_DYNXTALK_MAX_SMUDGE_FACTOR: 06130 *ptuning_parm_value = 06131 pdev->smudge_correct_config.max_smudge_factor; 06132 break; 06133 06134 case VL53L1_TUNINGPARM_UWR_ENABLE: 06135 *ptuning_parm_value = 06136 pdev->tuning_parms.tp_uwr_enable; 06137 break; 06138 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_1_MIN: 06139 *ptuning_parm_value = 06140 pdev->tuning_parms.tp_uwr_med_z_1_min; 06141 break; 06142 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_1_MAX: 06143 *ptuning_parm_value = 06144 pdev->tuning_parms.tp_uwr_med_z_1_max; 06145 break; 06146 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_2_MIN: 06147 *ptuning_parm_value = 06148 pdev->tuning_parms.tp_uwr_med_z_2_min; 06149 break; 06150 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_2_MAX: 06151 *ptuning_parm_value = 06152 pdev->tuning_parms.tp_uwr_med_z_2_max; 06153 break; 06154 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_3_MIN: 06155 *ptuning_parm_value = 06156 pdev->tuning_parms.tp_uwr_med_z_3_min; 06157 break; 06158 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_3_MAX: 06159 *ptuning_parm_value = 06160 pdev->tuning_parms.tp_uwr_med_z_3_max; 06161 break; 06162 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_4_MIN: 06163 *ptuning_parm_value = 06164 pdev->tuning_parms.tp_uwr_med_z_4_min; 06165 break; 06166 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_4_MAX: 06167 *ptuning_parm_value = 06168 pdev->tuning_parms.tp_uwr_med_z_4_max; 06169 break; 06170 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_5_MIN: 06171 *ptuning_parm_value = 06172 pdev->tuning_parms.tp_uwr_med_z_5_min; 06173 break; 06174 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_5_MAX: 06175 *ptuning_parm_value = 06176 pdev->tuning_parms.tp_uwr_med_z_5_max; 06177 break; 06178 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_6_MIN: 06179 *ptuning_parm_value = 06180 pdev->tuning_parms.tp_uwr_med_z_6_min; 06181 break; 06182 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_6_MAX: 06183 *ptuning_parm_value = 06184 pdev->tuning_parms.tp_uwr_med_z_6_max; 06185 break; 06186 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_1_RANGEA: 06187 *ptuning_parm_value = 06188 pdev->tuning_parms.tp_uwr_med_corr_z_1_rangea; 06189 break; 06190 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_1_RANGEB: 06191 *ptuning_parm_value = 06192 pdev->tuning_parms.tp_uwr_med_corr_z_1_rangeb; 06193 break; 06194 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_2_RANGEA: 06195 *ptuning_parm_value = 06196 pdev->tuning_parms.tp_uwr_med_corr_z_2_rangea; 06197 break; 06198 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_2_RANGEB: 06199 *ptuning_parm_value = 06200 pdev->tuning_parms.tp_uwr_med_corr_z_2_rangeb; 06201 break; 06202 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_3_RANGEA: 06203 *ptuning_parm_value = 06204 pdev->tuning_parms.tp_uwr_med_corr_z_3_rangea; 06205 break; 06206 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_3_RANGEB: 06207 *ptuning_parm_value = 06208 pdev->tuning_parms.tp_uwr_med_corr_z_3_rangeb; 06209 break; 06210 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_4_RANGEA: 06211 *ptuning_parm_value = 06212 pdev->tuning_parms.tp_uwr_med_corr_z_4_rangea; 06213 break; 06214 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_4_RANGEB: 06215 *ptuning_parm_value = 06216 pdev->tuning_parms.tp_uwr_med_corr_z_4_rangeb; 06217 break; 06218 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_5_RANGEA: 06219 *ptuning_parm_value = 06220 pdev->tuning_parms.tp_uwr_med_corr_z_5_rangea; 06221 break; 06222 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_5_RANGEB: 06223 *ptuning_parm_value = 06224 pdev->tuning_parms.tp_uwr_med_corr_z_5_rangeb; 06225 break; 06226 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_6_RANGEA: 06227 *ptuning_parm_value = 06228 pdev->tuning_parms.tp_uwr_med_corr_z_6_rangea; 06229 break; 06230 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_6_RANGEB: 06231 *ptuning_parm_value = 06232 pdev->tuning_parms.tp_uwr_med_corr_z_6_rangeb; 06233 break; 06234 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_1_MIN: 06235 *ptuning_parm_value = 06236 pdev->tuning_parms.tp_uwr_lng_z_1_min; 06237 break; 06238 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_1_MAX: 06239 *ptuning_parm_value = 06240 pdev->tuning_parms.tp_uwr_lng_z_1_max; 06241 break; 06242 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_2_MIN: 06243 *ptuning_parm_value = 06244 pdev->tuning_parms.tp_uwr_lng_z_2_min; 06245 break; 06246 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_2_MAX: 06247 *ptuning_parm_value = 06248 pdev->tuning_parms.tp_uwr_lng_z_2_max; 06249 break; 06250 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_3_MIN: 06251 *ptuning_parm_value = 06252 pdev->tuning_parms.tp_uwr_lng_z_3_min; 06253 break; 06254 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_3_MAX: 06255 *ptuning_parm_value = 06256 pdev->tuning_parms.tp_uwr_lng_z_3_max; 06257 break; 06258 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_4_MIN: 06259 *ptuning_parm_value = 06260 pdev->tuning_parms.tp_uwr_lng_z_4_min; 06261 break; 06262 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_4_MAX: 06263 *ptuning_parm_value = 06264 pdev->tuning_parms.tp_uwr_lng_z_4_max; 06265 break; 06266 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_5_MIN: 06267 *ptuning_parm_value = 06268 pdev->tuning_parms.tp_uwr_lng_z_5_min; 06269 break; 06270 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_5_MAX: 06271 *ptuning_parm_value = 06272 pdev->tuning_parms.tp_uwr_lng_z_5_max; 06273 break; 06274 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_1_RANGEA: 06275 *ptuning_parm_value = 06276 pdev->tuning_parms.tp_uwr_lng_corr_z_1_rangea; 06277 break; 06278 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_1_RANGEB: 06279 *ptuning_parm_value = 06280 pdev->tuning_parms.tp_uwr_lng_corr_z_1_rangeb; 06281 break; 06282 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_2_RANGEA: 06283 *ptuning_parm_value = 06284 pdev->tuning_parms.tp_uwr_lng_corr_z_2_rangea; 06285 break; 06286 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_2_RANGEB: 06287 *ptuning_parm_value = 06288 pdev->tuning_parms.tp_uwr_lng_corr_z_2_rangeb; 06289 break; 06290 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_3_RANGEA: 06291 *ptuning_parm_value = 06292 pdev->tuning_parms.tp_uwr_lng_corr_z_3_rangea; 06293 break; 06294 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_3_RANGEB: 06295 *ptuning_parm_value = 06296 pdev->tuning_parms.tp_uwr_lng_corr_z_3_rangeb; 06297 break; 06298 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_4_RANGEA: 06299 *ptuning_parm_value = 06300 pdev->tuning_parms.tp_uwr_lng_corr_z_4_rangea; 06301 break; 06302 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_4_RANGEB: 06303 *ptuning_parm_value = 06304 pdev->tuning_parms.tp_uwr_lng_corr_z_4_rangeb; 06305 break; 06306 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_5_RANGEA: 06307 *ptuning_parm_value = 06308 pdev->tuning_parms.tp_uwr_lng_corr_z_5_rangea; 06309 break; 06310 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_5_RANGEB: 06311 *ptuning_parm_value = 06312 pdev->tuning_parms.tp_uwr_lng_corr_z_5_rangeb; 06313 break; 06314 06315 default: 06316 *ptuning_parm_value = 0x7FFFFFFF; 06317 status = VL53L1_ERROR_INVALID_PARAMS; 06318 break; 06319 06320 } 06321 06322 LOG_FUNCTION_END(status); 06323 06324 return status; 06325 } 06326 06327 VL53L1_Error VL53L1_set_tuning_parm( 06328 VL53L1_DEV Dev, 06329 VL53L1_TuningParms tuning_parm_key, 06330 int32_t tuning_parm_value) 06331 { 06332 06333 06334 06335 VL53L1_Error status = VL53L1_ERROR_NONE; 06336 06337 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 06338 VL53L1_hist_post_process_config_t *pHP = &(pdev->histpostprocess); 06339 VL53L1_xtalkextract_config_t *pXC = &(pdev->xtalk_extract_cfg); 06340 06341 LOG_FUNCTION_START(""); 06342 06343 switch (tuning_parm_key) { 06344 06345 case VL53L1_TUNINGPARM_VERSION: 06346 pdev->tuning_parms.tp_tuning_parm_version = 06347 (uint16_t)tuning_parm_value; 06348 break; 06349 case VL53L1_TUNINGPARM_KEY_TABLE_VERSION: 06350 pdev->tuning_parms.tp_tuning_parm_key_table_version = 06351 (uint16_t)tuning_parm_value; 06352 06353 06354 06355 if ((uint16_t)tuning_parm_value 06356 != VL53L1_TUNINGPARM_KEY_TABLE_VERSION_DEFAULT) 06357 status = VL53L1_ERROR_TUNING_PARM_KEY_MISMATCH; 06358 06359 break; 06360 case VL53L1_TUNINGPARM_LLD_VERSION: 06361 pdev->tuning_parms.tp_tuning_parm_lld_version = 06362 (uint16_t)tuning_parm_value; 06363 break; 06364 case VL53L1_TUNINGPARM_HIST_ALGO_SELECT: 06365 pHP->hist_algo_select = 06366 (VL53L1_HistAlgoSelect)tuning_parm_value; 06367 break; 06368 case VL53L1_TUNINGPARM_HIST_TARGET_ORDER: 06369 pHP->hist_target_order = 06370 (VL53L1_HistTargetOrder)tuning_parm_value; 06371 break; 06372 case VL53L1_TUNINGPARM_HIST_FILTER_WOI_0: 06373 pHP->filter_woi0 = 06374 (uint8_t)tuning_parm_value; 06375 break; 06376 case VL53L1_TUNINGPARM_HIST_FILTER_WOI_1: 06377 pHP->filter_woi1 = 06378 (uint8_t)tuning_parm_value; 06379 break; 06380 case VL53L1_TUNINGPARM_HIST_AMB_EST_METHOD: 06381 pHP->hist_amb_est_method = 06382 (VL53L1_HistAmbEstMethod)tuning_parm_value; 06383 break; 06384 case VL53L1_TUNINGPARM_HIST_AMB_THRESH_SIGMA_0: 06385 pHP->ambient_thresh_sigma0 = 06386 (uint8_t)tuning_parm_value; 06387 break; 06388 case VL53L1_TUNINGPARM_HIST_AMB_THRESH_SIGMA_1: 06389 pHP->ambient_thresh_sigma1 = 06390 (uint8_t)tuning_parm_value; 06391 break; 06392 case VL53L1_TUNINGPARM_HIST_MIN_AMB_THRESH_EVENTS: 06393 pHP->min_ambient_thresh_events = 06394 (int32_t)tuning_parm_value; 06395 break; 06396 case VL53L1_TUNINGPARM_HIST_AMB_EVENTS_SCALER: 06397 pHP->ambient_thresh_events_scaler = 06398 (uint16_t)tuning_parm_value; 06399 break; 06400 case VL53L1_TUNINGPARM_HIST_NOISE_THRESHOLD: 06401 pHP->noise_threshold = 06402 (uint16_t)tuning_parm_value; 06403 break; 06404 case VL53L1_TUNINGPARM_HIST_SIGNAL_TOTAL_EVENTS_LIMIT: 06405 pHP->signal_total_events_limit = 06406 (int32_t)tuning_parm_value; 06407 break; 06408 case VL53L1_TUNINGPARM_HIST_SIGMA_EST_REF_MM: 06409 pHP->sigma_estimator__sigma_ref_mm = 06410 (uint8_t)tuning_parm_value; 06411 break; 06412 case VL53L1_TUNINGPARM_HIST_SIGMA_THRESH_MM: 06413 pHP->sigma_thresh = 06414 (uint16_t)tuning_parm_value; 06415 break; 06416 case VL53L1_TUNINGPARM_HIST_GAIN_FACTOR: 06417 pdev->gain_cal.histogram_ranging_gain_factor = 06418 (uint16_t)tuning_parm_value; 06419 break; 06420 case VL53L1_TUNINGPARM_CONSISTENCY_HIST_PHASE_TOLERANCE: 06421 pHP->algo__consistency_check__phase_tolerance = 06422 (uint8_t)tuning_parm_value; 06423 break; 06424 case VL53L1_TUNINGPARM_CONSISTENCY_HIST_MIN_MAX_TOLERANCE_MM: 06425 pHP->algo__consistency_check__min_max_tolerance = 06426 (uint16_t)tuning_parm_value; 06427 break; 06428 case VL53L1_TUNINGPARM_CONSISTENCY_HIST_EVENT_SIGMA: 06429 pHP->algo__consistency_check__event_sigma = 06430 (uint8_t)tuning_parm_value; 06431 break; 06432 case VL53L1_TUNINGPARM_CONSISTENCY_HIST_EVENT_SIGMA_MIN_SPAD_LIMIT: 06433 pHP->algo__consistency_check__event_min_spad_count = 06434 (uint16_t)tuning_parm_value; 06435 break; 06436 case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_LONG_RANGE: 06437 pdev->tuning_parms.tp_init_phase_rtn_hist_long = 06438 (uint8_t)tuning_parm_value; 06439 break; 06440 case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_MED_RANGE: 06441 pdev->tuning_parms.tp_init_phase_rtn_hist_med = 06442 (uint8_t)tuning_parm_value; 06443 break; 06444 case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_SHORT_RANGE: 06445 pdev->tuning_parms.tp_init_phase_rtn_hist_short = 06446 (uint8_t)tuning_parm_value; 06447 break; 06448 case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_HISTO_LONG_RANGE: 06449 pdev->tuning_parms.tp_init_phase_ref_hist_long = 06450 (uint8_t)tuning_parm_value; 06451 break; 06452 case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_HISTO_MED_RANGE: 06453 pdev->tuning_parms.tp_init_phase_ref_hist_med = 06454 (uint8_t)tuning_parm_value; 06455 break; 06456 case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_HISTO_SHORT_RANGE: 06457 pdev->tuning_parms.tp_init_phase_ref_hist_short = 06458 (uint8_t)tuning_parm_value; 06459 break; 06460 case VL53L1_TUNINGPARM_XTALK_DETECT_MIN_VALID_RANGE_MM: 06461 pdev->xtalk_cfg.algo__crosstalk_detect_min_valid_range_mm = 06462 (int16_t)tuning_parm_value; 06463 break; 06464 case VL53L1_TUNINGPARM_XTALK_DETECT_MAX_VALID_RANGE_MM: 06465 pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_range_mm = 06466 (int16_t)tuning_parm_value; 06467 break; 06468 case VL53L1_TUNINGPARM_XTALK_DETECT_MAX_SIGMA_MM: 06469 pdev->xtalk_cfg.algo__crosstalk_detect_max_sigma_mm = 06470 (uint16_t)tuning_parm_value; 06471 break; 06472 case VL53L1_TUNINGPARM_XTALK_DETECT_MIN_MAX_TOLERANCE: 06473 pHP->algo__crosstalk_detect_min_max_tolerance = 06474 (uint16_t)tuning_parm_value; 06475 break; 06476 case VL53L1_TUNINGPARM_XTALK_DETECT_MAX_VALID_RATE_KCPS: 06477 pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_rate_kcps = 06478 (uint16_t)tuning_parm_value; 06479 break; 06480 case VL53L1_TUNINGPARM_XTALK_DETECT_EVENT_SIGMA: 06481 pHP->algo__crosstalk_detect_event_sigma = 06482 (uint8_t)tuning_parm_value; 06483 break; 06484 case VL53L1_TUNINGPARM_HIST_XTALK_MARGIN_KCPS: 06485 pdev->xtalk_cfg.histogram_mode_crosstalk_margin_kcps = 06486 (int16_t)tuning_parm_value; 06487 break; 06488 case VL53L1_TUNINGPARM_CONSISTENCY_LITE_PHASE_TOLERANCE: 06489 pdev->tuning_parms.tp_consistency_lite_phase_tolerance = 06490 (uint8_t)tuning_parm_value; 06491 break; 06492 case VL53L1_TUNINGPARM_PHASECAL_TARGET: 06493 pdev->tuning_parms.tp_phasecal_target = 06494 (uint8_t)tuning_parm_value; 06495 break; 06496 case VL53L1_TUNINGPARM_LITE_CAL_REPEAT_RATE: 06497 pdev->tuning_parms.tp_cal_repeat_rate = 06498 (uint16_t)tuning_parm_value; 06499 break; 06500 case VL53L1_TUNINGPARM_LITE_RANGING_GAIN_FACTOR: 06501 pdev->gain_cal.standard_ranging_gain_factor = 06502 (uint16_t)tuning_parm_value; 06503 break; 06504 case VL53L1_TUNINGPARM_LITE_MIN_CLIP_MM: 06505 pdev->tuning_parms.tp_lite_min_clip = 06506 (uint8_t)tuning_parm_value; 06507 break; 06508 case VL53L1_TUNINGPARM_LITE_LONG_SIGMA_THRESH_MM: 06509 pdev->tuning_parms.tp_lite_long_sigma_thresh_mm = 06510 (uint16_t)tuning_parm_value; 06511 break; 06512 case VL53L1_TUNINGPARM_LITE_MED_SIGMA_THRESH_MM: 06513 pdev->tuning_parms.tp_lite_med_sigma_thresh_mm = 06514 (uint16_t)tuning_parm_value; 06515 break; 06516 case VL53L1_TUNINGPARM_LITE_SHORT_SIGMA_THRESH_MM: 06517 pdev->tuning_parms.tp_lite_short_sigma_thresh_mm = 06518 (uint16_t)tuning_parm_value; 06519 break; 06520 case VL53L1_TUNINGPARM_LITE_LONG_MIN_COUNT_RATE_RTN_MCPS: 06521 pdev->tuning_parms.tp_lite_long_min_count_rate_rtn_mcps = 06522 (uint16_t)tuning_parm_value; 06523 break; 06524 case VL53L1_TUNINGPARM_LITE_MED_MIN_COUNT_RATE_RTN_MCPS: 06525 pdev->tuning_parms.tp_lite_med_min_count_rate_rtn_mcps = 06526 (uint16_t)tuning_parm_value; 06527 break; 06528 case VL53L1_TUNINGPARM_LITE_SHORT_MIN_COUNT_RATE_RTN_MCPS: 06529 pdev->tuning_parms.tp_lite_short_min_count_rate_rtn_mcps = 06530 (uint16_t)tuning_parm_value; 06531 break; 06532 case VL53L1_TUNINGPARM_LITE_SIGMA_EST_PULSE_WIDTH: 06533 pdev->tuning_parms.tp_lite_sigma_est_pulse_width_ns = 06534 (uint8_t)tuning_parm_value; 06535 break; 06536 case VL53L1_TUNINGPARM_LITE_SIGMA_EST_AMB_WIDTH_NS: 06537 pdev->tuning_parms.tp_lite_sigma_est_amb_width_ns = 06538 (uint8_t)tuning_parm_value; 06539 break; 06540 case VL53L1_TUNINGPARM_LITE_SIGMA_REF_MM: 06541 pdev->tuning_parms.tp_lite_sigma_ref_mm = 06542 (uint8_t)tuning_parm_value; 06543 break; 06544 case VL53L1_TUNINGPARM_LITE_RIT_MULT: 06545 pdev->xtalk_cfg.crosstalk_range_ignore_threshold_mult = 06546 (uint8_t)tuning_parm_value; 06547 break; 06548 case VL53L1_TUNINGPARM_LITE_SEED_CONFIG: 06549 pdev->tuning_parms.tp_lite_seed_cfg = 06550 (uint8_t)tuning_parm_value; 06551 break; 06552 case VL53L1_TUNINGPARM_LITE_QUANTIFIER: 06553 pdev->tuning_parms.tp_lite_quantifier = 06554 (uint8_t)tuning_parm_value; 06555 break; 06556 case VL53L1_TUNINGPARM_LITE_FIRST_ORDER_SELECT: 06557 pdev->tuning_parms.tp_lite_first_order_select = 06558 (uint8_t)tuning_parm_value; 06559 break; 06560 case VL53L1_TUNINGPARM_LITE_XTALK_MARGIN_KCPS: 06561 pdev->xtalk_cfg.lite_mode_crosstalk_margin_kcps = 06562 (int16_t)tuning_parm_value; 06563 break; 06564 case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_LITE_LONG_RANGE: 06565 pdev->tuning_parms.tp_init_phase_rtn_lite_long = 06566 (uint8_t)tuning_parm_value; 06567 break; 06568 case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_LITE_MED_RANGE: 06569 pdev->tuning_parms.tp_init_phase_rtn_lite_med = 06570 (uint8_t)tuning_parm_value; 06571 break; 06572 case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_LITE_SHORT_RANGE: 06573 pdev->tuning_parms.tp_init_phase_rtn_lite_short = 06574 (uint8_t)tuning_parm_value; 06575 break; 06576 case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_LITE_LONG_RANGE: 06577 pdev->tuning_parms.tp_init_phase_ref_lite_long = 06578 (uint8_t)tuning_parm_value; 06579 break; 06580 case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_LITE_MED_RANGE: 06581 pdev->tuning_parms.tp_init_phase_ref_lite_med = 06582 (uint8_t)tuning_parm_value; 06583 break; 06584 case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_LITE_SHORT_RANGE: 06585 pdev->tuning_parms.tp_init_phase_ref_lite_short = 06586 (uint8_t)tuning_parm_value; 06587 break; 06588 case VL53L1_TUNINGPARM_TIMED_SEED_CONFIG: 06589 pdev->tuning_parms.tp_timed_seed_cfg = 06590 (uint8_t)tuning_parm_value; 06591 break; 06592 case VL53L1_TUNINGPARM_DMAX_CFG_SIGNAL_THRESH_SIGMA: 06593 pdev->dmax_cfg.signal_thresh_sigma = 06594 (uint8_t)tuning_parm_value; 06595 break; 06596 case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_0: 06597 pdev->dmax_cfg.target_reflectance_for_dmax_calc[0] = 06598 (uint16_t)tuning_parm_value; 06599 break; 06600 case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_1: 06601 pdev->dmax_cfg.target_reflectance_for_dmax_calc[1] = 06602 (uint16_t)tuning_parm_value; 06603 break; 06604 case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_2: 06605 pdev->dmax_cfg.target_reflectance_for_dmax_calc[2] = 06606 (uint16_t)tuning_parm_value; 06607 break; 06608 case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_3: 06609 pdev->dmax_cfg.target_reflectance_for_dmax_calc[3] = 06610 (uint16_t)tuning_parm_value; 06611 break; 06612 case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_4: 06613 pdev->dmax_cfg.target_reflectance_for_dmax_calc[4] = 06614 (uint16_t)tuning_parm_value; 06615 break; 06616 case VL53L1_TUNINGPARM_VHV_LOOPBOUND: 06617 pdev->stat_nvm.vhv_config__timeout_macrop_loop_bound = 06618 (uint8_t)tuning_parm_value; 06619 break; 06620 case VL53L1_TUNINGPARM_REFSPADCHAR_DEVICE_TEST_MODE: 06621 pdev->refspadchar.device_test_mode = 06622 (uint8_t)tuning_parm_value; 06623 break; 06624 case VL53L1_TUNINGPARM_REFSPADCHAR_VCSEL_PERIOD: 06625 pdev->refspadchar.VL53L1_p_009 = 06626 (uint8_t)tuning_parm_value; 06627 break; 06628 case VL53L1_TUNINGPARM_REFSPADCHAR_PHASECAL_TIMEOUT_US: 06629 pdev->refspadchar.timeout_us = 06630 (uint32_t)tuning_parm_value; 06631 break; 06632 case VL53L1_TUNINGPARM_REFSPADCHAR_TARGET_COUNT_RATE_MCPS: 06633 pdev->refspadchar.target_count_rate_mcps = 06634 (uint16_t)tuning_parm_value; 06635 break; 06636 case VL53L1_TUNINGPARM_REFSPADCHAR_MIN_COUNTRATE_LIMIT_MCPS: 06637 pdev->refspadchar.min_count_rate_limit_mcps = 06638 (uint16_t)tuning_parm_value; 06639 break; 06640 case VL53L1_TUNINGPARM_REFSPADCHAR_MAX_COUNTRATE_LIMIT_MCPS: 06641 pdev->refspadchar.max_count_rate_limit_mcps = 06642 (uint16_t)tuning_parm_value; 06643 break; 06644 case VL53L1_TUNINGPARM_XTALK_EXTRACT_NUM_OF_SAMPLES: 06645 pXC->num_of_samples = 06646 (uint8_t)tuning_parm_value; 06647 break; 06648 case VL53L1_TUNINGPARM_XTALK_EXTRACT_MIN_FILTER_THRESH_MM: 06649 pXC->algo__crosstalk_extract_min_valid_range_mm = 06650 (int16_t)tuning_parm_value; 06651 break; 06652 case VL53L1_TUNINGPARM_XTALK_EXTRACT_MAX_FILTER_THRESH_MM: 06653 pXC->algo__crosstalk_extract_max_valid_range_mm = 06654 (int16_t)tuning_parm_value; 06655 break; 06656 case VL53L1_TUNINGPARM_XTALK_EXTRACT_DSS_RATE_MCPS: 06657 pXC->dss_config__target_total_rate_mcps = 06658 (uint16_t)tuning_parm_value; 06659 break; 06660 case VL53L1_TUNINGPARM_XTALK_EXTRACT_PHASECAL_TIMEOUT_US: 06661 pXC->phasecal_config_timeout_us = 06662 (uint32_t)tuning_parm_value; 06663 break; 06664 case VL53L1_TUNINGPARM_XTALK_EXTRACT_MAX_VALID_RATE_KCPS: 06665 pXC->algo__crosstalk_extract_max_valid_rate_kcps = 06666 (uint16_t)tuning_parm_value; 06667 break; 06668 case VL53L1_TUNINGPARM_XTALK_EXTRACT_SIGMA_THRESHOLD_MM: 06669 pXC->algo__crosstalk_extract_max_sigma_mm = 06670 (uint16_t)tuning_parm_value; 06671 break; 06672 case VL53L1_TUNINGPARM_XTALK_EXTRACT_DSS_TIMEOUT_US: 06673 pXC->mm_config_timeout_us = 06674 (uint32_t)tuning_parm_value; 06675 break; 06676 case VL53L1_TUNINGPARM_XTALK_EXTRACT_BIN_TIMEOUT_US: 06677 pXC->range_config_timeout_us = 06678 (uint32_t)tuning_parm_value; 06679 break; 06680 case VL53L1_TUNINGPARM_OFFSET_CAL_DSS_RATE_MCPS: 06681 pdev->offsetcal_cfg.dss_config__target_total_rate_mcps = 06682 (uint16_t)tuning_parm_value; 06683 break; 06684 case VL53L1_TUNINGPARM_OFFSET_CAL_PHASECAL_TIMEOUT_US: 06685 pdev->offsetcal_cfg.phasecal_config_timeout_us = 06686 (uint32_t)tuning_parm_value; 06687 break; 06688 case VL53L1_TUNINGPARM_OFFSET_CAL_MM_TIMEOUT_US: 06689 pdev->offsetcal_cfg.mm_config_timeout_us = 06690 (uint32_t)tuning_parm_value; 06691 break; 06692 case VL53L1_TUNINGPARM_OFFSET_CAL_RANGE_TIMEOUT_US: 06693 pdev->offsetcal_cfg.range_config_timeout_us = 06694 (uint32_t)tuning_parm_value; 06695 break; 06696 case VL53L1_TUNINGPARM_OFFSET_CAL_PRE_SAMPLES: 06697 pdev->offsetcal_cfg.pre_num_of_samples = 06698 (uint8_t)tuning_parm_value; 06699 break; 06700 case VL53L1_TUNINGPARM_OFFSET_CAL_MM1_SAMPLES: 06701 pdev->offsetcal_cfg.mm1_num_of_samples = 06702 (uint8_t)tuning_parm_value; 06703 break; 06704 case VL53L1_TUNINGPARM_OFFSET_CAL_MM2_SAMPLES: 06705 pdev->offsetcal_cfg.mm2_num_of_samples = 06706 (uint8_t)tuning_parm_value; 06707 break; 06708 case VL53L1_TUNINGPARM_ZONE_CAL_DSS_RATE_MCPS: 06709 pdev->zonecal_cfg.dss_config__target_total_rate_mcps = 06710 (uint16_t)tuning_parm_value; 06711 break; 06712 case VL53L1_TUNINGPARM_ZONE_CAL_PHASECAL_TIMEOUT_US: 06713 pdev->zonecal_cfg.phasecal_config_timeout_us = 06714 (uint32_t)tuning_parm_value; 06715 break; 06716 case VL53L1_TUNINGPARM_ZONE_CAL_DSS_TIMEOUT_US: 06717 pdev->zonecal_cfg.mm_config_timeout_us = 06718 (uint32_t)tuning_parm_value; 06719 break; 06720 case VL53L1_TUNINGPARM_ZONE_CAL_PHASECAL_NUM_SAMPLES: 06721 pdev->zonecal_cfg.phasecal_num_of_samples = 06722 (uint16_t)tuning_parm_value; 06723 break; 06724 case VL53L1_TUNINGPARM_ZONE_CAL_RANGE_TIMEOUT_US: 06725 pdev->zonecal_cfg.range_config_timeout_us = 06726 (uint32_t)tuning_parm_value; 06727 break; 06728 case VL53L1_TUNINGPARM_ZONE_CAL_ZONE_NUM_SAMPLES: 06729 pdev->zonecal_cfg.zone_num_of_samples = 06730 (uint16_t)tuning_parm_value; 06731 break; 06732 case VL53L1_TUNINGPARM_SPADMAP_VCSEL_PERIOD: 06733 pdev->ssc_cfg.VL53L1_p_009 = 06734 (uint8_t)tuning_parm_value; 06735 break; 06736 case VL53L1_TUNINGPARM_SPADMAP_VCSEL_START: 06737 pdev->ssc_cfg.vcsel_start = 06738 (uint8_t)tuning_parm_value; 06739 break; 06740 case VL53L1_TUNINGPARM_SPADMAP_RATE_LIMIT_MCPS: 06741 pdev->ssc_cfg.rate_limit_mcps = 06742 (uint16_t)tuning_parm_value; 06743 break; 06744 case VL53L1_TUNINGPARM_LITE_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS: 06745 pdev->tuning_parms.tp_dss_target_lite_mcps = 06746 (uint16_t)tuning_parm_value; 06747 break; 06748 case VL53L1_TUNINGPARM_RANGING_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS: 06749 pdev->tuning_parms.tp_dss_target_histo_mcps = 06750 (uint16_t)tuning_parm_value; 06751 break; 06752 case VL53L1_TUNINGPARM_MZ_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS: 06753 pdev->tuning_parms.tp_dss_target_histo_mz_mcps = 06754 (uint16_t)tuning_parm_value; 06755 break; 06756 case VL53L1_TUNINGPARM_TIMED_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS: 06757 pdev->tuning_parms.tp_dss_target_timed_mcps = 06758 (uint16_t)tuning_parm_value; 06759 break; 06760 case VL53L1_TUNINGPARM_LITE_PHASECAL_CONFIG_TIMEOUT_US: 06761 pdev->tuning_parms.tp_phasecal_timeout_lite_us = 06762 (uint32_t)tuning_parm_value; 06763 break; 06764 case VL53L1_TUNINGPARM_RANGING_LONG_PHASECAL_CONFIG_TIMEOUT_US: 06765 pdev->tuning_parms.tp_phasecal_timeout_hist_long_us = 06766 (uint32_t)tuning_parm_value; 06767 break; 06768 case VL53L1_TUNINGPARM_RANGING_MED_PHASECAL_CONFIG_TIMEOUT_US: 06769 pdev->tuning_parms.tp_phasecal_timeout_hist_med_us = 06770 (uint32_t)tuning_parm_value; 06771 break; 06772 case VL53L1_TUNINGPARM_RANGING_SHORT_PHASECAL_CONFIG_TIMEOUT_US: 06773 pdev->tuning_parms.tp_phasecal_timeout_hist_short_us = 06774 (uint32_t)tuning_parm_value; 06775 break; 06776 case VL53L1_TUNINGPARM_MZ_LONG_PHASECAL_CONFIG_TIMEOUT_US: 06777 pdev->tuning_parms.tp_phasecal_timeout_mz_long_us = 06778 (uint32_t)tuning_parm_value; 06779 break; 06780 case VL53L1_TUNINGPARM_MZ_MED_PHASECAL_CONFIG_TIMEOUT_US: 06781 pdev->tuning_parms.tp_phasecal_timeout_mz_med_us = 06782 (uint32_t)tuning_parm_value; 06783 break; 06784 case VL53L1_TUNINGPARM_MZ_SHORT_PHASECAL_CONFIG_TIMEOUT_US: 06785 pdev->tuning_parms.tp_phasecal_timeout_mz_short_us = 06786 (uint32_t)tuning_parm_value; 06787 break; 06788 case VL53L1_TUNINGPARM_TIMED_PHASECAL_CONFIG_TIMEOUT_US: 06789 pdev->tuning_parms.tp_phasecal_timeout_timed_us = 06790 (uint32_t)tuning_parm_value; 06791 break; 06792 case VL53L1_TUNINGPARM_LITE_MM_CONFIG_TIMEOUT_US: 06793 pdev->tuning_parms.tp_mm_timeout_lite_us = 06794 (uint32_t)tuning_parm_value; 06795 break; 06796 case VL53L1_TUNINGPARM_RANGING_MM_CONFIG_TIMEOUT_US: 06797 pdev->tuning_parms.tp_mm_timeout_histo_us = 06798 (uint32_t)tuning_parm_value; 06799 break; 06800 case VL53L1_TUNINGPARM_MZ_MM_CONFIG_TIMEOUT_US: 06801 pdev->tuning_parms.tp_mm_timeout_mz_us = 06802 (uint32_t)tuning_parm_value; 06803 break; 06804 case VL53L1_TUNINGPARM_TIMED_MM_CONFIG_TIMEOUT_US: 06805 pdev->tuning_parms.tp_mm_timeout_timed_us = 06806 (uint32_t)tuning_parm_value; 06807 break; 06808 case VL53L1_TUNINGPARM_LITE_RANGE_CONFIG_TIMEOUT_US: 06809 pdev->tuning_parms.tp_range_timeout_lite_us = 06810 (uint32_t)tuning_parm_value; 06811 break; 06812 case VL53L1_TUNINGPARM_RANGING_RANGE_CONFIG_TIMEOUT_US: 06813 pdev->tuning_parms.tp_range_timeout_histo_us = 06814 (uint32_t)tuning_parm_value; 06815 break; 06816 case VL53L1_TUNINGPARM_MZ_RANGE_CONFIG_TIMEOUT_US: 06817 pdev->tuning_parms.tp_range_timeout_mz_us = 06818 (uint32_t)tuning_parm_value; 06819 break; 06820 case VL53L1_TUNINGPARM_TIMED_RANGE_CONFIG_TIMEOUT_US: 06821 pdev->tuning_parms.tp_range_timeout_timed_us = 06822 (uint32_t)tuning_parm_value; 06823 break; 06824 case VL53L1_TUNINGPARM_DYNXTALK_SMUDGE_MARGIN: 06825 pdev->smudge_correct_config.smudge_margin = 06826 (uint16_t)tuning_parm_value; 06827 break; 06828 case VL53L1_TUNINGPARM_DYNXTALK_NOISE_MARGIN: 06829 pdev->smudge_correct_config.noise_margin = 06830 (uint32_t)tuning_parm_value; 06831 break; 06832 case VL53L1_TUNINGPARM_DYNXTALK_XTALK_OFFSET_LIMIT: 06833 pdev->smudge_correct_config.user_xtalk_offset_limit = 06834 (uint32_t)tuning_parm_value; 06835 break; 06836 case VL53L1_TUNINGPARM_DYNXTALK_XTALK_OFFSET_LIMIT_HI: 06837 pdev->smudge_correct_config.user_xtalk_offset_limit_hi = 06838 (uint8_t)tuning_parm_value; 06839 break; 06840 case VL53L1_TUNINGPARM_DYNXTALK_SAMPLE_LIMIT: 06841 pdev->smudge_correct_config.sample_limit = 06842 (uint32_t)tuning_parm_value; 06843 break; 06844 case VL53L1_TUNINGPARM_DYNXTALK_SINGLE_XTALK_DELTA: 06845 pdev->smudge_correct_config.single_xtalk_delta = 06846 (uint32_t)tuning_parm_value; 06847 break; 06848 case VL53L1_TUNINGPARM_DYNXTALK_AVERAGED_XTALK_DELTA: 06849 pdev->smudge_correct_config.averaged_xtalk_delta = 06850 (uint32_t)tuning_parm_value; 06851 break; 06852 case VL53L1_TUNINGPARM_DYNXTALK_CLIP_LIMIT: 06853 pdev->smudge_correct_config.smudge_corr_clip_limit = 06854 (uint32_t)tuning_parm_value; 06855 break; 06856 case VL53L1_TUNINGPARM_DYNXTALK_SCALER_CALC_METHOD: 06857 pdev->smudge_correct_config.scaler_calc_method = 06858 (uint8_t)tuning_parm_value; 06859 break; 06860 case VL53L1_TUNINGPARM_DYNXTALK_XGRADIENT_SCALER: 06861 pdev->smudge_correct_config.x_gradient_scaler = 06862 (int16_t)tuning_parm_value; 06863 break; 06864 case VL53L1_TUNINGPARM_DYNXTALK_YGRADIENT_SCALER: 06865 pdev->smudge_correct_config.y_gradient_scaler = 06866 (int16_t)tuning_parm_value; 06867 break; 06868 case VL53L1_TUNINGPARM_DYNXTALK_USER_SCALER_SET: 06869 pdev->smudge_correct_config.user_scaler_set = 06870 (uint8_t)tuning_parm_value; 06871 break; 06872 06873 case VL53L1_TUNINGPARM_DYNXTALK_SMUDGE_COR_SINGLE_APPLY: 06874 pdev->smudge_correct_config.smudge_corr_single_apply = 06875 (uint8_t)tuning_parm_value; 06876 break; 06877 case VL53L1_TUNINGPARM_DYNXTALK_XTALK_AMB_THRESHOLD: 06878 pdev->smudge_correct_config.smudge_corr_ambient_threshold = 06879 (uint32_t)tuning_parm_value; 06880 break; 06881 case VL53L1_TUNINGPARM_DYNXTALK_NODETECT_AMB_THRESHOLD_KCPS: 06882 pdev->smudge_correct_config.nodetect_ambient_threshold = 06883 (uint32_t)tuning_parm_value; 06884 break; 06885 case VL53L1_TUNINGPARM_DYNXTALK_NODETECT_SAMPLE_LIMIT: 06886 pdev->smudge_correct_config.nodetect_sample_limit = 06887 (uint32_t)tuning_parm_value; 06888 break; 06889 case VL53L1_TUNINGPARM_DYNXTALK_NODETECT_XTALK_OFFSET_KCPS: 06890 pdev->smudge_correct_config.nodetect_xtalk_offset = 06891 (uint32_t)tuning_parm_value; 06892 break; 06893 case VL53L1_TUNINGPARM_DYNXTALK_NODETECT_MIN_RANGE_MM: 06894 pdev->smudge_correct_config.nodetect_min_range_mm = 06895 (uint16_t)tuning_parm_value; 06896 break; 06897 case VL53L1_TUNINGPARM_LOWPOWERAUTO_VHV_LOOP_BOUND: 06898 pdev->low_power_auto_data.vhv_loop_bound = 06899 (uint8_t)tuning_parm_value; 06900 break; 06901 case VL53L1_TUNINGPARM_LOWPOWERAUTO_MM_CONFIG_TIMEOUT_US: 06902 pdev->tuning_parms.tp_mm_timeout_lpa_us = 06903 (uint32_t)tuning_parm_value; 06904 break; 06905 case VL53L1_TUNINGPARM_LOWPOWERAUTO_RANGE_CONFIG_TIMEOUT_US: 06906 pdev->tuning_parms.tp_range_timeout_lpa_us = 06907 (uint32_t)tuning_parm_value; 06908 break; 06909 case VL53L1_TUNINGPARM_VERY_SHORT_DSS_RATE_MCPS: 06910 pdev->tuning_parms.tp_dss_target_very_short_mcps = 06911 (uint16_t)tuning_parm_value; 06912 break; 06913 case VL53L1_TUNINGPARM_PHASECAL_PATCH_POWER: 06914 pdev->tuning_parms.tp_phasecal_patch_power = 06915 (uint16_t) tuning_parm_value; 06916 break; 06917 case VL53L1_TUNINGPARM_HIST_MERGE: 06918 pdev->tuning_parms.tp_hist_merge = 06919 (uint16_t) tuning_parm_value; 06920 break; 06921 case VL53L1_TUNINGPARM_RESET_MERGE_THRESHOLD: 06922 pdev->tuning_parms.tp_reset_merge_threshold = 06923 (uint16_t) tuning_parm_value; 06924 break; 06925 case VL53L1_TUNINGPARM_HIST_MERGE_MAX_SIZE: 06926 pdev->tuning_parms.tp_hist_merge_max_size = 06927 (uint16_t) tuning_parm_value; 06928 break; 06929 case VL53L1_TUNINGPARM_DYNXTALK_MAX_SMUDGE_FACTOR: 06930 pdev->smudge_correct_config.max_smudge_factor = 06931 (uint32_t)tuning_parm_value; 06932 break; 06933 06934 case VL53L1_TUNINGPARM_UWR_ENABLE: 06935 pdev->tuning_parms.tp_uwr_enable = 06936 (uint8_t)tuning_parm_value; 06937 break; 06938 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_1_MIN: 06939 pdev->tuning_parms.tp_uwr_med_z_1_min = 06940 (int16_t)tuning_parm_value; 06941 break; 06942 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_1_MAX: 06943 pdev->tuning_parms.tp_uwr_med_z_1_max = 06944 (int16_t)tuning_parm_value; 06945 break; 06946 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_2_MIN: 06947 pdev->tuning_parms.tp_uwr_med_z_2_min = 06948 (int16_t)tuning_parm_value; 06949 break; 06950 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_2_MAX: 06951 pdev->tuning_parms.tp_uwr_med_z_2_max = 06952 (int16_t)tuning_parm_value; 06953 break; 06954 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_3_MIN: 06955 pdev->tuning_parms.tp_uwr_med_z_3_min = 06956 (int16_t)tuning_parm_value; 06957 break; 06958 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_3_MAX: 06959 pdev->tuning_parms.tp_uwr_med_z_3_max = 06960 (int16_t)tuning_parm_value; 06961 break; 06962 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_4_MIN: 06963 pdev->tuning_parms.tp_uwr_med_z_4_min = 06964 (int16_t)tuning_parm_value; 06965 break; 06966 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_4_MAX: 06967 pdev->tuning_parms.tp_uwr_med_z_4_max = 06968 (int16_t)tuning_parm_value; 06969 break; 06970 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_5_MIN: 06971 pdev->tuning_parms.tp_uwr_med_z_5_min = 06972 (int16_t)tuning_parm_value; 06973 break; 06974 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_5_MAX: 06975 pdev->tuning_parms.tp_uwr_med_z_5_max = 06976 (int16_t)tuning_parm_value; 06977 break; 06978 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_6_MIN: 06979 pdev->tuning_parms.tp_uwr_med_z_6_min = 06980 (int16_t)tuning_parm_value; 06981 break; 06982 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_6_MAX: 06983 pdev->tuning_parms.tp_uwr_med_z_6_max = 06984 (int16_t)tuning_parm_value; 06985 break; 06986 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_1_RANGEA: 06987 pdev->tuning_parms.tp_uwr_med_corr_z_1_rangea = 06988 (int16_t)tuning_parm_value; 06989 break; 06990 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_1_RANGEB: 06991 pdev->tuning_parms.tp_uwr_med_corr_z_1_rangeb = 06992 (int16_t)tuning_parm_value; 06993 break; 06994 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_2_RANGEA: 06995 pdev->tuning_parms.tp_uwr_med_corr_z_2_rangea = 06996 (int16_t)tuning_parm_value; 06997 break; 06998 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_2_RANGEB: 06999 pdev->tuning_parms.tp_uwr_med_corr_z_2_rangeb = 07000 (int16_t)tuning_parm_value; 07001 break; 07002 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_3_RANGEA: 07003 pdev->tuning_parms.tp_uwr_med_corr_z_3_rangea = 07004 (int16_t)tuning_parm_value; 07005 break; 07006 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_3_RANGEB: 07007 pdev->tuning_parms.tp_uwr_med_corr_z_3_rangeb = 07008 (int16_t)tuning_parm_value; 07009 break; 07010 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_4_RANGEA: 07011 pdev->tuning_parms.tp_uwr_med_corr_z_4_rangea = 07012 (int16_t)tuning_parm_value; 07013 break; 07014 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_4_RANGEB: 07015 pdev->tuning_parms.tp_uwr_med_corr_z_4_rangeb = 07016 (int16_t)tuning_parm_value; 07017 break; 07018 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_5_RANGEA: 07019 pdev->tuning_parms.tp_uwr_med_corr_z_5_rangea = 07020 (int16_t)tuning_parm_value; 07021 break; 07022 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_5_RANGEB: 07023 pdev->tuning_parms.tp_uwr_med_corr_z_5_rangeb = 07024 (int16_t)tuning_parm_value; 07025 break; 07026 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_6_RANGEA: 07027 pdev->tuning_parms.tp_uwr_med_corr_z_6_rangea = 07028 (int16_t)tuning_parm_value; 07029 break; 07030 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_6_RANGEB: 07031 pdev->tuning_parms.tp_uwr_med_corr_z_6_rangeb = 07032 (int16_t)tuning_parm_value; 07033 break; 07034 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_1_MIN: 07035 pdev->tuning_parms.tp_uwr_lng_z_1_min = 07036 (int16_t)tuning_parm_value; 07037 break; 07038 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_1_MAX: 07039 pdev->tuning_parms.tp_uwr_lng_z_1_max = 07040 (int16_t)tuning_parm_value; 07041 break; 07042 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_2_MIN: 07043 pdev->tuning_parms.tp_uwr_lng_z_2_min = 07044 (int16_t)tuning_parm_value; 07045 break; 07046 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_2_MAX: 07047 pdev->tuning_parms.tp_uwr_lng_z_2_max = 07048 (int16_t)tuning_parm_value; 07049 break; 07050 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_3_MIN: 07051 pdev->tuning_parms.tp_uwr_lng_z_3_min = 07052 (int16_t)tuning_parm_value; 07053 break; 07054 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_3_MAX: 07055 pdev->tuning_parms.tp_uwr_lng_z_3_max = 07056 (int16_t)tuning_parm_value; 07057 break; 07058 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_4_MIN: 07059 pdev->tuning_parms.tp_uwr_lng_z_4_min = 07060 (int16_t)tuning_parm_value; 07061 break; 07062 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_4_MAX: 07063 pdev->tuning_parms.tp_uwr_lng_z_4_max = 07064 (int16_t)tuning_parm_value; 07065 break; 07066 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_5_MIN: 07067 pdev->tuning_parms.tp_uwr_lng_z_5_min = 07068 (int16_t)tuning_parm_value; 07069 break; 07070 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_5_MAX: 07071 pdev->tuning_parms.tp_uwr_lng_z_5_max = 07072 (int16_t)tuning_parm_value; 07073 break; 07074 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_1_RANGEA: 07075 pdev->tuning_parms.tp_uwr_lng_corr_z_1_rangea = 07076 (int16_t)tuning_parm_value; 07077 break; 07078 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_1_RANGEB: 07079 pdev->tuning_parms.tp_uwr_lng_corr_z_1_rangeb = 07080 (int16_t)tuning_parm_value; 07081 break; 07082 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_2_RANGEA: 07083 pdev->tuning_parms.tp_uwr_lng_corr_z_2_rangea = 07084 (int16_t)tuning_parm_value; 07085 break; 07086 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_2_RANGEB: 07087 pdev->tuning_parms.tp_uwr_lng_corr_z_2_rangeb = 07088 (int16_t)tuning_parm_value; 07089 break; 07090 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_3_RANGEA: 07091 pdev->tuning_parms.tp_uwr_lng_corr_z_3_rangea = 07092 (int16_t)tuning_parm_value; 07093 break; 07094 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_3_RANGEB: 07095 pdev->tuning_parms.tp_uwr_lng_corr_z_3_rangeb = 07096 (int16_t)tuning_parm_value; 07097 break; 07098 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_4_RANGEA: 07099 pdev->tuning_parms.tp_uwr_lng_corr_z_4_rangea = 07100 (int16_t)tuning_parm_value; 07101 break; 07102 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_4_RANGEB: 07103 pdev->tuning_parms.tp_uwr_lng_corr_z_4_rangeb = 07104 (int16_t)tuning_parm_value; 07105 break; 07106 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_5_RANGEA: 07107 pdev->tuning_parms.tp_uwr_lng_corr_z_5_rangea = 07108 (int16_t)tuning_parm_value; 07109 break; 07110 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_5_RANGEB: 07111 pdev->tuning_parms.tp_uwr_lng_corr_z_5_rangeb = 07112 (int16_t)tuning_parm_value; 07113 break; 07114 07115 07116 default: 07117 status = VL53L1_ERROR_INVALID_PARAMS; 07118 break; 07119 07120 } 07121 07122 LOG_FUNCTION_END(status); 07123 07124 return status; 07125 } 07126 07127 07128 07129 07130 07131 VL53L1_Error VL53L1_dynamic_xtalk_correction_enable( 07132 VL53L1_DEV Dev 07133 ) 07134 { 07135 07136 07137 07138 VL53L1_Error status = VL53L1_ERROR_NONE; 07139 07140 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 07141 07142 LOG_FUNCTION_START(""); 07143 07144 pdev->smudge_correct_config.smudge_corr_enabled = 1; 07145 07146 LOG_FUNCTION_END(status); 07147 07148 return status; 07149 } 07150 07151 VL53L1_Error VL53L1_dynamic_xtalk_correction_disable( 07152 VL53L1_DEV Dev 07153 ) 07154 { 07155 07156 07157 07158 VL53L1_Error status = VL53L1_ERROR_NONE; 07159 07160 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 07161 07162 LOG_FUNCTION_START(""); 07163 07164 pdev->smudge_correct_config.smudge_corr_enabled = 0; 07165 07166 LOG_FUNCTION_END(status); 07167 07168 return status; 07169 } 07170 07171 VL53L1_Error VL53L1_dynamic_xtalk_correction_apply_enable( 07172 VL53L1_DEV Dev 07173 ) 07174 { 07175 07176 07177 07178 VL53L1_Error status = VL53L1_ERROR_NONE; 07179 07180 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 07181 07182 LOG_FUNCTION_START(""); 07183 07184 pdev->smudge_correct_config.smudge_corr_apply_enabled = 1; 07185 07186 LOG_FUNCTION_END(status); 07187 07188 return status; 07189 } 07190 07191 VL53L1_Error VL53L1_dynamic_xtalk_correction_apply_disable( 07192 VL53L1_DEV Dev 07193 ) 07194 { 07195 07196 07197 07198 VL53L1_Error status = VL53L1_ERROR_NONE; 07199 07200 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 07201 07202 LOG_FUNCTION_START(""); 07203 07204 pdev->smudge_correct_config.smudge_corr_apply_enabled = 0; 07205 07206 LOG_FUNCTION_END(status); 07207 07208 return status; 07209 } 07210 07211 VL53L1_Error VL53L1_dynamic_xtalk_correction_single_apply_enable( 07212 VL53L1_DEV Dev 07213 ) 07214 { 07215 07216 07217 07218 VL53L1_Error status = VL53L1_ERROR_NONE; 07219 07220 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 07221 07222 LOG_FUNCTION_START(""); 07223 07224 pdev->smudge_correct_config.smudge_corr_single_apply = 1; 07225 07226 LOG_FUNCTION_END(status); 07227 07228 return status; 07229 } 07230 07231 VL53L1_Error VL53L1_dynamic_xtalk_correction_single_apply_disable( 07232 VL53L1_DEV Dev 07233 ) 07234 { 07235 07236 07237 07238 VL53L1_Error status = VL53L1_ERROR_NONE; 07239 07240 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 07241 07242 LOG_FUNCTION_START(""); 07243 07244 pdev->smudge_correct_config.smudge_corr_single_apply = 0; 07245 07246 LOG_FUNCTION_END(status); 07247 07248 return status; 07249 } 07250 07251 07252 VL53L1_Error VL53L1_dynamic_xtalk_correction_set_scalers( 07253 VL53L1_DEV Dev, 07254 int16_t x_scaler_in, 07255 int16_t y_scaler_in, 07256 uint8_t user_scaler_set_in 07257 ) 07258 { 07259 07260 07261 07262 VL53L1_Error status = VL53L1_ERROR_NONE; 07263 07264 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 07265 07266 LOG_FUNCTION_START(""); 07267 07268 pdev->smudge_correct_config.x_gradient_scaler = x_scaler_in; 07269 pdev->smudge_correct_config.y_gradient_scaler = y_scaler_in; 07270 pdev->smudge_correct_config.user_scaler_set = user_scaler_set_in; 07271 07272 LOG_FUNCTION_END(status); 07273 07274 return status; 07275 } 07276 07277 07278 07279 07280 07281 07282 VL53L1_Error VL53L1_get_current_xtalk_settings( 07283 VL53L1_DEV Dev, 07284 VL53L1_xtalk_calibration_results_t *pxtalk 07285 ) 07286 { 07287 07288 07289 VL53L1_Error status = VL53L1_ERROR_NONE; 07290 uint8_t i; 07291 07292 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 07293 07294 LOG_FUNCTION_START(""); 07295 07296 pxtalk->algo__crosstalk_compensation_plane_offset_kcps = 07297 pdev->xtalk_cfg.algo__crosstalk_compensation_plane_offset_kcps; 07298 pxtalk->algo__crosstalk_compensation_x_plane_gradient_kcps = 07299 pdev->xtalk_cfg.algo__crosstalk_compensation_x_plane_gradient_kcps; 07300 pxtalk->algo__crosstalk_compensation_y_plane_gradient_kcps = 07301 pdev->xtalk_cfg.algo__crosstalk_compensation_y_plane_gradient_kcps; 07302 for (i = 0; i < VL53L1_BIN_REC_SIZE; i++) 07303 pxtalk->algo__xtalk_cpo_HistoMerge_kcps[i] = 07304 pdev->xtalk_cal.algo__xtalk_cpo_HistoMerge_kcps[i]; 07305 07306 LOG_FUNCTION_END(status); 07307 07308 return status; 07309 07310 } 07311 07312 07313 07314 07315 07316 VL53L1_Error VL53L1_set_current_xtalk_settings( 07317 VL53L1_DEV Dev, 07318 VL53L1_xtalk_calibration_results_t *pxtalk 07319 ) 07320 { 07321 07322 07323 VL53L1_Error status = VL53L1_ERROR_NONE; 07324 uint8_t i; 07325 07326 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 07327 07328 LOG_FUNCTION_START(""); 07329 07330 pdev->xtalk_cfg.algo__crosstalk_compensation_plane_offset_kcps = 07331 pxtalk->algo__crosstalk_compensation_plane_offset_kcps; 07332 pdev->xtalk_cfg.algo__crosstalk_compensation_x_plane_gradient_kcps = 07333 pxtalk->algo__crosstalk_compensation_x_plane_gradient_kcps; 07334 pdev->xtalk_cfg.algo__crosstalk_compensation_y_plane_gradient_kcps = 07335 pxtalk->algo__crosstalk_compensation_y_plane_gradient_kcps; 07336 for (i = 0; i < VL53L1_BIN_REC_SIZE; i++) 07337 pdev->xtalk_cal.algo__xtalk_cpo_HistoMerge_kcps[i] = 07338 pxtalk->algo__xtalk_cpo_HistoMerge_kcps[i]; 07339 07340 LOG_FUNCTION_END(status); 07341 07342 return status; 07343 07344 } 07345 07346 07347 07348
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