mbed-HDK used 'as is' for n-U35 board. Just flash the lpc11u35_lpc1768_if_mbed.bin file to LPC11U35. It is in the LPC1768 directory, inside NXP directory
Fork of mbed-HDK by
Diff: NXP/LPC11U24-Lite/LPC11U24-Lite.sch
- Revision:
- 13:651b5303219e
- Parent:
- 10:bc96cec5b238
diff -r 5166360c3890 -r 651b5303219e NXP/LPC11U24-Lite/LPC11U24-Lite.sch --- a/NXP/LPC11U24-Lite/LPC11U24-Lite.sch Mon Aug 11 14:23:10 2014 -0500 +++ b/NXP/LPC11U24-Lite/LPC11U24-Lite.sch Wed Oct 29 10:26:46 2014 -0500 @@ -1,6 +1,6 @@ <?xml version="1.0" encoding="utf-8"?> <!DOCTYPE eagle SYSTEM "eagle.dtd"> -<eagle version="6.2"> +<eagle version="6.5.0"> <drawing> <settings> <setting alwaysvectorfont="yes"/> @@ -5101,11 +5101,11 @@ <attribute name="VALUE" x="55.88" y="17.78" size="1.778" layer="96"/> </instance> <instance part="C17" gate="G$1" x="96.52" y="17.78"/> -<instance part="C16" gate="G$1" x="88.9" y="17.78" smashed="yes"> -<attribute name="NAME" x="79.756" y="17.018" size="1.778" layer="95"/> -<attribute name="VALUE" x="79.756" y="14.224" size="1.778" layer="96"/> +<instance part="C16" gate="G$1" x="50.8" y="17.78" smashed="yes"> +<attribute name="NAME" x="41.656" y="17.018" size="1.778" layer="95"/> +<attribute name="VALUE" x="41.656" y="14.224" size="1.778" layer="96"/> </instance> -<instance part="GND16" gate="1" x="88.9" y="10.16"/> +<instance part="GND16" gate="1" x="50.8" y="10.16"/> <instance part="GND18" gate="1" x="251.46" y="53.34" rot="MR0"/> <instance part="CON2" gate="A" x="256.54" y="60.96"/> <instance part="SW1" gate="G$1" x="22.86" y="71.12" rot="R90"/> @@ -5197,7 +5197,7 @@ <segment> <pinref part="GND16" gate="1" pin="GND"/> <pinref part="C16" gate="G$1" pin="P$2"/> -<wire x1="88.9" y1="10.16" x2="88.9" y2="15.24" width="0.1524" layer="91"/> +<wire x1="50.8" y1="10.16" x2="50.8" y2="15.24" width="0.1524" layer="91"/> </segment> <segment> <wire x1="254" y1="60.96" x2="251.46" y2="60.96" width="0.1524" layer="91"/> @@ -5397,13 +5397,9 @@ </segment> <segment> <wire x1="96.52" y1="20.32" x2="96.52" y2="27.94" width="0.1524" layer="91"/> -<wire x1="83.82" y1="27.94" x2="88.9" y2="27.94" width="0.1524" layer="91"/> <pinref part="IC4" gate="G$1" pin="OUT"/> <pinref part="C17" gate="G$1" pin="1"/> -<pinref part="C16" gate="G$1" pin="P$1"/> -<wire x1="88.9" y1="27.94" x2="96.52" y2="27.94" width="0.1524" layer="91"/> -<wire x1="88.9" y1="20.32" x2="88.9" y2="27.94" width="0.1524" layer="91"/> -<junction x="88.9" y="27.94"/> +<wire x1="83.82" y1="27.94" x2="96.52" y2="27.94" width="0.1524" layer="91"/> <junction x="96.52" y="27.94"/> <wire x1="96.52" y1="27.94" x2="96.52" y2="33.02" width="0.1524" layer="91"/> <pinref part="U$5" gate="G$1" pin="+3.3V_TGT"/> @@ -5447,9 +5443,13 @@ </net> <net name="VBUS_TGT" class="0"> <segment> -<wire x1="63.5" y1="27.94" x2="53.34" y2="27.94" width="0.1524" layer="91"/> -<label x="40.64" y="27.94" size="1.778" layer="95"/> +<wire x1="63.5" y1="27.94" x2="50.8" y2="27.94" width="0.1524" layer="91"/> +<label x="30.48" y="27.94" size="1.778" layer="95"/> <pinref part="IC4" gate="G$1" pin="IN"/> +<pinref part="C16" gate="G$1" pin="P$1"/> +<wire x1="50.8" y1="27.94" x2="30.48" y2="27.94" width="0.1524" layer="91"/> +<wire x1="50.8" y1="20.32" x2="50.8" y2="27.94" width="0.1524" layer="91"/> +<junction x="50.8" y="27.94"/> </segment> <segment> <pinref part="CON2" gate="A" pin="VBUS"/> @@ -5485,4 +5485,10 @@ </sheets> </schematic> </drawing> +<compatibility> +<note version="6.3" minversion="6.2.2" severity="warning"> +Since Version 6.2.2 text objects can contain more than one line, +which will not be processed correctly with this version. +</note> +</compatibility> </eagle>