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11th feb i2c checking chaitu's code
Dependencies: SimpleDMA eeprom mbed-rtos mbed
Fork of CDMS_CODE_FM_28JAN2017 by
Revision 353:890c6b98392a, committed 2017-02-10
- Comitter:
- chaithanyarss
- Date:
- Fri Feb 10 20:37:45 2017 +0000
- Parent:
- 352:022c513aee03
- Commit message:
- 11th feb ; checking i2c..; chaitu's code
Changed in this revision
diff -r 022c513aee03 -r 890c6b98392a CDMS_HK.h --- a/CDMS_HK.h Mon Feb 06 16:36:46 2017 +0000 +++ b/CDMS_HK.h Fri Feb 10 20:37:45 2017 +0000 @@ -202,6 +202,10 @@ crc = crc16_gen(BAE_HK_FRAME,132); /*Adding CRC to TM frame*/ BAE_HK_FRAME[132] = crc >> 8; BAE_HK_FRAME[133] = crc; + for(int i =0; i <134; i++) + { + gPC.printf("%02x ",BAE_HK_FRAME[i]); + } exor(BAE_HK_FRAME); BAE_HEALTH.convolutionEncode(BAE_HK_FRAME , convoluted_BAE_HK); BAE_HEALTH.convolutionEncode(BAE_HK_FRAME + 67, convoluted_BAE_HK + 135); @@ -273,10 +277,14 @@ beacon_array[132] = crc; beacon_array[133] = crc >> 8; bool y; - y = FCTN_I2C_WRITE((char *)beacon_array,134); + for(int i =0; i <134; i++) + { + gPC.printf("%02x ",beacon_array[i]); + } + y = FCTN_I2C_WRITE((char *)beacon_array,135); if(y == 0) { TIME_LATEST_I2C_BAE = FCTN_CDMS_RD_RTC() >> 7; - //gPC.printf("long Bcn sent\n\r"); + gPC.printf("long Bcn sent\n\r"); } else gPC.printf("long Bcn not sent\r\n"); //gPC.printf("\rCompleted Beacon\n");
diff -r 022c513aee03 -r 890c6b98392a DefinitionsAndGlobals.h --- a/DefinitionsAndGlobals.h Mon Feb 06 16:36:46 2017 +0000 +++ b/DefinitionsAndGlobals.h Fri Feb 10 20:37:45 2017 +0000 @@ -29,7 +29,7 @@ //I2C - Payload to CDMS (need to change while using CDMS hardware); I2C master(PIN32,PIN31); - DigitalIn PL_I2C_Intr(PTC13); + DigitalIn PL_I2C_Intr(PTC13);//PTC13 DigitalOut PL_I2C_GPIO(PTC1); //I2C - CDMS to BAE
diff -r 022c513aee03 -r 890c6b98392a FMS_all.h --- a/FMS_all.h Mon Feb 06 16:36:46 2017 +0000 +++ b/FMS_all.h Fri Feb 10 20:37:45 2017 +0000 @@ -104,9 +104,12 @@ //FCTN_CDMS_INIT_RTC(); SPI_mutex.lock(); gCS_RTC=1; + gCS_ADF =1; + cs_sd = 1; gCS_RTC=0; spi.write(0x81); //register address with write flag spi.write(0x00);//disabling stop bit in the seconds register + gCS_RTC=1; SPI_mutex.unlock(); gPC.printf("sw on rtc\n"); } @@ -115,9 +118,12 @@ { SPI_mutex.lock(); gCS_RTC=1; + gCS_ADF =1; + cs_sd = 1; gCS_RTC=0; spi.write(0x81); //register address with write flag spi.write(0x80);//enabling stop bit in the seconds register + gCS_RTC=1; SPI_mutex.unlock(); gPC.printf("sw off rtc\n"); }
diff -r 022c513aee03 -r 890c6b98392a i2c.h --- a/i2c.h Mon Feb 06 16:36:46 2017 +0000 +++ b/i2c.h Fri Feb 10 20:37:45 2017 +0000 @@ -100,7 +100,7 @@ bool FCTN_I2C_READ(char *data,int length) // Returns 0 for success { // gPC.printf("i2C_rd\r\n"); - CDMS_I2C_GPIO = 1; + CDMS_I2C_GPIO = 1; read_ack = master.read(addr_bae|1,data,length); Thread::wait(1); //as per tests Thread::wait not required on master side. But its safe to give 1ms pdirr1=PTE->PDIR;