Implementation of the QSPI-Flash driver for the DISCO-STM32F746NG board. Allows usage of the MICRON 128Mb Quad-SPI Flash memory present on the board. Ported from library QSPI_DISCO_L476VG from ST.

Dependents:   DISCO-F746NG_QSPI

Committer:
capsavon
Date:
Sun Nov 15 14:29:29 2015 +0000
Revision:
0:f391cd8f34c1
Corrected QSPI implementation.; Pins alternate function corrected (AF10 -> AF9).; Prescaler value corrected (0 -> 3).

Who changed what in which revision?

UserRevisionLine numberNew contents of line
capsavon 0:f391cd8f34c1 1 /* Copyright (c) 2010-2011 mbed.org, MIT License
capsavon 0:f391cd8f34c1 2 *
capsavon 0:f391cd8f34c1 3 * Permission is hereby granted, free of charge, to any person obtaining a copy of this software
capsavon 0:f391cd8f34c1 4 * and associated documentation files (the "Software"), to deal in the Software without
capsavon 0:f391cd8f34c1 5 * restriction, including without limitation the rights to use, copy, modify, merge, publish,
capsavon 0:f391cd8f34c1 6 * distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the
capsavon 0:f391cd8f34c1 7 * Software is furnished to do so, subject to the following conditions:
capsavon 0:f391cd8f34c1 8 *
capsavon 0:f391cd8f34c1 9 * The above copyright notice and this permission notice shall be included in all copies or
capsavon 0:f391cd8f34c1 10 * substantial portions of the Software.
capsavon 0:f391cd8f34c1 11 *
capsavon 0:f391cd8f34c1 12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
capsavon 0:f391cd8f34c1 13 * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
capsavon 0:f391cd8f34c1 14 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
capsavon 0:f391cd8f34c1 15 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
capsavon 0:f391cd8f34c1 16 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
capsavon 0:f391cd8f34c1 17 */
capsavon 0:f391cd8f34c1 18
capsavon 0:f391cd8f34c1 19 #include "QSPI_DISCO_F746NG.h"
capsavon 0:f391cd8f34c1 20
capsavon 0:f391cd8f34c1 21 // Constructor
capsavon 0:f391cd8f34c1 22 QSPI_DISCO_F746NG::QSPI_DISCO_F746NG()
capsavon 0:f391cd8f34c1 23 {
capsavon 0:f391cd8f34c1 24 BSP_QSPI_Init();
capsavon 0:f391cd8f34c1 25 }
capsavon 0:f391cd8f34c1 26
capsavon 0:f391cd8f34c1 27 // Destructor
capsavon 0:f391cd8f34c1 28 QSPI_DISCO_F746NG::~QSPI_DISCO_F746NG()
capsavon 0:f391cd8f34c1 29 {
capsavon 0:f391cd8f34c1 30 BSP_QSPI_DeInit();
capsavon 0:f391cd8f34c1 31 }
capsavon 0:f391cd8f34c1 32
capsavon 0:f391cd8f34c1 33 //=================================================================================================================
capsavon 0:f391cd8f34c1 34 // Public methods
capsavon 0:f391cd8f34c1 35 //=================================================================================================================
capsavon 0:f391cd8f34c1 36
capsavon 0:f391cd8f34c1 37 uint8_t QSPI_DISCO_F746NG::Init(void)
capsavon 0:f391cd8f34c1 38 {
capsavon 0:f391cd8f34c1 39 return BSP_QSPI_Init();
capsavon 0:f391cd8f34c1 40 }
capsavon 0:f391cd8f34c1 41
capsavon 0:f391cd8f34c1 42 uint8_t QSPI_DISCO_F746NG::DeInit(void)
capsavon 0:f391cd8f34c1 43 {
capsavon 0:f391cd8f34c1 44 return BSP_QSPI_DeInit();
capsavon 0:f391cd8f34c1 45 }
capsavon 0:f391cd8f34c1 46
capsavon 0:f391cd8f34c1 47 uint8_t QSPI_DISCO_F746NG::Read(uint8_t* pData, uint32_t ReadAddr, uint32_t Size)
capsavon 0:f391cd8f34c1 48 {
capsavon 0:f391cd8f34c1 49 return BSP_QSPI_Read(pData, ReadAddr, Size);
capsavon 0:f391cd8f34c1 50 }
capsavon 0:f391cd8f34c1 51
capsavon 0:f391cd8f34c1 52 uint8_t QSPI_DISCO_F746NG::Write(uint8_t* pData, uint32_t WriteAddr, uint32_t Size)
capsavon 0:f391cd8f34c1 53 {
capsavon 0:f391cd8f34c1 54 return BSP_QSPI_Write(pData, WriteAddr, Size);
capsavon 0:f391cd8f34c1 55 }
capsavon 0:f391cd8f34c1 56
capsavon 0:f391cd8f34c1 57 uint8_t QSPI_DISCO_F746NG::Erase_Block(uint32_t BlockAddress)
capsavon 0:f391cd8f34c1 58 {
capsavon 0:f391cd8f34c1 59 return BSP_QSPI_Erase_Block(BlockAddress);
capsavon 0:f391cd8f34c1 60 }
capsavon 0:f391cd8f34c1 61
capsavon 0:f391cd8f34c1 62 uint8_t QSPI_DISCO_F746NG::Erase_Sector(uint32_t Sector)
capsavon 0:f391cd8f34c1 63 {
capsavon 0:f391cd8f34c1 64 return BSP_QSPI_Erase_Sector(Sector);
capsavon 0:f391cd8f34c1 65 }
capsavon 0:f391cd8f34c1 66
capsavon 0:f391cd8f34c1 67 uint8_t QSPI_DISCO_F746NG::Erase_Chip(void)
capsavon 0:f391cd8f34c1 68 {
capsavon 0:f391cd8f34c1 69 return BSP_QSPI_Erase_Chip();
capsavon 0:f391cd8f34c1 70 }
capsavon 0:f391cd8f34c1 71
capsavon 0:f391cd8f34c1 72 uint8_t QSPI_DISCO_F746NG::GetStatus(void)
capsavon 0:f391cd8f34c1 73 {
capsavon 0:f391cd8f34c1 74 return BSP_QSPI_GetStatus();
capsavon 0:f391cd8f34c1 75 }
capsavon 0:f391cd8f34c1 76
capsavon 0:f391cd8f34c1 77 uint8_t QSPI_DISCO_F746NG::GetInfo(QSPI_Info* pInfo)
capsavon 0:f391cd8f34c1 78 {
capsavon 0:f391cd8f34c1 79 return BSP_QSPI_GetInfo(pInfo);
capsavon 0:f391cd8f34c1 80 }
capsavon 0:f391cd8f34c1 81
capsavon 0:f391cd8f34c1 82 uint8_t QSPI_DISCO_F746NG::EnableMemoryMappedMode(void)
capsavon 0:f391cd8f34c1 83 {
capsavon 0:f391cd8f34c1 84 return BSP_QSPI_EnableMemoryMappedMode();
capsavon 0:f391cd8f34c1 85 }
capsavon 0:f391cd8f34c1 86
capsavon 0:f391cd8f34c1 87 uint8_t QSPI_DISCO_F746NG::SuspendErase(void)
capsavon 0:f391cd8f34c1 88 {
capsavon 0:f391cd8f34c1 89 return BSP_QSPI_SuspendErase();
capsavon 0:f391cd8f34c1 90 }
capsavon 0:f391cd8f34c1 91
capsavon 0:f391cd8f34c1 92 uint8_t QSPI_DISCO_F746NG::ResumeErase(void)
capsavon 0:f391cd8f34c1 93 {
capsavon 0:f391cd8f34c1 94 return BSP_QSPI_ResumeErase();
capsavon 0:f391cd8f34c1 95 }
capsavon 0:f391cd8f34c1 96
capsavon 0:f391cd8f34c1 97 //=================================================================================================================
capsavon 0:f391cd8f34c1 98 // Private methods
capsavon 0:f391cd8f34c1 99 //=================================================================================================================