paolo della vedova / Mbed 2 deprecated Nucleo_Hello_counter

on test and not completed based on nucleo_hello_encoder library

Dependencies:   mbed

Fork of Nucleo_Hello_Encoder by David Lowe

main.cpp@4:26948bebef6c, 2015-09-30 (annotated)

Committer:
c128
Date:
Wed Sep 30 08:15:19 2015 +0000
Revision:
4:26948bebef6c
Parent:
3:5c895f9199d6 
.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
gregeric 0:ee5cb967aa17 1 /*
gregeric 0:ee5cb967aa17 2 * Using STM32's counter peripherals to interface rotary encoders.
gregeric 0:ee5cb967aa17 3 * Encoders are supported on F4xx's TIM1,2,3,4,5. TIM2 & TIM5 have 32bit count, others 16bit.
gregeric 0:ee5cb967aa17 4 * Beware mbed uses TIM5 for system timer, others for PWM.
gregeric 0:ee5cb967aa17 5 * Check your platform's PeripheralPins.c & PeripheralNames.h if you need both PWM & encoders.
gregeric 0:ee5cb967aa17 6 *
gregeric 0:ee5cb967aa17 7 * Edit HAL_TIM_Encoder_MspInitFx.cpp to suit your mcu & board's available pinouts & pullups/downs.
gregeric 0:ee5cb967aa17 8 *
gregeric 0:ee5cb967aa17 9 * Thanks to:
gregeric 0:ee5cb967aa17 10 * http://petoknm.wordpress.com/2015/01/05/rotary-encoder-and-stm32/
gregeric 0:ee5cb967aa17 11 *
gregeric 0:ee5cb967aa17 12 * References:
gregeric 0:ee5cb967aa17 13 * http://www.st.com/st-web-ui/static/active/en/resource/technical/document/user_manual/DM00122015.pdf
gregeric 0:ee5cb967aa17 14 * http://www.st.com/st-web-ui/static/active/en/resource/technical/document/reference_manual/DM00096844.pdf
gregeric 0:ee5cb967aa17 15 * http://www.st.com/web/en/resource/technical/document/application_note/DM00042534.pdf
gregeric 0:ee5cb967aa17 16 * http://www.st.com/web/en/resource/technical/document/datasheet/DM00102166.pdf
gregeric 0:ee5cb967aa17 17 *
gregeric 0:ee5cb967aa17 18 * David Lowe Jan 2015
gregeric 0:ee5cb967aa17 19 */
gregeric 0:ee5cb967aa17 20
gregeric 0:ee5cb967aa17 21 #include "mbed.h"
c128 4:26948bebef6c 22 #include "Encoder.h"
gregeric 0:ee5cb967aa17 23
c128 4:26948bebef6c 24 TIM_Encoder_InitTypeDef encoder2;
c128 4:26948bebef6c 25 TIM_HandleTypeDef timer2;
c128 4:26948bebef6c 26 TIM_IC_InitTypeDef counterSet2;
c128 4:26948bebef6c 27
gregeric 0:ee5cb967aa17 28 int main()
gregeric 0:ee5cb967aa17 29 {
c128 4:26948bebef6c 30 //examples
c128 4:26948bebef6c 31
c128 4:26948bebef6c 32 //counting on A-input only, 2 ticks per cycle, rolls over at 100
c128 4:26948bebef6c 33 //EncoderInit(encoder1, timer1, TIM1, 0xffff, TIM_ENCODERMODE_TI1);
gregeric 0:ee5cb967aa17 34
c128 4:26948bebef6c 35 //counting on both A&B inputs, 4 ticks per cycle, full 32-bit count
c128 4:26948bebef6c 36 EncoderInit(encoder2, timer2, counterSet2, TIM2, 0xffff, 0);
c128 4:26948bebef6c 37 TIM2->SMCR |= 0x0007; // Ext. clk mode 1
c128 4:26948bebef6c 38 TIM2->SMCR |= 0x0060; // TI2FP2 as ext. clock
c128 4:26948bebef6c 39 TIM2->CR1 |= 0x0001; // enable counting
c128 4:26948bebef6c 40 TIM2->CNT = 0; // reset counter
c128 4:26948bebef6c 41
c128 4:26948bebef6c 42 while (1) {
c128 1:3d2fffa6e19f 43 int16_t count1;
c128 4:26948bebef6c 44 count1=TIM2->CNT;
c128 2:70f92ce7d983 45
c128 1:3d2fffa6e19f 46 printf("%d\r\n", count1);
gregeric 0:ee5cb967aa17 47 wait(1.0);
c128 4:26948bebef6c 48 if (GPIOE->IDR & 0x01) TIM2->CNT = 0; // reset counter
c128 4:26948bebef6c 49 if (1 * TIM_CR1_DIR) TIM2->CR1 |= 0; // 0 - count up; 1 - count down
c128 4:26948bebef6c 50
c128 4:26948bebef6c 51 //if (GPIOE->IDR & 0x02) TIM2->CR1 |= 0x01; // enable counter
c128 4:26948bebef6c 52 //if (GPIOE->IDR & 0x04) TIM2->CR1 &= ~0x01; // disable counter
c128 4:26948bebef6c 53 }
gregeric 0:ee5cb967aa17 54 }