YOSHIHISA TABUCHI / Mbed OS Host_Software_MAX32664GWEB_HR_EXTENDEDtest

test

Dependencies:   BMI160 max32630hsp3 MemoryLCD USBDevice

accelerometer/bmi160_i2c.cpp@0:ac4dea3e2894, 2019-03-18 (annotated)

Committer:
seyhmus.cacina
Date:
Mon Mar 18 10:21:53 2019 +0300
Revision:
0:ac4dea3e2894
ME11B Sample Code First Commit

Who changed what in which revision?

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seyhmus.cacina 0:ac4dea3e2894 1 /**********************************************************************
seyhmus.cacina 0:ac4dea3e2894 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
seyhmus.cacina 0:ac4dea3e2894 3 *
seyhmus.cacina 0:ac4dea3e2894 4 * Permission is hereby granted, free of charge, to any person obtaining a
seyhmus.cacina 0:ac4dea3e2894 5 * copy of this software and associated documentation files (the "Software"),
seyhmus.cacina 0:ac4dea3e2894 6 * to deal in the Software without restriction, including without limitation
seyhmus.cacina 0:ac4dea3e2894 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
seyhmus.cacina 0:ac4dea3e2894 8 * and/or sell copies of the Software, and to permit persons to whom the
seyhmus.cacina 0:ac4dea3e2894 9 * Software is furnished to do so, subject to the following conditions:
seyhmus.cacina 0:ac4dea3e2894 10 *
seyhmus.cacina 0:ac4dea3e2894 11 * The above copyright notice and this permission notice shall be included
seyhmus.cacina 0:ac4dea3e2894 12 * in all copies or substantial portions of the Software.
seyhmus.cacina 0:ac4dea3e2894 13 *
seyhmus.cacina 0:ac4dea3e2894 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
seyhmus.cacina 0:ac4dea3e2894 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
seyhmus.cacina 0:ac4dea3e2894 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
seyhmus.cacina 0:ac4dea3e2894 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
seyhmus.cacina 0:ac4dea3e2894 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
seyhmus.cacina 0:ac4dea3e2894 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
seyhmus.cacina 0:ac4dea3e2894 20 * OTHER DEALINGS IN THE SOFTWARE.
seyhmus.cacina 0:ac4dea3e2894 21 *
seyhmus.cacina 0:ac4dea3e2894 22 * Except as contained in this notice, the name of Maxim Integrated
seyhmus.cacina 0:ac4dea3e2894 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
seyhmus.cacina 0:ac4dea3e2894 24 * Products, Inc. Branding Policy.
seyhmus.cacina 0:ac4dea3e2894 25 *
seyhmus.cacina 0:ac4dea3e2894 26 * The mere transfer of this software does not imply any licenses
seyhmus.cacina 0:ac4dea3e2894 27 * of trade secrets, proprietary technology, copyrights, patents,
seyhmus.cacina 0:ac4dea3e2894 28 * trademarks, maskwork rights, or any other form of intellectual
seyhmus.cacina 0:ac4dea3e2894 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
seyhmus.cacina 0:ac4dea3e2894 30 * ownership rights.
seyhmus.cacina 0:ac4dea3e2894 31 **********************************************************************/
seyhmus.cacina 0:ac4dea3e2894 32
seyhmus.cacina 0:ac4dea3e2894 33
seyhmus.cacina 0:ac4dea3e2894 34 #include "bmi160.h"
seyhmus.cacina 0:ac4dea3e2894 35
seyhmus.cacina 0:ac4dea3e2894 36
seyhmus.cacina 0:ac4dea3e2894 37 //*****************************************************************************
seyhmus.cacina 0:ac4dea3e2894 38 BMI160_I2C::BMI160_I2C(I2C *i2cBus, uint8_t i2cAdrs)
seyhmus.cacina 0:ac4dea3e2894 39 :m_i2cBus(i2cBus), m_Wadrs(i2cAdrs << 1), m_Radrs((i2cAdrs << 1) | 1)
seyhmus.cacina 0:ac4dea3e2894 40 {
seyhmus.cacina 0:ac4dea3e2894 41
seyhmus.cacina 0:ac4dea3e2894 42 }
seyhmus.cacina 0:ac4dea3e2894 43
seyhmus.cacina 0:ac4dea3e2894 44 BMI160_I2C::BMI160_I2C(I2C *i2cBus, uint8_t i2cAdrs, InterruptIn *int_pin)
seyhmus.cacina 0:ac4dea3e2894 45 :m_i2cBus(i2cBus), m_Wadrs(i2cAdrs << 1), m_Radrs((i2cAdrs << 1) | 1), BMI160(int_pin)
seyhmus.cacina 0:ac4dea3e2894 46 {
seyhmus.cacina 0:ac4dea3e2894 47
seyhmus.cacina 0:ac4dea3e2894 48 }
seyhmus.cacina 0:ac4dea3e2894 49
seyhmus.cacina 0:ac4dea3e2894 50 //*****************************************************************************
seyhmus.cacina 0:ac4dea3e2894 51 int32_t BMI160_I2C::readRegister(Registers reg, uint8_t *data)
seyhmus.cacina 0:ac4dea3e2894 52 {
seyhmus.cacina 0:ac4dea3e2894 53 int32_t rtnVal = -1;
seyhmus.cacina 0:ac4dea3e2894 54 char packet[] = {static_cast<char>(reg)};
seyhmus.cacina 0:ac4dea3e2894 55
seyhmus.cacina 0:ac4dea3e2894 56 if(m_i2cBus->write(m_Wadrs, packet, 1) == 0)
seyhmus.cacina 0:ac4dea3e2894 57 {
seyhmus.cacina 0:ac4dea3e2894 58 rtnVal = m_i2cBus->read(m_Radrs, reinterpret_cast<char *>(data), 1);
seyhmus.cacina 0:ac4dea3e2894 59 }
seyhmus.cacina 0:ac4dea3e2894 60
seyhmus.cacina 0:ac4dea3e2894 61 return rtnVal;
seyhmus.cacina 0:ac4dea3e2894 62 }
seyhmus.cacina 0:ac4dea3e2894 63
seyhmus.cacina 0:ac4dea3e2894 64
seyhmus.cacina 0:ac4dea3e2894 65 //*****************************************************************************
seyhmus.cacina 0:ac4dea3e2894 66 int32_t BMI160_I2C::writeRegister(Registers reg, const uint8_t data)
seyhmus.cacina 0:ac4dea3e2894 67 {
seyhmus.cacina 0:ac4dea3e2894 68 char packet[] = {static_cast<char>(reg), static_cast<char>(data)};
seyhmus.cacina 0:ac4dea3e2894 69
seyhmus.cacina 0:ac4dea3e2894 70 return m_i2cBus->write(m_Wadrs, packet, sizeof(packet));
seyhmus.cacina 0:ac4dea3e2894 71 }
seyhmus.cacina 0:ac4dea3e2894 72
seyhmus.cacina 0:ac4dea3e2894 73
seyhmus.cacina 0:ac4dea3e2894 74 //*****************************************************************************
seyhmus.cacina 0:ac4dea3e2894 75 int32_t BMI160_I2C::readBlock(Registers startReg, Registers stopReg,
seyhmus.cacina 0:ac4dea3e2894 76 uint8_t *data)
seyhmus.cacina 0:ac4dea3e2894 77 {
seyhmus.cacina 0:ac4dea3e2894 78 int32_t rtnVal = -1;
seyhmus.cacina 0:ac4dea3e2894 79 int32_t numBytes = ((stopReg - startReg) + 1);
seyhmus.cacina 0:ac4dea3e2894 80 char packet[] = {static_cast<char>(startReg)};
seyhmus.cacina 0:ac4dea3e2894 81
seyhmus.cacina 0:ac4dea3e2894 82 if(m_i2cBus->write(m_Wadrs, packet, 1) == 0)
seyhmus.cacina 0:ac4dea3e2894 83 {
seyhmus.cacina 0:ac4dea3e2894 84 rtnVal = m_i2cBus->read(m_Radrs, reinterpret_cast<char *>(data), numBytes);
seyhmus.cacina 0:ac4dea3e2894 85 }
seyhmus.cacina 0:ac4dea3e2894 86
seyhmus.cacina 0:ac4dea3e2894 87 return rtnVal;
seyhmus.cacina 0:ac4dea3e2894 88 }
seyhmus.cacina 0:ac4dea3e2894 89
seyhmus.cacina 0:ac4dea3e2894 90
seyhmus.cacina 0:ac4dea3e2894 91 //*****************************************************************************
seyhmus.cacina 0:ac4dea3e2894 92 int32_t BMI160_I2C::writeBlock(Registers startReg, Registers stopReg,
seyhmus.cacina 0:ac4dea3e2894 93 const uint8_t *data)
seyhmus.cacina 0:ac4dea3e2894 94 {
seyhmus.cacina 0:ac4dea3e2894 95 int32_t numBytes = ((stopReg - startReg) + 1);
seyhmus.cacina 0:ac4dea3e2894 96 char packet[numBytes + 1];
seyhmus.cacina 0:ac4dea3e2894 97
seyhmus.cacina 0:ac4dea3e2894 98 packet[0] = static_cast<char>(startReg);
seyhmus.cacina 0:ac4dea3e2894 99
seyhmus.cacina 0:ac4dea3e2894 100 memcpy(packet + 1, data, numBytes);
seyhmus.cacina 0:ac4dea3e2894 101
seyhmus.cacina 0:ac4dea3e2894 102 return m_i2cBus->write(m_Wadrs, packet, sizeof(packet));
seyhmus.cacina 0:ac4dea3e2894 103 }
seyhmus.cacina 0:ac4dea3e2894 104