yes

Committer:
braichi13
Date:
Sun May 08 14:39:57 2022 +0000
Revision:
0:c60399891edd
Yes

Who changed what in which revision?

UserRevisionLine numberNew contents of line
braichi13 0:c60399891edd 1 //For targets which use the SCT
braichi13 0:c60399891edd 2 #if defined(TARGET_LPC81X) || defined(TARGET_LPC82X)
braichi13 0:c60399891edd 3
braichi13 0:c60399891edd 4 #ifdef TARGET_LPC82X
braichi13 0:c60399891edd 5 #define CTRL_U CTRL
braichi13 0:c60399891edd 6 #endif
braichi13 0:c60399891edd 7
braichi13 0:c60399891edd 8 #include "FastPWM.h"
braichi13 0:c60399891edd 9
braichi13 0:c60399891edd 10 void FastPWM::initFastPWM( void ) {
braichi13 0:c60399891edd 11 //Mbed uses the timer as a single unified 32-bit timer, who are we to argue with this, and it is easier
braichi13 0:c60399891edd 12 bits = 32;
braichi13 0:c60399891edd 13
braichi13 0:c60399891edd 14 #ifdef TARGET_LPC82X
braichi13 0:c60399891edd 15 //The mbed lib uses the PWM peripheral slightly different, which is irritating. This sets it bck to the LPC81X
braichi13 0:c60399891edd 16 _pwm.pwm->EVENT[_pwm.pwm_ch + 1].CTRL = (1 << 12) | (_pwm.pwm_ch + 1); // Event_n on Match_n
braichi13 0:c60399891edd 17 _pwm.pwm->EVENT[_pwm.pwm_ch + 1].STATE = 0xFFFFFFFF; // All states
braichi13 0:c60399891edd 18 _pwm.pwm->OUT[_pwm.pwm_ch].SET = (1 << 0); // All PWM channels are SET on Event_0
braichi13 0:c60399891edd 19 _pwm.pwm->OUT[_pwm.pwm_ch].CLR = (1 << (_pwm.pwm_ch + 1)); // PWM ch is CLRed on Event_(ch+1)
braichi13 0:c60399891edd 20 #endif
braichi13 0:c60399891edd 21
braichi13 0:c60399891edd 22 //With 32-bit we fix prescaler to 1
braichi13 0:c60399891edd 23 _pwm.pwm->CTRL_U |= (1 << 2) | (1 << 3);
braichi13 0:c60399891edd 24 _pwm.pwm->CTRL_U &= ~(0x7F << 5);
braichi13 0:c60399891edd 25 _pwm.pwm->CTRL_U &= ~(1 << 2);
braichi13 0:c60399891edd 26
braichi13 0:c60399891edd 27 }
braichi13 0:c60399891edd 28
braichi13 0:c60399891edd 29 void FastPWM::pulsewidth_ticks( uint32_t ticks ) {
braichi13 0:c60399891edd 30 #ifdef TARGET_LPC81X
braichi13 0:c60399891edd 31 _pwm.pwm->MATCHREL[_pwm.pwm_ch + 1].U = ticks;
braichi13 0:c60399891edd 32 #else
braichi13 0:c60399891edd 33 _pwm.pwm->MATCHREL[_pwm.pwm_ch + 1] = ticks;
braichi13 0:c60399891edd 34 #endif
braichi13 0:c60399891edd 35 }
braichi13 0:c60399891edd 36
braichi13 0:c60399891edd 37 void FastPWM::period_ticks( uint32_t ticks ) {
braichi13 0:c60399891edd 38 #ifdef TARGET_LPC81X
braichi13 0:c60399891edd 39 _pwm.pwm->MATCHREL[0].U = ticks;
braichi13 0:c60399891edd 40 #else
braichi13 0:c60399891edd 41 _pwm.pwm->MATCHREL[0] = ticks;
braichi13 0:c60399891edd 42 #endif
braichi13 0:c60399891edd 43 }
braichi13 0:c60399891edd 44
braichi13 0:c60399891edd 45 uint32_t FastPWM::getPeriod( void ) {
braichi13 0:c60399891edd 46 #ifdef TARGET_LPC81X
braichi13 0:c60399891edd 47 return _pwm.pwm->MATCHREL[0].U;
braichi13 0:c60399891edd 48 #else
braichi13 0:c60399891edd 49 return _pwm.pwm->MATCHREL[0];
braichi13 0:c60399891edd 50 #endif
braichi13 0:c60399891edd 51 }
braichi13 0:c60399891edd 52
braichi13 0:c60399891edd 53 //Maybe implemented later, but needing to change the prescaler for a 32-bit
braichi13 0:c60399891edd 54 //timer used in PWM mode is kinda unlikely.
braichi13 0:c60399891edd 55 //If you really need to do it, rejoice, you can make it run so slow a period is over 40,000 year
braichi13 0:c60399891edd 56 uint32_t FastPWM::setPrescaler(uint32_t reqScale) {
braichi13 0:c60399891edd 57 //Disable dynamic prescaling
braichi13 0:c60399891edd 58 dynamicPrescaler = false;
braichi13 0:c60399891edd 59
braichi13 0:c60399891edd 60 return 1;
braichi13 0:c60399891edd 61 }
braichi13 0:c60399891edd 62
braichi13 0:c60399891edd 63 #endif