Ned Konz / Mbed 2 deprecated Multi_WS2811_test

Test program for my Multi_WS2811 library that started out as a fork of heroic/WS2811. My library uses hardware DMA on the FRDM-KL25Z to drive up to 16 strings of WS2811 or WS2812 LEDs in parallel.

Dependencies:   Multi_WS2811 mbed MMA8451Q

Fork of WS2811 by Heroic Robotics

NOTE: I have accidentally pushed changes for another fork of this program that I used in the recent Georgetown Carnival Power Tool Races. When I get some time, I will restore the test program to its original glory.

You can see my power tool racer (Nevermore's Revenge) here

/media/uploads/bikeNomad/img_0482.jpg

This tests my FRDM-KL25Z multi-string WS2811/WS2812 library. It uses the accelerometer to change the rainbow phase on two strings of LEDs as well as the touch sense to change brightness.

A video of this program in operation is here.

Here is the library that I developed to run the LEDs:

Import libraryMulti_WS2811

Library allowing up to 16 strings of 60 WS2811 or WS2812 LEDs to be driven from a single FRDM-KL25Z board. Uses hardware DMA to do a full 800 KHz rate without much CPU burden.

Last commit 13 Jun 2015 by Ned Konz

WS2811.cpp@21:4541da183397, 2014-01-02 (annotated)

Committer:
bikeNomad
Date:
Thu Jan 02 00:50:09 2014 +0000
Revision:
21:4541da183397
Parent:
20:b9d76e567637
Child:
23:33df42ff2541
Got parallel mode working!

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bikeNomad 21:4541da183397 1 // 800 KHz WS2811 driver driving potentially many LED strings.
bikeNomad 21:4541da183397 2 // Uses 3-phase DMA
bikeNomad 21:4541da183397 3 // 16K SRAM less stack, etc.
bikeNomad 21:4541da183397 4 //
bikeNomad 21:4541da183397 5 // Per LED: 3 bytes (malloc'd) for RGB data
bikeNomad 21:4541da183397 6 //
bikeNomad 21:4541da183397 7 // Per LED strip / per LED
bikeNomad 21:4541da183397 8 // 96 bytes (static) for bit data
bikeNomad 21:4541da183397 9 // + 96 bytes (static) for ones data
bikeNomad 21:4541da183397 10 // = 192 bytes
bikeNomad 21:4541da183397 11 //
bikeNomad 21:4541da183397 12 // 40 LEDs max per string = 7680 bytes static
bikeNomad 21:4541da183397 13 //
bikeNomad 21:4541da183397 14 // 40 LEDs: 7680 + 40*3 = 7800 bytes
bikeNomad 21:4541da183397 15 // 80 LEDs: 7680 + 80*3 = 7920 bytes
bikeNomad 21:4541da183397 16
bikeNomad 21:4541da183397 17 #include "MKL25Z4.h"
bikeNomad 21:4541da183397 18 #include "LedStrip.h"
bikeNomad 21:4541da183397 19 #include "WS2811.h"
bikeNomad 21:4541da183397 20
bikeNomad 21:4541da183397 21 //
bikeNomad 21:4541da183397 22 // Configuration
bikeNomad 21:4541da183397 23 //
bikeNomad 21:4541da183397 24
bikeNomad 21:4541da183397 25 // Define MONITOR_TPM0_PWM as non-zero to monitor PWM timing on PTD0 and PTD1
bikeNomad 21:4541da183397 26 // PTD0 TPM0/CH0 PWM_1 J2/06
bikeNomad 21:4541da183397 27 // PTD1 TPM0/CH1 PWM_2 J2/12 (also LED_BLUE)
bikeNomad 21:4541da183397 28 #define MONITOR_TPM0_PWM 0
bikeNomad 21:4541da183397 29
bikeNomad 21:4541da183397 30 // define DEBUG_PIN to identify a pin in PORTD used for debug output
bikeNomad 21:4541da183397 31 // #define DEBUG_PIN 3 /* PTD3 debugOut */
bikeNomad 21:4541da183397 32
bikeNomad 21:4541da183397 33 #ifdef DEBUG_PIN
bikeNomad 21:4541da183397 34 #define DEBUG 1
bikeNomad 21:4541da183397 35 #endif
bikeNomad 21:4541da183397 36
bikeNomad 21:4541da183397 37 #if DEBUG
bikeNomad 21:4541da183397 38 #define DEBUG_MASK (1<<DEBUG_PIN)
bikeNomad 21:4541da183397 39 #define RESET_DEBUG (IO_GPIO->PDOR &= ~DEBUG_MASK)
bikeNomad 21:4541da183397 40 #define SET_DEBUG (IO_GPIO->PDOR |= DEBUG_MASK)
bikeNomad 21:4541da183397 41 #else
bikeNomad 21:4541da183397 42 #define DEBUG_MASK 0
bikeNomad 21:4541da183397 43 #define RESET_DEBUG (void)0
bikeNomad 21:4541da183397 44 #define SET_DEBUG (void)0
bikeNomad 21:4541da183397 45 #endif
bikeNomad 21:4541da183397 46
bikeNomad 21:4541da183397 47 static PORT_Type volatile * const IO_PORT = PORTD;
bikeNomad 21:4541da183397 48 static GPIO_Type volatile * const IO_GPIO = PTD;
bikeNomad 21:4541da183397 49
bikeNomad 21:4541da183397 50 // 48 MHz clock, no prescaling.
bikeNomad 21:4541da183397 51 #define NSEC_TO_TICKS(nsec) ((nsec)*48/1000)
bikeNomad 21:4541da183397 52 static const uint32_t CLK_NSEC = 1250;
bikeNomad 21:4541da183397 53 static const uint32_t tpm_period = NSEC_TO_TICKS(CLK_NSEC);
bikeNomad 21:4541da183397 54 static const uint32_t tpm_p0_period = NSEC_TO_TICKS(CLK_NSEC / 3);
bikeNomad 21:4541da183397 55 static const uint32_t tpm_p1_period = NSEC_TO_TICKS(CLK_NSEC * 2 / 3);
bikeNomad 21:4541da183397 56
bikeNomad 21:4541da183397 57 enum DMA_MUX_SRC
bikeNomad 21:4541da183397 58 {
bikeNomad 21:4541da183397 59 DMA_MUX_SRC_TPM0_CH_0 = 24,
bikeNomad 21:4541da183397 60 DMA_MUX_SRC_TPM0_CH_1,
bikeNomad 21:4541da183397 61 DMA_MUX_SRC_TPM0_Overflow = 54,
bikeNomad 21:4541da183397 62 };
bikeNomad 21:4541da183397 63
bikeNomad 21:4541da183397 64 enum DMA_CHAN
bikeNomad 21:4541da183397 65 {
bikeNomad 21:4541da183397 66 DMA_CHAN_START = 0,
bikeNomad 21:4541da183397 67 DMA_CHAN_0_LOW = 1,
bikeNomad 21:4541da183397 68 DMA_CHAN_1_LOW = 2,
bikeNomad 21:4541da183397 69 N_DMA_CHANNELS
bikeNomad 21:4541da183397 70 };
bikeNomad 21:4541da183397 71
bikeNomad 21:4541da183397 72 static volatile bool dma_done = true;
bikeNomad 21:4541da183397 73
bikeNomad 21:4541da183397 74 // class static
bikeNomad 21:4541da183397 75 bool WS2811::initialized = false;
bikeNomad 21:4541da183397 76
bikeNomad 21:4541da183397 77 // class static
bikeNomad 21:4541da183397 78 uint32_t WS2811::enabledPins = 0;
bikeNomad 21:4541da183397 79
bikeNomad 21:4541da183397 80 #define WORD_ALIGNED __attribute__ ((aligned(4)))
bikeNomad 21:4541da183397 81
bikeNomad 21:4541da183397 82 #define DMA_LEADING_ZEROS 2
bikeNomad 21:4541da183397 83 #define BITS_PER_RGB 24
bikeNomad 21:4541da183397 84 #define DMA_TRAILING_ZEROS 1
bikeNomad 21:4541da183397 85
bikeNomad 21:4541da183397 86 static struct
bikeNomad 21:4541da183397 87 {
bikeNomad 21:4541da183397 88 uint32_t start_t1_low[ DMA_LEADING_ZEROS ];
bikeNomad 21:4541da183397 89 uint32_t dmaWords[ BITS_PER_RGB * MAX_LEDS_PER_STRIP ];
bikeNomad 21:4541da183397 90 uint32_t trailing_zeros_1[ DMA_TRAILING_ZEROS ];
bikeNomad 21:4541da183397 91
bikeNomad 21:4541da183397 92 uint32_t start_t0_high[ DMA_LEADING_ZEROS - 1 ];
bikeNomad 21:4541da183397 93 uint32_t allOnes[ BITS_PER_RGB * MAX_LEDS_PER_STRIP ];
bikeNomad 21:4541da183397 94 uint32_t trailing_zeros_2[ DMA_TRAILING_ZEROS + 1 ];
bikeNomad 21:4541da183397 95 } dmaData WORD_ALIGNED;
bikeNomad 21:4541da183397 96
bikeNomad 21:4541da183397 97 // class static
bikeNomad 21:4541da183397 98 bool WS2811::is_dma_done()
bikeNomad 21:4541da183397 99 {
bikeNomad 21:4541da183397 100 return dma_done;
bikeNomad 21:4541da183397 101 }
bikeNomad 21:4541da183397 102
bikeNomad 21:4541da183397 103 // class static
bikeNomad 21:4541da183397 104 void WS2811::hw_init()
bikeNomad 21:4541da183397 105 {
bikeNomad 21:4541da183397 106 if (initialized) return;
bikeNomad 21:4541da183397 107
bikeNomad 21:4541da183397 108 dma_data_init();
bikeNomad 21:4541da183397 109 clock_init();
bikeNomad 21:4541da183397 110 dma_init();
bikeNomad 21:4541da183397 111 io_init();
bikeNomad 21:4541da183397 112 tpm_init();
bikeNomad 21:4541da183397 113
bikeNomad 21:4541da183397 114 initialized = true;
bikeNomad 21:4541da183397 115 }
bikeNomad 21:4541da183397 116
bikeNomad 21:4541da183397 117 // class static
bikeNomad 21:4541da183397 118 void WS2811::dma_data_init()
bikeNomad 21:4541da183397 119 {
bikeNomad 21:4541da183397 120 memset(dmaData.allOnes, 0xFF, sizeof(dmaData.allOnes));
bikeNomad 21:4541da183397 121
bikeNomad 21:4541da183397 122 #if DEBUG
bikeNomad 21:4541da183397 123 for (unsigned i = 0; i < BITS_PER_RGB * MAX_LEDS_PER_STRIP; i++)
bikeNomad 21:4541da183397 124 dmaData.dmaWords[i] = DEBUG_MASK;
bikeNomad 21:4541da183397 125 #endif
bikeNomad 21:4541da183397 126 }
bikeNomad 21:4541da183397 127
bikeNomad 21:4541da183397 128 // class static
bikeNomad 21:4541da183397 129
bikeNomad 21:4541da183397 130 /// Enable PORTD, DMA and TPM0 clocking
bikeNomad 21:4541da183397 131 void WS2811::clock_init()
bikeNomad 21:4541da183397 132 {
bikeNomad 21:4541da183397 133 SIM->SCGC5 |= SIM_SCGC5_PORTD_MASK;
bikeNomad 21:4541da183397 134 SIM->SCGC6 |= SIM_SCGC6_DMAMUX_MASK | SIM_SCGC6_TPM0_MASK; // Enable clock to DMA mux and TPM0
bikeNomad 21:4541da183397 135 SIM->SCGC7 |= SIM_SCGC7_DMA_MASK; // Enable clock to DMA
bikeNomad 21:4541da183397 136
bikeNomad 21:4541da183397 137 SIM->SOPT2 |= SIM_SOPT2_TPMSRC(1); // Clock source: MCGFLLCLK or MCGPLLCLK
bikeNomad 21:4541da183397 138 }
bikeNomad 21:4541da183397 139
bikeNomad 21:4541da183397 140 // class static
bikeNomad 21:4541da183397 141
bikeNomad 21:4541da183397 142 /// Configure GPIO output pins
bikeNomad 21:4541da183397 143 void WS2811::io_init()
bikeNomad 21:4541da183397 144 {
bikeNomad 21:4541da183397 145 uint32_t m = 1;
bikeNomad 21:4541da183397 146 for (uint32_t i = 0; i < 32; i++)
bikeNomad 21:4541da183397 147 {
bikeNomad 21:4541da183397 148 // set up each pin
bikeNomad 21:4541da183397 149 if (m & enabledPins)
bikeNomad 21:4541da183397 150 {
bikeNomad 21:4541da183397 151 IO_PORT->PCR[i] = PORT_PCR_MUX(1) // GPIO
bikeNomad 21:4541da183397 152 | PORT_PCR_DSE_MASK; // high drive strength
bikeNomad 21:4541da183397 153 }
bikeNomad 21:4541da183397 154 m <<= 1;
bikeNomad 21:4541da183397 155 }
bikeNomad 21:4541da183397 156
bikeNomad 21:4541da183397 157 IO_GPIO->PDDR |= enabledPins; // set as outputs
bikeNomad 21:4541da183397 158
bikeNomad 21:4541da183397 159 #if MONITOR_TPM0_PWM
bikeNomad 21:4541da183397 160 // PTD0 CH0 monitor: TPM0, high drive strength
bikeNomad 21:4541da183397 161 IO_PORT->PCR[0] = PORT_PCR_MUX(4) | PORT_PCR_DSE_MASK;
bikeNomad 21:4541da183397 162 // PTD1 CH1 monitor: TPM0, high drive strength
bikeNomad 21:4541da183397 163 IO_PORT->PCR[1] = PORT_PCR_MUX(4) | PORT_PCR_DSE_MASK;
bikeNomad 21:4541da183397 164 IO_GPIO->PDDR |= 3; // set as outputs
bikeNomad 21:4541da183397 165 IO_GPIO->PDOR &= ~(enabledPins | 3); // initially low
bikeNomad 21:4541da183397 166 #else
bikeNomad 21:4541da183397 167 IO_GPIO->PDOR &= ~enabledPins; // initially low
bikeNomad 21:4541da183397 168 #endif
bikeNomad 21:4541da183397 169
bikeNomad 21:4541da183397 170 #if DEBUG
bikeNomad 21:4541da183397 171 IO_PORT->PCR[DEBUG_PIN] = PORT_PCR_MUX(1) | PORT_PCR_DSE_MASK;
bikeNomad 21:4541da183397 172 IO_GPIO->PDDR |= DEBUG_MASK;
bikeNomad 21:4541da183397 173 IO_GPIO->PDOR &= ~DEBUG_MASK;
bikeNomad 21:4541da183397 174 #endif
bikeNomad 21:4541da183397 175 }
bikeNomad 21:4541da183397 176
bikeNomad 21:4541da183397 177 // class static
bikeNomad 21:4541da183397 178
bikeNomad 21:4541da183397 179 /// Configure DMA and DMAMUX
bikeNomad 21:4541da183397 180 void WS2811::dma_init()
bikeNomad 21:4541da183397 181 {
bikeNomad 21:4541da183397 182 // reset DMAMUX
bikeNomad 21:4541da183397 183 DMAMUX0->CHCFG[DMA_CHAN_START] = 0;
bikeNomad 21:4541da183397 184 DMAMUX0->CHCFG[DMA_CHAN_0_LOW] = 0;
bikeNomad 21:4541da183397 185 DMAMUX0->CHCFG[DMA_CHAN_1_LOW] = 0;
bikeNomad 21:4541da183397 186
bikeNomad 21:4541da183397 187 // wire our DMA event sources into the first three DMA channels
bikeNomad 21:4541da183397 188 // t=0: all enabled outputs go high on TPM0 overflow
bikeNomad 21:4541da183397 189 DMAMUX0->CHCFG[DMA_CHAN_START] = DMAMUX_CHCFG_ENBL_MASK | DMAMUX_CHCFG_SOURCE(DMA_MUX_SRC_TPM0_Overflow);
bikeNomad 21:4541da183397 190 // t=tpm_p0_period: all of the 0 bits go low.
bikeNomad 21:4541da183397 191 DMAMUX0->CHCFG[DMA_CHAN_0_LOW] = DMAMUX_CHCFG_ENBL_MASK | DMAMUX_CHCFG_SOURCE(DMA_MUX_SRC_TPM0_CH_0);
bikeNomad 21:4541da183397 192 // t=tpm_p1_period: all outputs go low.
bikeNomad 21:4541da183397 193 DMAMUX0->CHCFG[DMA_CHAN_1_LOW] = DMAMUX_CHCFG_ENBL_MASK | DMAMUX_CHCFG_SOURCE(DMA_MUX_SRC_TPM0_CH_1);
bikeNomad 21:4541da183397 194
bikeNomad 21:4541da183397 195 NVIC_EnableIRQ(DMA0_IRQn);
bikeNomad 21:4541da183397 196 }
bikeNomad 21:4541da183397 197
bikeNomad 21:4541da183397 198 // class static
bikeNomad 21:4541da183397 199
bikeNomad 21:4541da183397 200 /// Configure TPM0 to do two different PWM periods at 800kHz rate
bikeNomad 21:4541da183397 201 void WS2811::tpm_init()
bikeNomad 21:4541da183397 202 {
bikeNomad 21:4541da183397 203 // set up TPM0 for proper period (800 kHz = 1.25 usec ±600nsec)
bikeNomad 21:4541da183397 204 TPM_Type volatile *tpm = TPM0;
bikeNomad 21:4541da183397 205 tpm->SC = TPM_SC_DMA_MASK // enable DMA
bikeNomad 21:4541da183397 206 | TPM_SC_CMOD(0) // disable clocks
bikeNomad 21:4541da183397 207 | TPM_SC_PS(0); // 48MHz / 1 = 48MHz clock
bikeNomad 21:4541da183397 208 tpm->MOD = tpm_period - 1; // 48MHz / 800kHz
bikeNomad 21:4541da183397 209
bikeNomad 21:4541da183397 210 // No Interrupts; High True pulses on Edge Aligned PWM
bikeNomad 21:4541da183397 211 tpm->CONTROLS[0].CnSC = TPM_CnSC_MSB_MASK | TPM_CnSC_ELSB_MASK | TPM_CnSC_DMA_MASK;
bikeNomad 21:4541da183397 212 tpm->CONTROLS[1].CnSC = TPM_CnSC_MSB_MASK | TPM_CnSC_ELSB_MASK | TPM_CnSC_DMA_MASK;
bikeNomad 21:4541da183397 213
bikeNomad 21:4541da183397 214 // set TPM0 channel 0 for 0.35 usec (±150nsec) / 0.8 usec (±150nsec) (0 code)
bikeNomad 21:4541da183397 215 // 1.25 usec * 1/3 = 417 nsec
bikeNomad 21:4541da183397 216 tpm->CONTROLS[0].CnV = tpm_p0_period;
bikeNomad 21:4541da183397 217
bikeNomad 21:4541da183397 218 // set TPM0 channel 1 for 0.7 usec (±150nsec) / 0.6 usec (±150nsec) (1 code)
bikeNomad 21:4541da183397 219 // 1.25 usec * 2/3 = 833 nsec
bikeNomad 21:4541da183397 220 tpm->CONTROLS[1].CnV = tpm_p1_period;
bikeNomad 21:4541da183397 221 }
bikeNomad 21:4541da183397 222
bikeNomad 21:4541da183397 223 WS2811::WS2811(unsigned n, unsigned pinNumber)
bikeNomad 21:4541da183397 224 : LedStrip(n)
bikeNomad 21:4541da183397 225 , pinMask(1U << pinNumber)
bikeNomad 21:4541da183397 226 {
bikeNomad 21:4541da183397 227 enabledPins |= pinMask;
bikeNomad 21:4541da183397 228 guardtime.start();
bikeNomad 21:4541da183397 229 }
bikeNomad 21:4541da183397 230
bikeNomad 21:4541da183397 231 // class static
bikeNomad 21:4541da183397 232 void WS2811::startDMA()
bikeNomad 21:4541da183397 233 {
bikeNomad 21:4541da183397 234 DMA_Type volatile * dma = DMA0;
bikeNomad 21:4541da183397 235 TPM_Type volatile *tpm = TPM0;
bikeNomad 21:4541da183397 236 uint32_t nBytes = sizeof(dmaData.start_t1_low)
bikeNomad 21:4541da183397 237 + sizeof(dmaData.dmaWords)
bikeNomad 21:4541da183397 238 + sizeof(dmaData.trailing_zeros_1);
bikeNomad 21:4541da183397 239
bikeNomad 21:4541da183397 240 tpm->SC &= ~TPM_SC_CMOD_MASK; // disable internal clocking
bikeNomad 21:4541da183397 241 tpm->CNT = tpm_p0_period - 2 ;
bikeNomad 21:4541da183397 242 tpm->STATUS = 0xFFFFFFFF;
bikeNomad 21:4541da183397 243
bikeNomad 21:4541da183397 244 dma->DMA[DMA_CHAN_START].DSR_BCR = DMA_DSR_BCR_DONE_MASK; // clear/reset DMA status
bikeNomad 21:4541da183397 245 dma->DMA[DMA_CHAN_0_LOW].DSR_BCR = DMA_DSR_BCR_DONE_MASK; // clear/reset DMA status
bikeNomad 21:4541da183397 246 dma->DMA[DMA_CHAN_1_LOW].DSR_BCR = DMA_DSR_BCR_DONE_MASK; // clear/reset DMA status
bikeNomad 21:4541da183397 247
bikeNomad 21:4541da183397 248 // t=0: all outputs go high
bikeNomad 21:4541da183397 249 // triggered by TPM0_Overflow
bikeNomad 21:4541da183397 250 // source is one word of 0 then 24 x 0xffffffff, then another 0 word
bikeNomad 21:4541da183397 251 dma->DMA[DMA_CHAN_START].SAR = (uint32_t)(void*)dmaData.start_t0_high;
bikeNomad 21:4541da183397 252 dma->DMA[DMA_CHAN_START].DSR_BCR = DMA_DSR_BCR_BCR_MASK & nBytes; // length of transfer in bytes
bikeNomad 21:4541da183397 253
bikeNomad 21:4541da183397 254 // t=tpm_p0_period: some outputs (the 0 bits) go low.
bikeNomad 21:4541da183397 255 // Triggered by TPM0_CH0
bikeNomad 21:4541da183397 256 // Start 2 words before the actual data to avoid garbage pulses.
bikeNomad 21:4541da183397 257 dma->DMA[DMA_CHAN_0_LOW].SAR = (uint32_t)(void*)dmaData.start_t1_low; // set source address
bikeNomad 21:4541da183397 258 dma->DMA[DMA_CHAN_0_LOW].DSR_BCR = DMA_DSR_BCR_BCR_MASK & nBytes; // length of transfer in bytes
bikeNomad 21:4541da183397 259
bikeNomad 21:4541da183397 260 // t=tpm_p1_period: all outputs go low.
bikeNomad 21:4541da183397 261 // Triggered by TPM0_CH1
bikeNomad 21:4541da183397 262 // source is constant 0x00000000 (first word of dmaWords)
bikeNomad 21:4541da183397 263 dma->DMA[DMA_CHAN_1_LOW].SAR = (uint32_t)(void*)dmaData.start_t1_low; // set source address
bikeNomad 21:4541da183397 264 dma->DMA[DMA_CHAN_1_LOW].DSR_BCR = DMA_DSR_BCR_BCR_MASK & nBytes; // length of transfer in bytes
bikeNomad 21:4541da183397 265
bikeNomad 21:4541da183397 266 dma->DMA[DMA_CHAN_0_LOW].DAR
bikeNomad 21:4541da183397 267 = dma->DMA[DMA_CHAN_1_LOW].DAR
bikeNomad 21:4541da183397 268 = dma->DMA[DMA_CHAN_START].DAR
bikeNomad 21:4541da183397 269 = (uint32_t)(void*)&IO_GPIO->PDOR;
bikeNomad 21:4541da183397 270
bikeNomad 21:4541da183397 271 // wait until done
bikeNomad 21:4541da183397 272 while (!is_dma_done())
bikeNomad 21:4541da183397 273 {
bikeNomad 21:4541da183397 274 __WFI();
bikeNomad 21:4541da183397 275 }
bikeNomad 21:4541da183397 276
bikeNomad 21:4541da183397 277 SET_DEBUG;
bikeNomad 21:4541da183397 278
bikeNomad 21:4541da183397 279 dma->DMA[DMA_CHAN_0_LOW].DCR = DMA_DCR_EINT_MASK // enable interrupt on end of transfer
bikeNomad 21:4541da183397 280 | DMA_DCR_ERQ_MASK
bikeNomad 21:4541da183397 281 | DMA_DCR_D_REQ_MASK // clear ERQ on end of transfer
bikeNomad 21:4541da183397 282 | DMA_DCR_SINC_MASK // increment source each transfer
bikeNomad 21:4541da183397 283 | DMA_DCR_CS_MASK
bikeNomad 21:4541da183397 284 | DMA_DCR_SSIZE(0) // 32-bit source transfers
bikeNomad 21:4541da183397 285 | DMA_DCR_DSIZE(0); // 32-bit destination transfers
bikeNomad 21:4541da183397 286
bikeNomad 21:4541da183397 287 dma->DMA[DMA_CHAN_1_LOW].DCR = DMA_DCR_EINT_MASK // enable interrupt on end of transfer
bikeNomad 21:4541da183397 288 | DMA_DCR_ERQ_MASK
bikeNomad 21:4541da183397 289 | DMA_DCR_D_REQ_MASK // clear ERQ on end of transfer
bikeNomad 21:4541da183397 290 | DMA_DCR_CS_MASK
bikeNomad 21:4541da183397 291 | DMA_DCR_SSIZE(0) // 32-bit source transfers
bikeNomad 21:4541da183397 292 | DMA_DCR_DSIZE(0); // 32-bit destination transfers
bikeNomad 21:4541da183397 293
bikeNomad 21:4541da183397 294 dma->DMA[DMA_CHAN_START].DCR = DMA_DCR_EINT_MASK // enable interrupt on end of transfer
bikeNomad 21:4541da183397 295 | DMA_DCR_ERQ_MASK
bikeNomad 21:4541da183397 296 | DMA_DCR_D_REQ_MASK // clear ERQ on end of transfer
bikeNomad 21:4541da183397 297 | DMA_DCR_SINC_MASK // increment source each transfer
bikeNomad 21:4541da183397 298 | DMA_DCR_CS_MASK
bikeNomad 21:4541da183397 299 | DMA_DCR_SSIZE(0) // 32-bit source transfers
bikeNomad 21:4541da183397 300 | DMA_DCR_DSIZE(0);
bikeNomad 21:4541da183397 301
bikeNomad 21:4541da183397 302
bikeNomad 21:4541da183397 303 tpm->SC |= TPM_SC_CMOD(1); // enable internal clocking
bikeNomad 21:4541da183397 304 }
bikeNomad 21:4541da183397 305
bikeNomad 21:4541da183397 306 void WS2811::writePixel(unsigned n, uint8_t *p)
bikeNomad 21:4541da183397 307 {
bikeNomad 21:4541da183397 308 uint32_t *dest = dmaData.dmaWords + n * BITS_PER_RGB;
bikeNomad 21:4541da183397 309 writeByte(*p++, pinMask, dest + 0); // G
bikeNomad 21:4541da183397 310 writeByte(*p++, pinMask, dest + 8); // R
bikeNomad 21:4541da183397 311 writeByte(*p, pinMask, dest + 16); // B
bikeNomad 21:4541da183397 312 }
bikeNomad 21:4541da183397 313
bikeNomad 21:4541da183397 314 // class static
bikeNomad 21:4541da183397 315 void WS2811::writeByte(uint8_t byte, uint32_t mask, uint32_t *dest)
bikeNomad 21:4541da183397 316 {
bikeNomad 21:4541da183397 317 for (uint8_t bm = 0x80; bm; bm >>= 1)
bikeNomad 21:4541da183397 318 {
bikeNomad 21:4541da183397 319 // MSBit first
bikeNomad 21:4541da183397 320 if (byte & bm)
bikeNomad 21:4541da183397 321 *dest |= mask;
bikeNomad 21:4541da183397 322 else
bikeNomad 21:4541da183397 323 *dest &= ~mask;
bikeNomad 21:4541da183397 324 dest++;
bikeNomad 21:4541da183397 325 }
bikeNomad 21:4541da183397 326 }
bikeNomad 21:4541da183397 327
bikeNomad 21:4541da183397 328 void WS2811::begin()
bikeNomad 21:4541da183397 329 {
bikeNomad 21:4541da183397 330 blank();
bikeNomad 21:4541da183397 331 show();
bikeNomad 21:4541da183397 332 }
bikeNomad 21:4541da183397 333
bikeNomad 21:4541da183397 334 void WS2811::blank()
bikeNomad 21:4541da183397 335 {
bikeNomad 21:4541da183397 336 memset(pixels, 0x00, numPixelBytes());
bikeNomad 21:4541da183397 337
bikeNomad 21:4541da183397 338 #if DEBUG
bikeNomad 21:4541da183397 339 for (unsigned i = DMA_LEADING_ZEROS; i < DMA_LEADING_ZEROS + BITS_PER_RGB; i++)
bikeNomad 21:4541da183397 340 dmaData.dmaWords[i] = DEBUG_MASK;
bikeNomad 21:4541da183397 341 #else
bikeNomad 21:4541da183397 342 memset(dmaData.dmaWords, 0x00, sizeof(dmaData.dmaWords));
bikeNomad 21:4541da183397 343 #endif
bikeNomad 21:4541da183397 344 }
bikeNomad 21:4541da183397 345
bikeNomad 21:4541da183397 346 void WS2811::show()
bikeNomad 21:4541da183397 347 {
bikeNomad 21:4541da183397 348 hw_init();
bikeNomad 21:4541da183397 349
bikeNomad 21:4541da183397 350 uint16_t i, n = numPixels(); // 3 bytes per LED
bikeNomad 21:4541da183397 351 uint8_t *p = pixels;
bikeNomad 21:4541da183397 352 while (guardtime.read_us() < 50)
bikeNomad 21:4541da183397 353 {
bikeNomad 21:4541da183397 354 __NOP();
bikeNomad 21:4541da183397 355 }
bikeNomad 21:4541da183397 356
bikeNomad 21:4541da183397 357 for (i=0; i<n; i++ )
bikeNomad 21:4541da183397 358 {
bikeNomad 21:4541da183397 359 writePixel(i, p);
bikeNomad 21:4541da183397 360 p += 3;
bikeNomad 21:4541da183397 361 }
bikeNomad 21:4541da183397 362
bikeNomad 21:4541da183397 363 startDMA();
bikeNomad 21:4541da183397 364
bikeNomad 21:4541da183397 365 guardtime.reset();
bikeNomad 21:4541da183397 366 }
bikeNomad 21:4541da183397 367
bikeNomad 21:4541da183397 368 extern "C" void DMA0_IRQHandler()
bikeNomad 21:4541da183397 369 {
bikeNomad 21:4541da183397 370 DMA_Type volatile * dma = DMA0;
bikeNomad 21:4541da183397 371 TPM_Type volatile *tpm = TPM0;
bikeNomad 21:4541da183397 372
bikeNomad 21:4541da183397 373 uint32_t db = dma->DMA[DMA_CHAN_START].DSR_BCR;
bikeNomad 21:4541da183397 374 if (db & DMA_DSR_BCR_DONE_MASK)
bikeNomad 21:4541da183397 375 {
bikeNomad 21:4541da183397 376 dma->DMA[DMA_CHAN_START].DSR_BCR = DMA_DSR_BCR_DONE_MASK; // clear/reset DMA status
bikeNomad 21:4541da183397 377 }
bikeNomad 21:4541da183397 378
bikeNomad 21:4541da183397 379 db = dma->DMA[DMA_CHAN_0_LOW].DSR_BCR;
bikeNomad 21:4541da183397 380 if (db & DMA_DSR_BCR_DONE_MASK)
bikeNomad 21:4541da183397 381 {
bikeNomad 21:4541da183397 382 dma->DMA[DMA_CHAN_0_LOW].DSR_BCR = DMA_DSR_BCR_DONE_MASK; // clear/reset DMA status
bikeNomad 21:4541da183397 383 }
bikeNomad 21:4541da183397 384
bikeNomad 21:4541da183397 385 db = dma->DMA[DMA_CHAN_1_LOW].DSR_BCR;
bikeNomad 21:4541da183397 386 if (db & DMA_DSR_BCR_DONE_MASK)
bikeNomad 21:4541da183397 387 {
bikeNomad 21:4541da183397 388 dma->DMA[DMA_CHAN_1_LOW].DSR_BCR = DMA_DSR_BCR_DONE_MASK; // clear/reset DMA status
bikeNomad 21:4541da183397 389 dma_done = true;
bikeNomad 21:4541da183397 390 tpm->SC &= ~TPM_SC_CMOD_MASK; // disable internal clocking
bikeNomad 21:4541da183397 391 RESET_DEBUG;
bikeNomad 21:4541da183397 392 }
bikeNomad 21:4541da183397 393 }
bikeNomad 20:b9d76e567637 394