Brody Kellish / BurstSPI

port for ece459

Fork of BurstSPI by Erik -

BurstSPI_STM32F4.cpp@14:ea2354b66389, 2016-12-08 (annotated)

Committer:
bdk9
Date:
Thu Dec 08 20:00:29 2016 +0000
Revision:
14:ea2354b66389
Parent:
13:bc069279eb37 
port to f401re

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Sissors 13:bc069279eb37 1 #if defined(TARGET_STM32F4)
Sissors 13:bc069279eb37 2 #include "BurstSPI.h"
Sissors 13:bc069279eb37 3
Sissors 13:bc069279eb37 4 void BurstSPI::fastWrite(int data) {
Sissors 13:bc069279eb37 5
bdk9 14:ea2354b66389 6 SPI_TypeDef *spi = (SPI_TypeDef *)(&_spi.spi);
Sissors 13:bc069279eb37 7 // Check if data is transmitted
Sissors 13:bc069279eb37 8 while ((spi->SR & SPI_SR_TXE) == 0);
Sissors 13:bc069279eb37 9 spi->DR = data;
Sissors 13:bc069279eb37 10 }
Sissors 13:bc069279eb37 11
Sissors 13:bc069279eb37 12 void BurstSPI::clearRX( void ) {
Sissors 13:bc069279eb37 13 //Check if the RX buffer is busy
bdk9 14:ea2354b66389 14 SPI_TypeDef *spi = (SPI_TypeDef *)(&_spi.spi);
Sissors 13:bc069279eb37 15 //While busy, keep checking
Sissors 13:bc069279eb37 16 while (spi->SR & SPI_SR_BSY){
Sissors 13:bc069279eb37 17 // Check RX buffer readable
Sissors 13:bc069279eb37 18 while ((spi->SR & SPI_SR_RXNE) == 0);
Sissors 13:bc069279eb37 19 int dummy = spi->DR;
Sissors 13:bc069279eb37 20 }
Sissors 13:bc069279eb37 21 }
Sissors 13:bc069279eb37 22 #endif
Sissors 13:bc069279eb37 23