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Dependencies:   mbed libscpi

Committer:
wuliqunyy
Date:
Tue Jan 12 12:01:27 2021 +0000
Revision:
4:8d7322108eb7
Parent:
3:557d5725b1bb
Child:
5:daab0e0e67e2
Start Up register address corrected

Who changed what in which revision?

UserRevisionLine numberNew contents of line
wuliqunyy 0:fe3c7dde9771 1 #include "mbed.h"
wuliqunyy 0:fe3c7dde9771 2 #include "i2c_mbed_fpga.h"
wuliqunyy 0:fe3c7dde9771 3 //#include "serial_fsm.h"
wuliqunyy 0:fe3c7dde9771 4
wuliqunyy 0:fe3c7dde9771 5 /*Digital outputs*/
wuliqunyy 0:fe3c7dde9771 6 DigitalOut led1(LED1);
wuliqunyy 0:fe3c7dde9771 7 DigitalOut led2(LED2);
wuliqunyy 0:fe3c7dde9771 8 DigitalOut led3(LED3);
wuliqunyy 0:fe3c7dde9771 9 DigitalOut led4(LED4);
wuliqunyy 0:fe3c7dde9771 10 DigitalOut fpga_rstb(p21); //p21 of MBED is connectted to p4 of the FPGA CMOD for 90415FPGA_EVB2
wuliqunyy 0:fe3c7dde9771 11
wuliqunyy 0:fe3c7dde9771 12 /*Creat serial port to coummunicate with pc*/
wuliqunyy 3:557d5725b1bb 13 //Serial pc(USBTX, USBRX);
wuliqunyy 0:fe3c7dde9771 14
wuliqunyy 0:fe3c7dde9771 15 ///*Creat I2C master*/
wuliqunyy 0:fe3c7dde9771 16 I2C i2c_master(p9, p10);
wuliqunyy 0:fe3c7dde9771 17
wuliqunyy 3:557d5725b1bb 18 //void serial_init(){
wuliqunyy 3:557d5725b1bb 19 // pc.format(8, SerialBase::None, 1);
wuliqunyy 3:557d5725b1bb 20 // pc.baud(38400);
wuliqunyy 3:557d5725b1bb 21 //}
wuliqunyy 0:fe3c7dde9771 22
wuliqunyy 0:fe3c7dde9771 23 void i2c_init(){
wuliqunyy 2:9bdcd2c966de 24 i2c_master.frequency(35000);
wuliqunyy 0:fe3c7dde9771 25 }
wuliqunyy 0:fe3c7dde9771 26
wuliqunyy 0:fe3c7dde9771 27 void main_init(){
wuliqunyy 0:fe3c7dde9771 28 led1 = 1;
wuliqunyy 0:fe3c7dde9771 29 led2 = 0;
wuliqunyy 0:fe3c7dde9771 30 led3 = 0;
wuliqunyy 0:fe3c7dde9771 31 led4 = 0;
wuliqunyy 0:fe3c7dde9771 32
wuliqunyy 0:fe3c7dde9771 33 fpga_rstb = 0;
wuliqunyy 0:fe3c7dde9771 34
wuliqunyy 0:fe3c7dde9771 35 i2c_init();
wuliqunyy 3:557d5725b1bb 36 //serial_init();
wuliqunyy 3:557d5725b1bb 37
wuliqunyy 3:557d5725b1bb 38 //pc.printf("Mbed is ready!");
wuliqunyy 0:fe3c7dde9771 39 }
wuliqunyy 0:fe3c7dde9771 40
wuliqunyy 0:fe3c7dde9771 41 /* Main function */
wuliqunyy 0:fe3c7dde9771 42 int main() {
wuliqunyy 0:fe3c7dde9771 43
wuliqunyy 3:557d5725b1bb 44 //char i2cWriteTest[4] = {0x13, 0x8a, 0xac, 0x35};
wuliqunyy 3:557d5725b1bb 45 //char i2cReadTest[4] = {0x13, 0x8a, 0x00, 0x00};
wuliqunyy 3:557d5725b1bb 46
wuliqunyy 3:557d5725b1bb 47 //NV_POSITION
wuliqunyy 3:557d5725b1bb 48 #define NV_POSITION_DUTY (14 - 8)
wuliqunyy 3:557d5725b1bb 49 #define NV_POSITION_PULSE_TIME (9 - 8)
wuliqunyy 3:557d5725b1bb 50 #define NV_POSI_MAJO_VOTE (8 - 8)
wuliqunyy 3:557d5725b1bb 51 #define NV_ANTI_COG 7
wuliqunyy 3:557d5725b1bb 52 #define NV_FIRST_NON_FLAT_TIME 0
wuliqunyy 3:557d5725b1bb 53
wuliqunyy 3:557d5725b1bb 54 #define OTP_I2C_POSITIONPULSE_DATA_H (0x03 << NV_POSITION_DUTY) | (0x09 << NV_POSITION_PULSE_TIME) | (0x00 << NV_POSI_MAJO_VOTE)
wuliqunyy 3:557d5725b1bb 55 #define OTP_I2C_POSITIONPULSE_DATA_L (0x00 << NV_ANTI_COG) | (0x2c << NV_FIRST_NON_FLAT_TIME)
wuliqunyy 3:557d5725b1bb 56
wuliqunyy 3:557d5725b1bb 57 #define OTP_I2C_POSITIONPULSE_ADDR_H 0x13
wuliqunyy 3:557d5725b1bb 58 #define OTP_I2C_POSITIONPULSE_ADDR_L 0x82
wuliqunyy 3:557d5725b1bb 59 char i2cPositionPulseSetup[4] = {OTP_I2C_POSITIONPULSE_ADDR_H, OTP_I2C_POSITIONPULSE_ADDR_L, OTP_I2C_POSITIONPULSE_DATA_H,OTP_I2C_POSITIONPULSE_DATA_L};
wuliqunyy 3:557d5725b1bb 60
wuliqunyy 3:557d5725b1bb 61 //NV_START_UP
wuliqunyy 3:557d5725b1bb 62 #define NV_LONG_START (14 - 8)
wuliqunyy 3:557d5725b1bb 63 #define NV_SOFT_START (13 - 8)
wuliqunyy 3:557d5725b1bb 64 #define NV_COMM_START_NUM (11 - 8)
wuliqunyy 3:557d5725b1bb 65 #define NV_START_DUTY (9 - 8)
wuliqunyy 3:557d5725b1bb 66 #define NV_SOFT_STEP_SIZE 6
wuliqunyy 3:557d5725b1bb 67 #define NV_START_UP_TIME 0
wuliqunyy 3:557d5725b1bb 68
wuliqunyy 4:8d7322108eb7 69 #define OTP_I2C_STARTUP_DATA_H (0x00 << NV_SOFT_START) | (0x00 << NV_LONG_START) | (0x02 << NV_COMM_START_NUM) | (0x03 << NV_START_DUTY)
wuliqunyy 3:557d5725b1bb 70 #define OTP_I2C_STARTUP_DATA_L (0x03 << NV_SOFT_STEP_SIZE) | (0x24 << NV_START_UP_TIME)
wuliqunyy 3:557d5725b1bb 71
wuliqunyy 3:557d5725b1bb 72 #define OTP_I2C_STARTUP_ADDR_H 0x13
wuliqunyy 3:557d5725b1bb 73 #define OTP_I2C_STARTUP_ADDR_L 0x84
wuliqunyy 3:557d5725b1bb 74
wuliqunyy 3:557d5725b1bb 75 char i2cStartUpSetup[4] = {OTP_I2C_STARTUP_ADDR_H, OTP_I2C_STARTUP_ADDR_L, OTP_I2C_STARTUP_DATA_H, OTP_I2C_STARTUP_DATA_L};
wuliqunyy 3:557d5725b1bb 76
wuliqunyy 3:557d5725b1bb 77 //Start Motor
wuliqunyy 3:557d5725b1bb 78 #define OTP_MOTOR_START_ADDR_H 0x13
wuliqunyy 3:557d5725b1bb 79 #define OTP_MOTOR_START_ADDR_L 0xa4
wuliqunyy 3:557d5725b1bb 80 #define OTP_MOTOR_START_DATA_H 0xca
wuliqunyy 3:557d5725b1bb 81 #define OTP_MOTOR_START_DATA_L 0xfe
wuliqunyy 3:557d5725b1bb 82
wuliqunyy 3:557d5725b1bb 83 char i2cMotorStartSetup[4] = {OTP_MOTOR_START_ADDR_H, \
wuliqunyy 3:557d5725b1bb 84 OTP_MOTOR_START_ADDR_L, \
wuliqunyy 3:557d5725b1bb 85 OTP_MOTOR_START_DATA_H, \
wuliqunyy 3:557d5725b1bb 86 OTP_MOTOR_START_DATA_L};
wuliqunyy 2:9bdcd2c966de 87
wuliqunyy 3:557d5725b1bb 88 int ack;
wuliqunyy 0:fe3c7dde9771 89 main_init();
wuliqunyy 3:557d5725b1bb 90 wait_ms(2000); //reset the FPGA for 2s
wuliqunyy 3:557d5725b1bb 91 fpga_rstb = 1; //enable FPGA
wuliqunyy 3:557d5725b1bb 92 wait_ms(1);
wuliqunyy 4:8d7322108eb7 93
wuliqunyy 3:557d5725b1bb 94 //Postion Test Pulse setting
wuliqunyy 3:557d5725b1bb 95 char i2cPositionPulseRead[4] = {OTP_I2C_POSITIONPULSE_ADDR_H, \
wuliqunyy 3:557d5725b1bb 96 OTP_I2C_POSITIONPULSE_ADDR_L, \
wuliqunyy 3:557d5725b1bb 97 0x00, \
wuliqunyy 3:557d5725b1bb 98 0x00};
wuliqunyy 3:557d5725b1bb 99 int i = 3;
wuliqunyy 3:557d5725b1bb 100 while (i > 0) {
wuliqunyy 3:557d5725b1bb 101 wait_ms(1);
wuliqunyy 3:557d5725b1bb 102 ack+=i2c_word_write(i2c_master,i2cPositionPulseSetup);
wuliqunyy 3:557d5725b1bb 103 wait_ms(1);
wuliqunyy 3:557d5725b1bb 104 ack+=i2c_word_read(i2c_master,i2cPositionPulseRead);
wuliqunyy 3:557d5725b1bb 105 if( (i2cPositionPulseRead[1] == OTP_I2C_POSITIONPULSE_DATA_H) && (i2cPositionPulseRead[0] == OTP_I2C_POSITIONPULSE_DATA_L) ){
wuliqunyy 3:557d5725b1bb 106 i=0;
wuliqunyy 3:557d5725b1bb 107 led1 = 1;
wuliqunyy 3:557d5725b1bb 108 led2 = 0;
wuliqunyy 3:557d5725b1bb 109 }
wuliqunyy 3:557d5725b1bb 110 else{
wuliqunyy 3:557d5725b1bb 111 i--;
wuliqunyy 3:557d5725b1bb 112 led1 = 0;
wuliqunyy 3:557d5725b1bb 113 led2 = 1;
wuliqunyy 3:557d5725b1bb 114 fpga_rstb = 0; //disable FPGA
wuliqunyy 3:557d5725b1bb 115 };
wuliqunyy 3:557d5725b1bb 116 }
wuliqunyy 4:8d7322108eb7 117
wuliqunyy 3:557d5725b1bb 118
wuliqunyy 4:8d7322108eb7 119
wuliqunyy 3:557d5725b1bb 120
wuliqunyy 3:557d5725b1bb 121 //Start Up setting
wuliqunyy 4:8d7322108eb7 122 char i2cStartUpPulseRead[4] = {OTP_I2C_STARTUP_ADDR_H, \
wuliqunyy 4:8d7322108eb7 123 OTP_I2C_STARTUP_ADDR_L, \
wuliqunyy 3:557d5725b1bb 124 0x00, \
wuliqunyy 3:557d5725b1bb 125 0x00};
wuliqunyy 3:557d5725b1bb 126 i = 3;
wuliqunyy 3:557d5725b1bb 127 while (i > 0) {
wuliqunyy 3:557d5725b1bb 128 wait_ms(1);
wuliqunyy 3:557d5725b1bb 129 ack+=i2c_word_write(i2c_master,i2cStartUpSetup);
wuliqunyy 3:557d5725b1bb 130 wait_ms(1);
wuliqunyy 3:557d5725b1bb 131 ack+=i2c_word_read(i2c_master,i2cStartUpPulseRead);
wuliqunyy 3:557d5725b1bb 132 if( (i2cStartUpPulseRead[1] == OTP_I2C_STARTUP_DATA_H) && (i2cStartUpPulseRead[0] == OTP_I2C_STARTUP_DATA_L) ){
wuliqunyy 3:557d5725b1bb 133 i=0;
wuliqunyy 3:557d5725b1bb 134 led3 = 1;
wuliqunyy 3:557d5725b1bb 135 led4 = 0;
wuliqunyy 3:557d5725b1bb 136 }
wuliqunyy 3:557d5725b1bb 137 else{
wuliqunyy 3:557d5725b1bb 138 i--;
wuliqunyy 3:557d5725b1bb 139 led3 = 0;
wuliqunyy 3:557d5725b1bb 140 led4 = 1;
wuliqunyy 3:557d5725b1bb 141 fpga_rstb = 0; //disable FPGA
wuliqunyy 3:557d5725b1bb 142 };
wuliqunyy 3:557d5725b1bb 143 }
wuliqunyy 4:8d7322108eb7 144
wuliqunyy 3:557d5725b1bb 145
wuliqunyy 3:557d5725b1bb 146 //ack+=i2c_word_write(i2c_master,i2cMotorStartSetup);
wuliqunyy 0:fe3c7dde9771 147
wuliqunyy 0:fe3c7dde9771 148 while (1) {
wuliqunyy 3:557d5725b1bb 149 //char c = pc.getc();
wuliqunyy 3:557d5725b1bb 150 //if(c=='s'){
wuliqunyy 3:557d5725b1bb 151 //fpga_rstb = 0; //reset FPGA
wuliqunyy 3:557d5725b1bb 152 //wait_ms(3000);
wuliqunyy 3:557d5725b1bb 153 //fpga_rstb = 1; //enable FPGA
wuliqunyy 3:557d5725b1bb 154 //wait_ms(10);
wuliqunyy 0:fe3c7dde9771 155 //i2c_keyEntry(i2c_master);
wuliqunyy 3:557d5725b1bb 156 //ack+=i2c_word_write(i2c_master,i2cPositionPulseSetup);
wuliqunyy 3:557d5725b1bb 157 //wait_us(100);
wuliqunyy 3:557d5725b1bb 158 //ack+=i2c_word_read(i2c_master,i2cPositionPulseSetup);
wuliqunyy 3:557d5725b1bb 159 //ack+=i2c_word_write(i2c_master,i2cStartMotor);
wuliqunyy 3:557d5725b1bb 160 //wait_ms(10);
wuliqunyy 2:9bdcd2c966de 161 //ack+=i2c_word_read(i2c_master,i2cStartUpRead);
wuliqunyy 3:557d5725b1bb 162 //led1 = ack;
wuliqunyy 2:9bdcd2c966de 163 //pc.printf("d[0]=%2d\n",i2cStartUpRead[3]);
wuliqunyy 2:9bdcd2c966de 164 //pc.printf("d[1]=%2d\n",i2cStartUpRead[2]);
wuliqunyy 3:557d5725b1bb 165 //}
wuliqunyy 3:557d5725b1bb 166 //if(c=='t'){
wuliqunyy 3:557d5725b1bb 167 // fpga_rstb = 0; //disable FPGA
wuliqunyy 3:557d5725b1bb 168 // led1 = 0;
wuliqunyy 0:fe3c7dde9771 169
wuliqunyy 3:557d5725b1bb 170 //}
wuliqunyy 0:fe3c7dde9771 171 }
wuliqunyy 0:fe3c7dde9771 172
wuliqunyy 0:fe3c7dde9771 173
wuliqunyy 0:fe3c7dde9771 174
wuliqunyy 0:fe3c7dde9771 175 // fpga_rstb.write(1);
wuliqunyy 0:fe3c7dde9771 176 //
wuliqunyy 0:fe3c7dde9771 177 // wait_us(10000); //10ms
wuliqunyy 0:fe3c7dde9771 178 //
wuliqunyy 0:fe3c7dde9771 179 //// i2c_master.start();
wuliqunyy 0:fe3c7dde9771 180 //// wait_ms(200);
wuliqunyy 0:fe3c7dde9771 181 //// i2c_master.stop();
wuliqunyy 0:fe3c7dde9771 182 //
wuliqunyy 0:fe3c7dde9771 183 // ack+=i2c_keyEntry(i2c_master);
wuliqunyy 0:fe3c7dde9771 184 //
wuliqunyy 0:fe3c7dde9771 185 // //ack+=ctrPort_ReadActive(i2c_master);
wuliqunyy 0:fe3c7dde9771 186 // buff[0] = 0x00;
wuliqunyy 0:fe3c7dde9771 187 // buff[1] = 0x30;
wuliqunyy 0:fe3c7dde9771 188 // buff[2] = 0x00;
wuliqunyy 0:fe3c7dde9771 189 // buff[3] = 0x01;
wuliqunyy 0:fe3c7dde9771 190 //
wuliqunyy 0:fe3c7dde9771 191 // ack+=i2c_word_write(i2c_master, buff);
wuliqunyy 0:fe3c7dde9771 192 // buff[0] = 0x00;
wuliqunyy 0:fe3c7dde9771 193 // buff[1] = 0x0A;
wuliqunyy 0:fe3c7dde9771 194 // buff[2] = 0x00;
wuliqunyy 0:fe3c7dde9771 195 // buff[3] = 0x00;
wuliqunyy 0:fe3c7dde9771 196 //
wuliqunyy 0:fe3c7dde9771 197 // ack+=i2c_word_read(i2c_master, buff);
wuliqunyy 0:fe3c7dde9771 198 //
wuliqunyy 0:fe3c7dde9771 199 // wait_us(100);
wuliqunyy 0:fe3c7dde9771 200 //
wuliqunyy 0:fe3c7dde9771 201 // pc.printf("d[0]=%2d\n", buff[3]);
wuliqunyy 0:fe3c7dde9771 202 // pc.printf("d[1]=%2d\n", buff[2]);
wuliqunyy 0:fe3c7dde9771 203 // pc.printf("ack=%2d\n", ack);
wuliqunyy 0:fe3c7dde9771 204 // pc.printf("endl\n");
wuliqunyy 0:fe3c7dde9771 205 //
wuliqunyy 0:fe3c7dde9771 206 //
wuliqunyy 0:fe3c7dde9771 207 // while (1) {
wuliqunyy 0:fe3c7dde9771 208 // led1 = !led1;
wuliqunyy 0:fe3c7dde9771 209 // wait(1);
wuliqunyy 0:fe3c7dde9771 210 // }
wuliqunyy 0:fe3c7dde9771 211 }