Anand Tamariya / mbed

Support for MSP430 launchpad.

Fork of mbed by mbed official

LPC2368/PinNames.h@59:0883845fe643, 2013-02-18 (annotated)

Committer:
emilmont
Date:
Mon Feb 18 11:12:58 2013 +0000
Revision:
59:0883845fe643
Parent:
55:d722ed6a4237 
Add pinmap NC terminators for LPC1768 CAN.

Update the license from MIT to Apache v2.

Make the semihost code target independent using opportune defines for the UID and MAC.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 44:24d45a770a51 1 /* mbed Microcontroller Library
emilmont 54:71b101360fb9 2 * Copyright (c) 2006-2013 ARM Limited
emilmont 44:24d45a770a51 3 *
emilmont 59:0883845fe643 4 * Licensed under the Apache License, Version 2.0 (the "License");
emilmont 59:0883845fe643 5 * you may not use this file except in compliance with the License.
emilmont 59:0883845fe643 6 * You may obtain a copy of the License at
emilmont 59:0883845fe643 7 *
emilmont 59:0883845fe643 8 * http://www.apache.org/licenses/LICENSE-2.0
emilmont 44:24d45a770a51 9 *
emilmont 59:0883845fe643 10 * Unless required by applicable law or agreed to in writing, software
emilmont 59:0883845fe643 11 * distributed under the License is distributed on an "AS IS" BASIS,
emilmont 59:0883845fe643 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
emilmont 59:0883845fe643 13 * See the License for the specific language governing permissions and
emilmont 59:0883845fe643 14 * limitations under the License.
emilmont 44:24d45a770a51 15 */
emilmont 44:24d45a770a51 16
emilmont 44:24d45a770a51 17 #ifndef MBED_PINNAMES_H
emilmont 44:24d45a770a51 18 #define MBED_PINNAMES_H
emilmont 44:24d45a770a51 19
emilmont 44:24d45a770a51 20 #include "cmsis.h"
emilmont 44:24d45a770a51 21
emilmont 44:24d45a770a51 22 #ifdef __cplusplus
emilmont 44:24d45a770a51 23 extern "C" {
emilmont 55:d722ed6a4237 24 #endif
emilmont 44:24d45a770a51 25
emilmont 44:24d45a770a51 26 typedef enum {
emilmont 44:24d45a770a51 27 PIN_INPUT,
emilmont 44:24d45a770a51 28 PIN_OUTPUT
emilmont 44:24d45a770a51 29 } PinDirection;
emilmont 44:24d45a770a51 30
emilmont 44:24d45a770a51 31 #define PORT_SHIFT 5
emilmont 44:24d45a770a51 32
emilmont 44:24d45a770a51 33 typedef enum {
emilmont 44:24d45a770a51 34 // LPC Pin Names
emilmont 44:24d45a770a51 35 P0_0 = LPC_GPIO0_BASE,
emilmont 44:24d45a770a51 36 P0_1, P0_2, P0_3, P0_4, P0_5, P0_6, P0_7, P0_8, P0_9, P0_10, P0_11, P0_12, P0_13, P0_14, P0_15, P0_16, P0_17, P0_18, P0_19, P0_20, P0_21, P0_22, P0_23, P0_24, P0_25, P0_26, P0_27, P0_28, P0_29, P0_30, P0_31,
emilmont 44:24d45a770a51 37 P1_0, P1_1, P1_2, P1_3, P1_4, P1_5, P1_6, P1_7, P1_8, P1_9, P1_10, P1_11, P1_12, P1_13, P1_14, P1_15, P1_16, P1_17, P1_18, P1_19, P1_20, P1_21, P1_22, P1_23, P1_24, P1_25, P1_26, P1_27, P1_28, P1_29, P1_30, P1_31,
emilmont 44:24d45a770a51 38 P2_0, P2_1, P2_2, P2_3, P2_4, P2_5, P2_6, P2_7, P2_8, P2_9, P2_10, P2_11, P2_12, P2_13, P2_14, P2_15, P2_16, P2_17, P2_18, P2_19, P2_20, P2_21, P2_22, P2_23, P2_24, P2_25, P2_26, P2_27, P2_28, P2_29, P2_30, P2_31,
emilmont 44:24d45a770a51 39 P3_0, P3_1, P3_2, P3_3, P3_4, P3_5, P3_6, P3_7, P3_8, P3_9, P3_10, P3_11, P3_12, P3_13, P3_14, P3_15, P3_16, P3_17, P3_18, P3_19, P3_20, P3_21, P3_22, P3_23, P3_24, P3_25, P3_26, P3_27, P3_28, P3_29, P3_30, P3_31,
emilmont 44:24d45a770a51 40 P4_0, P4_1, P4_2, P4_3, P4_4, P4_5, P4_6, P4_7, P4_8, P4_9, P4_10, P4_11, P4_12, P4_13, P4_14, P4_15, P4_16, P4_17, P4_18, P4_19, P4_20, P4_21, P4_22, P4_23, P4_24, P4_25, P4_26, P4_27, P4_28, P4_29, P4_30, P4_31,
emilmont 55:d722ed6a4237 41
emilmont 44:24d45a770a51 42 // mbed DIP Pin Names
emilmont 55:d722ed6a4237 43 p5 = P0_9,
emilmont 44:24d45a770a51 44 p6 = P0_8,
emilmont 44:24d45a770a51 45 p7 = P0_7,
emilmont 44:24d45a770a51 46 p8 = P0_6,
emilmont 44:24d45a770a51 47 p9 = P0_0,
emilmont 44:24d45a770a51 48 p10 = P0_1,
emilmont 44:24d45a770a51 49 p11 = P0_18,
emilmont 44:24d45a770a51 50 p12 = P0_17,
emilmont 44:24d45a770a51 51 p13 = P0_15,
emilmont 44:24d45a770a51 52 p14 = P0_16,
emilmont 44:24d45a770a51 53 p15 = P0_23,
emilmont 44:24d45a770a51 54 p16 = P0_24,
emilmont 44:24d45a770a51 55 p17 = P0_25,
emilmont 44:24d45a770a51 56 p18 = P0_26,
emilmont 44:24d45a770a51 57 p19 = P1_30,
emilmont 44:24d45a770a51 58 p20 = P1_31,
emilmont 44:24d45a770a51 59 p21 = P2_5,
emilmont 44:24d45a770a51 60 p22 = P2_4,
emilmont 44:24d45a770a51 61 p23 = P2_3,
emilmont 44:24d45a770a51 62 p24 = P2_2,
emilmont 44:24d45a770a51 63 p25 = P2_1,
emilmont 44:24d45a770a51 64 p26 = P2_0,
emilmont 44:24d45a770a51 65 p27 = P0_11,
emilmont 44:24d45a770a51 66 p28 = P0_10,
emilmont 44:24d45a770a51 67 p29 = P0_5,
emilmont 44:24d45a770a51 68 p30 = P0_4,
emilmont 55:d722ed6a4237 69
emilmont 44:24d45a770a51 70 // Other mbed Pin Names
emilmont 44:24d45a770a51 71 LED1 = P1_18,
emilmont 44:24d45a770a51 72 LED2 = P1_20,
emilmont 44:24d45a770a51 73 LED3 = P1_21,
emilmont 44:24d45a770a51 74 LED4 = P1_23,
emilmont 55:d722ed6a4237 75
emilmont 44:24d45a770a51 76 USBTX = P0_2,
emilmont 44:24d45a770a51 77 USBRX = P0_3,
emilmont 55:d722ed6a4237 78
emilmont 44:24d45a770a51 79 // Not connected
emilmont 44:24d45a770a51 80 NC = (int)0xFFFFFFFF
emilmont 44:24d45a770a51 81 } PinName;
emilmont 44:24d45a770a51 82
emilmont 44:24d45a770a51 83 typedef enum {
emilmont 44:24d45a770a51 84 PullUp = 0,
emilmont 44:24d45a770a51 85 PullDown = 3,
emilmont 44:24d45a770a51 86 PullNone = 2,
emilmont 44:24d45a770a51 87 OpenDrain = 4
emilmont 44:24d45a770a51 88 } PinMode;
emilmont 44:24d45a770a51 89
emilmont 44:24d45a770a51 90 // version of PINCON_TypeDef using register arrays
emilmont 44:24d45a770a51 91 typedef struct {
emilmont 44:24d45a770a51 92 __IO uint32_t PINSEL[11];
emilmont 44:24d45a770a51 93 uint32_t RESERVED0[5];
emilmont 44:24d45a770a51 94 __IO uint32_t PINMODE[10];
emilmont 44:24d45a770a51 95 } PINCONARRAY_TypeDef;
emilmont 44:24d45a770a51 96
emilmont 44:24d45a770a51 97 #define PINCONARRAY ((PINCONARRAY_TypeDef *)LPC_PINCON_BASE)
emilmont 44:24d45a770a51 98
emilmont 44:24d45a770a51 99 #ifdef __cplusplus
emilmont 44:24d45a770a51 100 }
emilmont 44:24d45a770a51 101 #endif
emilmont 44:24d45a770a51 102
emilmont 44:24d45a770a51 103 #endif