Bluetooth enabled control of a BLDC via the Allegro MicroSystems A4960.

Dependencies:   BLE_API mbed nRF51822

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a4960.h

00001 #ifndef _A4960_H_
00002 #define _A4960_H_
00003 
00004 #include "mbed.h"
00005 #include "spi_master.h"
00006 
00007 class a4960
00008 {
00009 public:
00010     a4960();
00011     void SPI_init();
00012     void write_to_a4960(uint8_t addr, uint16_t msg);
00013     void write_run();
00014     void write_brake();
00015     bool motor_started;
00016     float PWM_freq; // Hz
00017     float PWM_duty; // 0 to 1
00018 private:
00019 // the default configurations of the 8 a4960 registers
00020 // 0. Config0: basic timing settings
00021 //      CB(2 bits) comm. blank time
00022 //      BT (4 bits) blank time in 400ns increments
00023 //      DT (6 bits) dead time in 50ns increments
00024 // 1. Config1: basic voltage settings
00025 //      VR (4 bits) current limit reference voltage as ratio of Vref
00026 //      VT (6 bits) drain-source thresh. voltage in 25 mV increments
00027 // 2. Config2: PWM settings
00028 //      PT (5 bits) off-time for PWM current control, limits motor current
00029 // 3. Config3: start-up hold settings
00030 //      IDS (1 bit) select current control or duty cycle control for init. holding torque
00031 //      HQ (4 bits) holding torque for initial start position
00032 //                  hold current or duty cycle in increments of 6.25%
00033 //      HT (4 bits) hold time of init. start position, increments of 8ms from 2ms
00034 // 4. Config4: start-up timing settings
00035 //      EC (4 bits) end comm. time in incr. of 200us
00036 //      SC (4 bits) start comm. time in incr. of 8ms
00037 // 5. Config5: start-up ramp settings
00038 //      PA (4 bits) phase advance in incr. of 1.875 deg
00039 //      RQ (4 bits) torque during ramp up (duty cycle or current control dep. on IDS) in 6.25% incr.
00040 //      RR (4 bits) accel. rate during forced comm. ramp up
00041 // 6. Mask: fault masking bit for each fault bit in Diagnostic register
00042 //      each bit: 1 means diagnostic is diabled
00043 // 7. Run: bits to set running conditions
00044 //      BH (2 bits) select BEMF hysteresis
00045 //      BW (3 bits) BEMF window
00046 //      ESF (1 bit) enable stop on fault
00047 //      DG (2 bits) select output routed to DIAG terminal, default general fault output flag (low if fault detected)
00048 //      RSC (1 bit) 1 to enable restart after loss of sync if RUN 1, BRK 0, else coast to stop
00049 //      BRK (1 bit) brake control
00050 //      DIR (1 bit) direction control
00051 //      RUN (1 bit) run control
00052     uint16_t _config[8];
00053     SPIClass SPI;
00054     DigitalOut _cs_pin;
00055     DigitalOut _blink_pin;
00056     PwmOut _PWM_pin;
00057 };
00058 
00059 #endif