Update History
V1.4.0
/ 16-December-2016Main changes
- Maintenance release to fix known defects and
enhancements implementation
HAL Drivers changes -
Enhance HAL delay and time base implementation:
- Add
new templates
stm32f0xx_hal_timebase_rtc_alarm_template.c, stm32f0xx_hal_timebase_rtc_wakeup_template.c
and stm32f0xx_hal_timebase_tim_template.c which can be used to override
the native
HAL time base functions (defined as weak) to use either RTC or
Timer as time
base tick source. For more details about the usage of these drivers,
please refer to HAL\HAL_TimeBase examples and FreeRTOS-based applications
- The following changes done on the HAL drivers require an update on the application code based on HAL V1.3.0
- HAL CEC driver: Overall driver rework with compatibility break versus previous HAL version
- Remove HAL CEC polling Process functions: HAL_CEC_Transmit() and HAL_CEC_Receive()
- Remove
HAL CEC receive interrupt process function HAL_CEC_Receive_IT()
and enable the "receive" mode during the Init phase
- Rename HAL_CEC_GetReceivedFrameSize() funtion to HAL_CEC_GetLastReceivedFrameSize()
- Add new HAL APIs: HAL_CEC_SetDeviceAddress() and HAL_CEC_ChangeRxBuffer()
- Remove the 'InitiatorAddress'
field from the CEC_InitTypeDef structure and manage
it as a parameter in the HAL_CEC_Transmit_IT() function
- Add new parameter 'RxFrameSize' in HAL_CEC_RxCpltCallback() function
- Move CEC Rx buffer pointer from CEC_HandleTypeDef structure to CEC_InitTypeDef structure
- HAL TIM driver : add one field (AutoReloadPreload) in TIM_Base_InitTypeDef structure
- HAL Generic
- Update HAL Driver compliancy with:
- MISRA C 2004 rule 10.6 ('U' suffix applied to all constants of 'unsigned' type)
- HAL CEC
- Overall driver rework with break of compatibility with HAL V1.3.0
- Remove the HAL CEC polling Process: HAL_CEC_Transmit() and HAL_CEC_Receive()
- Remove the HAL CEC receive interrupt process (HAL_CEC_Receive_IT()) and manage the "Receive" mode enable within the Init phase
- Rename HAL_CEC_GetReceivedFrameSize() function to HAL_CEC_GetLastReceivedFrameSize() function
- Add new HAL APIs: HAL_CEC_SetDeviceAddress() and HAL_CEC_ChangeRxBuffer()
- Remove the 'InitiatorAddress'
field from the CEC_InitTypeDef structure and manage
it as a parameter in the HAL_CEC_Transmit_IT() function
- Add new parameter 'RxFrameSize' in HAL_CEC_RxCpltCallback() function
- Move CEC Rx buffer pointer from CEC_HandleTypeDef structure to CEC_InitTypeDef structure
- Update driver to implement the new CEC state machine:
- Add new "rxState" field in CEC_HandleTypeDef structure to provide the CEC state information related to Rx Operations
- Rename "state" field in CEC_HandleTypeDef structure to "gstate": CEC state information related to global Handle management and Tx Operations
- Update CEC process to manage the new CEC states.
- Update __HAL_CEC_RESET_HANDLE_STATE() macro to handle the new CEC state parameters (gState, rxState)
- HAL UART/USART/IRDA/SMARTCARD
- IRQ Handler global optimization
- New abort API: HAL_PPP_Abort(), HAL_PPP_Abort_IT()
- Add error management in case of DMA transfer through
HAL_DMA_Abort_IT() and DMA XferAbortCallback()
- Polling management update:
- The user Timeout value must be estimated for the overall process
duration
- HAL SPI
- Overall driver optimization to improve performance in polling/interrupt mode to reach maximum peripheral frequency
- Polling mode:
- Replace the use of SPI_WaitOnFlagUnitTimeout() function by "if" statement to check on RXNE/TXE flage while transferring data
- Interrupt mode:
- Minimize access on SPI registers
- All modes:
- Add the USE_SPI_CRC switch to minimize the number of statements when CRC calculation is disabled
- Update timeout management to check on global processes
- Update error code management in all processes
- Fix regression in polling mode:
- Add preparing data to transmit in case of slave mode in HAL_SPI_TransmitReceive() and HAL_SPI_Transmit()
- Fix regression in interrupt mode:
- Add a wait on TXE flag in SPI_CloseTx_ISR() and in SPI_CloseTxRx_ISR()
- Add to manage properly the overrun flag in SPI_CloseRxTx_ISR() and SPI_CloseRx_ISR()
- Prevent data packing mode
in reception for STM32F302xC, STM32F303xC, STM32F373xC, STM32F358xx, STM32F378xx
- Add check of DMA handle definition before calling HAL_SPI_Receive_DMA, HAL_SPI_Transmit_DMA, HAL_SPI_TransmitReceive_DMA
- Updated HAL Driver compliancy with MISRA C 2004 rules:
- MISRA C 2004 rule 14.3 (a null statement shall only occur on a line by itself).
- MISRA C 2004 rule 14.8 (statement forming the body of a switch, while, do … while or for statement shall be a compound statement).
- HAL DMA
- Global
driver code optimization to reduce memory footprint
- Add
new APIs HAL_DMA_RegisterCallback() and HAL_DMA_UnRegisterCallback to
register/unregister the different callbacks identified by the enum
typedef HAL_DMA_CallbackIDTypeDef
- Add
new Error Code HAL_DMA_ERROR_NOT_SUPPORTED
- Remove
DMA HAL_DMA_STATE_READY_HALF & HAL_DMA_STATE_ERROR states in
HAL_DMA_StateTypeDef
- HAL I2C
- Disable I2C_OARx_EN bit before any configuration in OAR1 or 2 in HAL_I2C_Init()
- Move I2C_NO_OPTION_FRAME in private section
- Update IS_I2C_FASTMODEPLUS macro. Add I2C_FMP_NOT_SUPPORTED definition
- Update HAL_I2C_Master_Sequential_Transmit_IT() function (wrong state check)
- Add I2C_FIRST_AND_NEXT_FRAME option for I2C Sequential Transfer
- On slave, reset LISTEN_TX state in case of direction change
- Remove GCC warnings
- HAL TIM
- API update : add one field (AutoReloadPreload) in TIM_Base_InitTypeDef structure in order to set ARPE
bit from TIMx_CR1 register
- New
API : add 2 macros (__HAL_TIM_ENABLE_OCxPRELOAD() and
__HAL_TIM_DISABLE_OCxPRELOAD()) in order to set OCxPE bit
from TIMx_CCMR1, TIMx_CCMR2 and TIMx_CCMR3 registers
- Use MODIFY_REG macro to avoid wrong initialisation in ConfigBreakDeadTime()
- Add TIM1 ETR remap enums for STM32F334xx devices
- HAL_TIMEx_RemapConfig() prototype changed for STM32F334x8 device
- Remove
TIM_CR2_OIS2N, TIM_CR2_OIS3, TIM_CR2_OIS3N, TIM_CR2_OIS4 managment for STM32F373xC and STM32F378xx devices
- API update : Add __HAL_TIM_MOE_DISABLE_UNCONDITIONALLY() function to disable MOE bit without condition
- HAL SMBUS
- Remove useless XferSize field initialisation in HAL_SMBUS_Slave_Transmit_IT()
- Add
support of Zone read/write feature thanks to new XferOptions parameter
values SMBUS_OTHER_FRAME_NO_PEC, SMBUS_OTHER_FRAME_WITH_PEC,
SMBUS_OTHER_AND_LAST_FRAME_NO_PEC and
SMBUS_OTHER_AND_LAST_FRAME_WITH_PEC
- HAL
PCD
- Updated HAL Driver compliancy with MISRA C 2004 rules : (10.3, 105)
- MISRA C 2004 rule 10.3 (illegal explicit conversion from underlying MISRA type "unsigned int" to "uint32_t *").
- MISRA C 2004 rule 10.5 (bitwise operators ~ and <<).
- MISRA C 2004 rule 12.7 (bitwise operations not performed on signed integer types).
- HAL PWR
- Rename PWR_CR register defines to be aligned with STM32F3xx Reference Manual : SDADCxEN ==> ENSDx
- HAL RCC
- Rename RCC_CFGR register defines to be aligned with STM32F3xx Reference Manual : SDADCPRE ==> SDPRE
- HAL CORTEX
- Update HAL_MPU_Disable() to clear the whole control register. Also remove STATIC INLINE and move function to c file
- HAL CAN
- Add __HAL_UNLOCK() call when all mailboxes are busy
- Add __HAL_CAN_CANCEL_TRANSMIT() call to abort transmission when timeout is reached
- HAL ADC
- Add ADC_EXTERNALTRIGINJECCONV_T2_CC1 and ADC_EXTERNALTRIGINJECCONV_T2_TRGO definitions
LL Drivers changes - LL COMP
- Creation of generic defines for defines specific to COMP instances
- Modify definition of LL_COMP_OUTPUT_TIM4_IC2_COMP4, LL_COMP_OUTPUT_TIM4_IC3_COMP5 and LL_COMP_OUTPUT_TIM4_IC4_COMP6 literals
- Rename
LL_COMP_OUTPUT_TIM1_IC4_COMP2 and LL_COMP_OUTPUT_TIM1_IC4_COMP1_2 in
LL_COMP_OUTPUT_TIM2_IC4_COMP2 and LL_COMP_OUTPUT_TIM2_IC4_COMP1_2
- Correct COMP inputs definition
- LL EXTI
- Move
LL_EXTI_LINE_18, LL_EXTI_LINE_33, LL_EXTI_LINE_34, LL_EXTI_LINE_35,
LL_EXTI_LINE_36, LL_EXTI_LINE_37, LL_EXTI_LINE_38 and LL_EXTI_LINE_39
defines under compilation switch (availability depends on devices)
- LL PWR
- Rename PWR_CR register defines to be aligned with STM32F3xx Reference Manual : SDADCxEN ==> ENSDx
- LL RCC
- Rename RCC_CFGR register defines to be aligned with STM32F3xx Reference Manual : SDADCPRE ==> SDPRE
- LL SYSTEM
- Add LL_SYSCFG_EnableIT_FPU_xxx functions
- Replace
LL_SYSCFG_TIM18_RMP_DMA2_CH4 and LL_SYSCFG_TIM18_RMP_DMA1_CH4 by
LL_SYSCFG_TIM18_RMP_DMA2_CH5 and LL_SYSCFG_TIM18_RMP_DMA1_CH5
- LL GPIO
- Remove LL_GPIO_SPEED_FREQ_VERY_HIGH (GPIO_SPEED_FREQ_VERY_HIGH does not exist for STM32F3xx serie)
- LL_TIM
- Rename
LL_TIM_TIM16_TI1_RMP defines : LL_TIM_TIM16_TI1_RMP_GPIO,
LL_TIM_TIM16_TI1_RMP_RTC, LL_TIM_TIM16_TI1_RMP_HSE_32,
LL_TIM_TIM16_TI1_RMP_MCO
- Remove
TIM_CR2_OIS2N, TIM_CR2_OIS3, TIM_CR2_OIS3N, TIM_CR2_OIS4 managment for STM32F373xC and STM32F378xx devices
- Move
LL_TIM_OCREF_CLR_INT_OCREF_CLR and LL_TIM_OCREF_CLR_INT_ETR
defines under compilation switch (availability depends on devices)
- New APIs to insure BDTR register initialization in a single write operation
- LL_TIM_BDTR_StructInit()
- LL_TIM_BDTR_Init()
- LL USART
- Replace POSITION_VAL(xxx) macro by corresponding CMSIS_Pos definitions
- LL HRTIM
- Replace POSITION_VAL(xxx) macro by corresponding CMSIS_Pos definitions
- Add shift operation in HRTIM_TIM_SetCompareMode()
- LL_I2C
- Replace POSITION_VAL(xxx) macro by corresponding CMSIS_Pos definitions
V1.3.0
/ 12-Sept-2014Main
Changes
- First official
release of STM32F3xx HAL drivers for STM32F303xE,
STM32F302xE and STM32F398xx
devices.
- HAL generic update
- Add support of new
devices STM32F302xE and STM32F398xx in STM32F3xx HAL drivers
- HAL ADC
- Empty weak function
return HAL_ERROR
- Macro IS_SYSTICK_CLKSOURCE
renamed IS_SYSTICK_CLK_SOURCE
- HAL DAC
- Empty weak function
return HAL_ERROR
- HAL IWDG
- Minor updates (HAL coding rules)
- HAL PCD
- Changed IN/OUT
EndPoint parameter array size (PCD Handle Structure)
- HAL RCC
- RCC_MCOSOURCE_PLLCLK_DIV1
define added to RCC_MCO_Clock_Source defgroup for the following devices: STM32F302xE,
STM32F303xE, STM32F398xx, STM32F303x8, STM32F328xx, STM32F301x8, STM32F302x8
and STM32F318xx
- HAL SPI
- Removed HAL_
prefix from static function names
- HAL TIM
- Checked
DeadTime value in debug mode
- Add new macros __HAL_TIM_URS_ENABLE() and __HAL_TIM_URS_DISABLE()
- HAL WWDG
- Minor updates (HAL coding
rules)
- Added macro __HAL_WWDG_CLEAR_IT()
- Use MODIFY_REG() macro to set Prescaler, Window and Counter registers within HAL_WWDG_Init()
V1.1.0RC2
/ 25-August-2014Main
Changes
- HAL generic update
- General improvement of
Doxygen Tags for CHM UM generation
- Add support of new
devices STM32F303xE in STM32F3xx HAL driver
- HAL update (for STM32F303xE)
- Add new defines for ADC
trigger remapping (HAL_REMAPADCTRIGGER_x)
- Add new defines for CCM
RAM page write protection (up to 16 pages can be write protected)
- Add new macro IS_HAL_REMAPADCTRIGGER()
- Updated macro IS_HAL_SYSCFG_WP_PAGE
()
- Add new macros to
freeze/unfreeze TIM20 in debug mode: __HAL_FREEZE_TIM20_DBGMCU() and __HAL_UNFREEZE_TIM20_DBGMCU()
- Add new macro to remap
the FMC banks 1 and 2 at 0x00000000 : __HAL_FMC_BANK()
- Add new macros to
enable/disable ADC trigger remapping: __HAL_REMAPADCTRIGGER_ENABLE() and __HAL_REMAPADCTRIGGER_DISABLE()
- HAL ADC update (for STM32F303xE)
- Add new defines for TIM20
related ADC external triggers for regular groups (ADC_EXTERNALTRIGCONV_T20_x)
- Add new defines for TIM20
related ADC external triggers for injected groups (ADC_EXTERNALTRIGINJECCONV_T20_x)
- Updated macro __HAL_ADC_CFGR_EXTSEL() to take into account TIM20 related ADC
triggers for regular channels
- Updated macro __HAL_ADC_JSQR_JEXTSEL() to take into account TIM20 related ADC
triggers for injected channels
- HAL COMP update
- Missing assert param IS_COMP_TRIGGERMODE
- Add new defines for comparator output redirection: COMP_OUTPUT_TIM20BKIN,
COMP_OUTPUT_TIM20BKIN2, COMP_OUTPUT_TIM1BKIN2_TIM8BKIN2_TIM20BKIN2 and COMP_OUTPUT_TIM20OCREFCLR
- HAL FLASH update (for STM32F303xE)
- Add
new defines for write protection of pages 32 to 61 and 62-263 (OB_WRP_PAGESxxTOyy)
- HAL GPIO update (for STM32F303xE)
- Add
new defines for TIM20 and FMC related AF: GPIO_AF2_TIM20, GPIO_AF3_TIM20, GPIO_AF6_TIM20 and
GPIO_AF12_FMC
- TC enabled and TXE disabled at the end of TX in IT
mode
- HAL HAL NAND (STM32F303xE specific)
- FMC: generic
firmware to drive NAND memories mounted as external device
- HAL NOR (STM32F303xE specific)
- FMC: generic
firmware to drive NOR memories mounted as external device
- HAL PCCARD (STM32F303xE specific)
- FMC: generic
firmware to drive PCCARD memories mounted as external device
- Add
new macros __HAL_USB_EXTI_GET_FLAG() , __HAL_USB_EXTI_CLEAR_FLAG(), __HAL_USB_EXTI_SET_RISING_EDGE_TRIGGER(),
__HAL_USB_EXTI_SET_FALLING_EDGE_TRIGGER() and _HAL_USB_EXTI_SET_FALLINGRISING_TRIGGER()
- PVD feature need falling/rising Event modes
- Rename defines:
- PWR_MODE_EVT to PWR_PVD_MODE_NORMAL
- PWR_MODE_IT_RISING to PWR_PVD_MODE_IT_RISING
- PWR_MODE_IT_FALLING to PWR_PVD_MODE_IT_FALLING
- PWR_MODE_IT_RISING_FALLING to PWR_PVD_MODE_IT_RISING_FALLING
- PWR_MODE_IT_RISING to PWR_PVD_MODE_IT_RISING
- Add new
defines: PWR_PVD_MODE_EVENT_RISING, PWR_PVD_MODE_EVENT_FALLING and
PWR_PVD_MODE_EVENT_RISING_FALLING
- Changed
__HAL_PVD_EXTI_ENABLE_IT() macro
definition: __EXTILINE__ argument no longer needed
(PWR_EXTI_LINE_PVD is used implicitly)
- Changed
__HAL_PVD_EXTI_DISABLE_IT() macro definition: __EXTILINE__ argument no
longer needed (PWR_EXTI_LINE_PVD is used implicitly)
- Changed
__HAL_PVD_EXTI_GET_FLAG () macro definition: __EXTILINE__ argument no
longer needed (PWR_EXTI_LINE_PVD is used implicitly)
- Changed
_HAL_PVD_EXTI_CLEAR_FLAG () macro definition: __EXTILINE__ argument no
longer needed (PWR_EXTI_LINE_PVD is used implicitly)
- Add
new macros __HAL_PWR_PVD_EXTI_ENABLE_EVENT(),
__HAL_PWR_PVD_EXTI_DISABLE_EVENT(),
__HAL_PWR_PVD_EXTI_CLEAR_EGDE_TRIGGER(),
__HAL_PWR_PVD_EXTI_SET_FALLING_EGDE_TRIGGER() and
__HAL_PWR_PVD_EXTI_SET_RISING_EDGE_TRIGGER()
- HAL RCC update (for STM32F303xE)
- RCC_OcsInitTypeDef and RCC_PLLInitTypeDef definitions are now product dependent:
- STM32F303xE:
- Added PREDIV field to RCC_PLLInitTypeDef: used to set the
desired pre-division factor whatever the PLL clock source is (HSI or HSE).
- Removed field HSEPredivValue from RCC_OscInitTypeDef (replaced by PREDIV field in RCC_PLLInitTypeDef)
- Other F3 products: no change in RCC_OcsInitTypeDef and RCC_PLLInitTypeDef definitions
- Add new definition of RCC_PeriphCLKInitTypeDef to fit STM32F303xE clock selection capabilities (e.g select TIM20
clock source)
- Add new defines to select the pre-division factor (RCC_PREDIV_DIVx)
- Add new defines to set TIM20 clock source (RCC_PERIPHCLK_TIM20, RCC_TIM20CLK_HCLK and
RCC_TIM20CLK_PLLCLK)
- Add new defnes to set TIM3 & TIM4 clock source (RCC_PERIPHCLK_TIM34, RCC_TIM34CLK_HCLK, RCC_TIM34CLK_PCLK)
- Add FMC related macros: __FMC_CLK_ENABLE(), __FMC_CLK_DISABLE(), __FMC_FORCE_RESET() and __FMC_RELEASE_RESET()
- Add GPIO port G related macros: __GPIOG_CLK_ENABLE(), __GPIOG_CLK_DISABLE(),
__ GPIOG _FORCE_RESET() and __GPIOG _RELEASE_RESET()
- Add GPIO port H related macros:_ __GPIOH_CLK_ENABLE(), __GPIOH_CLK_DISABLE(),
__FMC_ GPIOH _RESET() and __GPIOH _RELEASE_RESET()
- Add SPI4 related macros: __SPI4_CLK_ENABLE(),
__SPI4_CLK_DISABLE(), __ SPI4_FORCE_RESET() and __SPI4_RELEASE_RESET()
- Add TIM20 related macros: __TIM20_CLK_ENABLE(), __TIM20_CLK_DISABLE(),
__ TIM20_FORCE_RESET() and __TIM20_RELEASE_RESET(), __HAL_RCC_TIM20_CONFIG() , __HAL_RCC_GET_TIM20_SOURCE()
- Add new macro to set/get the clock source of TIM3 & TIM4: __HAL_RCC_TIM34_CONFIG() and __HAL_RCC_GET_TIM34_SOURCE()
- HAL SMARTCARD
update
- Change SMARTCARD_AdvFeatureConfig()
from exported to static private function
- TC enabled and TXE disabled at the end of TX in IT
mode
- HAL SMBUS update
- Fix wrong State after a PEC failed
- Fix slave acknowledge issue
- HAL SPI update
- Fix CodeSonar warning: unreachable Call in
SPI_CloseRxTx_ISR()
- HAL SRAM (STM32F303xE specific)
- FMC: generic
firmware to drive SRAM memories mounted as external device
- HAL TIM update (for STM32F303xE)
- Add
defines to set TIM20 option register (link from analog watchdog and TIM20 ETR)
- HAL UART update
- TC enabled and TXE disabled at the end of TX in IT
mode
- HAL USART update
- TC enabled and TXE disabled at the end of TX in IT
mode
V1.0.1
/ 18-June-2014Main
Changes
-
HAL generic update
- Fix flag clear procedure: use atomic write operation "=" instead of ready-modify-write operation "|=" or "&="
- Fix
on Timeout management, Timeout value set to 0 passed to API
automatically exits the function after checking the flag without any
wait.
- Add
new macro __HAL_RESET_HANDLE_STATE to reset a given handle state.
-
HAL ADC update
- Rename defines:
- ADC_EXTERNALTRIGCONV_Ext_IT11 to ADC_EXTERNALTRIGCONV_EXT_IT11
- ADC_EXTERNALTRIGCONV_Ext_IT12 to ADC_EXTERNALTRIGCONV_EXT_IT12
- Fix define ADC_SOFTWARE_START
- Update external trigger defines to remove HRTIM triggers for STM32F328xx and TIM8 triggers for STM32F302xC
- Add ADC1_2_EXTERNALTRIG_T4_CC4 for STM32F303x8 and STM32F328xx
HAL CEC update
- Process no more locked during the transmission in interrupt mode.
HAL COMP update
- Fix on 32-bit register COMP CSR accesses for STM32F373xC and STM32F378xx devices.
- Add new defines for STM32F373xC and STM32F378xx comparators:
COMP_OUTPUT_TIM3IC1,
COMP_OUTPUT_TIM3OCREFCLR, COMP_OUTPUT_TIM2IC4 and
COMP_OUTPUT_TIM2OCREFCLR
instead of previous defines
COMP_OUTPUT_COMP1_TIM3IC1,
COMP_OUTPUT_COMP1_TIM3OCREFCLR, COMP_OUTPUT_COMP1_TIM2IC4,
COMP_OUTPUT_COMP1_TIM2OCREFCLR, COMP_OUTPUT_COMP2_TIM3IC1, COMP_OUTPUT_COMP2_TIM3OCREFCLR, COMP_OUTPUT_COMP2_TIM2IC4, COMP_OUTPUT_COMP2_TIM2OCREFCLR. HAL DMA update
- Fix in HAL_DMA_PollForTransfer() to set error code HAL_DMA_ERROR_TE in case of HAL_ERROR status
HAL GPIO update
- Fix GPIO_AF5_SPI1 define instead of GPIO_AF5_SPI1 for STM32F303x8 device.
-
HAL HRTIM update
- HRTIM peripheral not available for STM32F328xx device.
- Fix macros __HAL_HRTIM_CLEAR_FLAG, __HAL_HRTIM_MASTER_CLEAR_FLAG and __HAL_HRTIM_TIMER_CLEAR_FLAG
-
HAL I2C update
- Add
management of NACK event in Master transmitter mode and Slave
transmitter/receiver modes (only in polling mode), in that case the
current transfer is stopped.
HAL IRDA update
- Add new enum typedef IRDA_ClockSourceTypeDef
- Add new macro __HAL_IRDA_GETCLOCKSOURCE
- Change in HAL_IRDA_Transmit_IT() to enable IRDA_IT_TXE instead of IRDA_IT_TC.
- Process no more locked during the transmission in interrupt mode.
-
HAL OPAMP update
- __SYSCFG_CLK_ENABLE() is now handled internally in HAL_OPAMP_Init() and no more in user HAL_OPAMP_MspInit().
-
HAL PCD update
HAL PWR update
- Fix in HAL_PWR_EnterSTANDBYMode() to not clear Wakeup flag (WUF), which need to be cleared at application level before to call this function
HAL RCC update
- Change for STM32F303x8, STM32F334x8 and STM32F328xx devices:
- Add missing macro __DAC2_FORCE_RESET
- Rename RCC_USART1CLKSOURCE_PCLK2 into RCC_USART1CLKSOURCE_PCLK1
- Remove HRTIM1 peripheral and clocking macros for STM32F328xx device.
- Fix HSI Calibration issue when selected as SYSCLK
-
HAL SMARTCARD update
- Change in HAL_SMARTCARD_Transmit_IT() to enable SMARTCARD_IT_TXE instead of SMARTCARD_IT_TC.
- Process no more locked during the transmission in interrupt mode.
HAL SMBUS update
- Fix Slave acknowledge issue: Slave should ack each bit and so stretch the line till the bit is not ack
HAL TIM update
- Fix macro __HAL_TIM_PRESCALER
HAL TSC update
- Fix define TSC_ACQ_MODE_SYNCHRO
-
HAL UART update
- Change in HAL_LIN_Init() parameter BreakDetectLength to uint32_t
- Change in HAL_UART_Transmit_IT() to enable UART_IT_TXE instead of UART_IT_TC.
- Process no more locked during the transmission in interrupt mode.
-
HAL USART update
- Change USART_InitTypeDef fields to uint32_t type
- Rename __USART_ENABLE and __USART_DISABLE macros to respectively __HAL_USART_ENABLE and __HAL_USART_DISABLE
- Change in HAL_USART_Transmit_IT() to enable USART_IT_TXE instead of USART_IT_TC.
- Process no more locked during the transmission in interrupt mode.
- Change in HAL_USART_TransmitReceive_DMA() to manage DMA half transfer mode
V1.0.0
/ 06-May-2014
Main
Changes
- First official
release of STM32F3xx HAL drivers for STM32F301x6/x8,
STM32F302x6/x8, STM32F302xB/xC,
STM32F303x6/x8, STM32F373xB/xC,
STM32F334x4/x6/x8, STM32F318xx, STM32F328xx, STM32F358xx and STM32F378xx
devices.
License
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modification, are permitted provided that the following conditions are
met:
- Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
- Redistributions
in binary form must reproduce the above copyright notice, this list of
conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
- Neither the name of STMicroelectronics nor the names of its contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
For
complete documentation on STM32 Microcontrollers visit www.st.com/STM32
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