Alp Sayin / FastPWM

Added pin descriptions for NUCLEO-F303RE. Tested

Fork of FastPWM by Erik -

Device/FastPWM_STM_TIM_PinOut.cpp@21:aa2884be5496, 2015-01-12 (annotated)

Committer:
altaran
Date:
Mon Jan 12 10:31:18 2015 +0000
Revision:
21:aa2884be5496
Parent:
20:3c609bc4ae9c
Child:
24:1f451660d8c0
Added F072RB target, including PWMx/1N channels

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Sissors 13:cdefd9d75b64 1 #include "mbed.h"
Sissors 13:cdefd9d75b64 2
Sissors 13:cdefd9d75b64 3 #ifdef TARGET_NUCLEO_F030R8
Sissors 13:cdefd9d75b64 4 __IO uint32_t* getChannel(TIM_TypeDef* pwm, PinName pin) {
Sissors 13:cdefd9d75b64 5 switch (pin) {
Sissors 13:cdefd9d75b64 6 // Channels 1
Sissors 13:cdefd9d75b64 7 case PA_4: case PA_6: case PB_1: case PB_4: case PB_8: case PB_9: case PB_14: case PC_6: case PB_6: case PB_7:
Sissors 13:cdefd9d75b64 8 return &pwm->CCR1;
Sissors 13:cdefd9d75b64 9
Sissors 13:cdefd9d75b64 10 // Channels 2
Sissors 13:cdefd9d75b64 11 case PA_7: case PB_5: case PC_7:
Sissors 13:cdefd9d75b64 12 return &pwm->CCR2;
Sissors 13:cdefd9d75b64 13
Sissors 13:cdefd9d75b64 14 // Channels 3
Sissors 13:cdefd9d75b64 15 case PB_0: case PC_8:
Sissors 13:cdefd9d75b64 16 return &pwm->CCR3;
Sissors 13:cdefd9d75b64 17
Sissors 13:cdefd9d75b64 18 // Channels 4
Sissors 13:cdefd9d75b64 19 case PC_9:
Sissors 13:cdefd9d75b64 20 return &pwm->CCR4;
Sissors 13:cdefd9d75b64 21 }
Sissors 13:cdefd9d75b64 22 return NULL;
Sissors 13:cdefd9d75b64 23 }
Sissors 13:cdefd9d75b64 24 #endif
Sissors 13:cdefd9d75b64 25
jocis 15:49a7eff133b3 26 #if defined TARGET_NUCLEO_F401RE || defined TARGET_NUCLEO_F411RE
Sissors 13:cdefd9d75b64 27 __IO uint32_t* getChannel(TIM_TypeDef* pwm, PinName pin) {
Sissors 13:cdefd9d75b64 28 switch (pin) {
jocis 16:ec208b5ec0bb 29 // Channels 1 : PWMx/1
Sissors 13:cdefd9d75b64 30 case PA_0: case PA_5: case PA_6: case PA_8: case PA_15: case PB_4: case PB_6: case PC_6: case PA_7: case PB_13:
Sissors 13:cdefd9d75b64 31 return &pwm->CCR1;
Sissors 13:cdefd9d75b64 32
jocis 16:ec208b5ec0bb 33 // Channels 2 : PWMx/2
Sissors 13:cdefd9d75b64 34 case PA_1: case PA_9: case PB_3: case PB_5: case PB_7: case PC_7: case PB_0: case PB_14:
Sissors 13:cdefd9d75b64 35 return &pwm->CCR2;
Sissors 13:cdefd9d75b64 36
jocis 16:ec208b5ec0bb 37 // Channels 3 : PWMx/3
Sissors 13:cdefd9d75b64 38 case PA_2: case PA_10: case PB_8: case PB_10: case PC_8: case PB_1: case PB_15:
Sissors 13:cdefd9d75b64 39 return &pwm->CCR3;
Sissors 13:cdefd9d75b64 40
jocis 16:ec208b5ec0bb 41 // Channels 4 : PWMx/4
Sissors 13:cdefd9d75b64 42 case PA_3: case PA_11: case PB_9: case PC_9:
Sissors 13:cdefd9d75b64 43 return &pwm->CCR4;
Sissors 13:cdefd9d75b64 44 }
Sissors 13:cdefd9d75b64 45 return NULL;
Sissors 13:cdefd9d75b64 46 }
jocis 16:ec208b5ec0bb 47 #endif
jocis 16:ec208b5ec0bb 48
jocis 16:ec208b5ec0bb 49 #if defined TARGET_NUCLEO_F103RB
jocis 17:8378bc456f0d 50 __IO uint16_t* getChannel(TIM_TypeDef* pwm, PinName pin) {
jocis 16:ec208b5ec0bb 51 switch (pin) {
jocis 16:ec208b5ec0bb 52 // Channels 1 : PWMx/1
jocis 16:ec208b5ec0bb 53 case PA_6: case PA_8: case PA_15: case PB_4: case PC_6: case PB_13:
jocis 17:8378bc456f0d 54 return &pwm->CCR1;
jocis 16:ec208b5ec0bb 55
jocis 16:ec208b5ec0bb 56 // Channels 2 : PWMx/2
jocis 16:ec208b5ec0bb 57 case PA_1: case PA_7: case PA_9: case PB_3: case PB_5: case PC_7: case PB_14:
jocis 17:8378bc456f0d 58 return &pwm->CCR2;
jocis 16:ec208b5ec0bb 59
jocis 16:ec208b5ec0bb 60 // Channels 3 : PWMx/3
jocis 16:ec208b5ec0bb 61 case PA_2: case PA_10: case PB_0: case PB_10: case PC_8: case PB_15:
jocis 17:8378bc456f0d 62 return &pwm->CCR3;
jocis 16:ec208b5ec0bb 63
jocis 16:ec208b5ec0bb 64 // Channels 4 : PWMx/4
jocis 16:ec208b5ec0bb 65 case PA_3: case PA_11: case PB_1: case PB_11: case PC_9:
jocis 17:8378bc456f0d 66 return &pwm->CCR4;
jocis 16:ec208b5ec0bb 67 }
jocis 16:ec208b5ec0bb 68 return NULL;
jocis 16:ec208b5ec0bb 69 }
Sissors 19:ba7a5bf634b3 70 #endif
Sissors 19:ba7a5bf634b3 71
Sissors 19:ba7a5bf634b3 72 #ifdef TARGET_NUCLEO_F334R8
Sissors 19:ba7a5bf634b3 73 __IO uint32_t* getChannel(TIM_TypeDef* pwm, PinName pin) {
Sissors 19:ba7a5bf634b3 74 switch (pin) {
Sissors 19:ba7a5bf634b3 75 // Channels 1
Sissors 19:ba7a5bf634b3 76 case PA_2: case PA_6: case PA_7: case PA_8: case PA_12: case PB_4: case PB_5: case PB_8: case PB_9: case PB_14: case PC_0: case PC_6:
Sissors 19:ba7a5bf634b3 77 case PA_1: case PA_13: case PB_6: case PB_13: case PC_13:
Sissors 19:ba7a5bf634b3 78 return &pwm->CCR1;
Sissors 19:ba7a5bf634b3 79
Sissors 19:ba7a5bf634b3 80 // Channels 2
Sissors 19:ba7a5bf634b3 81 case PA_3: case PA_4: case PA_9: case PB_15: case PC_1: case PC_7:
Sissors 19:ba7a5bf634b3 82 return &pwm->CCR2;
Sissors 19:ba7a5bf634b3 83
Sissors 19:ba7a5bf634b3 84 // Channels 3
Sissors 19:ba7a5bf634b3 85 case PA_10: case PB_0: case PC_2: case PC_8:
Sissors 19:ba7a5bf634b3 86 case PF_0:
Sissors 19:ba7a5bf634b3 87 return &pwm->CCR3;
Sissors 19:ba7a5bf634b3 88
Sissors 19:ba7a5bf634b3 89 // Channels 4
Sissors 19:ba7a5bf634b3 90 case PA_11: case PB_1: case PB_7: case PC_3: case PC_9:
Sissors 19:ba7a5bf634b3 91 return &pwm->CCR4;
Sissors 19:ba7a5bf634b3 92 }
Sissors 19:ba7a5bf634b3 93 return NULL;
Sissors 19:ba7a5bf634b3 94 }
altaran 20:3c609bc4ae9c 95 #endif
altaran 20:3c609bc4ae9c 96
altaran 20:3c609bc4ae9c 97 #if defined TARGET_NUCLEO_F072RB
altaran 20:3c609bc4ae9c 98 __IO uint32_t* getChannel(TIM_TypeDef* pwm, PinName pin) {
altaran 20:3c609bc4ae9c 99 switch (pin) {
altaran 20:3c609bc4ae9c 100 // Channels 1 : PWMx/1
altaran 20:3c609bc4ae9c 101 case PA_2: case PA_6: case PA_4: case PA_7: case PA_8: case PB_1: case PB_4: case PB_8: case PB_9: case PB_14: case PC_6:
altaran 21:aa2884be5496 102 // Channels 1N : PWMx/1N
altaran 21:aa2884be5496 103 case PA_1: case PB_6: case PB_7: case PB_13:
altaran 20:3c609bc4ae9c 104 return &pwm->CCR1;
altaran 20:3c609bc4ae9c 105
altaran 20:3c609bc4ae9c 106 // Channels 2 : PWMx/2
altaran 20:3c609bc4ae9c 107 case PA_3: case PA_9: case PB_5: case PC_7: case PB_15:
altaran 20:3c609bc4ae9c 108 return &pwm->CCR2;
altaran 20:3c609bc4ae9c 109
altaran 20:3c609bc4ae9c 110 // Channels 3 : PWMx/3
altaran 20:3c609bc4ae9c 111 case PA_10: case PB_0: case PC_8:
altaran 20:3c609bc4ae9c 112 return &pwm->CCR3;
altaran 20:3c609bc4ae9c 113
altaran 20:3c609bc4ae9c 114 // Channels 4 : PWMx/4
altaran 20:3c609bc4ae9c 115 case PA_11: case PC_9:
altaran 20:3c609bc4ae9c 116 return &pwm->CCR4;
altaran 20:3c609bc4ae9c 117 }
altaran 20:3c609bc4ae9c 118 return NULL;
altaran 20:3c609bc4ae9c 119 }
Sissors 13:cdefd9d75b64 120 #endif