Alp Sayin / FastPWM

Added pin descriptions for NUCLEO-F303RE. Tested

Fork of FastPWM by Erik -

Device/FastPWM_STM_TIM_PinOut.cpp@25:8b1bf34c72aa, 2015-09-30 (annotated)

Committer:
alpsayin
Date:
Wed Sep 30 20:46:18 2015 +0000
Revision:
25:8b1bf34c72aa
Parent:
24:1f451660d8c0 
added pins for ST32F303RE

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Sissors 13:cdefd9d75b64 1 #include "mbed.h"
Sissors 13:cdefd9d75b64 2
alpsayin 25:8b1bf34c72aa 3 #ifdef TARGET_NUCLEO_F303RE
alpsayin 25:8b1bf34c72aa 4 __IO uint32_t* getChannel(TIM_TypeDef* pwm, PinName pin) {
alpsayin 25:8b1bf34c72aa 5 switch (pin) {
alpsayin 25:8b1bf34c72aa 6 // Channels 1
alpsayin 25:8b1bf34c72aa 7 case PC_0: case PB_8: case PB_9: case PA_6: case PA_8: case PB_4: case PB_5: case PA_2: case PC_6: case PA_12: case PB_14: case PB_15:
alpsayin 25:8b1bf34c72aa 8 // Channels 1N
alpsayin 25:8b1bf34c72aa 9 case PA_1: case PA_5: case PB_6: case PB_3: case PA_13: case PB_7: case PC_13:
alpsayin 25:8b1bf34c72aa 10 return &pwm->CCR1;
alpsayin 25:8b1bf34c72aa 11
alpsayin 25:8b1bf34c72aa 12 // Channels 2
alpsayin 25:8b1bf34c72aa 13 case PC_1: case PA_7: case PC_7: case PA_9: case PA_3: case PA_14:
alpsayin 25:8b1bf34c72aa 14 // Channels 2N
alpsayin 25:8b1bf34c72aa 15 case PB_0:
alpsayin 25:8b1bf34c72aa 16 return &pwm->CCR2;
alpsayin 25:8b1bf34c72aa 17
alpsayin 25:8b1bf34c72aa 18 // Channels 3
alpsayin 25:8b1bf34c72aa 19 case PA_10: case PC_2: case PC_8:
alpsayin 25:8b1bf34c72aa 20 // Channels 3N
alpsayin 25:8b1bf34c72aa 21 case PB_1:
alpsayin 25:8b1bf34c72aa 22 return &pwm->CCR3;
alpsayin 25:8b1bf34c72aa 23
alpsayin 25:8b1bf34c72aa 24 // Channels 4
alpsayin 25:8b1bf34c72aa 25 case PC_3: case PC_9: case PA_11:
alpsayin 25:8b1bf34c72aa 26 // Channels 4N
alpsayin 25:8b1bf34c72aa 27
alpsayin 25:8b1bf34c72aa 28 return &pwm->CCR4;
alpsayin 25:8b1bf34c72aa 29 }
alpsayin 25:8b1bf34c72aa 30 return NULL;
alpsayin 25:8b1bf34c72aa 31 }
alpsayin 25:8b1bf34c72aa 32 #endif
alpsayin 25:8b1bf34c72aa 33
Sissors 13:cdefd9d75b64 34 #ifdef TARGET_NUCLEO_F030R8
Sissors 13:cdefd9d75b64 35 __IO uint32_t* getChannel(TIM_TypeDef* pwm, PinName pin) {
Sissors 13:cdefd9d75b64 36 switch (pin) {
Sissors 13:cdefd9d75b64 37 // Channels 1
Sissors 13:cdefd9d75b64 38 case PA_4: case PA_6: case PB_1: case PB_4: case PB_8: case PB_9: case PB_14: case PC_6: case PB_6: case PB_7:
Sissors 13:cdefd9d75b64 39 return &pwm->CCR1;
Sissors 13:cdefd9d75b64 40
Sissors 13:cdefd9d75b64 41 // Channels 2
Sissors 13:cdefd9d75b64 42 case PA_7: case PB_5: case PC_7:
Sissors 13:cdefd9d75b64 43 return &pwm->CCR2;
Sissors 13:cdefd9d75b64 44
Sissors 13:cdefd9d75b64 45 // Channels 3
Sissors 13:cdefd9d75b64 46 case PB_0: case PC_8:
Sissors 13:cdefd9d75b64 47 return &pwm->CCR3;
Sissors 13:cdefd9d75b64 48
Sissors 13:cdefd9d75b64 49 // Channels 4
Sissors 13:cdefd9d75b64 50 case PC_9:
Sissors 13:cdefd9d75b64 51 return &pwm->CCR4;
Sissors 13:cdefd9d75b64 52 }
Sissors 13:cdefd9d75b64 53 return NULL;
Sissors 13:cdefd9d75b64 54 }
Sissors 13:cdefd9d75b64 55 #endif
Sissors 13:cdefd9d75b64 56
jocis 15:49a7eff133b3 57 #if defined TARGET_NUCLEO_F401RE || defined TARGET_NUCLEO_F411RE
Sissors 13:cdefd9d75b64 58 __IO uint32_t* getChannel(TIM_TypeDef* pwm, PinName pin) {
Sissors 13:cdefd9d75b64 59 switch (pin) {
jocis 16:ec208b5ec0bb 60 // Channels 1 : PWMx/1
Sissors 13:cdefd9d75b64 61 case PA_0: case PA_5: case PA_6: case PA_8: case PA_15: case PB_4: case PB_6: case PC_6: case PA_7: case PB_13:
Sissors 13:cdefd9d75b64 62 return &pwm->CCR1;
Sissors 13:cdefd9d75b64 63
jocis 16:ec208b5ec0bb 64 // Channels 2 : PWMx/2
Sissors 13:cdefd9d75b64 65 case PA_1: case PA_9: case PB_3: case PB_5: case PB_7: case PC_7: case PB_0: case PB_14:
Sissors 13:cdefd9d75b64 66 return &pwm->CCR2;
Sissors 13:cdefd9d75b64 67
jocis 16:ec208b5ec0bb 68 // Channels 3 : PWMx/3
Sissors 13:cdefd9d75b64 69 case PA_2: case PA_10: case PB_8: case PB_10: case PC_8: case PB_1: case PB_15:
Sissors 13:cdefd9d75b64 70 return &pwm->CCR3;
Sissors 13:cdefd9d75b64 71
jocis 16:ec208b5ec0bb 72 // Channels 4 : PWMx/4
Sissors 13:cdefd9d75b64 73 case PA_3: case PA_11: case PB_9: case PC_9:
Sissors 13:cdefd9d75b64 74 return &pwm->CCR4;
Sissors 13:cdefd9d75b64 75 }
Sissors 13:cdefd9d75b64 76 return NULL;
Sissors 13:cdefd9d75b64 77 }
jocis 16:ec208b5ec0bb 78 #endif
jocis 16:ec208b5ec0bb 79
jocis 16:ec208b5ec0bb 80 #if defined TARGET_NUCLEO_F103RB
Sissors 24:1f451660d8c0 81 __IO uint32_t* getChannel(TIM_TypeDef* pwm, PinName pin) {
jocis 16:ec208b5ec0bb 82 switch (pin) {
jocis 16:ec208b5ec0bb 83 // Channels 1 : PWMx/1
jocis 16:ec208b5ec0bb 84 case PA_6: case PA_8: case PA_15: case PB_4: case PC_6: case PB_13:
jocis 17:8378bc456f0d 85 return &pwm->CCR1;
jocis 16:ec208b5ec0bb 86
jocis 16:ec208b5ec0bb 87 // Channels 2 : PWMx/2
jocis 16:ec208b5ec0bb 88 case PA_1: case PA_7: case PA_9: case PB_3: case PB_5: case PC_7: case PB_14:
jocis 17:8378bc456f0d 89 return &pwm->CCR2;
jocis 16:ec208b5ec0bb 90
jocis 16:ec208b5ec0bb 91 // Channels 3 : PWMx/3
jocis 16:ec208b5ec0bb 92 case PA_2: case PA_10: case PB_0: case PB_10: case PC_8: case PB_15:
jocis 17:8378bc456f0d 93 return &pwm->CCR3;
jocis 16:ec208b5ec0bb 94
jocis 16:ec208b5ec0bb 95 // Channels 4 : PWMx/4
jocis 16:ec208b5ec0bb 96 case PA_3: case PA_11: case PB_1: case PB_11: case PC_9:
jocis 17:8378bc456f0d 97 return &pwm->CCR4;
jocis 16:ec208b5ec0bb 98 }
jocis 16:ec208b5ec0bb 99 return NULL;
jocis 16:ec208b5ec0bb 100 }
Sissors 19:ba7a5bf634b3 101 #endif
Sissors 19:ba7a5bf634b3 102
Sissors 19:ba7a5bf634b3 103 #ifdef TARGET_NUCLEO_F334R8
Sissors 19:ba7a5bf634b3 104 __IO uint32_t* getChannel(TIM_TypeDef* pwm, PinName pin) {
Sissors 19:ba7a5bf634b3 105 switch (pin) {
Sissors 19:ba7a5bf634b3 106 // Channels 1
Sissors 19:ba7a5bf634b3 107 case PA_2: case PA_6: case PA_7: case PA_8: case PA_12: case PB_4: case PB_5: case PB_8: case PB_9: case PB_14: case PC_0: case PC_6:
Sissors 19:ba7a5bf634b3 108 case PA_1: case PA_13: case PB_6: case PB_13: case PC_13:
Sissors 19:ba7a5bf634b3 109 return &pwm->CCR1;
Sissors 19:ba7a5bf634b3 110
Sissors 19:ba7a5bf634b3 111 // Channels 2
Sissors 19:ba7a5bf634b3 112 case PA_3: case PA_4: case PA_9: case PB_15: case PC_1: case PC_7:
Sissors 19:ba7a5bf634b3 113 return &pwm->CCR2;
Sissors 19:ba7a5bf634b3 114
Sissors 19:ba7a5bf634b3 115 // Channels 3
Sissors 19:ba7a5bf634b3 116 case PA_10: case PB_0: case PC_2: case PC_8:
Sissors 19:ba7a5bf634b3 117 case PF_0:
Sissors 19:ba7a5bf634b3 118 return &pwm->CCR3;
Sissors 19:ba7a5bf634b3 119
Sissors 19:ba7a5bf634b3 120 // Channels 4
Sissors 19:ba7a5bf634b3 121 case PA_11: case PB_1: case PB_7: case PC_3: case PC_9:
Sissors 19:ba7a5bf634b3 122 return &pwm->CCR4;
Sissors 19:ba7a5bf634b3 123 }
Sissors 19:ba7a5bf634b3 124 return NULL;
Sissors 19:ba7a5bf634b3 125 }
altaran 20:3c609bc4ae9c 126 #endif
altaran 20:3c609bc4ae9c 127
altaran 20:3c609bc4ae9c 128 #if defined TARGET_NUCLEO_F072RB
altaran 20:3c609bc4ae9c 129 __IO uint32_t* getChannel(TIM_TypeDef* pwm, PinName pin) {
altaran 20:3c609bc4ae9c 130 switch (pin) {
altaran 20:3c609bc4ae9c 131 // Channels 1 : PWMx/1
altaran 20:3c609bc4ae9c 132 case PA_2: case PA_6: case PA_4: case PA_7: case PA_8: case PB_1: case PB_4: case PB_8: case PB_9: case PB_14: case PC_6:
altaran 21:aa2884be5496 133 // Channels 1N : PWMx/1N
altaran 21:aa2884be5496 134 case PA_1: case PB_6: case PB_7: case PB_13:
altaran 20:3c609bc4ae9c 135 return &pwm->CCR1;
altaran 20:3c609bc4ae9c 136
altaran 20:3c609bc4ae9c 137 // Channels 2 : PWMx/2
altaran 20:3c609bc4ae9c 138 case PA_3: case PA_9: case PB_5: case PC_7: case PB_15:
altaran 20:3c609bc4ae9c 139 return &pwm->CCR2;
altaran 20:3c609bc4ae9c 140
altaran 20:3c609bc4ae9c 141 // Channels 3 : PWMx/3
altaran 20:3c609bc4ae9c 142 case PA_10: case PB_0: case PC_8:
altaran 20:3c609bc4ae9c 143 return &pwm->CCR3;
altaran 20:3c609bc4ae9c 144
altaran 20:3c609bc4ae9c 145 // Channels 4 : PWMx/4
altaran 20:3c609bc4ae9c 146 case PA_11: case PC_9:
altaran 20:3c609bc4ae9c 147 return &pwm->CCR4;
altaran 20:3c609bc4ae9c 148 }
altaran 20:3c609bc4ae9c 149 return NULL;
altaran 20:3c609bc4ae9c 150 }
Sissors 13:cdefd9d75b64 151 #endif