//EE 202 hm2 //This is a program built for the mbed1(master mbed) in generation mode //This code has been tested and should be function, if you has any problem, //please mail me.

Dependencies:   mbed

Fork of 202hm2_master by Yujing Qian

Committer:
allonq
Date:
Sun Mar 16 07:17:21 2014 +0000
Revision:
2:1c7e1110ac61
Parent:
1:55f3661a2050
Child:
3:5149e55c21e3
EE202_hm2_generation mode mbed1

Who changed what in which revision?

UserRevisionLine numberNew contents of line
allonq 0:fac0542384d7 1 //this is a program built for the master mbed(bed1)
allonq 0:fac0542384d7 2 #include "mbed.h"
allonq 0:fac0542384d7 3 //#include "MKL46Z4.h"
allonq 0:fac0542384d7 4
allonq 0:fac0542384d7 5 #define mod 0x0000bb80
allonq 0:fac0542384d7 6 #define duty_cycle 0.5
allonq 0:fac0542384d7 7 #define high_cycle mod*duty_cycle
allonq 0:fac0542384d7 8 #define low_cycle mod-high_cycle
allonq 0:fac0542384d7 9 #define buffer_size 9
allonq 0:fac0542384d7 10 #define BBBbuff_size 30
allonq 0:fac0542384d7 11
allonq 0:fac0542384d7 12 DigitalOut LED(LED_RED);
allonq 2:1c7e1110ac61 13 DigitalOut out(PTD4);
allonq 2:1c7e1110ac61 14 Serial uart_bbb(PTE16,PTE17);
allonq 2:1c7e1110ac61 15 Serial uart(PTE0, PTE1);
allonq 0:fac0542384d7 16 Serial pc(USBTX,USBRX);
allonq 0:fac0542384d7 17
allonq 1:55f3661a2050 18 int loop_num=0;
allonq 2:1c7e1110ac61 19 int per_num=0;
allonq 2:1c7e1110ac61 20 int Period=500;
allonq 0:fac0542384d7 21 int state=0;
allonq 0:fac0542384d7 22 uint32_t T1=0;
allonq 0:fac0542384d7 23 uint32_t T2=0;
allonq 0:fac0542384d7 24 uint32_t T3=0;
allonq 0:fac0542384d7 25 uint32_t T4=0;
allonq 2:1c7e1110ac61 26 bool flag=false;
allonq 2:1c7e1110ac61 27 int syc_f=2;
allonq 2:1c7e1110ac61 28 int syc_interval=1000/syc_f;
allonq 2:1c7e1110ac61 29 uint32_t syc_cnt=0;
allonq 2:1c7e1110ac61 30
allonq 0:fac0542384d7 31 uint32_t Mod=mod;
allonq 0:fac0542384d7 32 char BBBbuffer[BBBbuff_size];
allonq 0:fac0542384d7 33 bool cmd_received=false;
allonq 0:fac0542384d7 34 int BBBbuff=0;
allonq 0:fac0542384d7 35 char buffer[4];
allonq 1:55f3661a2050 36 int buff=0;
allonq 2:1c7e1110ac61 37 uint32_t TIME(){return per_num*Period*48000+loop_num*48000+(TPM0->CNT);}
allonq 0:fac0542384d7 38
allonq 0:fac0542384d7 39 void receive_handler(){
allonq 2:1c7e1110ac61 40 while( uart_bbb.readable() && BBBbuff<BBBbuff_size){
allonq 2:1c7e1110ac61 41 BBBbuffer[BBBbuff] =uart_bbb.getc();
allonq 2:1c7e1110ac61 42 uart_bbb.putc(BBBbuffer[BBBbuff]);
allonq 0:fac0542384d7 43 //pc.printf(& rx_buffer[buff]);
allonq 0:fac0542384d7 44 if (BBBbuffer[BBBbuff] == '#'){
allonq 0:fac0542384d7 45 BBBbuffer[BBBbuff] = '\0';
allonq 0:fac0542384d7 46 cmd_received=true;
allonq 0:fac0542384d7 47 BBBbuff++;
allonq 0:fac0542384d7 48 pc.printf("cmd received\n");
allonq 0:fac0542384d7 49 break;
allonq 0:fac0542384d7 50 }
allonq 0:fac0542384d7 51 BBBbuff++;
allonq 0:fac0542384d7 52 }
allonq 0:fac0542384d7 53 return;
allonq 0:fac0542384d7 54 }
allonq 0:fac0542384d7 55 void TPM1_IRQHandler(void);
allonq 2:1c7e1110ac61 56 uint32_t calculate_delay(){// calculate delay using hand shake
allonq 2:1c7e1110ac61 57
allonq 1:55f3661a2050 58
allonq 2:1c7e1110ac61 59 T1=TIME();
allonq 2:1c7e1110ac61 60 uart.putc('a');
allonq 2:1c7e1110ac61 61 uart.getc();
allonq 0:fac0542384d7 62 T4=TIME();
allonq 2:1c7e1110ac61 63
allonq 2:1c7e1110ac61 64 return (T4-T1)/2;
allonq 2:1c7e1110ac61 65 }
allonq 2:1c7e1110ac61 66 void Syc(uint32_t delay){
allonq 2:1c7e1110ac61 67 //pc.printf("delay=%d\n",delay);
allonq 0:fac0542384d7 68 TPM1->MOD=delay;
allonq 0:fac0542384d7 69 TPM1->CNT=0x0;
allonq 2:1c7e1110ac61 70 //loop_num=0;
allonq 2:1c7e1110ac61 71 TPM1->SC=0x000000c8;
allonq 2:1c7e1110ac61 72 NVIC_EnableIRQ(TPM1_IRQn);
allonq 2:1c7e1110ac61 73 // open tpm1
allonq 2:1c7e1110ac61 74 uart.putc(0);//send signal to slave
allonq 2:1c7e1110ac61 75 //pc.printf("done\n");
allonq 2:1c7e1110ac61 76 }
allonq 2:1c7e1110ac61 77 void synchronize(uint32_t Cmd_per){
allonq 2:1c7e1110ac61 78
allonq 2:1c7e1110ac61 79 char* tmp=(char*)&Cmd_per;
allonq 2:1c7e1110ac61 80
allonq 2:1c7e1110ac61 81 uart.getc();
allonq 2:1c7e1110ac61 82 //pc.printf("TFS love xuemei");
allonq 2:1c7e1110ac61 83 uart.putc((*tmp));//pc.printf("0=%d\n",*tmp);
allonq 2:1c7e1110ac61 84 uart.getc();
allonq 2:1c7e1110ac61 85 uart.putc((*(tmp+1)));//pc.printf("1=%d\n",(*(tmp+1)));
allonq 2:1c7e1110ac61 86 uart.getc();
allonq 2:1c7e1110ac61 87 uart.putc((*(tmp+2)));//pc.printf("2=%d\n",(*(tmp+2)));
allonq 2:1c7e1110ac61 88 uart.getc();
allonq 2:1c7e1110ac61 89 uart.putc((*(tmp+3)));//pc.printf("3=%d\n",(*(tmp+3)));
allonq 2:1c7e1110ac61 90 uart.getc();//clear the buffer
allonq 2:1c7e1110ac61 91 // pc.printf("T1.5=%d",TIME());
allonq 0:fac0542384d7 92
allonq 2:1c7e1110ac61 93 Period=Cmd_per;
allonq 2:1c7e1110ac61 94
allonq 2:1c7e1110ac61 95 //uart.getc();
allonq 2:1c7e1110ac61 96 //int t5=TIME();
allonq 2:1c7e1110ac61 97 Syc(calculate_delay());
allonq 2:1c7e1110ac61 98 //int t6=TIME();
allonq 2:1c7e1110ac61 99 //pc.printf("NOTICE,TIME=%d\n",t6-t5);
allonq 2:1c7e1110ac61 100 loop_num=0;//clear clock
allonq 2:1c7e1110ac61 101
allonq 2:1c7e1110ac61 102 }
allonq 2:1c7e1110ac61 103
allonq 2:1c7e1110ac61 104 void TPM0_IRQHandler(void){
allonq 2:1c7e1110ac61 105 //syc_cnt++;
allonq 2:1c7e1110ac61 106 loop_num++;
allonq 2:1c7e1110ac61 107 //pc.printf("ln=%d",loop_num);
allonq 2:1c7e1110ac61 108 if(loop_num==Period){
allonq 2:1c7e1110ac61 109 out=!out;
allonq 2:1c7e1110ac61 110 LED=!LED;
allonq 2:1c7e1110ac61 111 per_num++;
allonq 2:1c7e1110ac61 112 loop_num=0;
allonq 2:1c7e1110ac61 113 //syc_cnt=0;
allonq 2:1c7e1110ac61 114 //if((TPM0->SC & 0x0080)==0x0080){
allonq 0:fac0542384d7 115
allonq 2:1c7e1110ac61 116 //pc.printf("MOD=%d",TPM0->MOD);
allonq 0:fac0542384d7 117 //pc.printf("SC=%d",TPM0->SC);
allonq 2:1c7e1110ac61 118 //pc.printf("Global_time=%d\n",TIME());
allonq 2:1c7e1110ac61 119 //pc.printf("Global_time=%f\n",(float)(TIME()%48000));
allonq 2:1c7e1110ac61 120 //pc.printf("out=%d\n",out);
allonq 0:fac0542384d7 121 //pc.printf(": %d\n",TPM0->CNT);
allonq 2:1c7e1110ac61 122 }
allonq 2:1c7e1110ac61 123 //else if(flag&&(syc_cnt>=syc_interval)){
allonq 2:1c7e1110ac61 124 //Syc(calculate_delay());syc_cnt=0;
allonq 2:1c7e1110ac61 125 //}
allonq 0:fac0542384d7 126 TPM0->SC|= 0x000000c8;
allonq 2:1c7e1110ac61 127 //NVIC_ClearPendingIRQ(TPM0_IRQn);
allonq 0:fac0542384d7 128 //pc.printf("SC_after=%d\n",TPM0->SC);
allonq 0:fac0542384d7 129 //}//pc.printf("count=%d",TPM0->CNT);
allonq 2:1c7e1110ac61 130
allonq 0:fac0542384d7 131 return;
allonq 0:fac0542384d7 132 }
allonq 0:fac0542384d7 133
allonq 2:1c7e1110ac61 134 void TPM1_IRQHandler(void){// time to restart the system
allonq 2:1c7e1110ac61 135 LED=1;
allonq 0:fac0542384d7 136 //TPM0->SC= 0x000000c8;
allonq 0:fac0542384d7 137 TPM0->CNT=0x0;
allonq 2:1c7e1110ac61 138 //TPM0->SC=0x00000048;
allonq 1:55f3661a2050 139 //NVIC_EnableIRQ(TPM0_IRQn);
allonq 2:1c7e1110ac61 140 //pc.printf("AfterMOD=%d\n",TPM0->MOD);
allonq 2:1c7e1110ac61 141 //LED=1;
allonq 0:fac0542384d7 142 TPM1->CNT=0x0;
allonq 2:1c7e1110ac61 143 //pc.printf("SC=%d",TPM1->SC);
allonq 0:fac0542384d7 144 TPM1->SC= 0x00000080;
allonq 2:1c7e1110ac61 145 //TPM1->SC= 0x00000000;
allonq 2:1c7e1110ac61 146 //pc.printf("SC_after=%d\n",TPM1->SC);
allonq 2:1c7e1110ac61 147 //pc.printf("Tic-Toc\n");
allonq 0:fac0542384d7 148 NVIC_DisableIRQ(TPM1_IRQn);
allonq 2:1c7e1110ac61 149 //NVIC_ClearPendingIRQ(TPM1_IRQn);
allonq 2:1c7e1110ac61 150 //flag=true;
allonq 2:1c7e1110ac61 151 //pc.printf("Tic-Toc\n");
allonq 0:fac0542384d7 152 return;
allonq 0:fac0542384d7 153 }
allonq 0:fac0542384d7 154
allonq 2:1c7e1110ac61 155
allonq 0:fac0542384d7 156
allonq 0:fac0542384d7 157 void Initial(){
allonq 2:1c7e1110ac61 158 Period=1000;
allonq 0:fac0542384d7 159 LED=1;
allonq 2:1c7e1110ac61 160 out=0;
allonq 2:1c7e1110ac61 161 SIM->SOPT2=0x05000000;
allonq 0:fac0542384d7 162 SIM->SCGC6=0x03000000;//enable TPM 0,1
allonq 0:fac0542384d7 163 TPM0->SC=0x0;
allonq 1:55f3661a2050 164
allonq 0:fac0542384d7 165 TPM0->CNT=0x0;
allonq 0:fac0542384d7 166 TPM0->SC=0x00000040;
allonq 0:fac0542384d7 167 TPM0->MOD=0x0000bb80;
allonq 0:fac0542384d7 168 TPM0->SC=0x00000048;//0008
allonq 0:fac0542384d7 169
allonq 0:fac0542384d7 170 TPM1->CNT=0x0;
allonq 0:fac0542384d7 171 TPM1->SC=0x00000040;
allonq 0:fac0542384d7 172 TPM1->MOD=0x0000ffff;
allonq 0:fac0542384d7 173 TPM1->SC=0x00000008;//0008
allonq 0:fac0542384d7 174 }
allonq 0:fac0542384d7 175 int main() {
allonq 1:55f3661a2050 176 loop_num=0;
allonq 0:fac0542384d7 177 cmd_received=false;
allonq 2:1c7e1110ac61 178 uart_bbb.attach(&receive_handler);
allonq 2:1c7e1110ac61 179 int CMD_Per=0;
allonq 0:fac0542384d7 180 Initial();
allonq 0:fac0542384d7 181
allonq 2:1c7e1110ac61 182 uart_bbb.baud(9600);
allonq 2:1c7e1110ac61 183 uart_bbb.attach(&receive_handler);
allonq 2:1c7e1110ac61 184
allonq 2:1c7e1110ac61 185 uart.baud(9600);
allonq 0:fac0542384d7 186 pc.baud(9600);
allonq 0:fac0542384d7 187
allonq 0:fac0542384d7 188 NVIC_SetVector(TPM0_IRQn, (uint32_t)&TPM0_IRQHandler);
allonq 0:fac0542384d7 189 NVIC_SetPriority(TPM0_IRQn, 1);
allonq 0:fac0542384d7 190 NVIC_EnableIRQ(TPM0_IRQn);
allonq 0:fac0542384d7 191
allonq 0:fac0542384d7 192 NVIC_SetVector(TPM1_IRQn, (uint32_t)&TPM1_IRQHandler);
allonq 0:fac0542384d7 193 NVIC_SetPriority(TPM1_IRQn, 0);
allonq 0:fac0542384d7 194 NVIC_EnableIRQ(TPM1_IRQn);
allonq 2:1c7e1110ac61 195 //wait(5);
allonq 2:1c7e1110ac61 196 //pc.printf("Initial done\n");
allonq 0:fac0542384d7 197
allonq 0:fac0542384d7 198
allonq 2:1c7e1110ac61 199 pc.printf("please enter T(in us)...\n");
allonq 2:1c7e1110ac61 200 //Syc(2000000);
allonq 2:1c7e1110ac61 201
allonq 0:fac0542384d7 202 //Syc(48000);
allonq 0:fac0542384d7 203
allonq 0:fac0542384d7 204 while(1){
allonq 0:fac0542384d7 205 if(cmd_received){
allonq 0:fac0542384d7 206 pc.printf(BBBbuffer);
allonq 0:fac0542384d7 207 for(int i=0;i<BBBbuff-1;i++){
allonq 2:1c7e1110ac61 208 CMD_Per*=10;
allonq 2:1c7e1110ac61 209 CMD_Per+=(BBBbuffer[i]-'0');
allonq 0:fac0542384d7 210 }
allonq 0:fac0542384d7 211 cmd_received=false;
allonq 0:fac0542384d7 212 BBBbuff=0;
allonq 2:1c7e1110ac61 213 Period=CMD_Per;
allonq 2:1c7e1110ac61 214 //pc.printf("before_syc");
allonq 2:1c7e1110ac61 215 //pc.printf("set=%d\n",state);
allonq 2:1c7e1110ac61 216 uart.putc('#');
allonq 2:1c7e1110ac61 217 synchronize(CMD_Per);
allonq 2:1c7e1110ac61 218 CMD_Per=0;
allonq 0:fac0542384d7 219 }
allonq 0:fac0542384d7 220
allonq 0:fac0542384d7 221 }
allonq 0:fac0542384d7 222
allonq 0:fac0542384d7 223
allonq 0:fac0542384d7 224 }