Alan Song
asd
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mbed official
Revision 86:58c3b7759abf, committed 2015-07-01
- Comitter:
- mbed_official
- Date:
- Wed Jul 01 08:15:48 2015 +0100
- Parent:
- 85:ef0a22cdf839
- Child:
- 87:e695cd34556b
- Commit message:
- Synchronized with git revision 7766e75dd858812cd79aedb3080349715f55dd56
Full URL: https://github.com/mbedmicro/mbed/commit/7766e75dd858812cd79aedb3080349715f55dd56/
GCC asm updates
Changed in this revision
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/rtx/TARGET_ARM7/ARM7/TOOLCHAIN_GCC/HAL_CM0.S Wed Jul 01 08:15:48 2015 +0100
@@ -0,0 +1,329 @@
+/*----------------------------------------------------------------------------
+ * RL-ARM - RTX
+ *----------------------------------------------------------------------------
+ * Name: HAL_CM0.S
+ * Purpose: Hardware Abstraction Layer for ARM7TDMI
+ * Rev.: V1.0
+ *----------------------------------------------------------------------------
+ *
+ * Copyright (c) 1999-2009 KEIL, 2009-2015 ARM Germany GmbH
+ * All rights reserved.
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * - Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of ARM nor the names of its contributors may be used
+ * to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *---------------------------------------------------------------------------*/
+
+ .file "HAL_CM0.S"
+ .syntax unified
+
+ .equ TCB_TSTACK, 40
+
+
+/*----------------------------------------------------------------------------
+ * Functions
+ *---------------------------------------------------------------------------*/
+
+ .arm
+
+ .section ".text"
+ .align 2
+
+/*-------------------------- Save Context --------------------------------*/
+/* MUST be called the first */
+.macro SaveContext
+
+ /* Push R0 as we are going to use the register. */ \
+ STMDB SP!, {R0}
+
+ /* Set R0 to SP(user) */
+ STMDB SP,{SP}^
+ NOP
+ SUB SP, SP, #4
+ LDMIA SP!,{R0}
+
+ /* Push the LR return address onto the user stack. */
+ STMDB R0!, {LR}
+
+ /* Now we have saved LR we can use it instead of R0. */
+ MOV LR, R0
+
+ /* Pop R0 so we can save it onto the system mode stack. */
+ LDMIA SP!, {R0}
+
+ /* Push all the system mode registers onto the task stack. */
+ STMDB LR,{R0-R12,LR}^ /* LR can not be changed because user's LR is used*/
+ NOP /* pass 1 cycle before changing LR */
+ SUB LR, LR, #14*4 /* change LR now -15 dwords (R0-R14)*/
+
+ /* Push the SPSR onto the task stack. */
+ MRS R0, SPSR
+ STMDB LR!, {R0}
+
+ /* Store the new top of stack for the task. */
+ LDR R0,=os_tsk
+ LDR R0, [R0] /* R0 = (tcb) os_tsk.run */
+ STR LR, [R0, TCB_TSTACK] /* tcb.tsk_stack = SP(user) */
+.endm
+
+/*-------------------------- Restore Context --------------------------------*/
+ .type RestoreContext, %function
+ .global RestoreContext
+RestoreContext:
+ .fnstart
+ .cantunwind
+ /* Set the LR to the task stack. */
+ LDR R0,=os_tsk
+ LDR R1, [R0, 4] /* R1 = (tcb) os_tsk.new */
+ STR R1, [R0] /* os_tsk.run = os_tsk_newk */
+ LDR LR, [R1, TCB_TSTACK] /* LR = tcb.tsk_stack */
+
+ /* Get the SPSR from the stack. */
+ LDMFD LR!, {R0} /* SPSR */
+ MSR SPSR, R0
+
+ /* Restore all system mode registers for the task. */
+ LDMFD LR, {R0-R12,LR}^
+ NOP
+
+ ADD LR, LR, 15*4 /* increase starck pointer */
+ /* Set SP(user) to LR */
+ STMDB SP!,{LR}
+ LDMIA SP,{SP}^
+ NOP
+ ADD SP, SP, #4
+
+ /* Restore the return address. */
+ LDR LR, [LR,#-4] /* last dword is task's PC register */
+
+ /* And return - correcting the offset in the LR to obtain the */
+ /* correct address. */
+ SUBS PC, LR, #4
+
+/*-------------------------- End --------------------------------*/
+ .fnend
+ .size RestoreContext, .-RestoreContext
+
+
+
+/*--------------------------- rt_set_PSP ------------------------------------*/
+
+# void rt_set_PSP (U32 stack);
+
+ .type rt_set_PSP, %function
+ .global rt_set_PSP
+rt_set_PSP:
+ .fnstart
+ .cantunwind
+
+ MOV SP,R0
+ BX LR
+
+ .fnend
+ .size rt_set_PSP, .-rt_set_PSP
+
+
+/*--------------------------- rt_get_PSP ------------------------------------*/
+
+# U32 rt_get_PSP (void);
+
+ .type rt_get_PSP, %function
+ .global rt_get_PSP
+rt_get_PSP:
+ .fnstart
+ .cantunwind
+
+ MOV R0,SP
+ BX LR
+
+ .fnend
+ .size rt_get_PSP, .-rt_get_PSP
+
+
+
+/*--------------------------- _alloc_box ------------------------------------*/
+
+# void *_alloc_box (void *box_mem);
+ /* Function wrapper for Unprivileged/Privileged mode. */
+
+ .type _alloc_box, %function
+ .global _alloc_box
+_alloc_box:
+ .fnstart
+ .cantunwind
+
+ LDR R3,=rt_alloc_box
+ MOV R12, R3
+ MRS R3, CPSR
+ AND R3, 0x1F
+ CMP R3, 0x12 /* IRQ mode*/
+ BNE PrivilegedA
+ CMP R3, 0x1F /* System mode*/
+ BNE PrivilegedA
+ SVC 0
+ BX LR
+PrivilegedA:
+ BX R12
+
+ .fnend
+ .size _alloc_box, .-_alloc_box
+
+
+/*--------------------------- _free_box -------------------------------------*/
+
+# int _free_box (void *box_mem, void *box);
+ /* Function wrapper for Unprivileged/Privileged mode. */
+
+ .type _free_box, %function
+ .global _free_box
+_free_box:
+ .fnstart
+ .cantunwind
+
+ LDR R3,=rt_free_box
+ MOV R12, R3
+ MRS R3, CPSR
+ AND R3, 0x1F
+ CMP R3, 0x12 /* IRQ mode*/
+ BNE PrivilegedA
+ CMP R3, 0x1F /* System mode*/
+ BNE PrivilegedA
+ SVC 0
+ BX LR
+PrivilegedF:
+ BX R12
+
+ .fnend
+ .size _free_box, .-_free_box
+
+
+/*-------------------------- SVC_Handler ------------------------------------*/
+
+# void SVC_Handler (void);
+
+ .type SVC_Handler, %function
+ .global SVC_Handler
+SVC_Handler:
+ .fnstart
+ .cantunwind
+ /* Within an IRQ ISR the link register has an offset from the true return
+ address, but an SWI ISR does not. Add the offset manually so the same
+ ISR return code can be used in both cases. */
+
+ STMFD SP!, {R0,LR} /* Store registers. */
+ ADD LR, LR, #4 /* Align LR with IRQ handler */
+ SaveContext
+ MOV R11, LR /* Save Task Stack Pointer */
+ LDMFD SP!, {R0,LR} /* Restore registers and return. */
+ STMFD SP!, {R11} /* Save Task Stack Pointer */
+
+ LDR R5, [LR,#-4] /* Calculate address of SWI instruction and load it into r5. */
+ BIC R5, R5,#0xff000000 /* Mask off top 8 bits of instruction to give SWI number. */
+
+ CMP R5, #0
+ BNE SVC_User /* User SVC Number > 0 */
+ MOV LR, PC /* set LR to return address */
+ BX R12 /* Call SVC Function */
+
+ LDMFD SP!, {R11} /* Load Task Stack Pointer */
+ STMIB R11!, {R0-R3} /* Store return values to Task stack */
+
+SVC_Exit:
+ B RestoreContext /* return to the task */
+
+ /*------------------- User SVC ------------------------------*/
+
+SVC_User:
+ LDR R6,=SVC_Count
+ LDR R6,[R6]
+ CMP R5,R6
+ LDMFDHI SP!, {R11}
+ BHI SVC_Done /* Overflow */
+
+ LDR R4,=SVC_Table - 4
+ LSLS R5,R5,#2
+ LDR R4,[R4,R5] /* Load SVC Function Address */
+ /* R0-R3,R12 are unchanged */
+ MOV LR, PC /* set LR to return address */
+ BX R4 /* Call SVC Function */
+
+ LDMFD SP!, {R11} /* Load Task Stack Pointer */
+ BEQ SVC_Exit /* no need in return values */
+
+ STMIB R11!, {R0-R3} /* Store return values to Task stack */
+SVC_Done:
+ B RestoreContext /* return to the task */
+
+ .fnend
+ .size SVC_Handler, .-SVC_Handler
+
+
+/*-------------------------- IRQ_Handler ---------------------------------*/
+
+# void IRQ_Handler (void);
+
+ .type IRQ_Handler, %function
+ .global IRQ_Handler
+IRQ_Handler:
+ .fnstart
+ .cantunwind
+
+ SaveContext
+
+ MOV R0, #0xFFFFFF00
+ LDR R0, [R0] /* Load address of raised IRQ handler*/
+
+ MOV LR, PC
+ BX R0
+
+ MOV R0, #0xFFFFFF00
+ STR R0, [R0] /* Clear interrupt */
+
+ B RestoreContext
+
+ .fnend
+ .size IRQ_Handler, .-IRQ_Handler
+
+/*-------------------------- SysTick_Handler --------------------------------*/
+
+# void SysTick_Handler (void);
+
+ .type SysTick_Handler, %function
+ .global SysTick_Handler
+SysTick_Handler:
+ .fnstart
+ .cantunwind
+
+ PUSH {LR}
+ BL rt_systick
+ POP {LR}
+ BX LR /* return to IRQ handler */
+
+/*-------------------------- End --------------------------------*/
+ .fnend
+ .size SysTick_Handler, .-SysTick_Handler
+
+
+/*----------------------------------------------------------------------------
+ * end of file
+ *---------------------------------------------------------------------------*/
+
+.end
\ No newline at end of file
--- a/rtx/TARGET_ARM7/ARM7/TOOLCHAIN_GCC/HAL_CM0.s Wed Jun 17 11:15:10 2015 +0100
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,329 +0,0 @@
-/*----------------------------------------------------------------------------
- * RL-ARM - RTX
- *----------------------------------------------------------------------------
- * Name: HAL_CM0.S
- * Purpose: Hardware Abstraction Layer for ARM7TDMI
- * Rev.: V1.0
- *----------------------------------------------------------------------------
- *
- * Copyright (c) 1999-2009 KEIL, 2009-2015 ARM Germany GmbH
- * All rights reserved.
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * - Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * - Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * - Neither the name of ARM nor the names of its contributors may be used
- * to endorse or promote products derived from this software without
- * specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *---------------------------------------------------------------------------*/
-
- .file "HAL_CM0.S"
- .syntax unified
-
- .equ TCB_TSTACK, 40
-
-
-/*----------------------------------------------------------------------------
- * Functions
- *---------------------------------------------------------------------------*/
-
- .arm
-
- .section ".text"
- .align 2
-
-/*-------------------------- Save Context --------------------------------*/
-/* MUST be called the first */
-.macro SaveContext
-
- /* Push R0 as we are going to use the register. */ \
- STMDB SP!, {R0}
-
- /* Set R0 to SP(user) */
- STMDB SP,{SP}^
- NOP
- SUB SP, SP, #4
- LDMIA SP!,{R0}
-
- /* Push the LR return address onto the user stack. */
- STMDB R0!, {LR}
-
- /* Now we have saved LR we can use it instead of R0. */
- MOV LR, R0
-
- /* Pop R0 so we can save it onto the system mode stack. */
- LDMIA SP!, {R0}
-
- /* Push all the system mode registers onto the task stack. */
- STMDB LR,{R0-R12,LR}^ /* LR can not be changed because user's LR is used*/
- NOP /* pass 1 cycle before changing LR */
- SUB LR, LR, #14*4 /* change LR now -15 dwords (R0-R14)*/
-
- /* Push the SPSR onto the task stack. */
- MRS R0, SPSR
- STMDB LR!, {R0}
-
- /* Store the new top of stack for the task. */
- LDR R0,=os_tsk
- LDR R0, [R0] /* R0 = (tcb) os_tsk.run */
- STR LR, [R0, TCB_TSTACK] /* tcb.tsk_stack = SP(user) */
-.endm
-
-/*-------------------------- Restore Context --------------------------------*/
- .type RestoreContext, %function
- .global RestoreContext
-RestoreContext:
- .fnstart
- .cantunwind
- /* Set the LR to the task stack. */
- LDR R0,=os_tsk
- LDR R1, [R0, 4] /* R1 = (tcb) os_tsk.new */
- STR R1, [R0] /* os_tsk.run = os_tsk_newk */
- LDR LR, [R1, TCB_TSTACK] /* LR = tcb.tsk_stack */
-
- /* Get the SPSR from the stack. */
- LDMFD LR!, {R0} /* SPSR */
- MSR SPSR, R0
-
- /* Restore all system mode registers for the task. */
- LDMFD LR, {R0-R12,LR}^
- NOP
-
- ADD LR, LR, 15*4 /* increase starck pointer */
- /* Set SP(user) to LR */
- STMDB SP!,{LR}
- LDMIA SP,{SP}^
- NOP
- ADD SP, SP, #4
-
- /* Restore the return address. */
- LDR LR, [LR,#-4] /* last dword is task's PC register */
-
- /* And return - correcting the offset in the LR to obtain the */
- /* correct address. */
- SUBS PC, LR, #4
-
-/*-------------------------- End --------------------------------*/
- .fnend
- .size RestoreContext, .-RestoreContext
-
-
-
-/*--------------------------- rt_set_PSP ------------------------------------*/
-
-# void rt_set_PSP (U32 stack);
-
- .type rt_set_PSP, %function
- .global rt_set_PSP
-rt_set_PSP:
- .fnstart
- .cantunwind
-
- MOV SP,R0
- BX LR
-
- .fnend
- .size rt_set_PSP, .-rt_set_PSP
-
-
-/*--------------------------- rt_get_PSP ------------------------------------*/
-
-# U32 rt_get_PSP (void);
-
- .type rt_get_PSP, %function
- .global rt_get_PSP
-rt_get_PSP:
- .fnstart
- .cantunwind
-
- MOV R0,SP
- BX LR
-
- .fnend
- .size rt_get_PSP, .-rt_get_PSP
-
-
-
-/*--------------------------- _alloc_box ------------------------------------*/
-
-# void *_alloc_box (void *box_mem);
- /* Function wrapper for Unprivileged/Privileged mode. */
-
- .type _alloc_box, %function
- .global _alloc_box
-_alloc_box:
- .fnstart
- .cantunwind
-
- LDR R3,=rt_alloc_box
- MOV R12, R3
- MRS R3, CPSR
- AND R3, 0x1F
- CMP R3, 0x12 /* IRQ mode*/
- BNE PrivilegedA
- CMP R3, 0x1F /* System mode*/
- BNE PrivilegedA
- SVC 0
- BX LR
-PrivilegedA:
- BX R12
-
- .fnend
- .size _alloc_box, .-_alloc_box
-
-
-/*--------------------------- _free_box -------------------------------------*/
-
-# int _free_box (void *box_mem, void *box);
- /* Function wrapper for Unprivileged/Privileged mode. */
-
- .type _free_box, %function
- .global _free_box
-_free_box:
- .fnstart
- .cantunwind
-
- LDR R3,=rt_free_box
- MOV R12, R3
- MRS R3, CPSR
- AND R3, 0x1F
- CMP R3, 0x12 /* IRQ mode*/
- BNE PrivilegedA
- CMP R3, 0x1F /* System mode*/
- BNE PrivilegedA
- SVC 0
- BX LR
-PrivilegedF:
- BX R12
-
- .fnend
- .size _free_box, .-_free_box
-
-
-/*-------------------------- SVC_Handler ------------------------------------*/
-
-# void SVC_Handler (void);
-
- .type SVC_Handler, %function
- .global SVC_Handler
-SVC_Handler:
- .fnstart
- .cantunwind
- /* Within an IRQ ISR the link register has an offset from the true return
- address, but an SWI ISR does not. Add the offset manually so the same
- ISR return code can be used in both cases. */
-
- STMFD SP!, {R0,LR} /* Store registers. */
- ADD LR, LR, #4 /* Align LR with IRQ handler */
- SaveContext
- MOV R11, LR /* Save Task Stack Pointer */
- LDMFD SP!, {R0,LR} /* Restore registers and return. */
- STMFD SP!, {R11} /* Save Task Stack Pointer */
-
- LDR R5, [LR,#-4] /* Calculate address of SWI instruction and load it into r5. */
- BIC R5, R5,#0xff000000 /* Mask off top 8 bits of instruction to give SWI number. */
-
- CMP R5, #0
- BNE SVC_User /* User SVC Number > 0 */
- MOV LR, PC /* set LR to return address */
- BX R12 /* Call SVC Function */
-
- LDMFD SP!, {R11} /* Load Task Stack Pointer */
- STMIB R11!, {R0-R3} /* Store return values to Task stack */
-
-SVC_Exit:
- B RestoreContext /* return to the task */
-
- /*------------------- User SVC ------------------------------*/
-
-SVC_User:
- LDR R6,=SVC_Count
- LDR R6,[R6]
- CMP R5,R6
- LDMFDHI SP!, {R11}
- BHI SVC_Done /* Overflow */
-
- LDR R4,=SVC_Table - 4
- LSLS R5,R5,#2
- LDR R4,[R4,R5] /* Load SVC Function Address */
- /* R0-R3,R12 are unchanged */
- MOV LR, PC /* set LR to return address */
- BX R4 /* Call SVC Function */
-
- LDMFD SP!, {R11} /* Load Task Stack Pointer */
- BEQ SVC_Exit /* no need in return values */
-
- STMIB R11!, {R0-R3} /* Store return values to Task stack */
-SVC_Done:
- B RestoreContext /* return to the task */
-
- .fnend
- .size SVC_Handler, .-SVC_Handler
-
-
-/*-------------------------- IRQ_Handler ---------------------------------*/
-
-# void IRQ_Handler (void);
-
- .type IRQ_Handler, %function
- .global IRQ_Handler
-IRQ_Handler:
- .fnstart
- .cantunwind
-
- SaveContext
-
- MOV R0, #0xFFFFFF00
- LDR R0, [R0] /* Load address of raised IRQ handler*/
-
- MOV LR, PC
- BX R0
-
- MOV R0, #0xFFFFFF00
- STR R0, [R0] /* Clear interrupt */
-
- B RestoreContext
-
- .fnend
- .size IRQ_Handler, .-IRQ_Handler
-
-/*-------------------------- SysTick_Handler --------------------------------*/
-
-# void SysTick_Handler (void);
-
- .type SysTick_Handler, %function
- .global SysTick_Handler
-SysTick_Handler:
- .fnstart
- .cantunwind
-
- PUSH {LR}
- BL rt_systick
- POP {LR}
- BX LR /* return to IRQ handler */
-
-/*-------------------------- End --------------------------------*/
- .fnend
- .size SysTick_Handler, .-SysTick_Handler
-
-
-/*----------------------------------------------------------------------------
- * end of file
- *---------------------------------------------------------------------------*/
-
-.end
\ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/rtx/TARGET_ARM7/ARM7/TOOLCHAIN_GCC/SVC_Table.S Wed Jul 01 08:15:48 2015 +0100 @@ -0,0 +1,56 @@ +;/*---------------------------------------------------------------------------- +; * RL-ARM - RTX +; *---------------------------------------------------------------------------- +; * Name: SVC_TABLE.S +; * Purpose: Pre-defined SVC Table for Cortex-M +; * Rev.: V4.60 +; *---------------------------------------------------------------------------- +; * +; * Copyright (c) 1999-2009 KEIL, 2009-2015 ARM Germany GmbH +; * All rights reserved. +; * Redistribution and use in source and binary forms, with or without +; * modification, are permitted provided that the following conditions are met: +; * - Redistributions of source code must retain the above copyright +; * notice, this list of conditions and the following disclaimer. +; * - Redistributions in binary form must reproduce the above copyright +; * notice, this list of conditions and the following disclaimer in the +; * documentation and/or other materials provided with the distribution. +; * - Neither the name of ARM nor the names of its contributors may be used +; * to endorse or promote products derived from this software without +; * specific prior written permission. +; * +; * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +; * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +; * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +; * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE +; * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +; * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +; * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +; * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +; * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +; * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +; * POSSIBILITY OF SUCH DAMAGE. +; *---------------------------------------------------------------------------*/ + + + .file "SVC_Table.S" + + + .section ".svc_table" + + .global SVC_Table +SVC_Table: +/* Insert user SVC functions here. SVC 0 used by RTL Kernel. */ +# .long __SVC_1 /* user SVC function */ +SVC_End: + + .global SVC_Count +SVC_Count: + .long (SVC_End-SVC_Table)/4 + + + .end + +/*---------------------------------------------------------------------------- + * end of file + *---------------------------------------------------------------------------*/
--- a/rtx/TARGET_ARM7/ARM7/TOOLCHAIN_GCC/SVC_Table.s Wed Jun 17 11:15:10 2015 +0100 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,56 +0,0 @@ -;/*---------------------------------------------------------------------------- -; * RL-ARM - RTX -; *---------------------------------------------------------------------------- -; * Name: SVC_TABLE.S -; * Purpose: Pre-defined SVC Table for Cortex-M -; * Rev.: V4.60 -; *---------------------------------------------------------------------------- -; * -; * Copyright (c) 1999-2009 KEIL, 2009-2015 ARM Germany GmbH -; * All rights reserved. -; * Redistribution and use in source and binary forms, with or without -; * modification, are permitted provided that the following conditions are met: -; * - Redistributions of source code must retain the above copyright -; * notice, this list of conditions and the following disclaimer. -; * - Redistributions in binary form must reproduce the above copyright -; * notice, this list of conditions and the following disclaimer in the -; * documentation and/or other materials provided with the distribution. -; * - Neither the name of ARM nor the names of its contributors may be used -; * to endorse or promote products derived from this software without -; * specific prior written permission. -; * -; * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -; * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -; * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -; * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE -; * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -; * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -; * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -; * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -; * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -; * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -; * POSSIBILITY OF SUCH DAMAGE. -; *---------------------------------------------------------------------------*/ - - - .file "SVC_Table.S" - - - .section ".svc_table" - - .global SVC_Table -SVC_Table: -/* Insert user SVC functions here. SVC 0 used by RTL Kernel. */ -# .long __SVC_1 /* user SVC function */ -SVC_End: - - .global SVC_Count -SVC_Count: - .long (SVC_End-SVC_Table)/4 - - - .end - -/*---------------------------------------------------------------------------- - * end of file - *---------------------------------------------------------------------------*/
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/rtx/TARGET_CORTEX_A/TOOLCHAIN_ARM/SVC_Table.S Wed Jul 01 08:15:48 2015 +0100 @@ -0,0 +1,57 @@ +;/*---------------------------------------------------------------------------- +; * RL-ARM - RTX +; *---------------------------------------------------------------------------- +; * Name: SVC_TABLE.S +; * Purpose: Pre-defined SVC Table for Cortex-M +; * Rev.: V4.60 +; *---------------------------------------------------------------------------- +; * +; * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH +; * All rights reserved. +; * Redistribution and use in source and binary forms, with or without +; * modification, are permitted provided that the following conditions are met: +; * - Redistributions of source code must retain the above copyright +; * notice, this list of conditions and the following disclaimer. +; * - Redistributions in binary form must reproduce the above copyright +; * notice, this list of conditions and the following disclaimer in the +; * documentation and/or other materials provided with the distribution. +; * - Neither the name of ARM nor the names of its contributors may be used +; * to endorse or promote products derived from this software without +; * specific prior written permission. +; * +; * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +; * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +; * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +; * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE +; * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +; * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +; * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +; * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +; * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +; * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +; * POSSIBILITY OF SUCH DAMAGE. +; *---------------------------------------------------------------------------*/ + + + AREA SVC_TABLE, CODE, READONLY + + EXPORT SVC_Count + +SVC_Cnt EQU (SVC_End-SVC_Table)/4 +SVC_Count DCD SVC_Cnt + +; Import user SVC functions here. +; IMPORT __SVC_1 + + EXPORT SVC_Table +SVC_Table +; Insert user SVC functions here. SVC 0 used by RTL Kernel. +; DCD __SVC_1 ; InitMemorySubsystem + +SVC_End + + END + +/*---------------------------------------------------------------------------- + * end of file + *---------------------------------------------------------------------------*/
--- a/rtx/TARGET_CORTEX_A/TOOLCHAIN_ARM/SVC_Table.s Wed Jun 17 11:15:10 2015 +0100 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,57 +0,0 @@ -;/*---------------------------------------------------------------------------- -; * RL-ARM - RTX -; *---------------------------------------------------------------------------- -; * Name: SVC_TABLE.S -; * Purpose: Pre-defined SVC Table for Cortex-M -; * Rev.: V4.60 -; *---------------------------------------------------------------------------- -; * -; * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH -; * All rights reserved. -; * Redistribution and use in source and binary forms, with or without -; * modification, are permitted provided that the following conditions are met: -; * - Redistributions of source code must retain the above copyright -; * notice, this list of conditions and the following disclaimer. -; * - Redistributions in binary form must reproduce the above copyright -; * notice, this list of conditions and the following disclaimer in the -; * documentation and/or other materials provided with the distribution. -; * - Neither the name of ARM nor the names of its contributors may be used -; * to endorse or promote products derived from this software without -; * specific prior written permission. -; * -; * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -; * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -; * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -; * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE -; * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -; * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -; * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -; * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -; * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -; * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -; * POSSIBILITY OF SUCH DAMAGE. -; *---------------------------------------------------------------------------*/ - - - AREA SVC_TABLE, CODE, READONLY - - EXPORT SVC_Count - -SVC_Cnt EQU (SVC_End-SVC_Table)/4 -SVC_Count DCD SVC_Cnt - -; Import user SVC functions here. -; IMPORT __SVC_1 - - EXPORT SVC_Table -SVC_Table -; Insert user SVC functions here. SVC 0 used by RTL Kernel. -; DCD __SVC_1 ; InitMemorySubsystem - -SVC_End - - END - -/*---------------------------------------------------------------------------- - * end of file - *---------------------------------------------------------------------------*/
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/rtx/TARGET_CORTEX_A/TOOLCHAIN_GCC/HAL_CA9.S Wed Jul 01 08:15:48 2015 +0100
@@ -0,0 +1,474 @@
+/*----------------------------------------------------------------------------
+ * RL-ARM - RTX
+ *----------------------------------------------------------------------------
+ * Name: HAL_CA9.c
+ * Purpose: Hardware Abstraction Layer for Cortex-A9
+ * Rev.: 3 Sept 2013
+ *----------------------------------------------------------------------------
+ *
+ * Copyright (c) 2012 - 2013 ARM Limited
+ * All rights reserved.
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * - Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of ARM nor the names of its contributors may be used
+ * to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *---------------------------------------------------------------------------*/
+
+ .global rt_set_PSP
+ .global rt_get_PSP
+ .global _alloc_box
+ .global _free_box
+ .global PendSV_Handler
+ .global OS_Tick_Handler
+
+ .EQU CPSR_T_BIT, 0x20
+ .EQU CPSR_I_BIT, 0x80
+ .EQU CPSR_F_BIT, 0x40
+
+ .EQU MODE_USR, 0x10
+ .EQU MODE_FIQ, 0x11
+ .EQU MODE_IRQ, 0x12
+ .EQU MODE_SVC, 0x13
+ .EQU MODE_ABT, 0x17
+ .EQU MODE_UND, 0x1B
+ .EQU MODE_SYS, 0x1F
+
+ .EQU TCB_TID, 3 /* 'task id' offset */
+ .EQU TCB_STACKF, 32 /* 'stack_frame' offset */
+ .EQU TCB_TSTACK, 36 /* 'tsk_stack' offset */
+
+ .extern rt_alloc_box
+ .extern os_tsk
+ .extern GICInterface_BASE
+ .extern rt_pop_req
+ .extern os_tick_irqack
+ .extern rt_systick
+
+/*----------------------------------------------------------------------------
+ * Functions
+ *---------------------------------------------------------------------------*/
+ .text
+@ For A-class, set USR/SYS stack
+@ __asm void rt_set_PSP (U32 stack) {
+rt_set_PSP:
+ .arm
+
+ MRS R1, CPSR
+ CPS #MODE_SYS @no effect in USR mode
+ ISB
+ MOV SP, R0
+ MSR CPSR_c, R1 @no effect in USR mode
+ ISB
+ BX LR
+
+@ }
+
+@ For A-class, get USR/SYS stack
+@ __asm U32 rt_get_PSP (void) {
+rt_get_PSP:
+ .arm
+
+ MRS R1, CPSR
+ CPS #MODE_SYS @no effect in USR mode
+ ISB
+ MOV R0, SP
+ MSR CPSR_c, R1 @no effect in USR mode
+ ISB
+ BX LR
+
+@ }
+
+/*--------------------------- _alloc_box ------------------------------------*/
+@ __asm void *_alloc_box (void *box_mem) {
+_alloc_box:
+ /* Function wrapper for Unprivileged/Privileged mode. */
+ .arm
+
+ LDR R12,=rt_alloc_box @ __cpp(rt_alloc_box)
+ MRS R2, CPSR
+ LSLS R2, #28
+ BXNE R12
+ SVC 0
+ BX LR
+@ }
+
+
+/*--------------------------- _free_box -------------------------------------*/
+@ __asm int _free_box (void *box_mem, void *box) {
+_free_box:
+ /* Function wrapper for Unprivileged/Privileged mode. */
+ .arm
+
+ LDR R12,=rt_free_box @ __cpp(rt_free_box)
+ MRS R2, CPSR
+ LSLS R2, #28
+ BXNE R12
+ SVC 0
+ BX LR
+
+@ }
+
+/*-------------------------- SVC_Handler -----------------------------------*/
+
+@ #pragma push
+@ #pragma arm
+@ __asm void SVC_Handler (void) {
+
+ .type SVC_Handler, %function
+ .global SVC_Handler
+SVC_Handler:
+@ PRESERVE8
+ .arm
+ .extern rt_tsk_lock
+ .extern rt_tsk_unlock
+ .extern SVC_Count
+ .extern SVC_Table
+ .extern rt_stk_check
+ .extern FPUEnable
+
+ .EQU Mode_SVC, 0x13
+
+ SRSDB SP!, #Mode_SVC @ Push LR_SVC and SPRS_SVC onto SVC mode stack
+ PUSH {R4} @ Push R4 so we can use it as a temp
+
+
+ MRS R4,SPSR @ Get SPSR
+ TST R4,#CPSR_T_BIT @ Check Thumb Bit
+ LDRNEH R4,[LR,#-2] @ Thumb: Load Halfword
+ BICNE R4,R4,#0xFF00 @ Extract SVC Number
+ LDREQ R4,[LR,#-4] @ ARM: Load Word
+ BICEQ R4,R4,#0xFF000000 @ Extract SVC Number
+
+ /* Lock out systick and re-enable interrupts */
+ PUSH {R0-R3,R12,LR}
+
+ AND R12, SP, #4 @ Ensure stack is 8-byte aligned
+ SUB SP, SP, R12 @ Adjust stack
+ PUSH {R12, LR} @ Store stack adjustment and dummy LR to SVC stack
+
+ BLX rt_tsk_lock
+ CPSIE i
+
+ POP {R12, LR} @ Get stack adjustment & discard dummy LR
+ ADD SP, SP, R12 @ Unadjust stack
+
+ POP {R0-R3,R12,LR}
+
+ CMP R4,#0
+ BNE SVC_User
+
+ MRS R4,SPSR
+ PUSH {R4} @ Push R4 so we can use it as a temp
+ AND R4, SP, #4 @ Ensure stack is 8-byte aligned
+ SUB SP, SP, R4 @ Adjust stack
+ PUSH {R4, LR} @ Store stack adjustment and dummy LR
+ BLX R12
+ POP {R4, LR} @ Get stack adjustment & discard dummy LR
+ ADD SP, SP, R4 @ Unadjust stack
+ POP {R4} @ Restore R4
+ MSR SPSR_cxsf,R4
+
+ /* Here we will be in SVC mode (even if coming in from PendSV_Handler or OS_Tick_Handler) */
+Sys_Switch:
+ LDR LR,=os_tsk @ __cpp(&os_tsk)
+ LDM LR,{R4,LR} @ os_tsk.run, os_tsk.new
+ CMP R4,LR
+ BNE switching
+
+ PUSH {R0-R3,R12,LR}
+
+ AND R12, SP, #4 @ Ensure stack is 8-byte aligned
+ SUB SP, SP, R12 @ Adjust stack
+ PUSH {R12, LR} @ Store stack adjustment and dummy LR to SVC stack
+
+ CPSID i
+ BLX rt_tsk_unlock
+
+ POP {R12, LR} @ Get stack adjustment & discard dummy LR
+ ADD SP, SP, R12 @ Unadjust stack
+
+ POP {R0-R3,R12,LR}
+ POP {R4}
+ RFEFD SP! @ Return from exception, no task switch
+
+switching:
+ CLREX
+ CMP R4,#0
+ ADDEQ SP,SP,#12 @ Original R4, LR & SPSR do not need to be popped when we are paging in a different task
+ BEQ SVC_Next @ Runtask deleted?
+
+
+ PUSH {R8-R11} @ R4 and LR already stacked
+ MOV R10,R4 @ Preserve os_tsk.run
+ MOV R11,LR @ Preserve os_tsk.new
+
+ ADD R8,SP,#16 @ Unstack R4,LR
+ LDMIA R8,{R4,LR}
+
+ SUB SP,SP,#4 @ Make space on the stack for the next instn
+ STMIA SP,{SP}^ @ Put User SP onto stack
+ POP {R8} @ Pop User SP into R8
+
+ MRS R9,SPSR
+ STMDB R8!,{R9} @ User CPSR
+ STMDB R8!,{LR} @ User PC
+ STMDB R8,{LR}^ @ User LR
+ SUB R8,R8,#4 @ No writeback for store of User LR
+ STMDB R8!,{R0-R3,R12} @ User R0-R3,R12
+ MOV R3,R10 @ os_tsk.run
+ MOV LR,R11 @ os_tsk.new
+ POP {R9-R12}
+ ADD SP,SP,#12 @ Fix up SP for unstack of R4, LR & SPSR
+ STMDB R8!,{R4-R7,R9-R12} @ User R4-R11
+
+ @ If applicable, stack VFP state
+ MRC p15,0,R1,c1,c0,2 @ VFP/NEON access enabled? (CPACR)
+ AND R2,R1,#0x00F00000
+ CMP R2,#0x00F00000
+ BNE no_outgoing_vfp
+ VMRS R2,FPSCR
+ STMDB R8!,{R2,R4} @ Push FPSCR, maintain 8-byte alignment
+ VSTMDB R8!,{S0-S31}
+ LDRB R2,[R3,#TCB_STACKF] @ Record in TCB that VFP state is stacked
+ ORR R2,#2
+ STRB R2,[R3,#TCB_STACKF]
+
+no_outgoing_vfp:
+ STR R8,[R3,#TCB_TSTACK]
+ MOV R4,LR
+
+ PUSH {R4} @ Push R4 so we can use it as a temp
+ AND R4, SP, #4 @ Ensure stack is 8-byte aligned
+ SUB SP, SP, R4 @ Adjust stack
+ PUSH {R4, LR} @ Store stack adjustment and dummy LR to SVC stack
+
+ BLX rt_stk_check
+
+ POP {R4, LR} @ Get stack adjustment & discard dummy LR
+ ADD SP, SP, R4 @ Unadjust stack
+ POP {R4} @ Restore R4
+
+ MOV LR,R4
+
+SVC_Next: @ R4 == os_tsk.run, LR == os_tsk.new, R0-R3, R5-R12 corruptible
+ LDR R1,=os_tsk @ __cpp(&os_tsk), os_tsk.run = os_tsk.new
+ STR LR,[R1]
+ LDRB R1,[LR,#TCB_TID] @ os_tsk.run->task_id
+ LSL R1,#8 @ Store PROCID
+ MCR p15,0,R1,c13,c0,1 @ Write CONTEXTIDR
+
+ LDR R0,[LR,#TCB_TSTACK] @ os_tsk.run->tsk_stack
+
+ @ Does incoming task have VFP state in stack?
+ LDRB R3,[LR,#TCB_STACKF]
+ TST R3,#0x2
+ MRC p15,0,R1,c1,c0,2 @ Read CPACR
+ ANDEQ R1,R1,#0xFF0FFFFF @ Disable VFP access if incoming task does not have stacked VFP state
+ ORRNE R1,R1,#0x00F00000 @ Enable VFP access if incoming task does have stacked VFP state
+ MCR p15,0,R1,c1,c0,2 @ Write CPACR
+ BEQ no_incoming_vfp
+ ISB @ We only need the sync if we enabled, otherwise we will context switch before next VFP instruction anyway
+ VLDMIA R0!,{S0-S31}
+ LDR R2,[R0]
+ VMSR FPSCR,R2
+ ADD R0,R0,#8
+
+no_incoming_vfp:
+ LDR R1,[R0,#60] @ Restore User CPSR
+ MSR SPSR_cxsf,R1
+ LDMIA R0!,{R4-R11} @ Restore User R4-R11
+ ADD R0,R0,#4 @ Restore User R1-R3,R12
+ LDMIA R0!,{R1-R3,R12}
+ LDMIA R0,{LR}^ @ Restore User LR
+ ADD R0,R0,#4 @ No writeback for load to user LR
+ LDMIA R0!,{LR} @ Restore User PC
+ ADD R0,R0,#4 @ Correct User SP for unstacked user CPSR
+
+ PUSH {R0} @ Push R0 onto stack
+ LDMIA SP,{SP}^ @ Get R0 off stack into User SP
+ ADD SP,SP,#4 @ Put SP back
+
+ LDR R0,[R0,#-32] @ Restore R0
+
+ PUSH {R0-R3,R12,LR}
+
+ AND R12, SP, #4 @ Ensure stack is 8-byte aligned
+ SUB SP, SP, R12 @ Adjust stack
+ PUSH {R12, LR} @ Store stack adjustment and dummy LR to SVC stack
+
+ CPSID i
+ BLX rt_tsk_unlock
+
+ POP {R12, LR} @ Get stack adjustment & discard dummy LR
+ ADD SP, SP, R12 @ Unadjust stack
+
+ POP {R0-R3,R12,LR}
+
+ MOVS PC,LR @ Return from exception
+
+
+ /*------------------- User SVC -------------------------------*/
+
+SVC_User:
+ LDR R12,=SVC_Count
+ LDR R12,[R12]
+ CMP R4,R12 @ Check for overflow
+ BHI SVC_Done
+
+ LDR R12,=SVC_Table-4
+ LDR R12,[R12,R4,LSL #2] @ Load SVC Function Address
+ MRS R4,SPSR @ Save SPSR
+ PUSH {R4} @ Push R4 so we can use it as a temp
+ AND R4, SP, #4 @ Ensure stack is 8-byte aligned
+ SUB SP, SP, R4 @ Adjust stack
+ PUSH {R4, LR} @ Store stack adjustment and dummy LR
+ BLX R12 @ Call SVC Function
+ POP {R4, LR} @ Get stack adjustment & discard dummy LR
+ ADD SP, SP, R4 @ Unadjust stack
+ POP {R4} @ Restore R4
+ MSR SPSR_cxsf,R4 @ Restore SPSR
+
+SVC_Done:
+ PUSH {R0-R3,R12,LR}
+
+ PUSH {R4} @ Push R4 so we can use it as a temp
+ AND R4, SP, #4 @ Ensure stack is 8-byte aligned
+ SUB SP, SP, R4 @ Adjust stack
+ PUSH {R4, LR} @ Store stack adjustment and dummy LR
+
+ CPSID i
+ BLX rt_tsk_unlock
+
+ POP {R4, LR} @ Get stack adjustment & discard dummy LR
+ ADD SP, SP, R4 @ Unadjust stack
+ POP {R4} @ Restore R4
+
+ POP {R0-R3,R12,LR}
+ POP {R4}
+ RFEFD SP! @ Return from exception
+
+@ }
+
+@ #pragma pop
+
+
+@ #pragma push
+@ #pragma arm
+@ __asm void PendSV_Handler (U32 IRQn) {
+PendSV_Handler:
+ .arm
+
+ .extern rt_tsk_lock
+ .extern IRQNestLevel
+
+ ADD SP,SP,#8 @ fix up stack pointer (R0 has been pushed and will never be popped, R1 was pushed for stack alignment)
+
+ @ Disable systick interrupts, then write EOIR. We want interrupts disabled before we enter the context switcher.
+ PUSH {R0, R1}
+ BLX rt_tsk_lock
+ POP {R0, R1}
+ LDR R1, =GICInterface_BASE @ __cpp(&GICInterface_BASE)
+ LDR R1, [R1, #0]
+ STR R0, [R1, #0x10]
+
+ LDR R0, =IRQNestLevel @ Get address of nesting counter
+ LDR R1, [R0]
+ SUB R1, R1, #1 @ Decrement nesting counter
+ STR R1, [R0]
+
+ BLX rt_pop_req @ __cpp(rt_pop_req)
+
+ POP {R1, LR} @ Get stack adjustment & discard dummy LR
+ ADD SP, SP, R1 @ Unadjust stack
+
+ LDR R0,[SP,#24]
+ MSR SPSR_cxsf,R0
+ POP {R0-R3,R12} @ Leave SPSR & LR on the stack
+ PUSH {R4}
+ B Sys_Switch
+@ }
+@ #pragma pop
+
+@ #pragma push
+@ #pragma arm
+@ __asm void OS_Tick_Handler (U32 IRQn) {
+OS_Tick_Handler:
+ .arm
+
+ ADD SP,SP,#8 @ fix up stack pointer (R0 has been pushed and will never be popped, R1 was pushed for stack alignment)
+
+ PUSH {R0, R1}
+ BLX rt_tsk_lock
+ POP {R0, R1}
+ LDR R1, =GICInterface_BASE @ __cpp(&GICInterface_BASE)
+ LDR R1, [R1, #0]
+ STR R0, [R1, #0x10]
+
+ LDR R0, =IRQNestLevel @ Get address of nesting counter
+ LDR R1, [R0]
+ SUB R1, R1, #1 @ Decrement nesting counter
+ STR R1, [R0]
+
+ BLX os_tick_irqack @ __cpp(os_tick_irqack)
+ BLX rt_systick @ __cpp(rt_systick)
+
+ POP {R1, LR} @ Get stack adjustment & discard dummy LR
+ ADD SP, SP, R1 @ Unadjust stack
+
+ LDR R0,[SP,#24]
+ MSR SPSR_cxsf,R0
+ POP {R0-R3,R12} @ Leave SPSR & LR on the stack
+ PUSH {R4}
+ B Sys_Switch
+@ }
+@ #pragma pop
+
+ .global __set_PSP
+@ __STATIC_ASM void __set_PSP(uint32_t topOfProcStack)
+@ {
+__set_PSP:
+@ PRESERVE8
+ .arm
+
+ BIC R0, R0, #7 @ensure stack is 8-byte aligned
+ MRS R1, CPSR
+ CPS #MODE_SYS @no effect in USR mode
+ MOV SP, R0
+ MSR CPSR_c, R1 @no effect in USR mode
+ ISB
+ BX LR
+
+@ }
+
+ .global __set_CPS_USR
+@ __STATIC_ASM void __set_CPS_USR(void)
+@ {
+__set_CPS_USR:
+ .arm
+
+ CPS #MODE_USR
+ BX LR
+@ }
+
+ .END
+/*----------------------------------------------------------------------------
+ * end of file
+ *---------------------------------------------------------------------------*/
--- a/rtx/TARGET_CORTEX_A/TOOLCHAIN_GCC/HAL_CA9.s Wed Jun 17 11:15:10 2015 +0100
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,474 +0,0 @@
-/*----------------------------------------------------------------------------
- * RL-ARM - RTX
- *----------------------------------------------------------------------------
- * Name: HAL_CA9.c
- * Purpose: Hardware Abstraction Layer for Cortex-A9
- * Rev.: 3 Sept 2013
- *----------------------------------------------------------------------------
- *
- * Copyright (c) 2012 - 2013 ARM Limited
- * All rights reserved.
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * - Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * - Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * - Neither the name of ARM nor the names of its contributors may be used
- * to endorse or promote products derived from this software without
- * specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *---------------------------------------------------------------------------*/
-
- .global rt_set_PSP
- .global rt_get_PSP
- .global _alloc_box
- .global _free_box
- .global PendSV_Handler
- .global OS_Tick_Handler
-
- .EQU CPSR_T_BIT, 0x20
- .EQU CPSR_I_BIT, 0x80
- .EQU CPSR_F_BIT, 0x40
-
- .EQU MODE_USR, 0x10
- .EQU MODE_FIQ, 0x11
- .EQU MODE_IRQ, 0x12
- .EQU MODE_SVC, 0x13
- .EQU MODE_ABT, 0x17
- .EQU MODE_UND, 0x1B
- .EQU MODE_SYS, 0x1F
-
- .EQU TCB_TID, 3 /* 'task id' offset */
- .EQU TCB_STACKF, 32 /* 'stack_frame' offset */
- .EQU TCB_TSTACK, 36 /* 'tsk_stack' offset */
-
- .extern rt_alloc_box
- .extern os_tsk
- .extern GICInterface_BASE
- .extern rt_pop_req
- .extern os_tick_irqack
- .extern rt_systick
-
-/*----------------------------------------------------------------------------
- * Functions
- *---------------------------------------------------------------------------*/
- .text
-@ For A-class, set USR/SYS stack
-@ __asm void rt_set_PSP (U32 stack) {
-rt_set_PSP:
- .arm
-
- MRS R1, CPSR
- CPS #MODE_SYS @no effect in USR mode
- ISB
- MOV SP, R0
- MSR CPSR_c, R1 @no effect in USR mode
- ISB
- BX LR
-
-@ }
-
-@ For A-class, get USR/SYS stack
-@ __asm U32 rt_get_PSP (void) {
-rt_get_PSP:
- .arm
-
- MRS R1, CPSR
- CPS #MODE_SYS @no effect in USR mode
- ISB
- MOV R0, SP
- MSR CPSR_c, R1 @no effect in USR mode
- ISB
- BX LR
-
-@ }
-
-/*--------------------------- _alloc_box ------------------------------------*/
-@ __asm void *_alloc_box (void *box_mem) {
-_alloc_box:
- /* Function wrapper for Unprivileged/Privileged mode. */
- .arm
-
- LDR R12,=rt_alloc_box @ __cpp(rt_alloc_box)
- MRS R2, CPSR
- LSLS R2, #28
- BXNE R12
- SVC 0
- BX LR
-@ }
-
-
-/*--------------------------- _free_box -------------------------------------*/
-@ __asm int _free_box (void *box_mem, void *box) {
-_free_box:
- /* Function wrapper for Unprivileged/Privileged mode. */
- .arm
-
- LDR R12,=rt_free_box @ __cpp(rt_free_box)
- MRS R2, CPSR
- LSLS R2, #28
- BXNE R12
- SVC 0
- BX LR
-
-@ }
-
-/*-------------------------- SVC_Handler -----------------------------------*/
-
-@ #pragma push
-@ #pragma arm
-@ __asm void SVC_Handler (void) {
-
- .type SVC_Handler, %function
- .global SVC_Handler
-SVC_Handler:
-@ PRESERVE8
- .arm
- .extern rt_tsk_lock
- .extern rt_tsk_unlock
- .extern SVC_Count
- .extern SVC_Table
- .extern rt_stk_check
- .extern FPUEnable
-
- .EQU Mode_SVC, 0x13
-
- SRSDB SP!, #Mode_SVC @ Push LR_SVC and SPRS_SVC onto SVC mode stack
- PUSH {R4} @ Push R4 so we can use it as a temp
-
-
- MRS R4,SPSR @ Get SPSR
- TST R4,#CPSR_T_BIT @ Check Thumb Bit
- LDRNEH R4,[LR,#-2] @ Thumb: Load Halfword
- BICNE R4,R4,#0xFF00 @ Extract SVC Number
- LDREQ R4,[LR,#-4] @ ARM: Load Word
- BICEQ R4,R4,#0xFF000000 @ Extract SVC Number
-
- /* Lock out systick and re-enable interrupts */
- PUSH {R0-R3,R12,LR}
-
- AND R12, SP, #4 @ Ensure stack is 8-byte aligned
- SUB SP, SP, R12 @ Adjust stack
- PUSH {R12, LR} @ Store stack adjustment and dummy LR to SVC stack
-
- BLX rt_tsk_lock
- CPSIE i
-
- POP {R12, LR} @ Get stack adjustment & discard dummy LR
- ADD SP, SP, R12 @ Unadjust stack
-
- POP {R0-R3,R12,LR}
-
- CMP R4,#0
- BNE SVC_User
-
- MRS R4,SPSR
- PUSH {R4} @ Push R4 so we can use it as a temp
- AND R4, SP, #4 @ Ensure stack is 8-byte aligned
- SUB SP, SP, R4 @ Adjust stack
- PUSH {R4, LR} @ Store stack adjustment and dummy LR
- BLX R12
- POP {R4, LR} @ Get stack adjustment & discard dummy LR
- ADD SP, SP, R4 @ Unadjust stack
- POP {R4} @ Restore R4
- MSR SPSR_cxsf,R4
-
- /* Here we will be in SVC mode (even if coming in from PendSV_Handler or OS_Tick_Handler) */
-Sys_Switch:
- LDR LR,=os_tsk @ __cpp(&os_tsk)
- LDM LR,{R4,LR} @ os_tsk.run, os_tsk.new
- CMP R4,LR
- BNE switching
-
- PUSH {R0-R3,R12,LR}
-
- AND R12, SP, #4 @ Ensure stack is 8-byte aligned
- SUB SP, SP, R12 @ Adjust stack
- PUSH {R12, LR} @ Store stack adjustment and dummy LR to SVC stack
-
- CPSID i
- BLX rt_tsk_unlock
-
- POP {R12, LR} @ Get stack adjustment & discard dummy LR
- ADD SP, SP, R12 @ Unadjust stack
-
- POP {R0-R3,R12,LR}
- POP {R4}
- RFEFD SP! @ Return from exception, no task switch
-
-switching:
- CLREX
- CMP R4,#0
- ADDEQ SP,SP,#12 @ Original R4, LR & SPSR do not need to be popped when we are paging in a different task
- BEQ SVC_Next @ Runtask deleted?
-
-
- PUSH {R8-R11} @ R4 and LR already stacked
- MOV R10,R4 @ Preserve os_tsk.run
- MOV R11,LR @ Preserve os_tsk.new
-
- ADD R8,SP,#16 @ Unstack R4,LR
- LDMIA R8,{R4,LR}
-
- SUB SP,SP,#4 @ Make space on the stack for the next instn
- STMIA SP,{SP}^ @ Put User SP onto stack
- POP {R8} @ Pop User SP into R8
-
- MRS R9,SPSR
- STMDB R8!,{R9} @ User CPSR
- STMDB R8!,{LR} @ User PC
- STMDB R8,{LR}^ @ User LR
- SUB R8,R8,#4 @ No writeback for store of User LR
- STMDB R8!,{R0-R3,R12} @ User R0-R3,R12
- MOV R3,R10 @ os_tsk.run
- MOV LR,R11 @ os_tsk.new
- POP {R9-R12}
- ADD SP,SP,#12 @ Fix up SP for unstack of R4, LR & SPSR
- STMDB R8!,{R4-R7,R9-R12} @ User R4-R11
-
- @ If applicable, stack VFP state
- MRC p15,0,R1,c1,c0,2 @ VFP/NEON access enabled? (CPACR)
- AND R2,R1,#0x00F00000
- CMP R2,#0x00F00000
- BNE no_outgoing_vfp
- VMRS R2,FPSCR
- STMDB R8!,{R2,R4} @ Push FPSCR, maintain 8-byte alignment
- VSTMDB R8!,{S0-S31}
- LDRB R2,[R3,#TCB_STACKF] @ Record in TCB that VFP state is stacked
- ORR R2,#2
- STRB R2,[R3,#TCB_STACKF]
-
-no_outgoing_vfp:
- STR R8,[R3,#TCB_TSTACK]
- MOV R4,LR
-
- PUSH {R4} @ Push R4 so we can use it as a temp
- AND R4, SP, #4 @ Ensure stack is 8-byte aligned
- SUB SP, SP, R4 @ Adjust stack
- PUSH {R4, LR} @ Store stack adjustment and dummy LR to SVC stack
-
- BLX rt_stk_check
-
- POP {R4, LR} @ Get stack adjustment & discard dummy LR
- ADD SP, SP, R4 @ Unadjust stack
- POP {R4} @ Restore R4
-
- MOV LR,R4
-
-SVC_Next: @ R4 == os_tsk.run, LR == os_tsk.new, R0-R3, R5-R12 corruptible
- LDR R1,=os_tsk @ __cpp(&os_tsk), os_tsk.run = os_tsk.new
- STR LR,[R1]
- LDRB R1,[LR,#TCB_TID] @ os_tsk.run->task_id
- LSL R1,#8 @ Store PROCID
- MCR p15,0,R1,c13,c0,1 @ Write CONTEXTIDR
-
- LDR R0,[LR,#TCB_TSTACK] @ os_tsk.run->tsk_stack
-
- @ Does incoming task have VFP state in stack?
- LDRB R3,[LR,#TCB_STACKF]
- TST R3,#0x2
- MRC p15,0,R1,c1,c0,2 @ Read CPACR
- ANDEQ R1,R1,#0xFF0FFFFF @ Disable VFP access if incoming task does not have stacked VFP state
- ORRNE R1,R1,#0x00F00000 @ Enable VFP access if incoming task does have stacked VFP state
- MCR p15,0,R1,c1,c0,2 @ Write CPACR
- BEQ no_incoming_vfp
- ISB @ We only need the sync if we enabled, otherwise we will context switch before next VFP instruction anyway
- VLDMIA R0!,{S0-S31}
- LDR R2,[R0]
- VMSR FPSCR,R2
- ADD R0,R0,#8
-
-no_incoming_vfp:
- LDR R1,[R0,#60] @ Restore User CPSR
- MSR SPSR_cxsf,R1
- LDMIA R0!,{R4-R11} @ Restore User R4-R11
- ADD R0,R0,#4 @ Restore User R1-R3,R12
- LDMIA R0!,{R1-R3,R12}
- LDMIA R0,{LR}^ @ Restore User LR
- ADD R0,R0,#4 @ No writeback for load to user LR
- LDMIA R0!,{LR} @ Restore User PC
- ADD R0,R0,#4 @ Correct User SP for unstacked user CPSR
-
- PUSH {R0} @ Push R0 onto stack
- LDMIA SP,{SP}^ @ Get R0 off stack into User SP
- ADD SP,SP,#4 @ Put SP back
-
- LDR R0,[R0,#-32] @ Restore R0
-
- PUSH {R0-R3,R12,LR}
-
- AND R12, SP, #4 @ Ensure stack is 8-byte aligned
- SUB SP, SP, R12 @ Adjust stack
- PUSH {R12, LR} @ Store stack adjustment and dummy LR to SVC stack
-
- CPSID i
- BLX rt_tsk_unlock
-
- POP {R12, LR} @ Get stack adjustment & discard dummy LR
- ADD SP, SP, R12 @ Unadjust stack
-
- POP {R0-R3,R12,LR}
-
- MOVS PC,LR @ Return from exception
-
-
- /*------------------- User SVC -------------------------------*/
-
-SVC_User:
- LDR R12,=SVC_Count
- LDR R12,[R12]
- CMP R4,R12 @ Check for overflow
- BHI SVC_Done
-
- LDR R12,=SVC_Table-4
- LDR R12,[R12,R4,LSL #2] @ Load SVC Function Address
- MRS R4,SPSR @ Save SPSR
- PUSH {R4} @ Push R4 so we can use it as a temp
- AND R4, SP, #4 @ Ensure stack is 8-byte aligned
- SUB SP, SP, R4 @ Adjust stack
- PUSH {R4, LR} @ Store stack adjustment and dummy LR
- BLX R12 @ Call SVC Function
- POP {R4, LR} @ Get stack adjustment & discard dummy LR
- ADD SP, SP, R4 @ Unadjust stack
- POP {R4} @ Restore R4
- MSR SPSR_cxsf,R4 @ Restore SPSR
-
-SVC_Done:
- PUSH {R0-R3,R12,LR}
-
- PUSH {R4} @ Push R4 so we can use it as a temp
- AND R4, SP, #4 @ Ensure stack is 8-byte aligned
- SUB SP, SP, R4 @ Adjust stack
- PUSH {R4, LR} @ Store stack adjustment and dummy LR
-
- CPSID i
- BLX rt_tsk_unlock
-
- POP {R4, LR} @ Get stack adjustment & discard dummy LR
- ADD SP, SP, R4 @ Unadjust stack
- POP {R4} @ Restore R4
-
- POP {R0-R3,R12,LR}
- POP {R4}
- RFEFD SP! @ Return from exception
-
-@ }
-
-@ #pragma pop
-
-
-@ #pragma push
-@ #pragma arm
-@ __asm void PendSV_Handler (U32 IRQn) {
-PendSV_Handler:
- .arm
-
- .extern rt_tsk_lock
- .extern IRQNestLevel
-
- ADD SP,SP,#8 @ fix up stack pointer (R0 has been pushed and will never be popped, R1 was pushed for stack alignment)
-
- @ Disable systick interrupts, then write EOIR. We want interrupts disabled before we enter the context switcher.
- PUSH {R0, R1}
- BLX rt_tsk_lock
- POP {R0, R1}
- LDR R1, =GICInterface_BASE @ __cpp(&GICInterface_BASE)
- LDR R1, [R1, #0]
- STR R0, [R1, #0x10]
-
- LDR R0, =IRQNestLevel @ Get address of nesting counter
- LDR R1, [R0]
- SUB R1, R1, #1 @ Decrement nesting counter
- STR R1, [R0]
-
- BLX rt_pop_req @ __cpp(rt_pop_req)
-
- POP {R1, LR} @ Get stack adjustment & discard dummy LR
- ADD SP, SP, R1 @ Unadjust stack
-
- LDR R0,[SP,#24]
- MSR SPSR_cxsf,R0
- POP {R0-R3,R12} @ Leave SPSR & LR on the stack
- PUSH {R4}
- B Sys_Switch
-@ }
-@ #pragma pop
-
-@ #pragma push
-@ #pragma arm
-@ __asm void OS_Tick_Handler (U32 IRQn) {
-OS_Tick_Handler:
- .arm
-
- ADD SP,SP,#8 @ fix up stack pointer (R0 has been pushed and will never be popped, R1 was pushed for stack alignment)
-
- PUSH {R0, R1}
- BLX rt_tsk_lock
- POP {R0, R1}
- LDR R1, =GICInterface_BASE @ __cpp(&GICInterface_BASE)
- LDR R1, [R1, #0]
- STR R0, [R1, #0x10]
-
- LDR R0, =IRQNestLevel @ Get address of nesting counter
- LDR R1, [R0]
- SUB R1, R1, #1 @ Decrement nesting counter
- STR R1, [R0]
-
- BLX os_tick_irqack @ __cpp(os_tick_irqack)
- BLX rt_systick @ __cpp(rt_systick)
-
- POP {R1, LR} @ Get stack adjustment & discard dummy LR
- ADD SP, SP, R1 @ Unadjust stack
-
- LDR R0,[SP,#24]
- MSR SPSR_cxsf,R0
- POP {R0-R3,R12} @ Leave SPSR & LR on the stack
- PUSH {R4}
- B Sys_Switch
-@ }
-@ #pragma pop
-
- .global __set_PSP
-@ __STATIC_ASM void __set_PSP(uint32_t topOfProcStack)
-@ {
-__set_PSP:
-@ PRESERVE8
- .arm
-
- BIC R0, R0, #7 @ensure stack is 8-byte aligned
- MRS R1, CPSR
- CPS #MODE_SYS @no effect in USR mode
- MOV SP, R0
- MSR CPSR_c, R1 @no effect in USR mode
- ISB
- BX LR
-
-@ }
-
- .global __set_CPS_USR
-@ __STATIC_ASM void __set_CPS_USR(void)
-@ {
-__set_CPS_USR:
- .arm
-
- CPS #MODE_USR
- BX LR
-@ }
-
- .END
-/*----------------------------------------------------------------------------
- * end of file
- *---------------------------------------------------------------------------*/
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/rtx/TARGET_CORTEX_A/TOOLCHAIN_GCC/SVC_Table.S Wed Jul 01 08:15:48 2015 +0100 @@ -0,0 +1,60 @@ +/*---------------------------------------------------------------------------- + * RL-ARM - RTX + *---------------------------------------------------------------------------- + * Name: SVC_TABLE.S + * Purpose: Pre-defined SVC Table for Cortex-M + * Rev.: V4.70 + *---------------------------------------------------------------------------- + * + * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - Neither the name of ARM nor the names of its contributors may be used + * to endorse or promote products derived from this software without + * specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + *---------------------------------------------------------------------------*/ + + + .section SVC_TABLE @, CODE, READONLY + .align 5 + + .global SVC_Count + +.EQU SVC_Cnt, (SVC_End-SVC_Table)/4 + +SVC_Count: + .word SVC_Cnt + +@ Import user SVC functions here. +@ .extern __SVC_1 + .global SVC_Table +SVC_Table: +@ Insert user SVC functions here. SVC 0 used by RTL Kernel. +@ .word __SVC_1 @ InitMemorySubsystem + +@SVC_End +SVC_End: + + .END + +/*---------------------------------------------------------------------------- + * end of file + *---------------------------------------------------------------------------*/
--- a/rtx/TARGET_CORTEX_A/TOOLCHAIN_GCC/SVC_Table.s Wed Jun 17 11:15:10 2015 +0100 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,60 +0,0 @@ -/*---------------------------------------------------------------------------- - * RL-ARM - RTX - *---------------------------------------------------------------------------- - * Name: SVC_TABLE.S - * Purpose: Pre-defined SVC Table for Cortex-M - * Rev.: V4.70 - *---------------------------------------------------------------------------- - * - * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH - * All rights reserved. - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - Neither the name of ARM nor the names of its contributors may be used - * to endorse or promote products derived from this software without - * specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - *---------------------------------------------------------------------------*/ - - - .section SVC_TABLE @, CODE, READONLY - .align 5 - - .global SVC_Count - -.EQU SVC_Cnt, (SVC_End-SVC_Table)/4 - -SVC_Count: - .word SVC_Cnt - -@ Import user SVC functions here. -@ .extern __SVC_1 - .global SVC_Table -SVC_Table: -@ Insert user SVC functions here. SVC 0 used by RTL Kernel. -@ .word __SVC_1 @ InitMemorySubsystem - -@SVC_End -SVC_End: - - .END - -/*---------------------------------------------------------------------------- - * end of file - *---------------------------------------------------------------------------*/
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/rtx/TARGET_CORTEX_M/TARGET_M0/TOOLCHAIN_ARM/SVC_Table.S Wed Jul 01 08:15:48 2015 +0100 @@ -0,0 +1,57 @@ +;/*---------------------------------------------------------------------------- +; * RL-ARM - RTX +; *---------------------------------------------------------------------------- +; * Name: SVC_TABLE.S +; * Purpose: Pre-defined SVC Table for Cortex-M +; * Rev.: V4.60 +; *---------------------------------------------------------------------------- +; * +; * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH +; * All rights reserved. +; * Redistribution and use in source and binary forms, with or without +; * modification, are permitted provided that the following conditions are met: +; * - Redistributions of source code must retain the above copyright +; * notice, this list of conditions and the following disclaimer. +; * - Redistributions in binary form must reproduce the above copyright +; * notice, this list of conditions and the following disclaimer in the +; * documentation and/or other materials provided with the distribution. +; * - Neither the name of ARM nor the names of its contributors may be used +; * to endorse or promote products derived from this software without +; * specific prior written permission. +; * +; * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +; * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +; * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +; * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE +; * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +; * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +; * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +; * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +; * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +; * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +; * POSSIBILITY OF SUCH DAMAGE. +; *---------------------------------------------------------------------------*/ + + + AREA SVC_TABLE, CODE, READONLY + + EXPORT SVC_Count + +SVC_Cnt EQU (SVC_End-SVC_Table)/4 +SVC_Count DCD SVC_Cnt + +; Import user SVC functions here. +; IMPORT __SVC_1 + + EXPORT SVC_Table +SVC_Table +; Insert user SVC functions here. SVC 0 used by RTL Kernel. +; DCD __SVC_1 ; user SVC function + +SVC_End + + END + +/*---------------------------------------------------------------------------- + * end of file + *---------------------------------------------------------------------------*/
--- a/rtx/TARGET_CORTEX_M/TARGET_M0/TOOLCHAIN_ARM/SVC_Table.s Wed Jun 17 11:15:10 2015 +0100 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,57 +0,0 @@ -;/*---------------------------------------------------------------------------- -; * RL-ARM - RTX -; *---------------------------------------------------------------------------- -; * Name: SVC_TABLE.S -; * Purpose: Pre-defined SVC Table for Cortex-M -; * Rev.: V4.60 -; *---------------------------------------------------------------------------- -; * -; * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH -; * All rights reserved. -; * Redistribution and use in source and binary forms, with or without -; * modification, are permitted provided that the following conditions are met: -; * - Redistributions of source code must retain the above copyright -; * notice, this list of conditions and the following disclaimer. -; * - Redistributions in binary form must reproduce the above copyright -; * notice, this list of conditions and the following disclaimer in the -; * documentation and/or other materials provided with the distribution. -; * - Neither the name of ARM nor the names of its contributors may be used -; * to endorse or promote products derived from this software without -; * specific prior written permission. -; * -; * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -; * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -; * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -; * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE -; * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -; * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -; * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -; * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -; * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -; * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -; * POSSIBILITY OF SUCH DAMAGE. -; *---------------------------------------------------------------------------*/ - - - AREA SVC_TABLE, CODE, READONLY - - EXPORT SVC_Count - -SVC_Cnt EQU (SVC_End-SVC_Table)/4 -SVC_Count DCD SVC_Cnt - -; Import user SVC functions here. -; IMPORT __SVC_1 - - EXPORT SVC_Table -SVC_Table -; Insert user SVC functions here. SVC 0 used by RTL Kernel. -; DCD __SVC_1 ; user SVC function - -SVC_End - - END - -/*---------------------------------------------------------------------------- - * end of file - *---------------------------------------------------------------------------*/
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/rtx/TARGET_CORTEX_M/TARGET_M0/TOOLCHAIN_GCC/HAL_CM0.S Wed Jul 01 08:15:48 2015 +0100
@@ -0,0 +1,370 @@
+/*----------------------------------------------------------------------------
+ * RL-ARM - RTX
+ *----------------------------------------------------------------------------
+ * Name: HAL_CM0.S
+ * Purpose: Hardware Abstraction Layer for Cortex-M0
+ * Rev.: V4.60
+ *----------------------------------------------------------------------------
+ *
+ * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
+ * All rights reserved.
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * - Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of ARM nor the names of its contributors may be used
+ * to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *---------------------------------------------------------------------------*/
+
+ .file "HAL_CM0.S"
+ .syntax unified
+
+ .equ TCB_TSTACK, 40
+
+
+/*----------------------------------------------------------------------------
+ * Functions
+ *---------------------------------------------------------------------------*/
+
+ .thumb
+
+ .section ".text"
+ .align 2
+
+
+/*--------------------------- rt_set_PSP ------------------------------------*/
+
+# void rt_set_PSP (U32 stack);
+
+ .thumb_func
+ .type rt_set_PSP, %function
+ .global rt_set_PSP
+rt_set_PSP:
+ .fnstart
+ .cantunwind
+
+ MSR PSP,R0
+ BX LR
+
+ .fnend
+ .size rt_set_PSP, .-rt_set_PSP
+
+
+/*--------------------------- rt_get_PSP ------------------------------------*/
+
+# U32 rt_get_PSP (void);
+
+ .thumb_func
+ .type rt_get_PSP, %function
+ .global rt_get_PSP
+rt_get_PSP:
+ .fnstart
+ .cantunwind
+
+ MRS R0,PSP
+ BX LR
+
+ .fnend
+ .size rt_get_PSP, .-rt_get_PSP
+
+
+/*--------------------------- os_set_env ------------------------------------*/
+
+# void os_set_env (void);
+ /* Switch to Unprivileged/Privileged Thread mode, use PSP. */
+
+ .thumb_func
+ .type os_set_env, %function
+ .global os_set_env
+os_set_env:
+ .fnstart
+ .cantunwind
+
+ MOV R0,SP /* PSP = MSP */
+ MSR PSP,R0
+ LDR R0,=os_flags
+ LDRB R0,[R0]
+ LSLS R0,#31
+ BNE PrivilegedE
+ MOVS R0,#0x03 /* Unprivileged Thread mode, use PSP */
+ MSR CONTROL,R0
+ BX LR
+PrivilegedE:
+ MOVS R0,#0x02 /* Privileged Thread mode, use PSP */
+ MSR CONTROL,R0
+ BX LR
+
+ .fnend
+ .size os_set_env, .-os_set_env
+
+
+/*--------------------------- _alloc_box ------------------------------------*/
+
+# void *_alloc_box (void *box_mem);
+ /* Function wrapper for Unprivileged/Privileged mode. */
+
+ .thumb_func
+ .type _alloc_box, %function
+ .global _alloc_box
+_alloc_box:
+ .fnstart
+ .cantunwind
+
+ LDR R3,=rt_alloc_box
+ MOV R12,R3
+ MRS R3,IPSR
+ LSLS R3,#24
+ BNE PrivilegedA
+ MRS R3,CONTROL
+ LSLS R3,#31
+ BEQ PrivilegedA
+ SVC 0
+ BX LR
+PrivilegedA:
+ BX R12
+
+ .fnend
+ .size _alloc_box, .-_alloc_box
+
+
+/*--------------------------- _free_box -------------------------------------*/
+
+# int _free_box (void *box_mem, void *box);
+ /* Function wrapper for Unprivileged/Privileged mode. */
+
+ .thumb_func
+ .type _free_box, %function
+ .global _free_box
+_free_box:
+ .fnstart
+ .cantunwind
+
+ LDR R3,=rt_free_box
+ MOV R12,R3
+ MRS R3,IPSR
+ LSLS R3,#24
+ BNE PrivilegedF
+ MRS R3,CONTROL
+ LSLS R3,#31
+ BEQ PrivilegedF
+ SVC 0
+ BX LR
+PrivilegedF:
+ BX R12
+
+ .fnend
+ .size _free_box, .-_free_box
+
+
+/*-------------------------- SVC_Handler ------------------------------------*/
+
+# void SVC_Handler (void);
+
+ .thumb_func
+ .type SVC_Handler, %function
+ .global SVC_Handler
+SVC_Handler:
+ .fnstart
+ .cantunwind
+
+ MRS R0,PSP /* Read PSP */
+ LDR R1,[R0,#24] /* Read Saved PC from Stack */
+ SUBS R1,R1,#2 /* Point to SVC Instruction */
+ LDRB R1,[R1] /* Load SVC Number */
+ CMP R1,#0
+ BNE SVC_User /* User SVC Number > 0 */
+
+ MOV LR,R4
+ LDMIA R0,{R0-R3,R4} /* Read R0-R3,R12 from stack */
+ MOV R12,R4
+ MOV R4,LR
+ BLX R12 /* Call SVC Function */
+
+ MRS R3,PSP /* Read PSP */
+ STMIA R3!,{R0-R2} /* Store return values */
+
+ LDR R3,=os_tsk
+ LDMIA R3!,{R1,R2} /* os_tsk.run, os_tsk.new */
+ CMP R1,R2
+ BEQ SVC_Exit /* no task switch */
+
+ SUBS R3,#8
+ CMP R1,#0 /* Runtask deleted? */
+ BEQ SVC_Next
+
+ MRS R0,PSP /* Read PSP */
+ SUBS R0,R0,#32 /* Adjust Start Address */
+ STR R0,[R1,#TCB_TSTACK] /* Update os_tsk.run->tsk_stack */
+ STMIA R0!,{R4-R7} /* Save old context (R4-R7) */
+ MOV R4,R8
+ MOV R5,R9
+ MOV R6,R10
+ MOV R7,R11
+ STMIA R0!,{R4-R7} /* Save old context (R8-R11) */
+
+ PUSH {R2,R3}
+ BL rt_stk_check /* Check for Stack overflow */
+ POP {R2,R3}
+
+SVC_Next:
+ STR R2,[R3] /* os_tsk.run = os_tsk.new */
+
+ LDR R0,[R2,#TCB_TSTACK] /* os_tsk.new->tsk_stack */
+ ADDS R0,R0,#16 /* Adjust Start Address */
+ LDMIA R0!,{R4-R7} /* Restore new Context (R8-R11) */
+ MOV R8,R4
+ MOV R9,R5
+ MOV R10,R6
+ MOV R11,R7
+ MSR PSP,R0 /* Write PSP */
+ SUBS R0,R0,#32 /* Adjust Start Address */
+ LDMIA R0!,{R4-R7} /* Restore new Context (R4-R7) */
+
+SVC_Exit:
+ MOVS R0,#~0xFFFFFFFD /* Set EXC_RETURN value */
+ MVNS R0,R0
+ BX R0 /* RETI to Thread Mode, use PSP */
+
+ /*------------------- User SVC ------------------------------*/
+
+SVC_User:
+ PUSH {R4,LR} /* Save Registers */
+ LDR R2,=SVC_Count
+ LDR R2,[R2]
+ CMP R1,R2
+ BHI SVC_Done /* Overflow */
+
+ LDR R4,=SVC_Table-4
+ LSLS R1,R1,#2
+ LDR R4,[R4,R1] /* Load SVC Function Address */
+ MOV LR,R4
+
+ LDMIA R0,{R0-R3,R4} /* Read R0-R3,R12 from stack */
+ MOV R12,R4
+ BLX LR /* Call SVC Function */
+
+ MRS R4,PSP /* Read PSP */
+ STMIA R4!,{R0-R3} /* Function return values */
+SVC_Done:
+ POP {R4,PC} /* RETI */
+
+ .fnend
+ .size SVC_Handler, .-SVC_Handler
+
+
+/*-------------------------- PendSV_Handler ---------------------------------*/
+
+# void PendSV_Handler (void);
+
+ .thumb_func
+ .type PendSV_Handler, %function
+ .global PendSV_Handler
+ .global Sys_Switch
+PendSV_Handler:
+ .fnstart
+ .cantunwind
+
+ BL rt_pop_req
+
+Sys_Switch:
+ LDR R3,=os_tsk
+ LDMIA R3!,{R1,R2} /* os_tsk.run, os_tsk.new */
+ CMP R1,R2
+ BEQ Sys_Exit /* no task switch */
+
+ SUBS R3,#8
+
+ MRS R0,PSP /* Read PSP */
+ SUBS R0,R0,#32 /* Adjust Start Address */
+ STR R0,[R1,#TCB_TSTACK] /* Update os_tsk.run->tsk_stack */
+ STMIA R0!,{R4-R7} /* Save old context (R4-R7) */
+ MOV R4,R8
+ MOV R5,R9
+ MOV R6,R10
+ MOV R7,R11
+ STMIA R0!,{R4-R7} /* Save old context (R8-R11) */
+
+ PUSH {R2,R3}
+ BL rt_stk_check /* Check for Stack overflow */
+ POP {R2,R3}
+
+ STR R2,[R3] /* os_tsk.run = os_tsk.new */
+
+ LDR R0,[R2,#TCB_TSTACK] /* os_tsk.new->tsk_stack */
+ ADDS R0,R0,#16 /* Adjust Start Address */
+ LDMIA R0!,{R4-R7} /* Restore new Context (R8-R11) */
+ MOV R8,R4
+ MOV R9,R5
+ MOV R10,R6
+ MOV R11,R7
+ MSR PSP,R0 /* Write PSP */
+ SUBS R0,R0,#32 /* Adjust Start Address */
+ LDMIA R0!,{R4-R7} /* Restore new Context (R4-R7) */
+
+Sys_Exit:
+ MOVS R0,#~0xFFFFFFFD /* Set EXC_RETURN value */
+ MVNS R0,R0
+ BX R0 /* RETI to Thread Mode, use PSP */
+
+ .fnend
+ .size PendSV_Handler, .-PendSV_Handler
+
+
+/*-------------------------- SysTick_Handler --------------------------------*/
+
+# void SysTick_Handler (void);
+
+ .thumb_func
+ .type SysTick_Handler, %function
+ .global SysTick_Handler
+SysTick_Handler:
+ .fnstart
+ .cantunwind
+
+ BL rt_systick
+ B Sys_Switch
+
+ .fnend
+ .size SysTick_Handler, .-SysTick_Handler
+
+
+/*-------------------------- OS_Tick_Handler --------------------------------*/
+
+# void OS_Tick_Handler (void);
+
+ .thumb_func
+ .type OS_Tick_Handler, %function
+ .global OS_Tick_Handler
+OS_Tick_Handler:
+ .fnstart
+ .cantunwind
+
+ BL os_tick_irqack
+ BL rt_systick
+ B Sys_Switch
+
+ .fnend
+ .size OS_Tick_Handler, .-OS_Tick_Handler
+
+
+ .end
+
+/*----------------------------------------------------------------------------
+ * end of file
+ *---------------------------------------------------------------------------*/
--- a/rtx/TARGET_CORTEX_M/TARGET_M0/TOOLCHAIN_GCC/HAL_CM0.s Wed Jun 17 11:15:10 2015 +0100
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,370 +0,0 @@
-/*----------------------------------------------------------------------------
- * RL-ARM - RTX
- *----------------------------------------------------------------------------
- * Name: HAL_CM0.S
- * Purpose: Hardware Abstraction Layer for Cortex-M0
- * Rev.: V4.60
- *----------------------------------------------------------------------------
- *
- * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
- * All rights reserved.
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * - Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * - Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * - Neither the name of ARM nor the names of its contributors may be used
- * to endorse or promote products derived from this software without
- * specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *---------------------------------------------------------------------------*/
-
- .file "HAL_CM0.S"
- .syntax unified
-
- .equ TCB_TSTACK, 40
-
-
-/*----------------------------------------------------------------------------
- * Functions
- *---------------------------------------------------------------------------*/
-
- .thumb
-
- .section ".text"
- .align 2
-
-
-/*--------------------------- rt_set_PSP ------------------------------------*/
-
-# void rt_set_PSP (U32 stack);
-
- .thumb_func
- .type rt_set_PSP, %function
- .global rt_set_PSP
-rt_set_PSP:
- .fnstart
- .cantunwind
-
- MSR PSP,R0
- BX LR
-
- .fnend
- .size rt_set_PSP, .-rt_set_PSP
-
-
-/*--------------------------- rt_get_PSP ------------------------------------*/
-
-# U32 rt_get_PSP (void);
-
- .thumb_func
- .type rt_get_PSP, %function
- .global rt_get_PSP
-rt_get_PSP:
- .fnstart
- .cantunwind
-
- MRS R0,PSP
- BX LR
-
- .fnend
- .size rt_get_PSP, .-rt_get_PSP
-
-
-/*--------------------------- os_set_env ------------------------------------*/
-
-# void os_set_env (void);
- /* Switch to Unprivileged/Privileged Thread mode, use PSP. */
-
- .thumb_func
- .type os_set_env, %function
- .global os_set_env
-os_set_env:
- .fnstart
- .cantunwind
-
- MOV R0,SP /* PSP = MSP */
- MSR PSP,R0
- LDR R0,=os_flags
- LDRB R0,[R0]
- LSLS R0,#31
- BNE PrivilegedE
- MOVS R0,#0x03 /* Unprivileged Thread mode, use PSP */
- MSR CONTROL,R0
- BX LR
-PrivilegedE:
- MOVS R0,#0x02 /* Privileged Thread mode, use PSP */
- MSR CONTROL,R0
- BX LR
-
- .fnend
- .size os_set_env, .-os_set_env
-
-
-/*--------------------------- _alloc_box ------------------------------------*/
-
-# void *_alloc_box (void *box_mem);
- /* Function wrapper for Unprivileged/Privileged mode. */
-
- .thumb_func
- .type _alloc_box, %function
- .global _alloc_box
-_alloc_box:
- .fnstart
- .cantunwind
-
- LDR R3,=rt_alloc_box
- MOV R12,R3
- MRS R3,IPSR
- LSLS R3,#24
- BNE PrivilegedA
- MRS R3,CONTROL
- LSLS R3,#31
- BEQ PrivilegedA
- SVC 0
- BX LR
-PrivilegedA:
- BX R12
-
- .fnend
- .size _alloc_box, .-_alloc_box
-
-
-/*--------------------------- _free_box -------------------------------------*/
-
-# int _free_box (void *box_mem, void *box);
- /* Function wrapper for Unprivileged/Privileged mode. */
-
- .thumb_func
- .type _free_box, %function
- .global _free_box
-_free_box:
- .fnstart
- .cantunwind
-
- LDR R3,=rt_free_box
- MOV R12,R3
- MRS R3,IPSR
- LSLS R3,#24
- BNE PrivilegedF
- MRS R3,CONTROL
- LSLS R3,#31
- BEQ PrivilegedF
- SVC 0
- BX LR
-PrivilegedF:
- BX R12
-
- .fnend
- .size _free_box, .-_free_box
-
-
-/*-------------------------- SVC_Handler ------------------------------------*/
-
-# void SVC_Handler (void);
-
- .thumb_func
- .type SVC_Handler, %function
- .global SVC_Handler
-SVC_Handler:
- .fnstart
- .cantunwind
-
- MRS R0,PSP /* Read PSP */
- LDR R1,[R0,#24] /* Read Saved PC from Stack */
- SUBS R1,R1,#2 /* Point to SVC Instruction */
- LDRB R1,[R1] /* Load SVC Number */
- CMP R1,#0
- BNE SVC_User /* User SVC Number > 0 */
-
- MOV LR,R4
- LDMIA R0,{R0-R3,R4} /* Read R0-R3,R12 from stack */
- MOV R12,R4
- MOV R4,LR
- BLX R12 /* Call SVC Function */
-
- MRS R3,PSP /* Read PSP */
- STMIA R3!,{R0-R2} /* Store return values */
-
- LDR R3,=os_tsk
- LDMIA R3!,{R1,R2} /* os_tsk.run, os_tsk.new */
- CMP R1,R2
- BEQ SVC_Exit /* no task switch */
-
- SUBS R3,#8
- CMP R1,#0 /* Runtask deleted? */
- BEQ SVC_Next
-
- MRS R0,PSP /* Read PSP */
- SUBS R0,R0,#32 /* Adjust Start Address */
- STR R0,[R1,#TCB_TSTACK] /* Update os_tsk.run->tsk_stack */
- STMIA R0!,{R4-R7} /* Save old context (R4-R7) */
- MOV R4,R8
- MOV R5,R9
- MOV R6,R10
- MOV R7,R11
- STMIA R0!,{R4-R7} /* Save old context (R8-R11) */
-
- PUSH {R2,R3}
- BL rt_stk_check /* Check for Stack overflow */
- POP {R2,R3}
-
-SVC_Next:
- STR R2,[R3] /* os_tsk.run = os_tsk.new */
-
- LDR R0,[R2,#TCB_TSTACK] /* os_tsk.new->tsk_stack */
- ADDS R0,R0,#16 /* Adjust Start Address */
- LDMIA R0!,{R4-R7} /* Restore new Context (R8-R11) */
- MOV R8,R4
- MOV R9,R5
- MOV R10,R6
- MOV R11,R7
- MSR PSP,R0 /* Write PSP */
- SUBS R0,R0,#32 /* Adjust Start Address */
- LDMIA R0!,{R4-R7} /* Restore new Context (R4-R7) */
-
-SVC_Exit:
- MOVS R0,#~0xFFFFFFFD /* Set EXC_RETURN value */
- MVNS R0,R0
- BX R0 /* RETI to Thread Mode, use PSP */
-
- /*------------------- User SVC ------------------------------*/
-
-SVC_User:
- PUSH {R4,LR} /* Save Registers */
- LDR R2,=SVC_Count
- LDR R2,[R2]
- CMP R1,R2
- BHI SVC_Done /* Overflow */
-
- LDR R4,=SVC_Table-4
- LSLS R1,R1,#2
- LDR R4,[R4,R1] /* Load SVC Function Address */
- MOV LR,R4
-
- LDMIA R0,{R0-R3,R4} /* Read R0-R3,R12 from stack */
- MOV R12,R4
- BLX LR /* Call SVC Function */
-
- MRS R4,PSP /* Read PSP */
- STMIA R4!,{R0-R3} /* Function return values */
-SVC_Done:
- POP {R4,PC} /* RETI */
-
- .fnend
- .size SVC_Handler, .-SVC_Handler
-
-
-/*-------------------------- PendSV_Handler ---------------------------------*/
-
-# void PendSV_Handler (void);
-
- .thumb_func
- .type PendSV_Handler, %function
- .global PendSV_Handler
- .global Sys_Switch
-PendSV_Handler:
- .fnstart
- .cantunwind
-
- BL rt_pop_req
-
-Sys_Switch:
- LDR R3,=os_tsk
- LDMIA R3!,{R1,R2} /* os_tsk.run, os_tsk.new */
- CMP R1,R2
- BEQ Sys_Exit /* no task switch */
-
- SUBS R3,#8
-
- MRS R0,PSP /* Read PSP */
- SUBS R0,R0,#32 /* Adjust Start Address */
- STR R0,[R1,#TCB_TSTACK] /* Update os_tsk.run->tsk_stack */
- STMIA R0!,{R4-R7} /* Save old context (R4-R7) */
- MOV R4,R8
- MOV R5,R9
- MOV R6,R10
- MOV R7,R11
- STMIA R0!,{R4-R7} /* Save old context (R8-R11) */
-
- PUSH {R2,R3}
- BL rt_stk_check /* Check for Stack overflow */
- POP {R2,R3}
-
- STR R2,[R3] /* os_tsk.run = os_tsk.new */
-
- LDR R0,[R2,#TCB_TSTACK] /* os_tsk.new->tsk_stack */
- ADDS R0,R0,#16 /* Adjust Start Address */
- LDMIA R0!,{R4-R7} /* Restore new Context (R8-R11) */
- MOV R8,R4
- MOV R9,R5
- MOV R10,R6
- MOV R11,R7
- MSR PSP,R0 /* Write PSP */
- SUBS R0,R0,#32 /* Adjust Start Address */
- LDMIA R0!,{R4-R7} /* Restore new Context (R4-R7) */
-
-Sys_Exit:
- MOVS R0,#~0xFFFFFFFD /* Set EXC_RETURN value */
- MVNS R0,R0
- BX R0 /* RETI to Thread Mode, use PSP */
-
- .fnend
- .size PendSV_Handler, .-PendSV_Handler
-
-
-/*-------------------------- SysTick_Handler --------------------------------*/
-
-# void SysTick_Handler (void);
-
- .thumb_func
- .type SysTick_Handler, %function
- .global SysTick_Handler
-SysTick_Handler:
- .fnstart
- .cantunwind
-
- BL rt_systick
- B Sys_Switch
-
- .fnend
- .size SysTick_Handler, .-SysTick_Handler
-
-
-/*-------------------------- OS_Tick_Handler --------------------------------*/
-
-# void OS_Tick_Handler (void);
-
- .thumb_func
- .type OS_Tick_Handler, %function
- .global OS_Tick_Handler
-OS_Tick_Handler:
- .fnstart
- .cantunwind
-
- BL os_tick_irqack
- BL rt_systick
- B Sys_Switch
-
- .fnend
- .size OS_Tick_Handler, .-OS_Tick_Handler
-
-
- .end
-
-/*----------------------------------------------------------------------------
- * end of file
- *---------------------------------------------------------------------------*/
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/rtx/TARGET_CORTEX_M/TARGET_M0/TOOLCHAIN_GCC/SVC_Table.S Wed Jul 01 08:15:48 2015 +0100 @@ -0,0 +1,56 @@ +;/*---------------------------------------------------------------------------- +; * RL-ARM - RTX +; *---------------------------------------------------------------------------- +; * Name: SVC_TABLE.S +; * Purpose: Pre-defined SVC Table for Cortex-M +; * Rev.: V4.60 +; *---------------------------------------------------------------------------- +; * +; * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH +; * All rights reserved. +; * Redistribution and use in source and binary forms, with or without +; * modification, are permitted provided that the following conditions are met: +; * - Redistributions of source code must retain the above copyright +; * notice, this list of conditions and the following disclaimer. +; * - Redistributions in binary form must reproduce the above copyright +; * notice, this list of conditions and the following disclaimer in the +; * documentation and/or other materials provided with the distribution. +; * - Neither the name of ARM nor the names of its contributors may be used +; * to endorse or promote products derived from this software without +; * specific prior written permission. +; * +; * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +; * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +; * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +; * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE +; * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +; * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +; * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +; * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +; * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +; * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +; * POSSIBILITY OF SUCH DAMAGE. +; *---------------------------------------------------------------------------*/ + + + .file "SVC_Table.S" + + + .section ".svc_table" + + .global SVC_Table +SVC_Table: +/* Insert user SVC functions here. SVC 0 used by RTL Kernel. */ +# .long __SVC_1 /* user SVC function */ +SVC_End: + + .global SVC_Count +SVC_Count: + .long (SVC_End-SVC_Table)/4 + + + .end + +/*---------------------------------------------------------------------------- + * end of file + *---------------------------------------------------------------------------*/
--- a/rtx/TARGET_CORTEX_M/TARGET_M0/TOOLCHAIN_GCC/SVC_Table.s Wed Jun 17 11:15:10 2015 +0100 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,56 +0,0 @@ -;/*---------------------------------------------------------------------------- -; * RL-ARM - RTX -; *---------------------------------------------------------------------------- -; * Name: SVC_TABLE.S -; * Purpose: Pre-defined SVC Table for Cortex-M -; * Rev.: V4.60 -; *---------------------------------------------------------------------------- -; * -; * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH -; * All rights reserved. -; * Redistribution and use in source and binary forms, with or without -; * modification, are permitted provided that the following conditions are met: -; * - Redistributions of source code must retain the above copyright -; * notice, this list of conditions and the following disclaimer. -; * - Redistributions in binary form must reproduce the above copyright -; * notice, this list of conditions and the following disclaimer in the -; * documentation and/or other materials provided with the distribution. -; * - Neither the name of ARM nor the names of its contributors may be used -; * to endorse or promote products derived from this software without -; * specific prior written permission. -; * -; * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -; * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -; * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -; * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE -; * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -; * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -; * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -; * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -; * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -; * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -; * POSSIBILITY OF SUCH DAMAGE. -; *---------------------------------------------------------------------------*/ - - - .file "SVC_Table.S" - - - .section ".svc_table" - - .global SVC_Table -SVC_Table: -/* Insert user SVC functions here. SVC 0 used by RTL Kernel. */ -# .long __SVC_1 /* user SVC function */ -SVC_End: - - .global SVC_Count -SVC_Count: - .long (SVC_End-SVC_Table)/4 - - - .end - -/*---------------------------------------------------------------------------- - * end of file - *---------------------------------------------------------------------------*/
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/rtx/TARGET_CORTEX_M/TARGET_M0/TOOLCHAIN_IAR/HAL_CM0.S Wed Jul 01 08:15:48 2015 +0100
@@ -0,0 +1,312 @@
+/*----------------------------------------------------------------------------
+ * CMSIS-RTOS - RTX
+ *----------------------------------------------------------------------------
+ * Name: HAL_CM0.S
+ * Purpose: Hardware Abstraction Layer for Cortex-M0
+ * Rev.: V4.70
+ *----------------------------------------------------------------------------
+ *
+ * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH
+ * All rights reserved.
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * - Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of ARM nor the names of its contributors may be used
+ * to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *---------------------------------------------------------------------------*/
+
+ NAME HAL_CM0.S
+
+ #define TCB_TSTACK 40
+
+ EXTERN os_flags
+ EXTERN os_tsk
+ EXTERN rt_alloc_box
+ EXTERN rt_free_box
+ EXTERN rt_stk_check
+ EXTERN rt_pop_req
+ EXTERN rt_systick
+ EXTERN os_tick_irqack
+ EXTERN SVC_Table
+ EXTERN SVC_Count
+
+/*----------------------------------------------------------------------------
+ * Functions
+ *---------------------------------------------------------------------------*/
+
+ SECTION .text:CODE:NOROOT(2)
+ THUMB
+
+/*--------------------------- rt_set_PSP ------------------------------------*/
+
+; void rt_set_PSP (U32 stack);
+
+ PUBLIC rt_set_PSP
+rt_set_PSP:
+
+ MSR PSP,R0
+ BX LR
+
+
+/*--------------------------- rt_get_PSP ------------------------------------*/
+
+; U32 rt_get_PSP (void);
+
+ PUBLIC rt_get_PSP
+rt_get_PSP:
+
+ MRS R0,PSP
+ BX LR
+
+
+/*--------------------------- os_set_env ------------------------------------*/
+
+; void os_set_env (void);
+ /* Switch to Unprivileged/Privileged Thread mode, use PSP. */
+
+ PUBLIC os_set_env
+os_set_env:
+
+ MOV R0,SP /* PSP = MSP */
+ MSR PSP,R0
+ LDR R0,=os_flags
+ LDRB R0,[R0]
+ LSLS R0,#31
+ BNE PrivilegedE
+ MOVS R0,#0x03 /* Unprivileged Thread mode, use PSP */
+ MSR CONTROL,R0
+ BX LR
+PrivilegedE:
+ MOVS R0,#0x02 /* Privileged Thread mode, use PSP */
+ MSR CONTROL,R0
+ BX LR
+
+
+/*--------------------------- _alloc_box ------------------------------------*/
+
+; void *_alloc_box (void *box_mem);
+ /* Function wrapper for Unprivileged/Privileged mode. */
+
+ PUBLIC _alloc_box
+_alloc_box:
+
+ LDR R3,=rt_alloc_box
+ MOV R12,R3
+ MRS R3,IPSR
+ LSLS R3,#24
+ BNE PrivilegedA
+ MRS R3,CONTROL
+ LSLS R3,#31
+ BEQ PrivilegedA
+ SVC 0
+ BX LR
+PrivilegedA:
+ BX R12
+
+
+/*--------------------------- _free_box -------------------------------------*/
+
+; int _free_box (void *box_mem, void *box);
+ /* Function wrapper for Unprivileged/Privileged mode. */
+
+ PUBLIC _free_box
+_free_box:
+
+ LDR R3,=rt_free_box
+ MOV R12,R3
+ MRS R3,IPSR
+ LSLS R3,#24
+ BNE PrivilegedF
+ MRS R3,CONTROL
+ LSLS R3,#31
+ BEQ PrivilegedF
+ SVC 0
+ BX LR
+PrivilegedF:
+ BX R12
+
+
+/*-------------------------- SVC_Handler ------------------------------------*/
+
+; void SVC_Handler (void);
+
+ PUBLIC SVC_Handler
+SVC_Handler:
+
+ MRS R0,PSP /* Read PSP */
+ LDR R1,[R0,#24] /* Read Saved PC from Stack */
+ SUBS R1,R1,#2 /* Point to SVC Instruction */
+ LDRB R1,[R1] /* Load SVC Number */
+ CMP R1,#0
+ BNE SVC_User /* User SVC Number > 0 */
+
+ MOV LR,R4
+ LDMIA R0,{R0-R3,R4} /* Read R0-R3,R12 from stack */
+ MOV R12,R4
+ MOV R4,LR
+ BLX R12 /* Call SVC Function */
+
+ MRS R3,PSP /* Read PSP */
+ STMIA R3!,{R0-R2} /* Store return values */
+
+ LDR R3,=os_tsk
+ LDMIA R3!,{R1,R2} /* os_tsk.run, os_tsk.new */
+ CMP R1,R2
+ BEQ SVC_Exit /* no task switch */
+
+ SUBS R3,#8
+ CMP R1,#0 /* Runtask deleted? */
+ BEQ SVC_Next
+
+ MRS R0,PSP /* Read PSP */
+ SUBS R0,R0,#32 /* Adjust Start Address */
+ STR R0,[R1,#TCB_TSTACK] /* Update os_tsk.run->tsk_stack */
+ STMIA R0!,{R4-R7} /* Save old context (R4-R7) */
+ MOV R4,R8
+ MOV R5,R9
+ MOV R6,R10
+ MOV R7,R11
+ STMIA R0!,{R4-R7} /* Save old context (R8-R11) */
+
+ PUSH {R2,R3}
+ BL rt_stk_check /* Check for Stack overflow */
+ POP {R2,R3}
+
+SVC_Next:
+ STR R2,[R3] /* os_tsk.run = os_tsk.new */
+
+ LDR R0,[R2,#TCB_TSTACK] /* os_tsk.new->tsk_stack */
+ ADDS R0,R0,#16 /* Adjust Start Address */
+ LDMIA R0!,{R4-R7} /* Restore new Context (R8-R11) */
+ MOV R8,R4
+ MOV R9,R5
+ MOV R10,R6
+ MOV R11,R7
+ MSR PSP,R0 /* Write PSP */
+ SUBS R0,R0,#32 /* Adjust Start Address */
+ LDMIA R0!,{R4-R7} /* Restore new Context (R4-R7) */
+
+SVC_Exit:
+ MOVS R0,#~0xFFFFFFFD /* Set EXC_RETURN value */
+ MVNS R0,R0
+ BX R0 /* RETI to Thread Mode, use PSP */
+
+ /*------------------- User SVC ------------------------------*/
+
+SVC_User:
+ PUSH {R4,LR} /* Save Registers */
+ LDR R2,=SVC_Count
+ LDR R2,[R2]
+ CMP R1,R2
+ BHI SVC_Done /* Overflow */
+
+ LDR R4,=SVC_Table-4
+ LSLS R1,R1,#2
+ LDR R4,[R4,R1] /* Load SVC Function Address */
+ MOV LR,R4
+
+ LDMIA R0,{R0-R3,R4} /* Read R0-R3,R12 from stack */
+ MOV R12,R4
+ BLX LR /* Call SVC Function */
+
+ MRS R4,PSP /* Read PSP */
+ STMIA R4!,{R0-R3} /* Function return values */
+SVC_Done:
+ POP {R4,PC} /* RETI */
+
+
+/*-------------------------- PendSV_Handler ---------------------------------*/
+
+; void PendSV_Handler (void);
+
+ PUBLIC PendSV_Handler
+PendSV_Handler:
+
+ BL rt_pop_req
+
+Sys_Switch:
+ LDR R3,=os_tsk
+ LDMIA R3!,{R1,R2} /* os_tsk.run, os_tsk.new */
+ CMP R1,R2
+ BEQ Sys_Exit /* no task switch */
+
+ SUBS R3,#8
+
+ MRS R0,PSP /* Read PSP */
+ SUBS R0,R0,#32 /* Adjust Start Address */
+ STR R0,[R1,#TCB_TSTACK] /* Update os_tsk.run->tsk_stack */
+ STMIA R0!,{R4-R7} /* Save old context (R4-R7) */
+ MOV R4,R8
+ MOV R5,R9
+ MOV R6,R10
+ MOV R7,R11
+ STMIA R0!,{R4-R7} /* Save old context (R8-R11) */
+
+ PUSH {R2,R3}
+ BL rt_stk_check /* Check for Stack overflow */
+ POP {R2,R3}
+
+ STR R2,[R3] /* os_tsk.run = os_tsk.new */
+
+ LDR R0,[R2,#TCB_TSTACK] /* os_tsk.new->tsk_stack */
+ ADDS R0,R0,#16 /* Adjust Start Address */
+ LDMIA R0!,{R4-R7} /* Restore new Context (R8-R11) */
+ MOV R8,R4
+ MOV R9,R5
+ MOV R10,R6
+ MOV R11,R7
+ MSR PSP,R0 /* Write PSP */
+ SUBS R0,R0,#32 /* Adjust Start Address */
+ LDMIA R0!,{R4-R7} /* Restore new Context (R4-R7) */
+
+Sys_Exit:
+ MOVS R0,#~0xFFFFFFFD /* Set EXC_RETURN value */
+ MVNS R0,R0
+ BX R0 /* RETI to Thread Mode, use PSP */
+
+
+/*-------------------------- SysTick_Handler --------------------------------*/
+
+; void SysTick_Handler (void);
+
+ PUBLIC SysTick_Handler
+SysTick_Handler:
+
+ BL rt_systick
+ B Sys_Switch
+
+
+/*-------------------------- OS_Tick_Handler --------------------------------*/
+
+; void OS_Tick_Handler (void);
+
+ PUBLIC OS_Tick_Handler
+OS_Tick_Handler:
+
+ BL os_tick_irqack
+ BL rt_systick
+ B Sys_Switch
+
+
+ END
+
+/*----------------------------------------------------------------------------
+ * end of file
+ *---------------------------------------------------------------------------*/
--- a/rtx/TARGET_CORTEX_M/TARGET_M0/TOOLCHAIN_IAR/HAL_CM0.s Wed Jun 17 11:15:10 2015 +0100
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,312 +0,0 @@
-/*----------------------------------------------------------------------------
- * CMSIS-RTOS - RTX
- *----------------------------------------------------------------------------
- * Name: HAL_CM0.S
- * Purpose: Hardware Abstraction Layer for Cortex-M0
- * Rev.: V4.70
- *----------------------------------------------------------------------------
- *
- * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH
- * All rights reserved.
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * - Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * - Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * - Neither the name of ARM nor the names of its contributors may be used
- * to endorse or promote products derived from this software without
- * specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *---------------------------------------------------------------------------*/
-
- NAME HAL_CM0.S
-
- #define TCB_TSTACK 40
-
- EXTERN os_flags
- EXTERN os_tsk
- EXTERN rt_alloc_box
- EXTERN rt_free_box
- EXTERN rt_stk_check
- EXTERN rt_pop_req
- EXTERN rt_systick
- EXTERN os_tick_irqack
- EXTERN SVC_Table
- EXTERN SVC_Count
-
-/*----------------------------------------------------------------------------
- * Functions
- *---------------------------------------------------------------------------*/
-
- SECTION .text:CODE:NOROOT(2)
- THUMB
-
-/*--------------------------- rt_set_PSP ------------------------------------*/
-
-; void rt_set_PSP (U32 stack);
-
- PUBLIC rt_set_PSP
-rt_set_PSP:
-
- MSR PSP,R0
- BX LR
-
-
-/*--------------------------- rt_get_PSP ------------------------------------*/
-
-; U32 rt_get_PSP (void);
-
- PUBLIC rt_get_PSP
-rt_get_PSP:
-
- MRS R0,PSP
- BX LR
-
-
-/*--------------------------- os_set_env ------------------------------------*/
-
-; void os_set_env (void);
- /* Switch to Unprivileged/Privileged Thread mode, use PSP. */
-
- PUBLIC os_set_env
-os_set_env:
-
- MOV R0,SP /* PSP = MSP */
- MSR PSP,R0
- LDR R0,=os_flags
- LDRB R0,[R0]
- LSLS R0,#31
- BNE PrivilegedE
- MOVS R0,#0x03 /* Unprivileged Thread mode, use PSP */
- MSR CONTROL,R0
- BX LR
-PrivilegedE:
- MOVS R0,#0x02 /* Privileged Thread mode, use PSP */
- MSR CONTROL,R0
- BX LR
-
-
-/*--------------------------- _alloc_box ------------------------------------*/
-
-; void *_alloc_box (void *box_mem);
- /* Function wrapper for Unprivileged/Privileged mode. */
-
- PUBLIC _alloc_box
-_alloc_box:
-
- LDR R3,=rt_alloc_box
- MOV R12,R3
- MRS R3,IPSR
- LSLS R3,#24
- BNE PrivilegedA
- MRS R3,CONTROL
- LSLS R3,#31
- BEQ PrivilegedA
- SVC 0
- BX LR
-PrivilegedA:
- BX R12
-
-
-/*--------------------------- _free_box -------------------------------------*/
-
-; int _free_box (void *box_mem, void *box);
- /* Function wrapper for Unprivileged/Privileged mode. */
-
- PUBLIC _free_box
-_free_box:
-
- LDR R3,=rt_free_box
- MOV R12,R3
- MRS R3,IPSR
- LSLS R3,#24
- BNE PrivilegedF
- MRS R3,CONTROL
- LSLS R3,#31
- BEQ PrivilegedF
- SVC 0
- BX LR
-PrivilegedF:
- BX R12
-
-
-/*-------------------------- SVC_Handler ------------------------------------*/
-
-; void SVC_Handler (void);
-
- PUBLIC SVC_Handler
-SVC_Handler:
-
- MRS R0,PSP /* Read PSP */
- LDR R1,[R0,#24] /* Read Saved PC from Stack */
- SUBS R1,R1,#2 /* Point to SVC Instruction */
- LDRB R1,[R1] /* Load SVC Number */
- CMP R1,#0
- BNE SVC_User /* User SVC Number > 0 */
-
- MOV LR,R4
- LDMIA R0,{R0-R3,R4} /* Read R0-R3,R12 from stack */
- MOV R12,R4
- MOV R4,LR
- BLX R12 /* Call SVC Function */
-
- MRS R3,PSP /* Read PSP */
- STMIA R3!,{R0-R2} /* Store return values */
-
- LDR R3,=os_tsk
- LDMIA R3!,{R1,R2} /* os_tsk.run, os_tsk.new */
- CMP R1,R2
- BEQ SVC_Exit /* no task switch */
-
- SUBS R3,#8
- CMP R1,#0 /* Runtask deleted? */
- BEQ SVC_Next
-
- MRS R0,PSP /* Read PSP */
- SUBS R0,R0,#32 /* Adjust Start Address */
- STR R0,[R1,#TCB_TSTACK] /* Update os_tsk.run->tsk_stack */
- STMIA R0!,{R4-R7} /* Save old context (R4-R7) */
- MOV R4,R8
- MOV R5,R9
- MOV R6,R10
- MOV R7,R11
- STMIA R0!,{R4-R7} /* Save old context (R8-R11) */
-
- PUSH {R2,R3}
- BL rt_stk_check /* Check for Stack overflow */
- POP {R2,R3}
-
-SVC_Next:
- STR R2,[R3] /* os_tsk.run = os_tsk.new */
-
- LDR R0,[R2,#TCB_TSTACK] /* os_tsk.new->tsk_stack */
- ADDS R0,R0,#16 /* Adjust Start Address */
- LDMIA R0!,{R4-R7} /* Restore new Context (R8-R11) */
- MOV R8,R4
- MOV R9,R5
- MOV R10,R6
- MOV R11,R7
- MSR PSP,R0 /* Write PSP */
- SUBS R0,R0,#32 /* Adjust Start Address */
- LDMIA R0!,{R4-R7} /* Restore new Context (R4-R7) */
-
-SVC_Exit:
- MOVS R0,#~0xFFFFFFFD /* Set EXC_RETURN value */
- MVNS R0,R0
- BX R0 /* RETI to Thread Mode, use PSP */
-
- /*------------------- User SVC ------------------------------*/
-
-SVC_User:
- PUSH {R4,LR} /* Save Registers */
- LDR R2,=SVC_Count
- LDR R2,[R2]
- CMP R1,R2
- BHI SVC_Done /* Overflow */
-
- LDR R4,=SVC_Table-4
- LSLS R1,R1,#2
- LDR R4,[R4,R1] /* Load SVC Function Address */
- MOV LR,R4
-
- LDMIA R0,{R0-R3,R4} /* Read R0-R3,R12 from stack */
- MOV R12,R4
- BLX LR /* Call SVC Function */
-
- MRS R4,PSP /* Read PSP */
- STMIA R4!,{R0-R3} /* Function return values */
-SVC_Done:
- POP {R4,PC} /* RETI */
-
-
-/*-------------------------- PendSV_Handler ---------------------------------*/
-
-; void PendSV_Handler (void);
-
- PUBLIC PendSV_Handler
-PendSV_Handler:
-
- BL rt_pop_req
-
-Sys_Switch:
- LDR R3,=os_tsk
- LDMIA R3!,{R1,R2} /* os_tsk.run, os_tsk.new */
- CMP R1,R2
- BEQ Sys_Exit /* no task switch */
-
- SUBS R3,#8
-
- MRS R0,PSP /* Read PSP */
- SUBS R0,R0,#32 /* Adjust Start Address */
- STR R0,[R1,#TCB_TSTACK] /* Update os_tsk.run->tsk_stack */
- STMIA R0!,{R4-R7} /* Save old context (R4-R7) */
- MOV R4,R8
- MOV R5,R9
- MOV R6,R10
- MOV R7,R11
- STMIA R0!,{R4-R7} /* Save old context (R8-R11) */
-
- PUSH {R2,R3}
- BL rt_stk_check /* Check for Stack overflow */
- POP {R2,R3}
-
- STR R2,[R3] /* os_tsk.run = os_tsk.new */
-
- LDR R0,[R2,#TCB_TSTACK] /* os_tsk.new->tsk_stack */
- ADDS R0,R0,#16 /* Adjust Start Address */
- LDMIA R0!,{R4-R7} /* Restore new Context (R8-R11) */
- MOV R8,R4
- MOV R9,R5
- MOV R10,R6
- MOV R11,R7
- MSR PSP,R0 /* Write PSP */
- SUBS R0,R0,#32 /* Adjust Start Address */
- LDMIA R0!,{R4-R7} /* Restore new Context (R4-R7) */
-
-Sys_Exit:
- MOVS R0,#~0xFFFFFFFD /* Set EXC_RETURN value */
- MVNS R0,R0
- BX R0 /* RETI to Thread Mode, use PSP */
-
-
-/*-------------------------- SysTick_Handler --------------------------------*/
-
-; void SysTick_Handler (void);
-
- PUBLIC SysTick_Handler
-SysTick_Handler:
-
- BL rt_systick
- B Sys_Switch
-
-
-/*-------------------------- OS_Tick_Handler --------------------------------*/
-
-; void OS_Tick_Handler (void);
-
- PUBLIC OS_Tick_Handler
-OS_Tick_Handler:
-
- BL os_tick_irqack
- BL rt_systick
- B Sys_Switch
-
-
- END
-
-/*----------------------------------------------------------------------------
- * end of file
- *---------------------------------------------------------------------------*/
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/rtx/TARGET_CORTEX_M/TARGET_M0/TOOLCHAIN_IAR/SVC_Table.S Wed Jul 01 08:15:48 2015 +0100 @@ -0,0 +1,58 @@ +;/*---------------------------------------------------------------------------- +; * CMSIS-RTOS - RTX +; *---------------------------------------------------------------------------- +; * Name: SVC_TABLE.S +; * Purpose: Pre-defined SVC Table for Cortex-M +; * Rev.: V4.70 +; *---------------------------------------------------------------------------- +; * +; * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH +; * All rights reserved. +; * Redistribution and use in source and binary forms, with or without +; * modification, are permitted provided that the following conditions are met: +; * - Redistributions of source code must retain the above copyright +; * notice, this list of conditions and the following disclaimer. +; * - Redistributions in binary form must reproduce the above copyright +; * notice, this list of conditions and the following disclaimer in the +; * documentation and/or other materials provided with the distribution. +; * - Neither the name of ARM nor the names of its contributors may be used +; * to endorse or promote products derived from this software without +; * specific prior written permission. +; * +; * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +; * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +; * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +; * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE +; * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +; * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +; * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +; * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +; * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +; * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +; * POSSIBILITY OF SUCH DAMAGE. +; *---------------------------------------------------------------------------*/ + + + NAME SVC_TABLE + SECTION .text:CONST (2) + + PUBLIC SVC_Count + +SVC_Cnt EQU (SVC_End-SVC_Table)/4 +SVC_Count DCD SVC_Cnt + +; Import user SVC functions here. +; IMPORT __SVC_1 + + PUBLIC SVC_Table +SVC_Table +; Insert user SVC functions here. SVC 0 used by RTL Kernel. +; DCD __SVC_1 ; user SVC function + +SVC_End + + END + +/*---------------------------------------------------------------------------- + * end of file + *---------------------------------------------------------------------------*/
--- a/rtx/TARGET_CORTEX_M/TARGET_M0/TOOLCHAIN_IAR/SVC_Table.s Wed Jun 17 11:15:10 2015 +0100 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,58 +0,0 @@ -;/*---------------------------------------------------------------------------- -; * CMSIS-RTOS - RTX -; *---------------------------------------------------------------------------- -; * Name: SVC_TABLE.S -; * Purpose: Pre-defined SVC Table for Cortex-M -; * Rev.: V4.70 -; *---------------------------------------------------------------------------- -; * -; * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH -; * All rights reserved. -; * Redistribution and use in source and binary forms, with or without -; * modification, are permitted provided that the following conditions are met: -; * - Redistributions of source code must retain the above copyright -; * notice, this list of conditions and the following disclaimer. -; * - Redistributions in binary form must reproduce the above copyright -; * notice, this list of conditions and the following disclaimer in the -; * documentation and/or other materials provided with the distribution. -; * - Neither the name of ARM nor the names of its contributors may be used -; * to endorse or promote products derived from this software without -; * specific prior written permission. -; * -; * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -; * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -; * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -; * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE -; * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -; * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -; * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -; * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -; * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -; * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -; * POSSIBILITY OF SUCH DAMAGE. -; *---------------------------------------------------------------------------*/ - - - NAME SVC_TABLE - SECTION .text:CONST (2) - - PUBLIC SVC_Count - -SVC_Cnt EQU (SVC_End-SVC_Table)/4 -SVC_Count DCD SVC_Cnt - -; Import user SVC functions here. -; IMPORT __SVC_1 - - PUBLIC SVC_Table -SVC_Table -; Insert user SVC functions here. SVC 0 used by RTL Kernel. -; DCD __SVC_1 ; user SVC function - -SVC_End - - END - -/*---------------------------------------------------------------------------- - * end of file - *---------------------------------------------------------------------------*/
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/rtx/TARGET_CORTEX_M/TARGET_M0P/TOOLCHAIN_ARM/SVC_Table.S Wed Jul 01 08:15:48 2015 +0100 @@ -0,0 +1,57 @@ +;/*---------------------------------------------------------------------------- +; * RL-ARM - RTX +; *---------------------------------------------------------------------------- +; * Name: SVC_TABLE.S +; * Purpose: Pre-defined SVC Table for Cortex-M +; * Rev.: V4.60 +; *---------------------------------------------------------------------------- +; * +; * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH +; * All rights reserved. +; * Redistribution and use in source and binary forms, with or without +; * modification, are permitted provided that the following conditions are met: +; * - Redistributions of source code must retain the above copyright +; * notice, this list of conditions and the following disclaimer. +; * - Redistributions in binary form must reproduce the above copyright +; * notice, this list of conditions and the following disclaimer in the +; * documentation and/or other materials provided with the distribution. +; * - Neither the name of ARM nor the names of its contributors may be used +; * to endorse or promote products derived from this software without +; * specific prior written permission. +; * +; * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +; * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +; * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +; * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE +; * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +; * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +; * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +; * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +; * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +; * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +; * POSSIBILITY OF SUCH DAMAGE. +; *---------------------------------------------------------------------------*/ + + + AREA SVC_TABLE, CODE, READONLY + + EXPORT SVC_Count + +SVC_Cnt EQU (SVC_End-SVC_Table)/4 +SVC_Count DCD SVC_Cnt + +; Import user SVC functions here. +; IMPORT __SVC_1 + + EXPORT SVC_Table +SVC_Table +; Insert user SVC functions here. SVC 0 used by RTL Kernel. +; DCD __SVC_1 ; user SVC function + +SVC_End + + END + +/*---------------------------------------------------------------------------- + * end of file + *---------------------------------------------------------------------------*/
--- a/rtx/TARGET_CORTEX_M/TARGET_M0P/TOOLCHAIN_ARM/SVC_Table.s Wed Jun 17 11:15:10 2015 +0100 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,57 +0,0 @@ -;/*---------------------------------------------------------------------------- -; * RL-ARM - RTX -; *---------------------------------------------------------------------------- -; * Name: SVC_TABLE.S -; * Purpose: Pre-defined SVC Table for Cortex-M -; * Rev.: V4.60 -; *---------------------------------------------------------------------------- -; * -; * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH -; * All rights reserved. -; * Redistribution and use in source and binary forms, with or without -; * modification, are permitted provided that the following conditions are met: -; * - Redistributions of source code must retain the above copyright -; * notice, this list of conditions and the following disclaimer. -; * - Redistributions in binary form must reproduce the above copyright -; * notice, this list of conditions and the following disclaimer in the -; * documentation and/or other materials provided with the distribution. -; * - Neither the name of ARM nor the names of its contributors may be used -; * to endorse or promote products derived from this software without -; * specific prior written permission. -; * -; * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -; * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -; * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -; * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE -; * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -; * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -; * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -; * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -; * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -; * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -; * POSSIBILITY OF SUCH DAMAGE. -; *---------------------------------------------------------------------------*/ - - - AREA SVC_TABLE, CODE, READONLY - - EXPORT SVC_Count - -SVC_Cnt EQU (SVC_End-SVC_Table)/4 -SVC_Count DCD SVC_Cnt - -; Import user SVC functions here. -; IMPORT __SVC_1 - - EXPORT SVC_Table -SVC_Table -; Insert user SVC functions here. SVC 0 used by RTL Kernel. -; DCD __SVC_1 ; user SVC function - -SVC_End - - END - -/*---------------------------------------------------------------------------- - * end of file - *---------------------------------------------------------------------------*/
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/rtx/TARGET_CORTEX_M/TARGET_M0P/TOOLCHAIN_GCC/HAL_CM0.S Wed Jul 01 08:15:48 2015 +0100
@@ -0,0 +1,370 @@
+/*----------------------------------------------------------------------------
+ * RL-ARM - RTX
+ *----------------------------------------------------------------------------
+ * Name: HAL_CM0.S
+ * Purpose: Hardware Abstraction Layer for Cortex-M0
+ * Rev.: V4.60
+ *----------------------------------------------------------------------------
+ *
+ * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
+ * All rights reserved.
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * - Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of ARM nor the names of its contributors may be used
+ * to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *---------------------------------------------------------------------------*/
+
+ .file "HAL_CM0.S"
+ .syntax unified
+
+ .equ TCB_TSTACK, 40
+
+
+/*----------------------------------------------------------------------------
+ * Functions
+ *---------------------------------------------------------------------------*/
+
+ .thumb
+
+ .section ".text"
+ .align 2
+
+
+/*--------------------------- rt_set_PSP ------------------------------------*/
+
+# void rt_set_PSP (U32 stack);
+
+ .thumb_func
+ .type rt_set_PSP, %function
+ .global rt_set_PSP
+rt_set_PSP:
+ .fnstart
+ .cantunwind
+
+ MSR PSP,R0
+ BX LR
+
+ .fnend
+ .size rt_set_PSP, .-rt_set_PSP
+
+
+/*--------------------------- rt_get_PSP ------------------------------------*/
+
+# U32 rt_get_PSP (void);
+
+ .thumb_func
+ .type rt_get_PSP, %function
+ .global rt_get_PSP
+rt_get_PSP:
+ .fnstart
+ .cantunwind
+
+ MRS R0,PSP
+ BX LR
+
+ .fnend
+ .size rt_get_PSP, .-rt_get_PSP
+
+
+/*--------------------------- os_set_env ------------------------------------*/
+
+# void os_set_env (void);
+ /* Switch to Unprivileged/Privileged Thread mode, use PSP. */
+
+ .thumb_func
+ .type os_set_env, %function
+ .global os_set_env
+os_set_env:
+ .fnstart
+ .cantunwind
+
+ MOV R0,SP /* PSP = MSP */
+ MSR PSP,R0
+ LDR R0,=os_flags
+ LDRB R0,[R0]
+ LSLS R0,#31
+ BNE PrivilegedE
+ MOVS R0,#0x03 /* Unprivileged Thread mode, use PSP */
+ MSR CONTROL,R0
+ BX LR
+PrivilegedE:
+ MOVS R0,#0x02 /* Privileged Thread mode, use PSP */
+ MSR CONTROL,R0
+ BX LR
+
+ .fnend
+ .size os_set_env, .-os_set_env
+
+
+/*--------------------------- _alloc_box ------------------------------------*/
+
+# void *_alloc_box (void *box_mem);
+ /* Function wrapper for Unprivileged/Privileged mode. */
+
+ .thumb_func
+ .type _alloc_box, %function
+ .global _alloc_box
+_alloc_box:
+ .fnstart
+ .cantunwind
+
+ LDR R3,=rt_alloc_box
+ MOV R12,R3
+ MRS R3,IPSR
+ LSLS R3,#24
+ BNE PrivilegedA
+ MRS R3,CONTROL
+ LSLS R3,#31
+ BEQ PrivilegedA
+ SVC 0
+ BX LR
+PrivilegedA:
+ BX R12
+
+ .fnend
+ .size _alloc_box, .-_alloc_box
+
+
+/*--------------------------- _free_box -------------------------------------*/
+
+# int _free_box (void *box_mem, void *box);
+ /* Function wrapper for Unprivileged/Privileged mode. */
+
+ .thumb_func
+ .type _free_box, %function
+ .global _free_box
+_free_box:
+ .fnstart
+ .cantunwind
+
+ LDR R3,=rt_free_box
+ MOV R12,R3
+ MRS R3,IPSR
+ LSLS R3,#24
+ BNE PrivilegedF
+ MRS R3,CONTROL
+ LSLS R3,#31
+ BEQ PrivilegedF
+ SVC 0
+ BX LR
+PrivilegedF:
+ BX R12
+
+ .fnend
+ .size _free_box, .-_free_box
+
+
+/*-------------------------- SVC_Handler ------------------------------------*/
+
+# void SVC_Handler (void);
+
+ .thumb_func
+ .type SVC_Handler, %function
+ .global SVC_Handler
+SVC_Handler:
+ .fnstart
+ .cantunwind
+
+ MRS R0,PSP /* Read PSP */
+ LDR R1,[R0,#24] /* Read Saved PC from Stack */
+ SUBS R1,R1,#2 /* Point to SVC Instruction */
+ LDRB R1,[R1] /* Load SVC Number */
+ CMP R1,#0
+ BNE SVC_User /* User SVC Number > 0 */
+
+ MOV LR,R4
+ LDMIA R0,{R0-R3,R4} /* Read R0-R3,R12 from stack */
+ MOV R12,R4
+ MOV R4,LR
+ BLX R12 /* Call SVC Function */
+
+ MRS R3,PSP /* Read PSP */
+ STMIA R3!,{R0-R2} /* Store return values */
+
+ LDR R3,=os_tsk
+ LDMIA R3!,{R1,R2} /* os_tsk.run, os_tsk.new */
+ CMP R1,R2
+ BEQ SVC_Exit /* no task switch */
+
+ SUBS R3,#8
+ CMP R1,#0 /* Runtask deleted? */
+ BEQ SVC_Next
+
+ MRS R0,PSP /* Read PSP */
+ SUBS R0,R0,#32 /* Adjust Start Address */
+ STR R0,[R1,#TCB_TSTACK] /* Update os_tsk.run->tsk_stack */
+ STMIA R0!,{R4-R7} /* Save old context (R4-R7) */
+ MOV R4,R8
+ MOV R5,R9
+ MOV R6,R10
+ MOV R7,R11
+ STMIA R0!,{R4-R7} /* Save old context (R8-R11) */
+
+ PUSH {R2,R3}
+ BL rt_stk_check /* Check for Stack overflow */
+ POP {R2,R3}
+
+SVC_Next:
+ STR R2,[R3] /* os_tsk.run = os_tsk.new */
+
+ LDR R0,[R2,#TCB_TSTACK] /* os_tsk.new->tsk_stack */
+ ADDS R0,R0,#16 /* Adjust Start Address */
+ LDMIA R0!,{R4-R7} /* Restore new Context (R8-R11) */
+ MOV R8,R4
+ MOV R9,R5
+ MOV R10,R6
+ MOV R11,R7
+ MSR PSP,R0 /* Write PSP */
+ SUBS R0,R0,#32 /* Adjust Start Address */
+ LDMIA R0!,{R4-R7} /* Restore new Context (R4-R7) */
+
+SVC_Exit:
+ MOVS R0,#~0xFFFFFFFD /* Set EXC_RETURN value */
+ MVNS R0,R0
+ BX R0 /* RETI to Thread Mode, use PSP */
+
+ /*------------------- User SVC ------------------------------*/
+
+SVC_User:
+ PUSH {R4,LR} /* Save Registers */
+ LDR R2,=SVC_Count
+ LDR R2,[R2]
+ CMP R1,R2
+ BHI SVC_Done /* Overflow */
+
+ LDR R4,=SVC_Table-4
+ LSLS R1,R1,#2
+ LDR R4,[R4,R1] /* Load SVC Function Address */
+ MOV LR,R4
+
+ LDMIA R0,{R0-R3,R4} /* Read R0-R3,R12 from stack */
+ MOV R12,R4
+ BLX LR /* Call SVC Function */
+
+ MRS R4,PSP /* Read PSP */
+ STMIA R4!,{R0-R3} /* Function return values */
+SVC_Done:
+ POP {R4,PC} /* RETI */
+
+ .fnend
+ .size SVC_Handler, .-SVC_Handler
+
+
+/*-------------------------- PendSV_Handler ---------------------------------*/
+
+# void PendSV_Handler (void);
+
+ .thumb_func
+ .type PendSV_Handler, %function
+ .global PendSV_Handler
+ .global Sys_Switch
+PendSV_Handler:
+ .fnstart
+ .cantunwind
+
+ BL rt_pop_req
+
+Sys_Switch:
+ LDR R3,=os_tsk
+ LDMIA R3!,{R1,R2} /* os_tsk.run, os_tsk.new */
+ CMP R1,R2
+ BEQ Sys_Exit /* no task switch */
+
+ SUBS R3,#8
+
+ MRS R0,PSP /* Read PSP */
+ SUBS R0,R0,#32 /* Adjust Start Address */
+ STR R0,[R1,#TCB_TSTACK] /* Update os_tsk.run->tsk_stack */
+ STMIA R0!,{R4-R7} /* Save old context (R4-R7) */
+ MOV R4,R8
+ MOV R5,R9
+ MOV R6,R10
+ MOV R7,R11
+ STMIA R0!,{R4-R7} /* Save old context (R8-R11) */
+
+ PUSH {R2,R3}
+ BL rt_stk_check /* Check for Stack overflow */
+ POP {R2,R3}
+
+ STR R2,[R3] /* os_tsk.run = os_tsk.new */
+
+ LDR R0,[R2,#TCB_TSTACK] /* os_tsk.new->tsk_stack */
+ ADDS R0,R0,#16 /* Adjust Start Address */
+ LDMIA R0!,{R4-R7} /* Restore new Context (R8-R11) */
+ MOV R8,R4
+ MOV R9,R5
+ MOV R10,R6
+ MOV R11,R7
+ MSR PSP,R0 /* Write PSP */
+ SUBS R0,R0,#32 /* Adjust Start Address */
+ LDMIA R0!,{R4-R7} /* Restore new Context (R4-R7) */
+
+Sys_Exit:
+ MOVS R0,#~0xFFFFFFFD /* Set EXC_RETURN value */
+ MVNS R0,R0
+ BX R0 /* RETI to Thread Mode, use PSP */
+
+ .fnend
+ .size PendSV_Handler, .-PendSV_Handler
+
+
+/*-------------------------- SysTick_Handler --------------------------------*/
+
+# void SysTick_Handler (void);
+
+ .thumb_func
+ .type SysTick_Handler, %function
+ .global SysTick_Handler
+SysTick_Handler:
+ .fnstart
+ .cantunwind
+
+ BL rt_systick
+ B Sys_Switch
+
+ .fnend
+ .size SysTick_Handler, .-SysTick_Handler
+
+
+/*-------------------------- OS_Tick_Handler --------------------------------*/
+
+# void OS_Tick_Handler (void);
+
+ .thumb_func
+ .type OS_Tick_Handler, %function
+ .global OS_Tick_Handler
+OS_Tick_Handler:
+ .fnstart
+ .cantunwind
+
+ BL os_tick_irqack
+ BL rt_systick
+ B Sys_Switch
+
+ .fnend
+ .size OS_Tick_Handler, .-OS_Tick_Handler
+
+
+ .end
+
+/*----------------------------------------------------------------------------
+ * end of file
+ *---------------------------------------------------------------------------*/
--- a/rtx/TARGET_CORTEX_M/TARGET_M0P/TOOLCHAIN_GCC/HAL_CM0.s Wed Jun 17 11:15:10 2015 +0100
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,370 +0,0 @@
-/*----------------------------------------------------------------------------
- * RL-ARM - RTX
- *----------------------------------------------------------------------------
- * Name: HAL_CM0.S
- * Purpose: Hardware Abstraction Layer for Cortex-M0
- * Rev.: V4.60
- *----------------------------------------------------------------------------
- *
- * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
- * All rights reserved.
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * - Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * - Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * - Neither the name of ARM nor the names of its contributors may be used
- * to endorse or promote products derived from this software without
- * specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *---------------------------------------------------------------------------*/
-
- .file "HAL_CM0.S"
- .syntax unified
-
- .equ TCB_TSTACK, 40
-
-
-/*----------------------------------------------------------------------------
- * Functions
- *---------------------------------------------------------------------------*/
-
- .thumb
-
- .section ".text"
- .align 2
-
-
-/*--------------------------- rt_set_PSP ------------------------------------*/
-
-# void rt_set_PSP (U32 stack);
-
- .thumb_func
- .type rt_set_PSP, %function
- .global rt_set_PSP
-rt_set_PSP:
- .fnstart
- .cantunwind
-
- MSR PSP,R0
- BX LR
-
- .fnend
- .size rt_set_PSP, .-rt_set_PSP
-
-
-/*--------------------------- rt_get_PSP ------------------------------------*/
-
-# U32 rt_get_PSP (void);
-
- .thumb_func
- .type rt_get_PSP, %function
- .global rt_get_PSP
-rt_get_PSP:
- .fnstart
- .cantunwind
-
- MRS R0,PSP
- BX LR
-
- .fnend
- .size rt_get_PSP, .-rt_get_PSP
-
-
-/*--------------------------- os_set_env ------------------------------------*/
-
-# void os_set_env (void);
- /* Switch to Unprivileged/Privileged Thread mode, use PSP. */
-
- .thumb_func
- .type os_set_env, %function
- .global os_set_env
-os_set_env:
- .fnstart
- .cantunwind
-
- MOV R0,SP /* PSP = MSP */
- MSR PSP,R0
- LDR R0,=os_flags
- LDRB R0,[R0]
- LSLS R0,#31
- BNE PrivilegedE
- MOVS R0,#0x03 /* Unprivileged Thread mode, use PSP */
- MSR CONTROL,R0
- BX LR
-PrivilegedE:
- MOVS R0,#0x02 /* Privileged Thread mode, use PSP */
- MSR CONTROL,R0
- BX LR
-
- .fnend
- .size os_set_env, .-os_set_env
-
-
-/*--------------------------- _alloc_box ------------------------------------*/
-
-# void *_alloc_box (void *box_mem);
- /* Function wrapper for Unprivileged/Privileged mode. */
-
- .thumb_func
- .type _alloc_box, %function
- .global _alloc_box
-_alloc_box:
- .fnstart
- .cantunwind
-
- LDR R3,=rt_alloc_box
- MOV R12,R3
- MRS R3,IPSR
- LSLS R3,#24
- BNE PrivilegedA
- MRS R3,CONTROL
- LSLS R3,#31
- BEQ PrivilegedA
- SVC 0
- BX LR
-PrivilegedA:
- BX R12
-
- .fnend
- .size _alloc_box, .-_alloc_box
-
-
-/*--------------------------- _free_box -------------------------------------*/
-
-# int _free_box (void *box_mem, void *box);
- /* Function wrapper for Unprivileged/Privileged mode. */
-
- .thumb_func
- .type _free_box, %function
- .global _free_box
-_free_box:
- .fnstart
- .cantunwind
-
- LDR R3,=rt_free_box
- MOV R12,R3
- MRS R3,IPSR
- LSLS R3,#24
- BNE PrivilegedF
- MRS R3,CONTROL
- LSLS R3,#31
- BEQ PrivilegedF
- SVC 0
- BX LR
-PrivilegedF:
- BX R12
-
- .fnend
- .size _free_box, .-_free_box
-
-
-/*-------------------------- SVC_Handler ------------------------------------*/
-
-# void SVC_Handler (void);
-
- .thumb_func
- .type SVC_Handler, %function
- .global SVC_Handler
-SVC_Handler:
- .fnstart
- .cantunwind
-
- MRS R0,PSP /* Read PSP */
- LDR R1,[R0,#24] /* Read Saved PC from Stack */
- SUBS R1,R1,#2 /* Point to SVC Instruction */
- LDRB R1,[R1] /* Load SVC Number */
- CMP R1,#0
- BNE SVC_User /* User SVC Number > 0 */
-
- MOV LR,R4
- LDMIA R0,{R0-R3,R4} /* Read R0-R3,R12 from stack */
- MOV R12,R4
- MOV R4,LR
- BLX R12 /* Call SVC Function */
-
- MRS R3,PSP /* Read PSP */
- STMIA R3!,{R0-R2} /* Store return values */
-
- LDR R3,=os_tsk
- LDMIA R3!,{R1,R2} /* os_tsk.run, os_tsk.new */
- CMP R1,R2
- BEQ SVC_Exit /* no task switch */
-
- SUBS R3,#8
- CMP R1,#0 /* Runtask deleted? */
- BEQ SVC_Next
-
- MRS R0,PSP /* Read PSP */
- SUBS R0,R0,#32 /* Adjust Start Address */
- STR R0,[R1,#TCB_TSTACK] /* Update os_tsk.run->tsk_stack */
- STMIA R0!,{R4-R7} /* Save old context (R4-R7) */
- MOV R4,R8
- MOV R5,R9
- MOV R6,R10
- MOV R7,R11
- STMIA R0!,{R4-R7} /* Save old context (R8-R11) */
-
- PUSH {R2,R3}
- BL rt_stk_check /* Check for Stack overflow */
- POP {R2,R3}
-
-SVC_Next:
- STR R2,[R3] /* os_tsk.run = os_tsk.new */
-
- LDR R0,[R2,#TCB_TSTACK] /* os_tsk.new->tsk_stack */
- ADDS R0,R0,#16 /* Adjust Start Address */
- LDMIA R0!,{R4-R7} /* Restore new Context (R8-R11) */
- MOV R8,R4
- MOV R9,R5
- MOV R10,R6
- MOV R11,R7
- MSR PSP,R0 /* Write PSP */
- SUBS R0,R0,#32 /* Adjust Start Address */
- LDMIA R0!,{R4-R7} /* Restore new Context (R4-R7) */
-
-SVC_Exit:
- MOVS R0,#~0xFFFFFFFD /* Set EXC_RETURN value */
- MVNS R0,R0
- BX R0 /* RETI to Thread Mode, use PSP */
-
- /*------------------- User SVC ------------------------------*/
-
-SVC_User:
- PUSH {R4,LR} /* Save Registers */
- LDR R2,=SVC_Count
- LDR R2,[R2]
- CMP R1,R2
- BHI SVC_Done /* Overflow */
-
- LDR R4,=SVC_Table-4
- LSLS R1,R1,#2
- LDR R4,[R4,R1] /* Load SVC Function Address */
- MOV LR,R4
-
- LDMIA R0,{R0-R3,R4} /* Read R0-R3,R12 from stack */
- MOV R12,R4
- BLX LR /* Call SVC Function */
-
- MRS R4,PSP /* Read PSP */
- STMIA R4!,{R0-R3} /* Function return values */
-SVC_Done:
- POP {R4,PC} /* RETI */
-
- .fnend
- .size SVC_Handler, .-SVC_Handler
-
-
-/*-------------------------- PendSV_Handler ---------------------------------*/
-
-# void PendSV_Handler (void);
-
- .thumb_func
- .type PendSV_Handler, %function
- .global PendSV_Handler
- .global Sys_Switch
-PendSV_Handler:
- .fnstart
- .cantunwind
-
- BL rt_pop_req
-
-Sys_Switch:
- LDR R3,=os_tsk
- LDMIA R3!,{R1,R2} /* os_tsk.run, os_tsk.new */
- CMP R1,R2
- BEQ Sys_Exit /* no task switch */
-
- SUBS R3,#8
-
- MRS R0,PSP /* Read PSP */
- SUBS R0,R0,#32 /* Adjust Start Address */
- STR R0,[R1,#TCB_TSTACK] /* Update os_tsk.run->tsk_stack */
- STMIA R0!,{R4-R7} /* Save old context (R4-R7) */
- MOV R4,R8
- MOV R5,R9
- MOV R6,R10
- MOV R7,R11
- STMIA R0!,{R4-R7} /* Save old context (R8-R11) */
-
- PUSH {R2,R3}
- BL rt_stk_check /* Check for Stack overflow */
- POP {R2,R3}
-
- STR R2,[R3] /* os_tsk.run = os_tsk.new */
-
- LDR R0,[R2,#TCB_TSTACK] /* os_tsk.new->tsk_stack */
- ADDS R0,R0,#16 /* Adjust Start Address */
- LDMIA R0!,{R4-R7} /* Restore new Context (R8-R11) */
- MOV R8,R4
- MOV R9,R5
- MOV R10,R6
- MOV R11,R7
- MSR PSP,R0 /* Write PSP */
- SUBS R0,R0,#32 /* Adjust Start Address */
- LDMIA R0!,{R4-R7} /* Restore new Context (R4-R7) */
-
-Sys_Exit:
- MOVS R0,#~0xFFFFFFFD /* Set EXC_RETURN value */
- MVNS R0,R0
- BX R0 /* RETI to Thread Mode, use PSP */
-
- .fnend
- .size PendSV_Handler, .-PendSV_Handler
-
-
-/*-------------------------- SysTick_Handler --------------------------------*/
-
-# void SysTick_Handler (void);
-
- .thumb_func
- .type SysTick_Handler, %function
- .global SysTick_Handler
-SysTick_Handler:
- .fnstart
- .cantunwind
-
- BL rt_systick
- B Sys_Switch
-
- .fnend
- .size SysTick_Handler, .-SysTick_Handler
-
-
-/*-------------------------- OS_Tick_Handler --------------------------------*/
-
-# void OS_Tick_Handler (void);
-
- .thumb_func
- .type OS_Tick_Handler, %function
- .global OS_Tick_Handler
-OS_Tick_Handler:
- .fnstart
- .cantunwind
-
- BL os_tick_irqack
- BL rt_systick
- B Sys_Switch
-
- .fnend
- .size OS_Tick_Handler, .-OS_Tick_Handler
-
-
- .end
-
-/*----------------------------------------------------------------------------
- * end of file
- *---------------------------------------------------------------------------*/
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/rtx/TARGET_CORTEX_M/TARGET_M0P/TOOLCHAIN_GCC/SVC_Table.S Wed Jul 01 08:15:48 2015 +0100 @@ -0,0 +1,56 @@ +;/*---------------------------------------------------------------------------- +; * RL-ARM - RTX +; *---------------------------------------------------------------------------- +; * Name: SVC_TABLE.S +; * Purpose: Pre-defined SVC Table for Cortex-M +; * Rev.: V4.60 +; *---------------------------------------------------------------------------- +; * +; * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH +; * All rights reserved. +; * Redistribution and use in source and binary forms, with or without +; * modification, are permitted provided that the following conditions are met: +; * - Redistributions of source code must retain the above copyright +; * notice, this list of conditions and the following disclaimer. +; * - Redistributions in binary form must reproduce the above copyright +; * notice, this list of conditions and the following disclaimer in the +; * documentation and/or other materials provided with the distribution. +; * - Neither the name of ARM nor the names of its contributors may be used +; * to endorse or promote products derived from this software without +; * specific prior written permission. +; * +; * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +; * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +; * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +; * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE +; * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +; * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +; * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +; * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +; * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +; * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +; * POSSIBILITY OF SUCH DAMAGE. +; *---------------------------------------------------------------------------*/ + + + .file "SVC_Table.S" + + + .section ".svc_table" + + .global SVC_Table +SVC_Table: +/* Insert user SVC functions here. SVC 0 used by RTL Kernel. */ +# .long __SVC_1 /* user SVC function */ +SVC_End: + + .global SVC_Count +SVC_Count: + .long (SVC_End-SVC_Table)/4 + + + .end + +/*---------------------------------------------------------------------------- + * end of file + *---------------------------------------------------------------------------*/
--- a/rtx/TARGET_CORTEX_M/TARGET_M0P/TOOLCHAIN_GCC/SVC_Table.s Wed Jun 17 11:15:10 2015 +0100 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,56 +0,0 @@ -;/*---------------------------------------------------------------------------- -; * RL-ARM - RTX -; *---------------------------------------------------------------------------- -; * Name: SVC_TABLE.S -; * Purpose: Pre-defined SVC Table for Cortex-M -; * Rev.: V4.60 -; *---------------------------------------------------------------------------- -; * -; * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH -; * All rights reserved. -; * Redistribution and use in source and binary forms, with or without -; * modification, are permitted provided that the following conditions are met: -; * - Redistributions of source code must retain the above copyright -; * notice, this list of conditions and the following disclaimer. -; * - Redistributions in binary form must reproduce the above copyright -; * notice, this list of conditions and the following disclaimer in the -; * documentation and/or other materials provided with the distribution. -; * - Neither the name of ARM nor the names of its contributors may be used -; * to endorse or promote products derived from this software without -; * specific prior written permission. -; * -; * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -; * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -; * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -; * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE -; * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -; * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -; * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -; * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -; * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -; * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -; * POSSIBILITY OF SUCH DAMAGE. -; *---------------------------------------------------------------------------*/ - - - .file "SVC_Table.S" - - - .section ".svc_table" - - .global SVC_Table -SVC_Table: -/* Insert user SVC functions here. SVC 0 used by RTL Kernel. */ -# .long __SVC_1 /* user SVC function */ -SVC_End: - - .global SVC_Count -SVC_Count: - .long (SVC_End-SVC_Table)/4 - - - .end - -/*---------------------------------------------------------------------------- - * end of file - *---------------------------------------------------------------------------*/
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/rtx/TARGET_CORTEX_M/TARGET_M0P/TOOLCHAIN_IAR/HAL_CM0.S Wed Jul 01 08:15:48 2015 +0100
@@ -0,0 +1,312 @@
+/*----------------------------------------------------------------------------
+ * CMSIS-RTOS - RTX
+ *----------------------------------------------------------------------------
+ * Name: HAL_CM0.S
+ * Purpose: Hardware Abstraction Layer for Cortex-M0
+ * Rev.: V4.70
+ *----------------------------------------------------------------------------
+ *
+ * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH
+ * All rights reserved.
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * - Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of ARM nor the names of its contributors may be used
+ * to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *---------------------------------------------------------------------------*/
+
+ NAME HAL_CM0.S
+
+ #define TCB_TSTACK 40
+
+ EXTERN os_flags
+ EXTERN os_tsk
+ EXTERN rt_alloc_box
+ EXTERN rt_free_box
+ EXTERN rt_stk_check
+ EXTERN rt_pop_req
+ EXTERN rt_systick
+ EXTERN os_tick_irqack
+ EXTERN SVC_Table
+ EXTERN SVC_Count
+
+/*----------------------------------------------------------------------------
+ * Functions
+ *---------------------------------------------------------------------------*/
+
+ SECTION .text:CODE:NOROOT(2)
+ THUMB
+
+/*--------------------------- rt_set_PSP ------------------------------------*/
+
+; void rt_set_PSP (U32 stack);
+
+ PUBLIC rt_set_PSP
+rt_set_PSP:
+
+ MSR PSP,R0
+ BX LR
+
+
+/*--------------------------- rt_get_PSP ------------------------------------*/
+
+; U32 rt_get_PSP (void);
+
+ PUBLIC rt_get_PSP
+rt_get_PSP:
+
+ MRS R0,PSP
+ BX LR
+
+
+/*--------------------------- os_set_env ------------------------------------*/
+
+; void os_set_env (void);
+ /* Switch to Unprivileged/Privileged Thread mode, use PSP. */
+
+ PUBLIC os_set_env
+os_set_env:
+
+ MOV R0,SP /* PSP = MSP */
+ MSR PSP,R0
+ LDR R0,=os_flags
+ LDRB R0,[R0]
+ LSLS R0,#31
+ BNE PrivilegedE
+ MOVS R0,#0x03 /* Unprivileged Thread mode, use PSP */
+ MSR CONTROL,R0
+ BX LR
+PrivilegedE:
+ MOVS R0,#0x02 /* Privileged Thread mode, use PSP */
+ MSR CONTROL,R0
+ BX LR
+
+
+/*--------------------------- _alloc_box ------------------------------------*/
+
+; void *_alloc_box (void *box_mem);
+ /* Function wrapper for Unprivileged/Privileged mode. */
+
+ PUBLIC _alloc_box
+_alloc_box:
+
+ LDR R3,=rt_alloc_box
+ MOV R12,R3
+ MRS R3,IPSR
+ LSLS R3,#24
+ BNE PrivilegedA
+ MRS R3,CONTROL
+ LSLS R3,#31
+ BEQ PrivilegedA
+ SVC 0
+ BX LR
+PrivilegedA:
+ BX R12
+
+
+/*--------------------------- _free_box -------------------------------------*/
+
+; int _free_box (void *box_mem, void *box);
+ /* Function wrapper for Unprivileged/Privileged mode. */
+
+ PUBLIC _free_box
+_free_box:
+
+ LDR R3,=rt_free_box
+ MOV R12,R3
+ MRS R3,IPSR
+ LSLS R3,#24
+ BNE PrivilegedF
+ MRS R3,CONTROL
+ LSLS R3,#31
+ BEQ PrivilegedF
+ SVC 0
+ BX LR
+PrivilegedF:
+ BX R12
+
+
+/*-------------------------- SVC_Handler ------------------------------------*/
+
+; void SVC_Handler (void);
+
+ PUBLIC SVC_Handler
+SVC_Handler:
+
+ MRS R0,PSP /* Read PSP */
+ LDR R1,[R0,#24] /* Read Saved PC from Stack */
+ SUBS R1,R1,#2 /* Point to SVC Instruction */
+ LDRB R1,[R1] /* Load SVC Number */
+ CMP R1,#0
+ BNE SVC_User /* User SVC Number > 0 */
+
+ MOV LR,R4
+ LDMIA R0,{R0-R3,R4} /* Read R0-R3,R12 from stack */
+ MOV R12,R4
+ MOV R4,LR
+ BLX R12 /* Call SVC Function */
+
+ MRS R3,PSP /* Read PSP */
+ STMIA R3!,{R0-R2} /* Store return values */
+
+ LDR R3,=os_tsk
+ LDMIA R3!,{R1,R2} /* os_tsk.run, os_tsk.new */
+ CMP R1,R2
+ BEQ SVC_Exit /* no task switch */
+
+ SUBS R3,#8
+ CMP R1,#0 /* Runtask deleted? */
+ BEQ SVC_Next
+
+ MRS R0,PSP /* Read PSP */
+ SUBS R0,R0,#32 /* Adjust Start Address */
+ STR R0,[R1,#TCB_TSTACK] /* Update os_tsk.run->tsk_stack */
+ STMIA R0!,{R4-R7} /* Save old context (R4-R7) */
+ MOV R4,R8
+ MOV R5,R9
+ MOV R6,R10
+ MOV R7,R11
+ STMIA R0!,{R4-R7} /* Save old context (R8-R11) */
+
+ PUSH {R2,R3}
+ BL rt_stk_check /* Check for Stack overflow */
+ POP {R2,R3}
+
+SVC_Next:
+ STR R2,[R3] /* os_tsk.run = os_tsk.new */
+
+ LDR R0,[R2,#TCB_TSTACK] /* os_tsk.new->tsk_stack */
+ ADDS R0,R0,#16 /* Adjust Start Address */
+ LDMIA R0!,{R4-R7} /* Restore new Context (R8-R11) */
+ MOV R8,R4
+ MOV R9,R5
+ MOV R10,R6
+ MOV R11,R7
+ MSR PSP,R0 /* Write PSP */
+ SUBS R0,R0,#32 /* Adjust Start Address */
+ LDMIA R0!,{R4-R7} /* Restore new Context (R4-R7) */
+
+SVC_Exit:
+ MOVS R0,#~0xFFFFFFFD /* Set EXC_RETURN value */
+ MVNS R0,R0
+ BX R0 /* RETI to Thread Mode, use PSP */
+
+ /*------------------- User SVC ------------------------------*/
+
+SVC_User:
+ PUSH {R4,LR} /* Save Registers */
+ LDR R2,=SVC_Count
+ LDR R2,[R2]
+ CMP R1,R2
+ BHI SVC_Done /* Overflow */
+
+ LDR R4,=SVC_Table-4
+ LSLS R1,R1,#2
+ LDR R4,[R4,R1] /* Load SVC Function Address */
+ MOV LR,R4
+
+ LDMIA R0,{R0-R3,R4} /* Read R0-R3,R12 from stack */
+ MOV R12,R4
+ BLX LR /* Call SVC Function */
+
+ MRS R4,PSP /* Read PSP */
+ STMIA R4!,{R0-R3} /* Function return values */
+SVC_Done:
+ POP {R4,PC} /* RETI */
+
+
+/*-------------------------- PendSV_Handler ---------------------------------*/
+
+; void PendSV_Handler (void);
+
+ PUBLIC PendSV_Handler
+PendSV_Handler:
+
+ BL rt_pop_req
+
+Sys_Switch:
+ LDR R3,=os_tsk
+ LDMIA R3!,{R1,R2} /* os_tsk.run, os_tsk.new */
+ CMP R1,R2
+ BEQ Sys_Exit /* no task switch */
+
+ SUBS R3,#8
+
+ MRS R0,PSP /* Read PSP */
+ SUBS R0,R0,#32 /* Adjust Start Address */
+ STR R0,[R1,#TCB_TSTACK] /* Update os_tsk.run->tsk_stack */
+ STMIA R0!,{R4-R7} /* Save old context (R4-R7) */
+ MOV R4,R8
+ MOV R5,R9
+ MOV R6,R10
+ MOV R7,R11
+ STMIA R0!,{R4-R7} /* Save old context (R8-R11) */
+
+ PUSH {R2,R3}
+ BL rt_stk_check /* Check for Stack overflow */
+ POP {R2,R3}
+
+ STR R2,[R3] /* os_tsk.run = os_tsk.new */
+
+ LDR R0,[R2,#TCB_TSTACK] /* os_tsk.new->tsk_stack */
+ ADDS R0,R0,#16 /* Adjust Start Address */
+ LDMIA R0!,{R4-R7} /* Restore new Context (R8-R11) */
+ MOV R8,R4
+ MOV R9,R5
+ MOV R10,R6
+ MOV R11,R7
+ MSR PSP,R0 /* Write PSP */
+ SUBS R0,R0,#32 /* Adjust Start Address */
+ LDMIA R0!,{R4-R7} /* Restore new Context (R4-R7) */
+
+Sys_Exit:
+ MOVS R0,#~0xFFFFFFFD /* Set EXC_RETURN value */
+ MVNS R0,R0
+ BX R0 /* RETI to Thread Mode, use PSP */
+
+
+/*-------------------------- SysTick_Handler --------------------------------*/
+
+; void SysTick_Handler (void);
+
+ PUBLIC SysTick_Handler
+SysTick_Handler:
+
+ BL rt_systick
+ B Sys_Switch
+
+
+/*-------------------------- OS_Tick_Handler --------------------------------*/
+
+; void OS_Tick_Handler (void);
+
+ PUBLIC OS_Tick_Handler
+OS_Tick_Handler:
+
+ BL os_tick_irqack
+ BL rt_systick
+ B Sys_Switch
+
+
+ END
+
+/*----------------------------------------------------------------------------
+ * end of file
+ *---------------------------------------------------------------------------*/
--- a/rtx/TARGET_CORTEX_M/TARGET_M0P/TOOLCHAIN_IAR/HAL_CM0.s Wed Jun 17 11:15:10 2015 +0100
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,312 +0,0 @@
-/*----------------------------------------------------------------------------
- * CMSIS-RTOS - RTX
- *----------------------------------------------------------------------------
- * Name: HAL_CM0.S
- * Purpose: Hardware Abstraction Layer for Cortex-M0
- * Rev.: V4.70
- *----------------------------------------------------------------------------
- *
- * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH
- * All rights reserved.
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * - Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * - Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * - Neither the name of ARM nor the names of its contributors may be used
- * to endorse or promote products derived from this software without
- * specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *---------------------------------------------------------------------------*/
-
- NAME HAL_CM0.S
-
- #define TCB_TSTACK 40
-
- EXTERN os_flags
- EXTERN os_tsk
- EXTERN rt_alloc_box
- EXTERN rt_free_box
- EXTERN rt_stk_check
- EXTERN rt_pop_req
- EXTERN rt_systick
- EXTERN os_tick_irqack
- EXTERN SVC_Table
- EXTERN SVC_Count
-
-/*----------------------------------------------------------------------------
- * Functions
- *---------------------------------------------------------------------------*/
-
- SECTION .text:CODE:NOROOT(2)
- THUMB
-
-/*--------------------------- rt_set_PSP ------------------------------------*/
-
-; void rt_set_PSP (U32 stack);
-
- PUBLIC rt_set_PSP
-rt_set_PSP:
-
- MSR PSP,R0
- BX LR
-
-
-/*--------------------------- rt_get_PSP ------------------------------------*/
-
-; U32 rt_get_PSP (void);
-
- PUBLIC rt_get_PSP
-rt_get_PSP:
-
- MRS R0,PSP
- BX LR
-
-
-/*--------------------------- os_set_env ------------------------------------*/
-
-; void os_set_env (void);
- /* Switch to Unprivileged/Privileged Thread mode, use PSP. */
-
- PUBLIC os_set_env
-os_set_env:
-
- MOV R0,SP /* PSP = MSP */
- MSR PSP,R0
- LDR R0,=os_flags
- LDRB R0,[R0]
- LSLS R0,#31
- BNE PrivilegedE
- MOVS R0,#0x03 /* Unprivileged Thread mode, use PSP */
- MSR CONTROL,R0
- BX LR
-PrivilegedE:
- MOVS R0,#0x02 /* Privileged Thread mode, use PSP */
- MSR CONTROL,R0
- BX LR
-
-
-/*--------------------------- _alloc_box ------------------------------------*/
-
-; void *_alloc_box (void *box_mem);
- /* Function wrapper for Unprivileged/Privileged mode. */
-
- PUBLIC _alloc_box
-_alloc_box:
-
- LDR R3,=rt_alloc_box
- MOV R12,R3
- MRS R3,IPSR
- LSLS R3,#24
- BNE PrivilegedA
- MRS R3,CONTROL
- LSLS R3,#31
- BEQ PrivilegedA
- SVC 0
- BX LR
-PrivilegedA:
- BX R12
-
-
-/*--------------------------- _free_box -------------------------------------*/
-
-; int _free_box (void *box_mem, void *box);
- /* Function wrapper for Unprivileged/Privileged mode. */
-
- PUBLIC _free_box
-_free_box:
-
- LDR R3,=rt_free_box
- MOV R12,R3
- MRS R3,IPSR
- LSLS R3,#24
- BNE PrivilegedF
- MRS R3,CONTROL
- LSLS R3,#31
- BEQ PrivilegedF
- SVC 0
- BX LR
-PrivilegedF:
- BX R12
-
-
-/*-------------------------- SVC_Handler ------------------------------------*/
-
-; void SVC_Handler (void);
-
- PUBLIC SVC_Handler
-SVC_Handler:
-
- MRS R0,PSP /* Read PSP */
- LDR R1,[R0,#24] /* Read Saved PC from Stack */
- SUBS R1,R1,#2 /* Point to SVC Instruction */
- LDRB R1,[R1] /* Load SVC Number */
- CMP R1,#0
- BNE SVC_User /* User SVC Number > 0 */
-
- MOV LR,R4
- LDMIA R0,{R0-R3,R4} /* Read R0-R3,R12 from stack */
- MOV R12,R4
- MOV R4,LR
- BLX R12 /* Call SVC Function */
-
- MRS R3,PSP /* Read PSP */
- STMIA R3!,{R0-R2} /* Store return values */
-
- LDR R3,=os_tsk
- LDMIA R3!,{R1,R2} /* os_tsk.run, os_tsk.new */
- CMP R1,R2
- BEQ SVC_Exit /* no task switch */
-
- SUBS R3,#8
- CMP R1,#0 /* Runtask deleted? */
- BEQ SVC_Next
-
- MRS R0,PSP /* Read PSP */
- SUBS R0,R0,#32 /* Adjust Start Address */
- STR R0,[R1,#TCB_TSTACK] /* Update os_tsk.run->tsk_stack */
- STMIA R0!,{R4-R7} /* Save old context (R4-R7) */
- MOV R4,R8
- MOV R5,R9
- MOV R6,R10
- MOV R7,R11
- STMIA R0!,{R4-R7} /* Save old context (R8-R11) */
-
- PUSH {R2,R3}
- BL rt_stk_check /* Check for Stack overflow */
- POP {R2,R3}
-
-SVC_Next:
- STR R2,[R3] /* os_tsk.run = os_tsk.new */
-
- LDR R0,[R2,#TCB_TSTACK] /* os_tsk.new->tsk_stack */
- ADDS R0,R0,#16 /* Adjust Start Address */
- LDMIA R0!,{R4-R7} /* Restore new Context (R8-R11) */
- MOV R8,R4
- MOV R9,R5
- MOV R10,R6
- MOV R11,R7
- MSR PSP,R0 /* Write PSP */
- SUBS R0,R0,#32 /* Adjust Start Address */
- LDMIA R0!,{R4-R7} /* Restore new Context (R4-R7) */
-
-SVC_Exit:
- MOVS R0,#~0xFFFFFFFD /* Set EXC_RETURN value */
- MVNS R0,R0
- BX R0 /* RETI to Thread Mode, use PSP */
-
- /*------------------- User SVC ------------------------------*/
-
-SVC_User:
- PUSH {R4,LR} /* Save Registers */
- LDR R2,=SVC_Count
- LDR R2,[R2]
- CMP R1,R2
- BHI SVC_Done /* Overflow */
-
- LDR R4,=SVC_Table-4
- LSLS R1,R1,#2
- LDR R4,[R4,R1] /* Load SVC Function Address */
- MOV LR,R4
-
- LDMIA R0,{R0-R3,R4} /* Read R0-R3,R12 from stack */
- MOV R12,R4
- BLX LR /* Call SVC Function */
-
- MRS R4,PSP /* Read PSP */
- STMIA R4!,{R0-R3} /* Function return values */
-SVC_Done:
- POP {R4,PC} /* RETI */
-
-
-/*-------------------------- PendSV_Handler ---------------------------------*/
-
-; void PendSV_Handler (void);
-
- PUBLIC PendSV_Handler
-PendSV_Handler:
-
- BL rt_pop_req
-
-Sys_Switch:
- LDR R3,=os_tsk
- LDMIA R3!,{R1,R2} /* os_tsk.run, os_tsk.new */
- CMP R1,R2
- BEQ Sys_Exit /* no task switch */
-
- SUBS R3,#8
-
- MRS R0,PSP /* Read PSP */
- SUBS R0,R0,#32 /* Adjust Start Address */
- STR R0,[R1,#TCB_TSTACK] /* Update os_tsk.run->tsk_stack */
- STMIA R0!,{R4-R7} /* Save old context (R4-R7) */
- MOV R4,R8
- MOV R5,R9
- MOV R6,R10
- MOV R7,R11
- STMIA R0!,{R4-R7} /* Save old context (R8-R11) */
-
- PUSH {R2,R3}
- BL rt_stk_check /* Check for Stack overflow */
- POP {R2,R3}
-
- STR R2,[R3] /* os_tsk.run = os_tsk.new */
-
- LDR R0,[R2,#TCB_TSTACK] /* os_tsk.new->tsk_stack */
- ADDS R0,R0,#16 /* Adjust Start Address */
- LDMIA R0!,{R4-R7} /* Restore new Context (R8-R11) */
- MOV R8,R4
- MOV R9,R5
- MOV R10,R6
- MOV R11,R7
- MSR PSP,R0 /* Write PSP */
- SUBS R0,R0,#32 /* Adjust Start Address */
- LDMIA R0!,{R4-R7} /* Restore new Context (R4-R7) */
-
-Sys_Exit:
- MOVS R0,#~0xFFFFFFFD /* Set EXC_RETURN value */
- MVNS R0,R0
- BX R0 /* RETI to Thread Mode, use PSP */
-
-
-/*-------------------------- SysTick_Handler --------------------------------*/
-
-; void SysTick_Handler (void);
-
- PUBLIC SysTick_Handler
-SysTick_Handler:
-
- BL rt_systick
- B Sys_Switch
-
-
-/*-------------------------- OS_Tick_Handler --------------------------------*/
-
-; void OS_Tick_Handler (void);
-
- PUBLIC OS_Tick_Handler
-OS_Tick_Handler:
-
- BL os_tick_irqack
- BL rt_systick
- B Sys_Switch
-
-
- END
-
-/*----------------------------------------------------------------------------
- * end of file
- *---------------------------------------------------------------------------*/
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/rtx/TARGET_CORTEX_M/TARGET_M0P/TOOLCHAIN_IAR/SVC_Table.S Wed Jul 01 08:15:48 2015 +0100 @@ -0,0 +1,58 @@ +;/*---------------------------------------------------------------------------- +; * CMSIS-RTOS - RTX +; *---------------------------------------------------------------------------- +; * Name: SVC_TABLE.S +; * Purpose: Pre-defined SVC Table for Cortex-M +; * Rev.: V4.70 +; *---------------------------------------------------------------------------- +; * +; * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH +; * All rights reserved. +; * Redistribution and use in source and binary forms, with or without +; * modification, are permitted provided that the following conditions are met: +; * - Redistributions of source code must retain the above copyright +; * notice, this list of conditions and the following disclaimer. +; * - Redistributions in binary form must reproduce the above copyright +; * notice, this list of conditions and the following disclaimer in the +; * documentation and/or other materials provided with the distribution. +; * - Neither the name of ARM nor the names of its contributors may be used +; * to endorse or promote products derived from this software without +; * specific prior written permission. +; * +; * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +; * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +; * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +; * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE +; * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +; * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +; * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +; * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +; * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +; * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +; * POSSIBILITY OF SUCH DAMAGE. +; *---------------------------------------------------------------------------*/ + + + NAME SVC_TABLE + SECTION .text:CONST (2) + + PUBLIC SVC_Count + +SVC_Cnt EQU (SVC_End-SVC_Table)/4 +SVC_Count DCD SVC_Cnt + +; Import user SVC functions here. +; IMPORT __SVC_1 + + PUBLIC SVC_Table +SVC_Table +; Insert user SVC functions here. SVC 0 used by RTL Kernel. +; DCD __SVC_1 ; user SVC function + +SVC_End + + END + +/*---------------------------------------------------------------------------- + * end of file + *---------------------------------------------------------------------------*/
--- a/rtx/TARGET_CORTEX_M/TARGET_M0P/TOOLCHAIN_IAR/SVC_Table.s Wed Jun 17 11:15:10 2015 +0100 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,58 +0,0 @@ -;/*---------------------------------------------------------------------------- -; * CMSIS-RTOS - RTX -; *---------------------------------------------------------------------------- -; * Name: SVC_TABLE.S -; * Purpose: Pre-defined SVC Table for Cortex-M -; * Rev.: V4.70 -; *---------------------------------------------------------------------------- -; * -; * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH -; * All rights reserved. -; * Redistribution and use in source and binary forms, with or without -; * modification, are permitted provided that the following conditions are met: -; * - Redistributions of source code must retain the above copyright -; * notice, this list of conditions and the following disclaimer. -; * - Redistributions in binary form must reproduce the above copyright -; * notice, this list of conditions and the following disclaimer in the -; * documentation and/or other materials provided with the distribution. -; * - Neither the name of ARM nor the names of its contributors may be used -; * to endorse or promote products derived from this software without -; * specific prior written permission. -; * -; * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -; * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -; * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -; * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE -; * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -; * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -; * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -; * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -; * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -; * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -; * POSSIBILITY OF SUCH DAMAGE. -; *---------------------------------------------------------------------------*/ - - - NAME SVC_TABLE - SECTION .text:CONST (2) - - PUBLIC SVC_Count - -SVC_Cnt EQU (SVC_End-SVC_Table)/4 -SVC_Count DCD SVC_Cnt - -; Import user SVC functions here. -; IMPORT __SVC_1 - - PUBLIC SVC_Table -SVC_Table -; Insert user SVC functions here. SVC 0 used by RTL Kernel. -; DCD __SVC_1 ; user SVC function - -SVC_End - - END - -/*---------------------------------------------------------------------------- - * end of file - *---------------------------------------------------------------------------*/
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/rtx/TARGET_CORTEX_M/TARGET_M3/TOOLCHAIN_ARM/SVC_Table.S Wed Jul 01 08:15:48 2015 +0100 @@ -0,0 +1,57 @@ +;/*---------------------------------------------------------------------------- +; * RL-ARM - RTX +; *---------------------------------------------------------------------------- +; * Name: SVC_TABLE.S +; * Purpose: Pre-defined SVC Table for Cortex-M +; * Rev.: V4.60 +; *---------------------------------------------------------------------------- +; * +; * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH +; * All rights reserved. +; * Redistribution and use in source and binary forms, with or without +; * modification, are permitted provided that the following conditions are met: +; * - Redistributions of source code must retain the above copyright +; * notice, this list of conditions and the following disclaimer. +; * - Redistributions in binary form must reproduce the above copyright +; * notice, this list of conditions and the following disclaimer in the +; * documentation and/or other materials provided with the distribution. +; * - Neither the name of ARM nor the names of its contributors may be used +; * to endorse or promote products derived from this software without +; * specific prior written permission. +; * +; * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +; * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +; * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +; * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE +; * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +; * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +; * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +; * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +; * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +; * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +; * POSSIBILITY OF SUCH DAMAGE. +; *---------------------------------------------------------------------------*/ + + + AREA SVC_TABLE, CODE, READONLY + + EXPORT SVC_Count + +SVC_Cnt EQU (SVC_End-SVC_Table)/4 +SVC_Count DCD SVC_Cnt + +; Import user SVC functions here. +; IMPORT __SVC_1 + + EXPORT SVC_Table +SVC_Table +; Insert user SVC functions here. SVC 0 used by RTL Kernel. +; DCD __SVC_1 ; user SVC function + +SVC_End + + END + +/*---------------------------------------------------------------------------- + * end of file + *---------------------------------------------------------------------------*/
--- a/rtx/TARGET_CORTEX_M/TARGET_M3/TOOLCHAIN_ARM/SVC_Table.s Wed Jun 17 11:15:10 2015 +0100 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,57 +0,0 @@ -;/*---------------------------------------------------------------------------- -; * RL-ARM - RTX -; *---------------------------------------------------------------------------- -; * Name: SVC_TABLE.S -; * Purpose: Pre-defined SVC Table for Cortex-M -; * Rev.: V4.60 -; *---------------------------------------------------------------------------- -; * -; * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH -; * All rights reserved. -; * Redistribution and use in source and binary forms, with or without -; * modification, are permitted provided that the following conditions are met: -; * - Redistributions of source code must retain the above copyright -; * notice, this list of conditions and the following disclaimer. -; * - Redistributions in binary form must reproduce the above copyright -; * notice, this list of conditions and the following disclaimer in the -; * documentation and/or other materials provided with the distribution. -; * - Neither the name of ARM nor the names of its contributors may be used -; * to endorse or promote products derived from this software without -; * specific prior written permission. -; * -; * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -; * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -; * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -; * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE -; * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -; * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -; * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -; * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -; * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -; * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -; * POSSIBILITY OF SUCH DAMAGE. -; *---------------------------------------------------------------------------*/ - - - AREA SVC_TABLE, CODE, READONLY - - EXPORT SVC_Count - -SVC_Cnt EQU (SVC_End-SVC_Table)/4 -SVC_Count DCD SVC_Cnt - -; Import user SVC functions here. -; IMPORT __SVC_1 - - EXPORT SVC_Table -SVC_Table -; Insert user SVC functions here. SVC 0 used by RTL Kernel. -; DCD __SVC_1 ; user SVC function - -SVC_End - - END - -/*---------------------------------------------------------------------------- - * end of file - *---------------------------------------------------------------------------*/
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/rtx/TARGET_CORTEX_M/TARGET_M3/TOOLCHAIN_GCC/HAL_CM3.S Wed Jul 01 08:15:48 2015 +0100
@@ -0,0 +1,323 @@
+/*----------------------------------------------------------------------------
+ * RL-ARM - RTX
+ *----------------------------------------------------------------------------
+ * Name: HAL_CM3.S
+ * Purpose: Hardware Abstraction Layer for Cortex-M3
+ * Rev.: V4.60
+ *----------------------------------------------------------------------------
+ *
+ * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
+ * All rights reserved.
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * - Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of ARM nor the names of its contributors may be used
+ * to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *---------------------------------------------------------------------------*/
+
+ .file "HAL_CM3.S"
+ .syntax unified
+
+ .equ TCB_TSTACK, 40
+
+
+/*----------------------------------------------------------------------------
+ * Functions
+ *---------------------------------------------------------------------------*/
+
+ .thumb
+
+ .section ".text"
+ .align 2
+
+
+/*--------------------------- rt_set_PSP ------------------------------------*/
+
+# void rt_set_PSP (U32 stack);
+
+ .thumb_func
+ .type rt_set_PSP, %function
+ .global rt_set_PSP
+rt_set_PSP:
+ .fnstart
+ .cantunwind
+
+ MSR PSP,R0
+ BX LR
+
+ .fnend
+ .size rt_set_PSP, .-rt_set_PSP
+
+
+/*--------------------------- rt_get_PSP ------------------------------------*/
+
+# U32 rt_get_PSP (void);
+
+ .thumb_func
+ .type rt_get_PSP, %function
+ .global rt_get_PSP
+rt_get_PSP:
+ .fnstart
+ .cantunwind
+
+ MRS R0,PSP
+ BX LR
+
+ .fnend
+ .size rt_get_PSP, .-rt_get_PSP
+
+
+/*--------------------------- os_set_env ------------------------------------*/
+
+# void os_set_env (void);
+ /* Switch to Unprivileged/Privileged Thread mode, use PSP. */
+
+ .thumb_func
+ .type os_set_env, %function
+ .global os_set_env
+os_set_env:
+ .fnstart
+ .cantunwind
+
+ MOV R0,SP /* PSP = MSP */
+ MSR PSP,R0
+ LDR R0,=os_flags
+ LDRB R0,[R0]
+ LSLS R0,#31
+ ITE NE
+ MOVNE R0,#0x02 /* Privileged Thread mode, use PSP */
+ MOVEQ R0,#0x03 /* Unprivileged Thread mode, use PSP */
+ MSR CONTROL,R0
+ BX LR
+
+ .fnend
+ .size os_set_env, .-os_set_env
+
+
+/*--------------------------- _alloc_box ------------------------------------*/
+
+# void *_alloc_box (void *box_mem);
+ /* Function wrapper for Unprivileged/Privileged mode. */
+
+ .thumb_func
+ .type _alloc_box, %function
+ .global _alloc_box
+_alloc_box:
+ .fnstart
+ .cantunwind
+
+ LDR R12,=rt_alloc_box
+ MRS R3,IPSR
+ LSLS R3,#24
+ IT NE
+ BXNE R12
+ MRS R3,CONTROL
+ LSLS R3,#31
+ IT EQ
+ BXEQ R12
+ SVC 0
+ BX LR
+
+ .fnend
+ .size _alloc_box, .-_alloc_box
+
+
+/*--------------------------- _free_box -------------------------------------*/
+
+# int _free_box (void *box_mem, void *box);
+ /* Function wrapper for Unprivileged/Privileged mode. */
+
+ .thumb_func
+ .type _free_box, %function
+ .global _free_box
+_free_box:
+ .fnstart
+ .cantunwind
+
+ LDR R12,=rt_free_box
+ MRS R3,IPSR
+ LSLS R3,#24
+ IT NE
+ BXNE R12
+ MRS R3,CONTROL
+ LSLS R3,#31
+ IT EQ
+ BXEQ R12
+ SVC 0
+ BX LR
+
+ .fnend
+ .size _free_box, .-_free_box
+
+
+/*-------------------------- SVC_Handler ------------------------------------*/
+
+# void SVC_Handler (void);
+
+ .thumb_func
+ .type SVC_Handler, %function
+ .global SVC_Handler
+SVC_Handler:
+ .fnstart
+ .cantunwind
+
+ MRS R0,PSP /* Read PSP */
+ LDR R1,[R0,#24] /* Read Saved PC from Stack */
+ LDRB R1,[R1,#-2] /* Load SVC Number */
+ CBNZ R1,SVC_User
+
+ LDM R0,{R0-R3,R12} /* Read R0-R3,R12 from stack */
+ BLX R12 /* Call SVC Function */
+
+ MRS R12,PSP /* Read PSP */
+ STM R12,{R0-R2} /* Store return values */
+
+ LDR R3,=os_tsk
+ LDM R3,{R1,R2} /* os_tsk.run, os_tsk.new */
+ CMP R1,R2
+ BEQ SVC_Exit /* no task switch */
+
+ CBZ R1,SVC_Next /* Runtask deleted? */
+ STMDB R12!,{R4-R11} /* Save Old context */
+ STR R12,[R1,#TCB_TSTACK] /* Update os_tsk.run->tsk_stack */
+
+ PUSH {R2,R3}
+ BL rt_stk_check /* Check for Stack overflow */
+ POP {R2,R3}
+
+SVC_Next:
+ STR R2,[R3] /* os_tsk.run = os_tsk.new */
+
+ LDR R12,[R2,#TCB_TSTACK] /* os_tsk.new->tsk_stack */
+ LDMIA R12!,{R4-R11} /* Restore New Context */
+ MSR PSP,R12 /* Write PSP */
+
+SVC_Exit:
+ MVN LR,#~0xFFFFFFFD /* set EXC_RETURN value */
+ BX LR
+
+ /*------------------- User SVC ------------------------------*/
+
+SVC_User:
+ PUSH {R4,LR} /* Save Registers */
+ LDR R2,=SVC_Count
+ LDR R2,[R2]
+ CMP R1,R2
+ BHI SVC_Done /* Overflow */
+
+ LDR R4,=SVC_Table-4
+ LDR R4,[R4,R1,LSL #2] /* Load SVC Function Address */
+
+ LDM R0,{R0-R3,R12} /* Read R0-R3,R12 from stack */
+ BLX R4 /* Call SVC Function */
+
+ MRS R12,PSP
+ STM R12,{R0-R3} /* Function return values */
+SVC_Done:
+ POP {R4,PC} /* RETI */
+
+ .fnend
+ .size SVC_Handler, .-SVC_Handler
+
+
+/*-------------------------- PendSV_Handler ---------------------------------*/
+
+# void PendSV_Handler (void);
+
+ .thumb_func
+ .type PendSV_Handler, %function
+ .global PendSV_Handler
+ .global Sys_Switch
+PendSV_Handler:
+ .fnstart
+ .cantunwind
+
+ BL rt_pop_req
+
+Sys_Switch:
+ LDR R3,=os_tsk
+ LDM R3,{R1,R2} /* os_tsk.run, os_tsk.new */
+ CMP R1,R2
+ BEQ Sys_Exit
+
+ MRS R12,PSP /* Read PSP */
+ STMDB R12!,{R4-R11} /* Save Old context */
+ STR R12,[R1,#TCB_TSTACK] /* Update os_tsk.run->tsk_stack */
+
+ PUSH {R2,R3}
+ BL rt_stk_check /* Check for Stack overflow */
+ POP {R2,R3}
+
+ STR R2,[R3] /* os_tsk.run = os_tsk.new */
+
+ LDR R12,[R2,#TCB_TSTACK] /* os_tsk.new->tsk_stack */
+ LDMIA R12!,{R4-R11} /* Restore New Context */
+ MSR PSP,R12 /* Write PSP */
+
+Sys_Exit:
+ MVN LR,#~0xFFFFFFFD /* set EXC_RETURN value */
+ BX LR /* Return to Thread Mode */
+
+ .fnend
+ .size PendSV_Handler, .-PendSV_Handler
+
+
+/*-------------------------- SysTick_Handler --------------------------------*/
+
+# void SysTick_Handler (void);
+
+ .thumb_func
+ .type SysTick_Handler, %function
+ .global SysTick_Handler
+SysTick_Handler:
+ .fnstart
+ .cantunwind
+
+ BL rt_systick
+ B Sys_Switch
+
+ .fnend
+ .size SysTick_Handler, .-SysTick_Handler
+
+
+/*-------------------------- OS_Tick_Handler --------------------------------*/
+
+# void OS_Tick_Handler (void);
+
+ .thumb_func
+ .type OS_Tick_Handler, %function
+ .global OS_Tick_Handler
+OS_Tick_Handler:
+ .fnstart
+ .cantunwind
+
+ BL os_tick_irqack
+ BL rt_systick
+ B Sys_Switch
+
+ .fnend
+ .size OS_Tick_Handler, .-OS_Tick_Handler
+
+
+ .end
+
+/*----------------------------------------------------------------------------
+ * end of file
+ *---------------------------------------------------------------------------*/
--- a/rtx/TARGET_CORTEX_M/TARGET_M3/TOOLCHAIN_GCC/HAL_CM3.s Wed Jun 17 11:15:10 2015 +0100
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,323 +0,0 @@
-/*----------------------------------------------------------------------------
- * RL-ARM - RTX
- *----------------------------------------------------------------------------
- * Name: HAL_CM3.S
- * Purpose: Hardware Abstraction Layer for Cortex-M3
- * Rev.: V4.60
- *----------------------------------------------------------------------------
- *
- * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
- * All rights reserved.
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * - Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * - Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * - Neither the name of ARM nor the names of its contributors may be used
- * to endorse or promote products derived from this software without
- * specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *---------------------------------------------------------------------------*/
-
- .file "HAL_CM3.S"
- .syntax unified
-
- .equ TCB_TSTACK, 40
-
-
-/*----------------------------------------------------------------------------
- * Functions
- *---------------------------------------------------------------------------*/
-
- .thumb
-
- .section ".text"
- .align 2
-
-
-/*--------------------------- rt_set_PSP ------------------------------------*/
-
-# void rt_set_PSP (U32 stack);
-
- .thumb_func
- .type rt_set_PSP, %function
- .global rt_set_PSP
-rt_set_PSP:
- .fnstart
- .cantunwind
-
- MSR PSP,R0
- BX LR
-
- .fnend
- .size rt_set_PSP, .-rt_set_PSP
-
-
-/*--------------------------- rt_get_PSP ------------------------------------*/
-
-# U32 rt_get_PSP (void);
-
- .thumb_func
- .type rt_get_PSP, %function
- .global rt_get_PSP
-rt_get_PSP:
- .fnstart
- .cantunwind
-
- MRS R0,PSP
- BX LR
-
- .fnend
- .size rt_get_PSP, .-rt_get_PSP
-
-
-/*--------------------------- os_set_env ------------------------------------*/
-
-# void os_set_env (void);
- /* Switch to Unprivileged/Privileged Thread mode, use PSP. */
-
- .thumb_func
- .type os_set_env, %function
- .global os_set_env
-os_set_env:
- .fnstart
- .cantunwind
-
- MOV R0,SP /* PSP = MSP */
- MSR PSP,R0
- LDR R0,=os_flags
- LDRB R0,[R0]
- LSLS R0,#31
- ITE NE
- MOVNE R0,#0x02 /* Privileged Thread mode, use PSP */
- MOVEQ R0,#0x03 /* Unprivileged Thread mode, use PSP */
- MSR CONTROL,R0
- BX LR
-
- .fnend
- .size os_set_env, .-os_set_env
-
-
-/*--------------------------- _alloc_box ------------------------------------*/
-
-# void *_alloc_box (void *box_mem);
- /* Function wrapper for Unprivileged/Privileged mode. */
-
- .thumb_func
- .type _alloc_box, %function
- .global _alloc_box
-_alloc_box:
- .fnstart
- .cantunwind
-
- LDR R12,=rt_alloc_box
- MRS R3,IPSR
- LSLS R3,#24
- IT NE
- BXNE R12
- MRS R3,CONTROL
- LSLS R3,#31
- IT EQ
- BXEQ R12
- SVC 0
- BX LR
-
- .fnend
- .size _alloc_box, .-_alloc_box
-
-
-/*--------------------------- _free_box -------------------------------------*/
-
-# int _free_box (void *box_mem, void *box);
- /* Function wrapper for Unprivileged/Privileged mode. */
-
- .thumb_func
- .type _free_box, %function
- .global _free_box
-_free_box:
- .fnstart
- .cantunwind
-
- LDR R12,=rt_free_box
- MRS R3,IPSR
- LSLS R3,#24
- IT NE
- BXNE R12
- MRS R3,CONTROL
- LSLS R3,#31
- IT EQ
- BXEQ R12
- SVC 0
- BX LR
-
- .fnend
- .size _free_box, .-_free_box
-
-
-/*-------------------------- SVC_Handler ------------------------------------*/
-
-# void SVC_Handler (void);
-
- .thumb_func
- .type SVC_Handler, %function
- .global SVC_Handler
-SVC_Handler:
- .fnstart
- .cantunwind
-
- MRS R0,PSP /* Read PSP */
- LDR R1,[R0,#24] /* Read Saved PC from Stack */
- LDRB R1,[R1,#-2] /* Load SVC Number */
- CBNZ R1,SVC_User
-
- LDM R0,{R0-R3,R12} /* Read R0-R3,R12 from stack */
- BLX R12 /* Call SVC Function */
-
- MRS R12,PSP /* Read PSP */
- STM R12,{R0-R2} /* Store return values */
-
- LDR R3,=os_tsk
- LDM R3,{R1,R2} /* os_tsk.run, os_tsk.new */
- CMP R1,R2
- BEQ SVC_Exit /* no task switch */
-
- CBZ R1,SVC_Next /* Runtask deleted? */
- STMDB R12!,{R4-R11} /* Save Old context */
- STR R12,[R1,#TCB_TSTACK] /* Update os_tsk.run->tsk_stack */
-
- PUSH {R2,R3}
- BL rt_stk_check /* Check for Stack overflow */
- POP {R2,R3}
-
-SVC_Next:
- STR R2,[R3] /* os_tsk.run = os_tsk.new */
-
- LDR R12,[R2,#TCB_TSTACK] /* os_tsk.new->tsk_stack */
- LDMIA R12!,{R4-R11} /* Restore New Context */
- MSR PSP,R12 /* Write PSP */
-
-SVC_Exit:
- MVN LR,#~0xFFFFFFFD /* set EXC_RETURN value */
- BX LR
-
- /*------------------- User SVC ------------------------------*/
-
-SVC_User:
- PUSH {R4,LR} /* Save Registers */
- LDR R2,=SVC_Count
- LDR R2,[R2]
- CMP R1,R2
- BHI SVC_Done /* Overflow */
-
- LDR R4,=SVC_Table-4
- LDR R4,[R4,R1,LSL #2] /* Load SVC Function Address */
-
- LDM R0,{R0-R3,R12} /* Read R0-R3,R12 from stack */
- BLX R4 /* Call SVC Function */
-
- MRS R12,PSP
- STM R12,{R0-R3} /* Function return values */
-SVC_Done:
- POP {R4,PC} /* RETI */
-
- .fnend
- .size SVC_Handler, .-SVC_Handler
-
-
-/*-------------------------- PendSV_Handler ---------------------------------*/
-
-# void PendSV_Handler (void);
-
- .thumb_func
- .type PendSV_Handler, %function
- .global PendSV_Handler
- .global Sys_Switch
-PendSV_Handler:
- .fnstart
- .cantunwind
-
- BL rt_pop_req
-
-Sys_Switch:
- LDR R3,=os_tsk
- LDM R3,{R1,R2} /* os_tsk.run, os_tsk.new */
- CMP R1,R2
- BEQ Sys_Exit
-
- MRS R12,PSP /* Read PSP */
- STMDB R12!,{R4-R11} /* Save Old context */
- STR R12,[R1,#TCB_TSTACK] /* Update os_tsk.run->tsk_stack */
-
- PUSH {R2,R3}
- BL rt_stk_check /* Check for Stack overflow */
- POP {R2,R3}
-
- STR R2,[R3] /* os_tsk.run = os_tsk.new */
-
- LDR R12,[R2,#TCB_TSTACK] /* os_tsk.new->tsk_stack */
- LDMIA R12!,{R4-R11} /* Restore New Context */
- MSR PSP,R12 /* Write PSP */
-
-Sys_Exit:
- MVN LR,#~0xFFFFFFFD /* set EXC_RETURN value */
- BX LR /* Return to Thread Mode */
-
- .fnend
- .size PendSV_Handler, .-PendSV_Handler
-
-
-/*-------------------------- SysTick_Handler --------------------------------*/
-
-# void SysTick_Handler (void);
-
- .thumb_func
- .type SysTick_Handler, %function
- .global SysTick_Handler
-SysTick_Handler:
- .fnstart
- .cantunwind
-
- BL rt_systick
- B Sys_Switch
-
- .fnend
- .size SysTick_Handler, .-SysTick_Handler
-
-
-/*-------------------------- OS_Tick_Handler --------------------------------*/
-
-# void OS_Tick_Handler (void);
-
- .thumb_func
- .type OS_Tick_Handler, %function
- .global OS_Tick_Handler
-OS_Tick_Handler:
- .fnstart
- .cantunwind
-
- BL os_tick_irqack
- BL rt_systick
- B Sys_Switch
-
- .fnend
- .size OS_Tick_Handler, .-OS_Tick_Handler
-
-
- .end
-
-/*----------------------------------------------------------------------------
- * end of file
- *---------------------------------------------------------------------------*/
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/rtx/TARGET_CORTEX_M/TARGET_M3/TOOLCHAIN_GCC/SVC_Table.S Wed Jul 01 08:15:48 2015 +0100 @@ -0,0 +1,56 @@ +;/*---------------------------------------------------------------------------- +; * RL-ARM - RTX +; *---------------------------------------------------------------------------- +; * Name: SVC_TABLE.S +; * Purpose: Pre-defined SVC Table for Cortex-M +; * Rev.: V4.60 +; *---------------------------------------------------------------------------- +; * +; * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH +; * All rights reserved. +; * Redistribution and use in source and binary forms, with or without +; * modification, are permitted provided that the following conditions are met: +; * - Redistributions of source code must retain the above copyright +; * notice, this list of conditions and the following disclaimer. +; * - Redistributions in binary form must reproduce the above copyright +; * notice, this list of conditions and the following disclaimer in the +; * documentation and/or other materials provided with the distribution. +; * - Neither the name of ARM nor the names of its contributors may be used +; * to endorse or promote products derived from this software without +; * specific prior written permission. +; * +; * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +; * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +; * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +; * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE +; * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +; * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +; * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +; * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +; * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +; * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +; * POSSIBILITY OF SUCH DAMAGE. +; *---------------------------------------------------------------------------*/ + + + .file "SVC_Table.S" + + + .section ".svc_table" + + .global SVC_Table +SVC_Table: +/* Insert user SVC functions here. SVC 0 used by RTL Kernel. */ +# .long __SVC_1 /* user SVC function */ +SVC_End: + + .global SVC_Count +SVC_Count: + .long (SVC_End-SVC_Table)/4 + + + .end + +/*---------------------------------------------------------------------------- + * end of file + *---------------------------------------------------------------------------*/
--- a/rtx/TARGET_CORTEX_M/TARGET_M3/TOOLCHAIN_GCC/SVC_Table.s Wed Jun 17 11:15:10 2015 +0100 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,56 +0,0 @@ -;/*---------------------------------------------------------------------------- -; * RL-ARM - RTX -; *---------------------------------------------------------------------------- -; * Name: SVC_TABLE.S -; * Purpose: Pre-defined SVC Table for Cortex-M -; * Rev.: V4.60 -; *---------------------------------------------------------------------------- -; * -; * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH -; * All rights reserved. -; * Redistribution and use in source and binary forms, with or without -; * modification, are permitted provided that the following conditions are met: -; * - Redistributions of source code must retain the above copyright -; * notice, this list of conditions and the following disclaimer. -; * - Redistributions in binary form must reproduce the above copyright -; * notice, this list of conditions and the following disclaimer in the -; * documentation and/or other materials provided with the distribution. -; * - Neither the name of ARM nor the names of its contributors may be used -; * to endorse or promote products derived from this software without -; * specific prior written permission. -; * -; * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -; * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -; * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -; * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE -; * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -; * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -; * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -; * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -; * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -; * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -; * POSSIBILITY OF SUCH DAMAGE. -; *---------------------------------------------------------------------------*/ - - - .file "SVC_Table.S" - - - .section ".svc_table" - - .global SVC_Table -SVC_Table: -/* Insert user SVC functions here. SVC 0 used by RTL Kernel. */ -# .long __SVC_1 /* user SVC function */ -SVC_End: - - .global SVC_Count -SVC_Count: - .long (SVC_End-SVC_Table)/4 - - - .end - -/*---------------------------------------------------------------------------- - * end of file - *---------------------------------------------------------------------------*/
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/rtx/TARGET_CORTEX_M/TARGET_M3/TOOLCHAIN_IAR/HAL_CM3.S Wed Jul 01 08:15:48 2015 +0100
@@ -0,0 +1,265 @@
+/*----------------------------------------------------------------------------
+ * RL-ARM - RTX
+ *----------------------------------------------------------------------------
+ * Name: HAL_CM3.S
+ * Purpose: Hardware Abstraction Layer for Cortex-M3
+ * Rev.: V4.70
+ *----------------------------------------------------------------------------
+ *
+ * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH
+ * All rights reserved.
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * - Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of ARM nor the names of its contributors may be used
+ * to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *---------------------------------------------------------------------------*/
+
+ NAME HAL_CM3.S
+
+ #define TCB_TSTACK 40
+
+ EXTERN os_flags
+ EXTERN os_tsk
+ EXTERN rt_alloc_box
+ EXTERN rt_free_box
+ EXTERN rt_stk_check
+ EXTERN rt_pop_req
+ EXTERN rt_systick
+ EXTERN os_tick_irqack
+ EXTERN SVC_Table
+ EXTERN SVC_Count
+
+/*----------------------------------------------------------------------------
+ * Functions
+ *---------------------------------------------------------------------------*/
+
+ SECTION .text:CODE:NOROOT(2)
+ THUMB
+
+/*--------------------------- rt_set_PSP ------------------------------------*/
+
+; void rt_set_PSP (U32 stack);
+
+ PUBLIC rt_set_PSP
+rt_set_PSP:
+
+ MSR PSP,R0
+ BX LR
+
+
+/*--------------------------- rt_get_PSP ------------------------------------*/
+
+; U32 rt_get_PSP (void);
+
+ PUBLIC rt_get_PSP
+rt_get_PSP:
+
+ MRS R0,PSP
+ BX LR
+
+
+/*--------------------------- os_set_env ------------------------------------*/
+
+; void os_set_env (void);
+ /* Switch to Unprivileged/Privileged Thread mode, use PSP. */
+
+ PUBLIC os_set_env
+os_set_env:
+
+ MOV R0,SP /* PSP = MSP */
+ MSR PSP,R0
+ LDR R0,=os_flags
+ LDRB R0,[R0]
+ LSLS R0,#31
+ ITE NE
+ MOVNE R0,#0x02 /* Privileged Thread mode, use PSP */
+ MOVEQ R0,#0x03 /* Unprivileged Thread mode, use PSP */
+ MSR CONTROL,R0
+ BX LR
+
+
+/*--------------------------- _alloc_box ------------------------------------*/
+
+; void *_alloc_box (void *box_mem);
+ /* Function wrapper for Unprivileged/Privileged mode. */
+
+ PUBLIC _alloc_box
+_alloc_box:
+
+ LDR R12,=rt_alloc_box
+ MRS R3,IPSR
+ LSLS R3,#24
+ IT NE
+ BXNE R12
+ MRS R3,CONTROL
+ LSLS R3,#31
+ IT EQ
+ BXEQ R12
+ SVC 0
+ BX LR
+
+
+/*--------------------------- _free_box -------------------------------------*/
+
+; int _free_box (void *box_mem, void *box);
+ /* Function wrapper for Unprivileged/Privileged mode. */
+
+ PUBLIC _free_box
+_free_box:
+
+ LDR R12,=rt_free_box
+ MRS R3,IPSR
+ LSLS R3,#24
+ IT NE
+ BXNE R12
+ MRS R3,CONTROL
+ LSLS R3,#31
+ IT EQ
+ BXEQ R12
+ SVC 0
+ BX LR
+
+
+/*-------------------------- SVC_Handler ------------------------------------*/
+
+; void SVC_Handler (void);
+
+ PUBLIC SVC_Handler
+SVC_Handler:
+
+ MRS R0,PSP /* Read PSP */
+ LDR R1,[R0,#24] /* Read Saved PC from Stack */
+ LDRB R1,[R1,#-2] /* Load SVC Number */
+ CBNZ R1,SVC_User
+
+ LDM R0,{R0-R3,R12} /* Read R0-R3,R12 from stack */
+ BLX R12 /* Call SVC Function */
+
+ MRS R12,PSP /* Read PSP */
+ STM R12,{R0-R2} /* Store return values */
+
+ LDR R3,=os_tsk
+ LDM R3,{R1,R2} /* os_tsk.run, os_tsk.new */
+ CMP R1,R2
+ BEQ SVC_Exit /* no task switch */
+
+ CBZ R1,SVC_Next /* Runtask deleted? */
+ STMDB R12!,{R4-R11} /* Save Old context */
+ STR R12,[R1,#TCB_TSTACK] /* Update os_tsk.run->tsk_stack */
+
+ PUSH {R2,R3}
+ BL rt_stk_check /* Check for Stack overflow */
+ POP {R2,R3}
+
+SVC_Next:
+ STR R2,[R3] /* os_tsk.run = os_tsk.new */
+
+ LDR R12,[R2,#TCB_TSTACK] /* os_tsk.new->tsk_stack */
+ LDMIA R12!,{R4-R11} /* Restore New Context */
+ MSR PSP,R12 /* Write PSP */
+
+SVC_Exit:
+ MVN LR,#~0xFFFFFFFD /* set EXC_RETURN value */
+ BX LR
+
+ /*------------------- User SVC ------------------------------*/
+
+SVC_User:
+ PUSH {R4,LR} /* Save Registers */
+ LDR R2,=SVC_Count
+ LDR R2,[R2]
+ CMP R1,R2
+ BHI SVC_Done /* Overflow */
+
+ LDR R4,=SVC_Table-4
+ LDR R4,[R4,R1,LSL #2] /* Load SVC Function Address */
+
+ LDM R0,{R0-R3,R12} /* Read R0-R3,R12 from stack */
+ BLX R4 /* Call SVC Function */
+
+ MRS R12,PSP
+ STM R12,{R0-R3} /* Function return values */
+SVC_Done:
+ POP {R4,PC} /* RETI */
+
+
+/*-------------------------- PendSV_Handler ---------------------------------*/
+
+; void PendSV_Handler (void);
+
+ PUBLIC PendSV_Handler
+PendSV_Handler:
+
+ BL rt_pop_req
+
+Sys_Switch:
+ LDR R3,=os_tsk
+ LDM R3,{R1,R2} /* os_tsk.run, os_tsk.new */
+ CMP R1,R2
+ BEQ Sys_Exit
+
+ MRS R12,PSP /* Read PSP */
+ STMDB R12!,{R4-R11} /* Save Old context */
+ STR R12,[R1,#TCB_TSTACK] /* Update os_tsk.run->tsk_stack */
+
+ PUSH {R2,R3}
+ BL rt_stk_check /* Check for Stack overflow */
+ POP {R2,R3}
+
+ STR R2,[R3] /* os_tsk.run = os_tsk.new */
+
+ LDR R12,[R2,#TCB_TSTACK] /* os_tsk.new->tsk_stack */
+ LDMIA R12!,{R4-R11} /* Restore New Context */
+ MSR PSP,R12 /* Write PSP */
+
+Sys_Exit:
+ MVN LR,#~0xFFFFFFFD /* set EXC_RETURN value */
+ BX LR /* Return to Thread Mode */
+
+
+/*-------------------------- SysTick_Handler --------------------------------*/
+
+; void SysTick_Handler (void);
+
+ PUBLIC SysTick_Handler
+SysTick_Handler:
+
+ BL rt_systick
+ B Sys_Switch
+
+
+/*-------------------------- OS_Tick_Handler --------------------------------*/
+
+; void OS_Tick_Handler (void);
+
+ PUBLIC OS_Tick_Handler
+OS_Tick_Handler:
+
+ BL os_tick_irqack
+ BL rt_systick
+ B Sys_Switch
+
+
+ END
+
+/*----------------------------------------------------------------------------
+ * end of file
+ *---------------------------------------------------------------------------*/
--- a/rtx/TARGET_CORTEX_M/TARGET_M3/TOOLCHAIN_IAR/HAL_CM3.s Wed Jun 17 11:15:10 2015 +0100
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,265 +0,0 @@
-/*----------------------------------------------------------------------------
- * RL-ARM - RTX
- *----------------------------------------------------------------------------
- * Name: HAL_CM3.S
- * Purpose: Hardware Abstraction Layer for Cortex-M3
- * Rev.: V4.70
- *----------------------------------------------------------------------------
- *
- * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH
- * All rights reserved.
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * - Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * - Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * - Neither the name of ARM nor the names of its contributors may be used
- * to endorse or promote products derived from this software without
- * specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *---------------------------------------------------------------------------*/
-
- NAME HAL_CM3.S
-
- #define TCB_TSTACK 40
-
- EXTERN os_flags
- EXTERN os_tsk
- EXTERN rt_alloc_box
- EXTERN rt_free_box
- EXTERN rt_stk_check
- EXTERN rt_pop_req
- EXTERN rt_systick
- EXTERN os_tick_irqack
- EXTERN SVC_Table
- EXTERN SVC_Count
-
-/*----------------------------------------------------------------------------
- * Functions
- *---------------------------------------------------------------------------*/
-
- SECTION .text:CODE:NOROOT(2)
- THUMB
-
-/*--------------------------- rt_set_PSP ------------------------------------*/
-
-; void rt_set_PSP (U32 stack);
-
- PUBLIC rt_set_PSP
-rt_set_PSP:
-
- MSR PSP,R0
- BX LR
-
-
-/*--------------------------- rt_get_PSP ------------------------------------*/
-
-; U32 rt_get_PSP (void);
-
- PUBLIC rt_get_PSP
-rt_get_PSP:
-
- MRS R0,PSP
- BX LR
-
-
-/*--------------------------- os_set_env ------------------------------------*/
-
-; void os_set_env (void);
- /* Switch to Unprivileged/Privileged Thread mode, use PSP. */
-
- PUBLIC os_set_env
-os_set_env:
-
- MOV R0,SP /* PSP = MSP */
- MSR PSP,R0
- LDR R0,=os_flags
- LDRB R0,[R0]
- LSLS R0,#31
- ITE NE
- MOVNE R0,#0x02 /* Privileged Thread mode, use PSP */
- MOVEQ R0,#0x03 /* Unprivileged Thread mode, use PSP */
- MSR CONTROL,R0
- BX LR
-
-
-/*--------------------------- _alloc_box ------------------------------------*/
-
-; void *_alloc_box (void *box_mem);
- /* Function wrapper for Unprivileged/Privileged mode. */
-
- PUBLIC _alloc_box
-_alloc_box:
-
- LDR R12,=rt_alloc_box
- MRS R3,IPSR
- LSLS R3,#24
- IT NE
- BXNE R12
- MRS R3,CONTROL
- LSLS R3,#31
- IT EQ
- BXEQ R12
- SVC 0
- BX LR
-
-
-/*--------------------------- _free_box -------------------------------------*/
-
-; int _free_box (void *box_mem, void *box);
- /* Function wrapper for Unprivileged/Privileged mode. */
-
- PUBLIC _free_box
-_free_box:
-
- LDR R12,=rt_free_box
- MRS R3,IPSR
- LSLS R3,#24
- IT NE
- BXNE R12
- MRS R3,CONTROL
- LSLS R3,#31
- IT EQ
- BXEQ R12
- SVC 0
- BX LR
-
-
-/*-------------------------- SVC_Handler ------------------------------------*/
-
-; void SVC_Handler (void);
-
- PUBLIC SVC_Handler
-SVC_Handler:
-
- MRS R0,PSP /* Read PSP */
- LDR R1,[R0,#24] /* Read Saved PC from Stack */
- LDRB R1,[R1,#-2] /* Load SVC Number */
- CBNZ R1,SVC_User
-
- LDM R0,{R0-R3,R12} /* Read R0-R3,R12 from stack */
- BLX R12 /* Call SVC Function */
-
- MRS R12,PSP /* Read PSP */
- STM R12,{R0-R2} /* Store return values */
-
- LDR R3,=os_tsk
- LDM R3,{R1,R2} /* os_tsk.run, os_tsk.new */
- CMP R1,R2
- BEQ SVC_Exit /* no task switch */
-
- CBZ R1,SVC_Next /* Runtask deleted? */
- STMDB R12!,{R4-R11} /* Save Old context */
- STR R12,[R1,#TCB_TSTACK] /* Update os_tsk.run->tsk_stack */
-
- PUSH {R2,R3}
- BL rt_stk_check /* Check for Stack overflow */
- POP {R2,R3}
-
-SVC_Next:
- STR R2,[R3] /* os_tsk.run = os_tsk.new */
-
- LDR R12,[R2,#TCB_TSTACK] /* os_tsk.new->tsk_stack */
- LDMIA R12!,{R4-R11} /* Restore New Context */
- MSR PSP,R12 /* Write PSP */
-
-SVC_Exit:
- MVN LR,#~0xFFFFFFFD /* set EXC_RETURN value */
- BX LR
-
- /*------------------- User SVC ------------------------------*/
-
-SVC_User:
- PUSH {R4,LR} /* Save Registers */
- LDR R2,=SVC_Count
- LDR R2,[R2]
- CMP R1,R2
- BHI SVC_Done /* Overflow */
-
- LDR R4,=SVC_Table-4
- LDR R4,[R4,R1,LSL #2] /* Load SVC Function Address */
-
- LDM R0,{R0-R3,R12} /* Read R0-R3,R12 from stack */
- BLX R4 /* Call SVC Function */
-
- MRS R12,PSP
- STM R12,{R0-R3} /* Function return values */
-SVC_Done:
- POP {R4,PC} /* RETI */
-
-
-/*-------------------------- PendSV_Handler ---------------------------------*/
-
-; void PendSV_Handler (void);
-
- PUBLIC PendSV_Handler
-PendSV_Handler:
-
- BL rt_pop_req
-
-Sys_Switch:
- LDR R3,=os_tsk
- LDM R3,{R1,R2} /* os_tsk.run, os_tsk.new */
- CMP R1,R2
- BEQ Sys_Exit
-
- MRS R12,PSP /* Read PSP */
- STMDB R12!,{R4-R11} /* Save Old context */
- STR R12,[R1,#TCB_TSTACK] /* Update os_tsk.run->tsk_stack */
-
- PUSH {R2,R3}
- BL rt_stk_check /* Check for Stack overflow */
- POP {R2,R3}
-
- STR R2,[R3] /* os_tsk.run = os_tsk.new */
-
- LDR R12,[R2,#TCB_TSTACK] /* os_tsk.new->tsk_stack */
- LDMIA R12!,{R4-R11} /* Restore New Context */
- MSR PSP,R12 /* Write PSP */
-
-Sys_Exit:
- MVN LR,#~0xFFFFFFFD /* set EXC_RETURN value */
- BX LR /* Return to Thread Mode */
-
-
-/*-------------------------- SysTick_Handler --------------------------------*/
-
-; void SysTick_Handler (void);
-
- PUBLIC SysTick_Handler
-SysTick_Handler:
-
- BL rt_systick
- B Sys_Switch
-
-
-/*-------------------------- OS_Tick_Handler --------------------------------*/
-
-; void OS_Tick_Handler (void);
-
- PUBLIC OS_Tick_Handler
-OS_Tick_Handler:
-
- BL os_tick_irqack
- BL rt_systick
- B Sys_Switch
-
-
- END
-
-/*----------------------------------------------------------------------------
- * end of file
- *---------------------------------------------------------------------------*/
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/rtx/TARGET_CORTEX_M/TARGET_M3/TOOLCHAIN_IAR/SVC_Table.S Wed Jul 01 08:15:48 2015 +0100 @@ -0,0 +1,58 @@ +;/*---------------------------------------------------------------------------- +; * CMSIS-RTOS - RTX +; *---------------------------------------------------------------------------- +; * Name: SVC_TABLE.S +; * Purpose: Pre-defined SVC Table for Cortex-M +; * Rev.: V4.70 +; *---------------------------------------------------------------------------- +; * +; * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH +; * All rights reserved. +; * Redistribution and use in source and binary forms, with or without +; * modification, are permitted provided that the following conditions are met: +; * - Redistributions of source code must retain the above copyright +; * notice, this list of conditions and the following disclaimer. +; * - Redistributions in binary form must reproduce the above copyright +; * notice, this list of conditions and the following disclaimer in the +; * documentation and/or other materials provided with the distribution. +; * - Neither the name of ARM nor the names of its contributors may be used +; * to endorse or promote products derived from this software without +; * specific prior written permission. +; * +; * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +; * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +; * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +; * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE +; * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +; * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +; * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +; * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +; * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +; * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +; * POSSIBILITY OF SUCH DAMAGE. +; *---------------------------------------------------------------------------*/ + + + NAME SVC_TABLE + SECTION .text:CONST (2) + + PUBLIC SVC_Count + +SVC_Cnt EQU (SVC_End-SVC_Table)/4 +SVC_Count DCD SVC_Cnt + +; Import user SVC functions here. +; IMPORT __SVC_1 + + PUBLIC SVC_Table +SVC_Table +; Insert user SVC functions here. SVC 0 used by RTL Kernel. +; DCD __SVC_1 ; user SVC function + +SVC_End + + END + +/*---------------------------------------------------------------------------- + * end of file + *---------------------------------------------------------------------------*/
--- a/rtx/TARGET_CORTEX_M/TARGET_M3/TOOLCHAIN_IAR/SVC_Table.s Wed Jun 17 11:15:10 2015 +0100 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,58 +0,0 @@ -;/*---------------------------------------------------------------------------- -; * CMSIS-RTOS - RTX -; *---------------------------------------------------------------------------- -; * Name: SVC_TABLE.S -; * Purpose: Pre-defined SVC Table for Cortex-M -; * Rev.: V4.70 -; *---------------------------------------------------------------------------- -; * -; * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH -; * All rights reserved. -; * Redistribution and use in source and binary forms, with or without -; * modification, are permitted provided that the following conditions are met: -; * - Redistributions of source code must retain the above copyright -; * notice, this list of conditions and the following disclaimer. -; * - Redistributions in binary form must reproduce the above copyright -; * notice, this list of conditions and the following disclaimer in the -; * documentation and/or other materials provided with the distribution. -; * - Neither the name of ARM nor the names of its contributors may be used -; * to endorse or promote products derived from this software without -; * specific prior written permission. -; * -; * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -; * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -; * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -; * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE -; * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -; * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -; * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -; * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -; * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -; * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -; * POSSIBILITY OF SUCH DAMAGE. -; *---------------------------------------------------------------------------*/ - - - NAME SVC_TABLE - SECTION .text:CONST (2) - - PUBLIC SVC_Count - -SVC_Cnt EQU (SVC_End-SVC_Table)/4 -SVC_Count DCD SVC_Cnt - -; Import user SVC functions here. -; IMPORT __SVC_1 - - PUBLIC SVC_Table -SVC_Table -; Insert user SVC functions here. SVC 0 used by RTL Kernel. -; DCD __SVC_1 ; user SVC function - -SVC_End - - END - -/*---------------------------------------------------------------------------- - * end of file - *---------------------------------------------------------------------------*/
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/rtx/TARGET_CORTEX_M/TARGET_M4/TOOLCHAIN_ARM/SVC_Table.S Wed Jul 01 08:15:48 2015 +0100 @@ -0,0 +1,57 @@ +;/*---------------------------------------------------------------------------- +; * RL-ARM - RTX +; *---------------------------------------------------------------------------- +; * Name: SVC_TABLE.S +; * Purpose: Pre-defined SVC Table for Cortex-M +; * Rev.: V4.70 +; *---------------------------------------------------------------------------- +; * +; * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH +; * All rights reserved. +; * Redistribution and use in source and binary forms, with or without +; * modification, are permitted provided that the following conditions are met: +; * - Redistributions of source code must retain the above copyright +; * notice, this list of conditions and the following disclaimer. +; * - Redistributions in binary form must reproduce the above copyright +; * notice, this list of conditions and the following disclaimer in the +; * documentation and/or other materials provided with the distribution. +; * - Neither the name of ARM nor the names of its contributors may be used +; * to endorse or promote products derived from this software without +; * specific prior written permission. +; * +; * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +; * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +; * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +; * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE +; * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +; * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +; * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +; * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +; * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +; * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +; * POSSIBILITY OF SUCH DAMAGE. +; *---------------------------------------------------------------------------*/ + + + AREA SVC_TABLE, CODE, READONLY + + EXPORT SVC_Count + +SVC_Cnt EQU (SVC_End-SVC_Table)/4 +SVC_Count DCD SVC_Cnt + +; Import user SVC functions here. +; IMPORT __SVC_1 + + EXPORT SVC_Table +SVC_Table +; Insert user SVC functions here. SVC 0 used by RTL Kernel. +; DCD __SVC_1 ; user SVC function + +SVC_End + + END + +/*---------------------------------------------------------------------------- + * end of file + *---------------------------------------------------------------------------*/
--- a/rtx/TARGET_CORTEX_M/TARGET_M4/TOOLCHAIN_ARM/SVC_Table.s Wed Jun 17 11:15:10 2015 +0100 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,57 +0,0 @@ -;/*---------------------------------------------------------------------------- -; * RL-ARM - RTX -; *---------------------------------------------------------------------------- -; * Name: SVC_TABLE.S -; * Purpose: Pre-defined SVC Table for Cortex-M -; * Rev.: V4.70 -; *---------------------------------------------------------------------------- -; * -; * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH -; * All rights reserved. -; * Redistribution and use in source and binary forms, with or without -; * modification, are permitted provided that the following conditions are met: -; * - Redistributions of source code must retain the above copyright -; * notice, this list of conditions and the following disclaimer. -; * - Redistributions in binary form must reproduce the above copyright -; * notice, this list of conditions and the following disclaimer in the -; * documentation and/or other materials provided with the distribution. -; * - Neither the name of ARM nor the names of its contributors may be used -; * to endorse or promote products derived from this software without -; * specific prior written permission. -; * -; * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -; * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -; * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -; * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE -; * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -; * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -; * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -; * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -; * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -; * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -; * POSSIBILITY OF SUCH DAMAGE. -; *---------------------------------------------------------------------------*/ - - - AREA SVC_TABLE, CODE, READONLY - - EXPORT SVC_Count - -SVC_Cnt EQU (SVC_End-SVC_Table)/4 -SVC_Count DCD SVC_Cnt - -; Import user SVC functions here. -; IMPORT __SVC_1 - - EXPORT SVC_Table -SVC_Table -; Insert user SVC functions here. SVC 0 used by RTL Kernel. -; DCD __SVC_1 ; user SVC function - -SVC_End - - END - -/*---------------------------------------------------------------------------- - * end of file - *---------------------------------------------------------------------------*/
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/rtx/TARGET_CORTEX_M/TARGET_M4/TOOLCHAIN_GCC/HAL_CM4.S Wed Jul 01 08:15:48 2015 +0100
@@ -0,0 +1,405 @@
+/*----------------------------------------------------------------------------
+ * RL-ARM - RTX
+ *----------------------------------------------------------------------------
+ * Name: HAL_CM4.S
+ * Purpose: Hardware Abstraction Layer for Cortex-M4
+ * Rev.: V4.70
+ *----------------------------------------------------------------------------
+ *
+ * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH
+ * All rights reserved.
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * - Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of ARM nor the names of its contributors may be used
+ * to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *---------------------------------------------------------------------------*/
+
+ .file "HAL_CM4.S"
+ .syntax unified
+
+ .equ TCB_STACKF, 32
+ .equ TCB_TSTACK, 40
+
+
+/*----------------------------------------------------------------------------
+ * Functions
+ *---------------------------------------------------------------------------*/
+
+ .thumb
+
+ .section ".text"
+ .align 2
+
+
+/*--------------------------- rt_set_PSP ------------------------------------*/
+
+# void rt_set_PSP (U32 stack);
+
+ .thumb_func
+ .type rt_set_PSP, %function
+ .global rt_set_PSP
+rt_set_PSP:
+ .fnstart
+ .cantunwind
+
+ MSR PSP,R0
+ BX LR
+
+ .fnend
+ .size rt_set_PSP, .-rt_set_PSP
+
+
+/*--------------------------- rt_get_PSP ------------------------------------*/
+
+# U32 rt_get_PSP (void);
+
+ .thumb_func
+ .type rt_get_PSP, %function
+ .global rt_get_PSP
+rt_get_PSP:
+ .fnstart
+ .cantunwind
+
+ MRS R0,PSP
+ BX LR
+
+ .fnend
+ .size rt_get_PSP, .-rt_get_PSP
+
+
+/*--------------------------- os_set_env ------------------------------------*/
+
+# void os_set_env (void);
+ /* Switch to Unprivileged/Privileged Thread mode, use PSP. */
+
+ .thumb_func
+ .type os_set_env, %function
+ .global os_set_env
+os_set_env:
+ .fnstart
+ .cantunwind
+
+ MOV R0,SP /* PSP = MSP */
+ MSR PSP,R0
+ LDR R0,=os_flags
+ LDRB R0,[R0]
+ LSLS R0,#31
+ ITE NE
+ MOVNE R0,#0x02 /* Privileged Thread mode, use PSP */
+ MOVEQ R0,#0x03 /* Unprivileged Thread mode, use PSP */
+ MSR CONTROL,R0
+ BX LR
+
+ .fnend
+ .size os_set_env, .-os_set_env
+
+
+/*--------------------------- _alloc_box ------------------------------------*/
+
+# void *_alloc_box (void *box_mem);
+ /* Function wrapper for Unprivileged/Privileged mode. */
+
+ .thumb_func
+ .type _alloc_box, %function
+ .global _alloc_box
+_alloc_box:
+ .fnstart
+ .cantunwind
+
+ LDR R12,=rt_alloc_box
+ MRS R3,IPSR
+ LSLS R3,#24
+ IT NE
+ BXNE R12
+ MRS R3,CONTROL
+ LSLS R3,#31
+ IT EQ
+ BXEQ R12
+ SVC 0
+ BX LR
+
+ .fnend
+ .size _alloc_box, .-_alloc_box
+
+
+/*--------------------------- _free_box -------------------------------------*/
+
+# int _free_box (void *box_mem, void *box);
+ /* Function wrapper for Unprivileged/Privileged mode. */
+
+ .thumb_func
+ .type _free_box, %function
+ .global _free_box
+_free_box:
+ .fnstart
+ .cantunwind
+
+ LDR R12,=rt_free_box
+ MRS R3,IPSR
+ LSLS R3,#24
+ IT NE
+ BXNE R12
+ MRS R3,CONTROL
+ LSLS R3,#31
+ IT EQ
+ BXEQ R12
+ SVC 0
+ BX LR
+
+ .fnend
+ .size _free_box, .-_free_box
+
+
+/*-------------------------- SVC_Handler ------------------------------------*/
+
+# void SVC_Handler (void);
+
+ .thumb_func
+ .type SVC_Handler, %function
+ .global SVC_Handler
+SVC_Handler:
+ .ifdef IFX_XMC4XXX
+ .global SVC_Handler_Veneer
+SVC_Handler_Veneer:
+ .endif
+ .fnstart
+ .cantunwind
+
+ MRS R0,PSP /* Read PSP */
+ LDR R1,[R0,#24] /* Read Saved PC from Stack */
+ LDRB R1,[R1,#-2] /* Load SVC Number */
+ CBNZ R1,SVC_User
+
+ LDM R0,{R0-R3,R12} /* Read R0-R3,R12 from stack */
+ PUSH {R4,LR} /* Save EXC_RETURN */
+ BLX R12 /* Call SVC Function */
+ POP {R4,LR} /* Restore EXC_RETURN */
+
+ MRS R12,PSP /* Read PSP */
+ STM R12,{R0-R2} /* Store return values */
+
+ LDR R3,=os_tsk
+ LDM R3,{R1,R2} /* os_tsk.run, os_tsk.new */
+ CMP R1,R2
+ .ifdef IFX_XMC4XXX
+ ITT EQ
+ PUSHEQ {LR}
+ POPEQ {PC}
+ .else
+ IT EQ
+ BXEQ LR /* RETI, no task switch */
+ .endif
+
+ CBZ R1,SVC_Next /* Runtask deleted? */
+ TST LR,#0x10 /* is it extended frame? */
+ #ifdef __FPU_PRESENT
+ ITTE EQ
+ VSTMDBEQ R12!,{S16-S31} /* yes, stack also VFP hi-regs */
+ #else
+ ITE EQ
+ #endif
+ MOVEQ R0,#0x01 /* os_tsk->stack_frame val */
+ MOVNE R0,#0x00
+ STRB R0,[R1,#TCB_STACKF] /* os_tsk.run->stack_frame = val */
+ STMDB R12!,{R4-R11} /* Save Old context */
+ STR R12,[R1,#TCB_TSTACK] /* Update os_tsk.run->tsk_stack */
+
+ PUSH {R2,R3}
+ BL rt_stk_check /* Check for Stack overflow */
+ POP {R2,R3}
+
+SVC_Next:
+ STR R2,[R3] /* os_tsk.run = os_tsk.new */
+
+ LDR R12,[R2,#TCB_TSTACK] /* os_tsk.new->tsk_stack */
+ LDMIA R12!,{R4-R11} /* Restore New Context */
+ LDRB R0,[R2,#TCB_STACKF] /* Stack Frame */
+ CMP R0,#0 /* Basic/Extended Stack Frame */
+ #ifdef __FPU_PRESENT
+ ITTE NE
+ VLDMIANE R12!,{S16-S31} /* restore VFP hi-registers */
+ #else
+ ITE NE
+ #endif
+ MVNNE LR,#~0xFFFFFFED /* set EXC_RETURN value */
+ MVNEQ LR,#~0xFFFFFFFD
+ MSR PSP,R12 /* Write PSP */
+
+SVC_Exit:
+ .ifdef IFX_XMC4XXX
+ PUSH {LR}
+ POP {PC}
+ .else
+ BX LR
+ .endif
+
+ /*------------------- User SVC ------------------------------*/
+
+SVC_User:
+ PUSH {R4,LR} /* Save Registers */
+ LDR R2,=SVC_Count
+ LDR R2,[R2]
+ CMP R1,R2
+ BHI SVC_Done /* Overflow */
+
+ LDR R4,=SVC_Table-4
+ LDR R4,[R4,R1,LSL #2] /* Load SVC Function Address */
+
+ LDM R0,{R0-R3,R12} /* Read R0-R3,R12 from stack */
+ BLX R4 /* Call SVC Function */
+
+ MRS R12,PSP
+ STM R12,{R0-R3} /* Function return values */
+SVC_Done:
+ POP {R4,PC} /* RETI */
+
+ .fnend
+ .size SVC_Handler, .-SVC_Handler
+
+
+/*-------------------------- PendSV_Handler ---------------------------------*/
+
+# void PendSV_Handler (void);
+
+ .thumb_func
+ .type PendSV_Handler, %function
+ .global PendSV_Handler
+ .global Sys_Switch
+PendSV_Handler:
+ .ifdef IFX_XMC4XXX
+ .global PendSV_Handler_Veneer
+PendSV_Handler_Veneer:
+ .endif
+ .fnstart
+ .cantunwind
+
+ PUSH {R4,LR} /* Save EXC_RETURN */
+ BL rt_pop_req
+
+Sys_Switch:
+ POP {R4,LR} /* Restore EXC_RETURN */
+
+ LDR R3,=os_tsk
+ LDM R3,{R1,R2} /* os_tsk.run, os_tsk.new */
+ CMP R1,R2
+ .ifdef IFX_XMC4XXX
+ ITT EQ
+ PUSHEQ {LR}
+ POPEQ {PC}
+ .else
+ IT EQ
+ BXEQ LR /* RETI, no task switch */
+ .endif
+
+ MRS R12,PSP /* Read PSP */
+ TST LR,#0x10 /* is it extended frame? */
+ #ifdef __FPU_PRESENT
+ ITTE EQ
+ VSTMDBEQ R12!,{S16-S31} /* yes, stack also VFP hi-regs */
+ #else
+ ITE EQ
+ #endif
+ MOVEQ R0,#0x01 /* os_tsk->stack_frame val */
+ MOVNE R0,#0x00
+ STRB R0,[R1,#TCB_STACKF] /* os_tsk.run->stack_frame = val */
+ STMDB R12!,{R4-R11} /* Save Old context */
+ STR R12,[R1,#TCB_TSTACK] /* Update os_tsk.run->tsk_stack */
+
+ PUSH {R2,R3}
+ BL rt_stk_check /* Check for Stack overflow */
+ POP {R2,R3}
+
+ STR R2,[R3] /* os_tsk.run = os_tsk.new */
+
+ LDR R12,[R2,#TCB_TSTACK] /* os_tsk.new->tsk_stack */
+ LDMIA R12!,{R4-R11} /* Restore New Context */
+ LDRB R0,[R2,#TCB_STACKF] /* Stack Frame */
+ CMP R0,#0 /* Basic/Extended Stack Frame */
+ #ifdef __FPU_PRESENT
+ ITTE NE
+ VLDMIANE R12!,{S16-S31} /* restore VFP hi-registers */
+ #else
+ ITE NE
+ #endif
+ MVNNE LR,#~0xFFFFFFED /* set EXC_RETURN value */
+ MVNEQ LR,#~0xFFFFFFFD
+ MSR PSP,R12 /* Write PSP */
+
+Sys_Exit:
+ .ifdef IFX_XMC4XXX
+ PUSH {LR}
+ POP {PC}
+ .else
+ BX LR /* Return to Thread Mode */
+ .endif
+
+ .fnend
+ .size PendSV_Handler, .-PendSV_Handler
+
+
+/*-------------------------- SysTick_Handler --------------------------------*/
+
+# void SysTick_Handler (void);
+
+ .thumb_func
+ .type SysTick_Handler, %function
+ .global SysTick_Handler
+SysTick_Handler:
+ .ifdef IFX_XMC4XXX
+ .global SysTick_Handler_Veneer
+SysTick_Handler_Veneer:
+ .endif
+ .fnstart
+ .cantunwind
+
+ PUSH {R4,LR} /* Save EXC_RETURN */
+ BL rt_systick
+ B Sys_Switch
+
+ .fnend
+ .size SysTick_Handler, .-SysTick_Handler
+
+
+/*-------------------------- OS_Tick_Handler --------------------------------*/
+
+# void OS_Tick_Handler (void);
+
+ .thumb_func
+ .type OS_Tick_Handler, %function
+ .global OS_Tick_Handler
+OS_Tick_Handler:
+ .fnstart
+ .cantunwind
+
+ PUSH {R4,LR} /* Save EXC_RETURN */
+ BL os_tick_irqack
+ BL rt_systick
+ B Sys_Switch
+
+ .fnend
+ .size OS_Tick_Handler, .-OS_Tick_Handler
+
+
+ .end
+
+/*----------------------------------------------------------------------------
+ * end of file
+ *---------------------------------------------------------------------------*/
--- a/rtx/TARGET_CORTEX_M/TARGET_M4/TOOLCHAIN_GCC/HAL_CM4.s Wed Jun 17 11:15:10 2015 +0100
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,405 +0,0 @@
-/*----------------------------------------------------------------------------
- * RL-ARM - RTX
- *----------------------------------------------------------------------------
- * Name: HAL_CM4.S
- * Purpose: Hardware Abstraction Layer for Cortex-M4
- * Rev.: V4.70
- *----------------------------------------------------------------------------
- *
- * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH
- * All rights reserved.
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * - Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * - Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * - Neither the name of ARM nor the names of its contributors may be used
- * to endorse or promote products derived from this software without
- * specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *---------------------------------------------------------------------------*/
-
- .file "HAL_CM4.S"
- .syntax unified
-
- .equ TCB_STACKF, 32
- .equ TCB_TSTACK, 40
-
-
-/*----------------------------------------------------------------------------
- * Functions
- *---------------------------------------------------------------------------*/
-
- .thumb
-
- .section ".text"
- .align 2
-
-
-/*--------------------------- rt_set_PSP ------------------------------------*/
-
-# void rt_set_PSP (U32 stack);
-
- .thumb_func
- .type rt_set_PSP, %function
- .global rt_set_PSP
-rt_set_PSP:
- .fnstart
- .cantunwind
-
- MSR PSP,R0
- BX LR
-
- .fnend
- .size rt_set_PSP, .-rt_set_PSP
-
-
-/*--------------------------- rt_get_PSP ------------------------------------*/
-
-# U32 rt_get_PSP (void);
-
- .thumb_func
- .type rt_get_PSP, %function
- .global rt_get_PSP
-rt_get_PSP:
- .fnstart
- .cantunwind
-
- MRS R0,PSP
- BX LR
-
- .fnend
- .size rt_get_PSP, .-rt_get_PSP
-
-
-/*--------------------------- os_set_env ------------------------------------*/
-
-# void os_set_env (void);
- /* Switch to Unprivileged/Privileged Thread mode, use PSP. */
-
- .thumb_func
- .type os_set_env, %function
- .global os_set_env
-os_set_env:
- .fnstart
- .cantunwind
-
- MOV R0,SP /* PSP = MSP */
- MSR PSP,R0
- LDR R0,=os_flags
- LDRB R0,[R0]
- LSLS R0,#31
- ITE NE
- MOVNE R0,#0x02 /* Privileged Thread mode, use PSP */
- MOVEQ R0,#0x03 /* Unprivileged Thread mode, use PSP */
- MSR CONTROL,R0
- BX LR
-
- .fnend
- .size os_set_env, .-os_set_env
-
-
-/*--------------------------- _alloc_box ------------------------------------*/
-
-# void *_alloc_box (void *box_mem);
- /* Function wrapper for Unprivileged/Privileged mode. */
-
- .thumb_func
- .type _alloc_box, %function
- .global _alloc_box
-_alloc_box:
- .fnstart
- .cantunwind
-
- LDR R12,=rt_alloc_box
- MRS R3,IPSR
- LSLS R3,#24
- IT NE
- BXNE R12
- MRS R3,CONTROL
- LSLS R3,#31
- IT EQ
- BXEQ R12
- SVC 0
- BX LR
-
- .fnend
- .size _alloc_box, .-_alloc_box
-
-
-/*--------------------------- _free_box -------------------------------------*/
-
-# int _free_box (void *box_mem, void *box);
- /* Function wrapper for Unprivileged/Privileged mode. */
-
- .thumb_func
- .type _free_box, %function
- .global _free_box
-_free_box:
- .fnstart
- .cantunwind
-
- LDR R12,=rt_free_box
- MRS R3,IPSR
- LSLS R3,#24
- IT NE
- BXNE R12
- MRS R3,CONTROL
- LSLS R3,#31
- IT EQ
- BXEQ R12
- SVC 0
- BX LR
-
- .fnend
- .size _free_box, .-_free_box
-
-
-/*-------------------------- SVC_Handler ------------------------------------*/
-
-# void SVC_Handler (void);
-
- .thumb_func
- .type SVC_Handler, %function
- .global SVC_Handler
-SVC_Handler:
- .ifdef IFX_XMC4XXX
- .global SVC_Handler_Veneer
-SVC_Handler_Veneer:
- .endif
- .fnstart
- .cantunwind
-
- MRS R0,PSP /* Read PSP */
- LDR R1,[R0,#24] /* Read Saved PC from Stack */
- LDRB R1,[R1,#-2] /* Load SVC Number */
- CBNZ R1,SVC_User
-
- LDM R0,{R0-R3,R12} /* Read R0-R3,R12 from stack */
- PUSH {R4,LR} /* Save EXC_RETURN */
- BLX R12 /* Call SVC Function */
- POP {R4,LR} /* Restore EXC_RETURN */
-
- MRS R12,PSP /* Read PSP */
- STM R12,{R0-R2} /* Store return values */
-
- LDR R3,=os_tsk
- LDM R3,{R1,R2} /* os_tsk.run, os_tsk.new */
- CMP R1,R2
- .ifdef IFX_XMC4XXX
- ITT EQ
- PUSHEQ {LR}
- POPEQ {PC}
- .else
- IT EQ
- BXEQ LR /* RETI, no task switch */
- .endif
-
- CBZ R1,SVC_Next /* Runtask deleted? */
- TST LR,#0x10 /* is it extended frame? */
- #ifdef __FPU_PRESENT
- ITTE EQ
- VSTMDBEQ R12!,{S16-S31} /* yes, stack also VFP hi-regs */
- #else
- ITE EQ
- #endif
- MOVEQ R0,#0x01 /* os_tsk->stack_frame val */
- MOVNE R0,#0x00
- STRB R0,[R1,#TCB_STACKF] /* os_tsk.run->stack_frame = val */
- STMDB R12!,{R4-R11} /* Save Old context */
- STR R12,[R1,#TCB_TSTACK] /* Update os_tsk.run->tsk_stack */
-
- PUSH {R2,R3}
- BL rt_stk_check /* Check for Stack overflow */
- POP {R2,R3}
-
-SVC_Next:
- STR R2,[R3] /* os_tsk.run = os_tsk.new */
-
- LDR R12,[R2,#TCB_TSTACK] /* os_tsk.new->tsk_stack */
- LDMIA R12!,{R4-R11} /* Restore New Context */
- LDRB R0,[R2,#TCB_STACKF] /* Stack Frame */
- CMP R0,#0 /* Basic/Extended Stack Frame */
- #ifdef __FPU_PRESENT
- ITTE NE
- VLDMIANE R12!,{S16-S31} /* restore VFP hi-registers */
- #else
- ITE NE
- #endif
- MVNNE LR,#~0xFFFFFFED /* set EXC_RETURN value */
- MVNEQ LR,#~0xFFFFFFFD
- MSR PSP,R12 /* Write PSP */
-
-SVC_Exit:
- .ifdef IFX_XMC4XXX
- PUSH {LR}
- POP {PC}
- .else
- BX LR
- .endif
-
- /*------------------- User SVC ------------------------------*/
-
-SVC_User:
- PUSH {R4,LR} /* Save Registers */
- LDR R2,=SVC_Count
- LDR R2,[R2]
- CMP R1,R2
- BHI SVC_Done /* Overflow */
-
- LDR R4,=SVC_Table-4
- LDR R4,[R4,R1,LSL #2] /* Load SVC Function Address */
-
- LDM R0,{R0-R3,R12} /* Read R0-R3,R12 from stack */
- BLX R4 /* Call SVC Function */
-
- MRS R12,PSP
- STM R12,{R0-R3} /* Function return values */
-SVC_Done:
- POP {R4,PC} /* RETI */
-
- .fnend
- .size SVC_Handler, .-SVC_Handler
-
-
-/*-------------------------- PendSV_Handler ---------------------------------*/
-
-# void PendSV_Handler (void);
-
- .thumb_func
- .type PendSV_Handler, %function
- .global PendSV_Handler
- .global Sys_Switch
-PendSV_Handler:
- .ifdef IFX_XMC4XXX
- .global PendSV_Handler_Veneer
-PendSV_Handler_Veneer:
- .endif
- .fnstart
- .cantunwind
-
- PUSH {R4,LR} /* Save EXC_RETURN */
- BL rt_pop_req
-
-Sys_Switch:
- POP {R4,LR} /* Restore EXC_RETURN */
-
- LDR R3,=os_tsk
- LDM R3,{R1,R2} /* os_tsk.run, os_tsk.new */
- CMP R1,R2
- .ifdef IFX_XMC4XXX
- ITT EQ
- PUSHEQ {LR}
- POPEQ {PC}
- .else
- IT EQ
- BXEQ LR /* RETI, no task switch */
- .endif
-
- MRS R12,PSP /* Read PSP */
- TST LR,#0x10 /* is it extended frame? */
- #ifdef __FPU_PRESENT
- ITTE EQ
- VSTMDBEQ R12!,{S16-S31} /* yes, stack also VFP hi-regs */
- #else
- ITE EQ
- #endif
- MOVEQ R0,#0x01 /* os_tsk->stack_frame val */
- MOVNE R0,#0x00
- STRB R0,[R1,#TCB_STACKF] /* os_tsk.run->stack_frame = val */
- STMDB R12!,{R4-R11} /* Save Old context */
- STR R12,[R1,#TCB_TSTACK] /* Update os_tsk.run->tsk_stack */
-
- PUSH {R2,R3}
- BL rt_stk_check /* Check for Stack overflow */
- POP {R2,R3}
-
- STR R2,[R3] /* os_tsk.run = os_tsk.new */
-
- LDR R12,[R2,#TCB_TSTACK] /* os_tsk.new->tsk_stack */
- LDMIA R12!,{R4-R11} /* Restore New Context */
- LDRB R0,[R2,#TCB_STACKF] /* Stack Frame */
- CMP R0,#0 /* Basic/Extended Stack Frame */
- #ifdef __FPU_PRESENT
- ITTE NE
- VLDMIANE R12!,{S16-S31} /* restore VFP hi-registers */
- #else
- ITE NE
- #endif
- MVNNE LR,#~0xFFFFFFED /* set EXC_RETURN value */
- MVNEQ LR,#~0xFFFFFFFD
- MSR PSP,R12 /* Write PSP */
-
-Sys_Exit:
- .ifdef IFX_XMC4XXX
- PUSH {LR}
- POP {PC}
- .else
- BX LR /* Return to Thread Mode */
- .endif
-
- .fnend
- .size PendSV_Handler, .-PendSV_Handler
-
-
-/*-------------------------- SysTick_Handler --------------------------------*/
-
-# void SysTick_Handler (void);
-
- .thumb_func
- .type SysTick_Handler, %function
- .global SysTick_Handler
-SysTick_Handler:
- .ifdef IFX_XMC4XXX
- .global SysTick_Handler_Veneer
-SysTick_Handler_Veneer:
- .endif
- .fnstart
- .cantunwind
-
- PUSH {R4,LR} /* Save EXC_RETURN */
- BL rt_systick
- B Sys_Switch
-
- .fnend
- .size SysTick_Handler, .-SysTick_Handler
-
-
-/*-------------------------- OS_Tick_Handler --------------------------------*/
-
-# void OS_Tick_Handler (void);
-
- .thumb_func
- .type OS_Tick_Handler, %function
- .global OS_Tick_Handler
-OS_Tick_Handler:
- .fnstart
- .cantunwind
-
- PUSH {R4,LR} /* Save EXC_RETURN */
- BL os_tick_irqack
- BL rt_systick
- B Sys_Switch
-
- .fnend
- .size OS_Tick_Handler, .-OS_Tick_Handler
-
-
- .end
-
-/*----------------------------------------------------------------------------
- * end of file
- *---------------------------------------------------------------------------*/
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/rtx/TARGET_CORTEX_M/TARGET_M4/TOOLCHAIN_GCC/SVC_Table.S Wed Jul 01 08:15:48 2015 +0100 @@ -0,0 +1,56 @@ +;/*---------------------------------------------------------------------------- +; * RL-ARM - RTX +; *---------------------------------------------------------------------------- +; * Name: SVC_TABLE.S +; * Purpose: Pre-defined SVC Table for Cortex-M +; * Rev.: V4.70 +; *---------------------------------------------------------------------------- +; * +; * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH +; * All rights reserved. +; * Redistribution and use in source and binary forms, with or without +; * modification, are permitted provided that the following conditions are met: +; * - Redistributions of source code must retain the above copyright +; * notice, this list of conditions and the following disclaimer. +; * - Redistributions in binary form must reproduce the above copyright +; * notice, this list of conditions and the following disclaimer in the +; * documentation and/or other materials provided with the distribution. +; * - Neither the name of ARM nor the names of its contributors may be used +; * to endorse or promote products derived from this software without +; * specific prior written permission. +; * +; * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +; * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +; * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +; * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE +; * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +; * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +; * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +; * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +; * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +; * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +; * POSSIBILITY OF SUCH DAMAGE. +; *---------------------------------------------------------------------------*/ + + + .file "SVC_Table.S" + + + .section ".svc_table" + + .global SVC_Table +SVC_Table: +/* Insert user SVC functions here. SVC 0 used by RTL Kernel. */ +# .long __SVC_1 /* user SVC function */ +SVC_End: + + .global SVC_Count +SVC_Count: + .long (SVC_End-SVC_Table)/4 + + + .end + +/*---------------------------------------------------------------------------- + * end of file + *---------------------------------------------------------------------------*/
--- a/rtx/TARGET_CORTEX_M/TARGET_M4/TOOLCHAIN_GCC/SVC_Table.s Wed Jun 17 11:15:10 2015 +0100 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,56 +0,0 @@ -;/*---------------------------------------------------------------------------- -; * RL-ARM - RTX -; *---------------------------------------------------------------------------- -; * Name: SVC_TABLE.S -; * Purpose: Pre-defined SVC Table for Cortex-M -; * Rev.: V4.70 -; *---------------------------------------------------------------------------- -; * -; * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH -; * All rights reserved. -; * Redistribution and use in source and binary forms, with or without -; * modification, are permitted provided that the following conditions are met: -; * - Redistributions of source code must retain the above copyright -; * notice, this list of conditions and the following disclaimer. -; * - Redistributions in binary form must reproduce the above copyright -; * notice, this list of conditions and the following disclaimer in the -; * documentation and/or other materials provided with the distribution. -; * - Neither the name of ARM nor the names of its contributors may be used -; * to endorse or promote products derived from this software without -; * specific prior written permission. -; * -; * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -; * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -; * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -; * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE -; * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -; * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -; * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -; * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -; * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -; * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -; * POSSIBILITY OF SUCH DAMAGE. -; *---------------------------------------------------------------------------*/ - - - .file "SVC_Table.S" - - - .section ".svc_table" - - .global SVC_Table -SVC_Table: -/* Insert user SVC functions here. SVC 0 used by RTL Kernel. */ -# .long __SVC_1 /* user SVC function */ -SVC_End: - - .global SVC_Count -SVC_Count: - .long (SVC_End-SVC_Table)/4 - - - .end - -/*---------------------------------------------------------------------------- - * end of file - *---------------------------------------------------------------------------*/
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/rtx/TARGET_CORTEX_M/TARGET_M4/TOOLCHAIN_IAR/HAL_CM4.S Wed Jul 01 08:15:48 2015 +0100
@@ -0,0 +1,333 @@
+/*----------------------------------------------------------------------------
+ * CMSIS-RTOS - RTX
+ *----------------------------------------------------------------------------
+ * Name: HAL_CM4.S
+ * Purpose: Hardware Abstraction Layer for Cortex-M4
+ * Rev.: V4.70
+ *----------------------------------------------------------------------------
+ *
+ * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH
+ * All rights reserved.
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * - Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of ARM nor the names of its contributors may be used
+ * to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *---------------------------------------------------------------------------*/
+
+ NAME HAL_CM4.S
+
+ #define TCB_STACKF 32
+ #define TCB_TSTACK 40
+
+ EXTERN os_flags
+ EXTERN os_tsk
+ EXTERN rt_alloc_box
+ EXTERN rt_free_box
+ EXTERN rt_stk_check
+ EXTERN rt_pop_req
+ EXTERN rt_systick
+ EXTERN os_tick_irqack
+ EXTERN SVC_Table
+ EXTERN SVC_Count
+
+/*----------------------------------------------------------------------------
+ * Functions
+ *---------------------------------------------------------------------------*/
+
+ SECTION .text:CODE:NOROOT(2)
+ THUMB
+
+/*--------------------------- rt_set_PSP ------------------------------------*/
+
+; void rt_set_PSP (U32 stack);
+
+ PUBLIC rt_set_PSP
+rt_set_PSP:
+
+ MSR PSP,R0
+ BX LR
+
+
+/*--------------------------- rt_get_PSP ------------------------------------*/
+
+; U32 rt_get_PSP (void);
+
+ PUBLIC rt_get_PSP
+rt_get_PSP:
+
+ MRS R0,PSP
+ BX LR
+
+
+/*--------------------------- os_set_env ------------------------------------*/
+
+; void os_set_env (void);
+ /* Switch to Unprivileged/Privileged Thread mode, use PSP. */
+
+ PUBLIC os_set_env
+os_set_env:
+
+ MOV R0,SP /* PSP = MSP */
+ MSR PSP,R0
+ LDR R0,=os_flags
+ LDRB R0,[R0]
+ LSLS R0,#31
+ ITE NE
+ MOVNE R0,#0x02 /* Privileged Thread mode, use PSP */
+ MOVEQ R0,#0x03 /* Unprivileged Thread mode, use PSP */
+ MSR CONTROL,R0
+ BX LR
+
+
+/*--------------------------- _alloc_box ------------------------------------*/
+
+; void *_alloc_box (void *box_mem);
+ /* Function wrapper for Unprivileged/Privileged mode. */
+
+ PUBLIC _alloc_box
+_alloc_box:
+
+ LDR R12,=rt_alloc_box
+ MRS R3,IPSR
+ LSLS R3,#24
+ IT NE
+ BXNE R12
+ MRS R3,CONTROL
+ LSLS R3,#31
+ IT EQ
+ BXEQ R12
+ SVC 0
+ BX LR
+
+
+/*--------------------------- _free_box -------------------------------------*/
+
+; int _free_box (void *box_mem, void *box);
+ /* Function wrapper for Unprivileged/Privileged mode. */
+
+ PUBLIC _free_box
+_free_box:
+
+ LDR R12,=rt_free_box
+ MRS R3,IPSR
+ LSLS R3,#24
+ IT NE
+ BXNE R12
+ MRS R3,CONTROL
+ LSLS R3,#31
+ IT EQ
+ BXEQ R12
+ SVC 0
+ BX LR
+
+
+/*-------------------------- SVC_Handler ------------------------------------*/
+
+; void SVC_Handler (void);
+
+ PUBLIC SVC_Handler
+SVC_Handler:
+
+#ifdef IFX_XMC4XXX
+ PUBLIC SVC_Handler_Veneer
+SVC_Handler_Veneer:
+#endif
+
+ MRS R0,PSP /* Read PSP */
+ LDR R1,[R0,#24] /* Read Saved PC from Stack */
+ LDRB R1,[R1,#-2] /* Load SVC Number */
+ CBNZ R1,SVC_User
+
+ LDM R0,{R0-R3,R12} /* Read R0-R3,R12 from stack */
+ PUSH {R4,LR} /* Save EXC_RETURN */
+ BLX R12 /* Call SVC Function */
+ POP {R4,LR} /* Restore EXC_RETURN */
+
+ MRS R12,PSP /* Read PSP */
+ STM R12,{R0-R2} /* Store return values */
+
+ LDR R3,=os_tsk
+ LDM R3,{R1,R2} /* os_tsk.run, os_tsk.new */
+ CMP R1,R2
+#ifdef IFX_XMC4XXX
+ ITT EQ
+ PUSHEQ {LR}
+ POPEQ {PC}
+#else
+ IT EQ
+ BXEQ LR /* RETI, no task switch */
+#endif
+
+ CBZ R1,SVC_Next /* Runtask deleted? */
+ TST LR,#0x10 /* is it extended frame? */
+ ITTE EQ
+ VSTMDBEQ R12!,{S16-S31} /* yes, stack also VFP hi-regs */
+ MOVEQ R0,#0x01 /* os_tsk->stack_frame val */
+ MOVNE R0,#0x00
+ STRB R0,[R1,#TCB_STACKF] /* os_tsk.run->stack_frame = val */
+ STMDB R12!,{R4-R11} /* Save Old context */
+ STR R12,[R1,#TCB_TSTACK] /* Update os_tsk.run->tsk_stack */
+
+ PUSH {R2,R3}
+ BL rt_stk_check /* Check for Stack overflow */
+ POP {R2,R3}
+
+SVC_Next:
+ STR R2,[R3] /* os_tsk.run = os_tsk.new */
+
+ LDR R12,[R2,#TCB_TSTACK] /* os_tsk.new->tsk_stack */
+ LDMIA R12!,{R4-R11} /* Restore New Context */
+ LDRB R0,[R2,#TCB_STACKF] /* Stack Frame */
+ CMP R0,#0 /* Basic/Extended Stack Frame */
+ ITTE NE
+ VLDMIANE R12!,{S16-S31} /* restore VFP hi-registers */
+ MVNNE LR,#~0xFFFFFFED /* set EXC_RETURN value */
+ MVNEQ LR,#~0xFFFFFFFD
+ MSR PSP,R12 /* Write PSP */
+
+SVC_Exit:
+#ifdef IFX_XMC4XXX
+ PUSH {LR}
+ POP {PC}
+#else
+ BX LR
+#endif
+
+ /*------------------- User SVC ------------------------------*/
+
+SVC_User:
+ PUSH {R4,LR} /* Save Registers */
+ LDR R2,=SVC_Count
+ LDR R2,[R2]
+ CMP R1,R2
+ BHI SVC_Done /* Overflow */
+
+ LDR R4,=SVC_Table-4
+ LDR R4,[R4,R1,LSL #2] /* Load SVC Function Address */
+
+ LDM R0,{R0-R3,R12} /* Read R0-R3,R12 from stack */
+ BLX R4 /* Call SVC Function */
+
+ MRS R12,PSP
+ STM R12,{R0-R3} /* Function return values */
+SVC_Done:
+ POP {R4,PC} /* RETI */
+
+
+/*-------------------------- PendSV_Handler ---------------------------------*/
+
+; void PendSV_Handler (void);
+
+ PUBLIC PendSV_Handler
+PendSV_Handler:
+
+#ifdef IFX_XMC4XXX
+ PUBLIC PendSV_Handler_Veneer
+PendSV_Handler_Veneer:
+#endif
+
+ PUSH {R4,LR} /* Save EXC_RETURN */
+ BL rt_pop_req
+
+Sys_Switch:
+ POP {R4,LR} /* Restore EXC_RETURN */
+
+ LDR R3,=os_tsk
+ LDM R3,{R1,R2} /* os_tsk.run, os_tsk.new */
+ CMP R1,R2
+#ifdef IFX_XMC4XXX
+ ITT EQ
+ PUSHEQ {LR}
+ POPEQ {PC}
+#else
+ IT EQ
+ BXEQ LR /* RETI, no task switch */
+#endif
+
+ MRS R12,PSP /* Read PSP */
+ TST LR,#0x10 /* is it extended frame? */
+ ITTE EQ
+ VSTMDBEQ R12!,{S16-S31} /* yes, stack also VFP hi-regs */
+ MOVEQ R0,#0x01 /* os_tsk->stack_frame val */
+ MOVNE R0,#0x00
+ STRB R0,[R1,#TCB_STACKF] /* os_tsk.run->stack_frame = val */
+ STMDB R12!,{R4-R11} /* Save Old context */
+ STR R12,[R1,#TCB_TSTACK] /* Update os_tsk.run->tsk_stack */
+
+ PUSH {R2,R3}
+ BL rt_stk_check /* Check for Stack overflow */
+ POP {R2,R3}
+
+ STR R2,[R3] /* os_tsk.run = os_tsk.new */
+
+ LDR R12,[R2,#TCB_TSTACK] /* os_tsk.new->tsk_stack */
+ LDMIA R12!,{R4-R11} /* Restore New Context */
+ LDRB R0,[R2,#TCB_STACKF] /* Stack Frame */
+ CMP R0,#0 /* Basic/Extended Stack Frame */
+ ITTE NE
+ VLDMIANE R12!,{S16-S31} /* restore VFP hi-registers */
+ MVNNE LR,#~0xFFFFFFED /* set EXC_RETURN value */
+ MVNEQ LR,#~0xFFFFFFFD
+ MSR PSP,R12 /* Write PSP */
+
+Sys_Exit:
+#ifdef IFX_XMC4XXX
+ PUSH {LR}
+ POP {PC}
+#else
+ BX LR /* Return to Thread Mode */
+#endif
+
+
+/*-------------------------- SysTick_Handler --------------------------------*/
+
+; void SysTick_Handler (void);
+
+ PUBLIC SysTick_Handler
+SysTick_Handler:
+#ifdef IFX_XMC4XXX
+ PUBLIC SysTick_Handler_Veneer
+SysTick_Handler_Veneer:
+#endif
+
+ PUSH {R4,LR} /* Save EXC_RETURN */
+ BL rt_systick
+ B Sys_Switch
+
+
+/*-------------------------- OS_Tick_Handler --------------------------------*/
+
+; void OS_Tick_Handler (void);
+
+ PUBLIC OS_Tick_Handler
+OS_Tick_Handler:
+
+ PUSH {R4,LR} /* Save EXC_RETURN */
+ BL os_tick_irqack
+ BL rt_systick
+ B Sys_Switch
+
+
+ END
+
+/*----------------------------------------------------------------------------
+ * end of file
+ *---------------------------------------------------------------------------*/
--- a/rtx/TARGET_CORTEX_M/TARGET_M4/TOOLCHAIN_IAR/HAL_CM4.s Wed Jun 17 11:15:10 2015 +0100
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,333 +0,0 @@
-/*----------------------------------------------------------------------------
- * CMSIS-RTOS - RTX
- *----------------------------------------------------------------------------
- * Name: HAL_CM4.S
- * Purpose: Hardware Abstraction Layer for Cortex-M4
- * Rev.: V4.70
- *----------------------------------------------------------------------------
- *
- * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH
- * All rights reserved.
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * - Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * - Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * - Neither the name of ARM nor the names of its contributors may be used
- * to endorse or promote products derived from this software without
- * specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *---------------------------------------------------------------------------*/
-
- NAME HAL_CM4.S
-
- #define TCB_STACKF 32
- #define TCB_TSTACK 40
-
- EXTERN os_flags
- EXTERN os_tsk
- EXTERN rt_alloc_box
- EXTERN rt_free_box
- EXTERN rt_stk_check
- EXTERN rt_pop_req
- EXTERN rt_systick
- EXTERN os_tick_irqack
- EXTERN SVC_Table
- EXTERN SVC_Count
-
-/*----------------------------------------------------------------------------
- * Functions
- *---------------------------------------------------------------------------*/
-
- SECTION .text:CODE:NOROOT(2)
- THUMB
-
-/*--------------------------- rt_set_PSP ------------------------------------*/
-
-; void rt_set_PSP (U32 stack);
-
- PUBLIC rt_set_PSP
-rt_set_PSP:
-
- MSR PSP,R0
- BX LR
-
-
-/*--------------------------- rt_get_PSP ------------------------------------*/
-
-; U32 rt_get_PSP (void);
-
- PUBLIC rt_get_PSP
-rt_get_PSP:
-
- MRS R0,PSP
- BX LR
-
-
-/*--------------------------- os_set_env ------------------------------------*/
-
-; void os_set_env (void);
- /* Switch to Unprivileged/Privileged Thread mode, use PSP. */
-
- PUBLIC os_set_env
-os_set_env:
-
- MOV R0,SP /* PSP = MSP */
- MSR PSP,R0
- LDR R0,=os_flags
- LDRB R0,[R0]
- LSLS R0,#31
- ITE NE
- MOVNE R0,#0x02 /* Privileged Thread mode, use PSP */
- MOVEQ R0,#0x03 /* Unprivileged Thread mode, use PSP */
- MSR CONTROL,R0
- BX LR
-
-
-/*--------------------------- _alloc_box ------------------------------------*/
-
-; void *_alloc_box (void *box_mem);
- /* Function wrapper for Unprivileged/Privileged mode. */
-
- PUBLIC _alloc_box
-_alloc_box:
-
- LDR R12,=rt_alloc_box
- MRS R3,IPSR
- LSLS R3,#24
- IT NE
- BXNE R12
- MRS R3,CONTROL
- LSLS R3,#31
- IT EQ
- BXEQ R12
- SVC 0
- BX LR
-
-
-/*--------------------------- _free_box -------------------------------------*/
-
-; int _free_box (void *box_mem, void *box);
- /* Function wrapper for Unprivileged/Privileged mode. */
-
- PUBLIC _free_box
-_free_box:
-
- LDR R12,=rt_free_box
- MRS R3,IPSR
- LSLS R3,#24
- IT NE
- BXNE R12
- MRS R3,CONTROL
- LSLS R3,#31
- IT EQ
- BXEQ R12
- SVC 0
- BX LR
-
-
-/*-------------------------- SVC_Handler ------------------------------------*/
-
-; void SVC_Handler (void);
-
- PUBLIC SVC_Handler
-SVC_Handler:
-
-#ifdef IFX_XMC4XXX
- PUBLIC SVC_Handler_Veneer
-SVC_Handler_Veneer:
-#endif
-
- MRS R0,PSP /* Read PSP */
- LDR R1,[R0,#24] /* Read Saved PC from Stack */
- LDRB R1,[R1,#-2] /* Load SVC Number */
- CBNZ R1,SVC_User
-
- LDM R0,{R0-R3,R12} /* Read R0-R3,R12 from stack */
- PUSH {R4,LR} /* Save EXC_RETURN */
- BLX R12 /* Call SVC Function */
- POP {R4,LR} /* Restore EXC_RETURN */
-
- MRS R12,PSP /* Read PSP */
- STM R12,{R0-R2} /* Store return values */
-
- LDR R3,=os_tsk
- LDM R3,{R1,R2} /* os_tsk.run, os_tsk.new */
- CMP R1,R2
-#ifdef IFX_XMC4XXX
- ITT EQ
- PUSHEQ {LR}
- POPEQ {PC}
-#else
- IT EQ
- BXEQ LR /* RETI, no task switch */
-#endif
-
- CBZ R1,SVC_Next /* Runtask deleted? */
- TST LR,#0x10 /* is it extended frame? */
- ITTE EQ
- VSTMDBEQ R12!,{S16-S31} /* yes, stack also VFP hi-regs */
- MOVEQ R0,#0x01 /* os_tsk->stack_frame val */
- MOVNE R0,#0x00
- STRB R0,[R1,#TCB_STACKF] /* os_tsk.run->stack_frame = val */
- STMDB R12!,{R4-R11} /* Save Old context */
- STR R12,[R1,#TCB_TSTACK] /* Update os_tsk.run->tsk_stack */
-
- PUSH {R2,R3}
- BL rt_stk_check /* Check for Stack overflow */
- POP {R2,R3}
-
-SVC_Next:
- STR R2,[R3] /* os_tsk.run = os_tsk.new */
-
- LDR R12,[R2,#TCB_TSTACK] /* os_tsk.new->tsk_stack */
- LDMIA R12!,{R4-R11} /* Restore New Context */
- LDRB R0,[R2,#TCB_STACKF] /* Stack Frame */
- CMP R0,#0 /* Basic/Extended Stack Frame */
- ITTE NE
- VLDMIANE R12!,{S16-S31} /* restore VFP hi-registers */
- MVNNE LR,#~0xFFFFFFED /* set EXC_RETURN value */
- MVNEQ LR,#~0xFFFFFFFD
- MSR PSP,R12 /* Write PSP */
-
-SVC_Exit:
-#ifdef IFX_XMC4XXX
- PUSH {LR}
- POP {PC}
-#else
- BX LR
-#endif
-
- /*------------------- User SVC ------------------------------*/
-
-SVC_User:
- PUSH {R4,LR} /* Save Registers */
- LDR R2,=SVC_Count
- LDR R2,[R2]
- CMP R1,R2
- BHI SVC_Done /* Overflow */
-
- LDR R4,=SVC_Table-4
- LDR R4,[R4,R1,LSL #2] /* Load SVC Function Address */
-
- LDM R0,{R0-R3,R12} /* Read R0-R3,R12 from stack */
- BLX R4 /* Call SVC Function */
-
- MRS R12,PSP
- STM R12,{R0-R3} /* Function return values */
-SVC_Done:
- POP {R4,PC} /* RETI */
-
-
-/*-------------------------- PendSV_Handler ---------------------------------*/
-
-; void PendSV_Handler (void);
-
- PUBLIC PendSV_Handler
-PendSV_Handler:
-
-#ifdef IFX_XMC4XXX
- PUBLIC PendSV_Handler_Veneer
-PendSV_Handler_Veneer:
-#endif
-
- PUSH {R4,LR} /* Save EXC_RETURN */
- BL rt_pop_req
-
-Sys_Switch:
- POP {R4,LR} /* Restore EXC_RETURN */
-
- LDR R3,=os_tsk
- LDM R3,{R1,R2} /* os_tsk.run, os_tsk.new */
- CMP R1,R2
-#ifdef IFX_XMC4XXX
- ITT EQ
- PUSHEQ {LR}
- POPEQ {PC}
-#else
- IT EQ
- BXEQ LR /* RETI, no task switch */
-#endif
-
- MRS R12,PSP /* Read PSP */
- TST LR,#0x10 /* is it extended frame? */
- ITTE EQ
- VSTMDBEQ R12!,{S16-S31} /* yes, stack also VFP hi-regs */
- MOVEQ R0,#0x01 /* os_tsk->stack_frame val */
- MOVNE R0,#0x00
- STRB R0,[R1,#TCB_STACKF] /* os_tsk.run->stack_frame = val */
- STMDB R12!,{R4-R11} /* Save Old context */
- STR R12,[R1,#TCB_TSTACK] /* Update os_tsk.run->tsk_stack */
-
- PUSH {R2,R3}
- BL rt_stk_check /* Check for Stack overflow */
- POP {R2,R3}
-
- STR R2,[R3] /* os_tsk.run = os_tsk.new */
-
- LDR R12,[R2,#TCB_TSTACK] /* os_tsk.new->tsk_stack */
- LDMIA R12!,{R4-R11} /* Restore New Context */
- LDRB R0,[R2,#TCB_STACKF] /* Stack Frame */
- CMP R0,#0 /* Basic/Extended Stack Frame */
- ITTE NE
- VLDMIANE R12!,{S16-S31} /* restore VFP hi-registers */
- MVNNE LR,#~0xFFFFFFED /* set EXC_RETURN value */
- MVNEQ LR,#~0xFFFFFFFD
- MSR PSP,R12 /* Write PSP */
-
-Sys_Exit:
-#ifdef IFX_XMC4XXX
- PUSH {LR}
- POP {PC}
-#else
- BX LR /* Return to Thread Mode */
-#endif
-
-
-/*-------------------------- SysTick_Handler --------------------------------*/
-
-; void SysTick_Handler (void);
-
- PUBLIC SysTick_Handler
-SysTick_Handler:
-#ifdef IFX_XMC4XXX
- PUBLIC SysTick_Handler_Veneer
-SysTick_Handler_Veneer:
-#endif
-
- PUSH {R4,LR} /* Save EXC_RETURN */
- BL rt_systick
- B Sys_Switch
-
-
-/*-------------------------- OS_Tick_Handler --------------------------------*/
-
-; void OS_Tick_Handler (void);
-
- PUBLIC OS_Tick_Handler
-OS_Tick_Handler:
-
- PUSH {R4,LR} /* Save EXC_RETURN */
- BL os_tick_irqack
- BL rt_systick
- B Sys_Switch
-
-
- END
-
-/*----------------------------------------------------------------------------
- * end of file
- *---------------------------------------------------------------------------*/
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/rtx/TARGET_CORTEX_M/TARGET_M4/TOOLCHAIN_IAR/SVC_Table.S Wed Jul 01 08:15:48 2015 +0100 @@ -0,0 +1,58 @@ +;/*---------------------------------------------------------------------------- +; * CMSIS-RTOS - RTX +; *---------------------------------------------------------------------------- +; * Name: SVC_TABLE.S +; * Purpose: Pre-defined SVC Table for Cortex-M +; * Rev.: V4.70 +; *---------------------------------------------------------------------------- +; * +; * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH +; * All rights reserved. +; * Redistribution and use in source and binary forms, with or without +; * modification, are permitted provided that the following conditions are met: +; * - Redistributions of source code must retain the above copyright +; * notice, this list of conditions and the following disclaimer. +; * - Redistributions in binary form must reproduce the above copyright +; * notice, this list of conditions and the following disclaimer in the +; * documentation and/or other materials provided with the distribution. +; * - Neither the name of ARM nor the names of its contributors may be used +; * to endorse or promote products derived from this software without +; * specific prior written permission. +; * +; * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +; * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +; * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +; * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE +; * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +; * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +; * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +; * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +; * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +; * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +; * POSSIBILITY OF SUCH DAMAGE. +; *---------------------------------------------------------------------------*/ + + + NAME SVC_TABLE + SECTION .text:CONST (2) + + PUBLIC SVC_Count + +SVC_Cnt EQU (SVC_End-SVC_Table)/4 +SVC_Count DCD SVC_Cnt + +; Import user SVC functions here. +; IMPORT __SVC_1 + + PUBLIC SVC_Table +SVC_Table +; Insert user SVC functions here. SVC 0 used by RTL Kernel. +; DCD __SVC_1 ; user SVC function + +SVC_End + + END + +/*---------------------------------------------------------------------------- + * end of file + *---------------------------------------------------------------------------*/
--- a/rtx/TARGET_CORTEX_M/TARGET_M4/TOOLCHAIN_IAR/SVC_Table.s Wed Jun 17 11:15:10 2015 +0100 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,58 +0,0 @@ -;/*---------------------------------------------------------------------------- -; * CMSIS-RTOS - RTX -; *---------------------------------------------------------------------------- -; * Name: SVC_TABLE.S -; * Purpose: Pre-defined SVC Table for Cortex-M -; * Rev.: V4.70 -; *---------------------------------------------------------------------------- -; * -; * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH -; * All rights reserved. -; * Redistribution and use in source and binary forms, with or without -; * modification, are permitted provided that the following conditions are met: -; * - Redistributions of source code must retain the above copyright -; * notice, this list of conditions and the following disclaimer. -; * - Redistributions in binary form must reproduce the above copyright -; * notice, this list of conditions and the following disclaimer in the -; * documentation and/or other materials provided with the distribution. -; * - Neither the name of ARM nor the names of its contributors may be used -; * to endorse or promote products derived from this software without -; * specific prior written permission. -; * -; * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -; * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -; * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -; * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE -; * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -; * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -; * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -; * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -; * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -; * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -; * POSSIBILITY OF SUCH DAMAGE. -; *---------------------------------------------------------------------------*/ - - - NAME SVC_TABLE - SECTION .text:CONST (2) - - PUBLIC SVC_Count - -SVC_Cnt EQU (SVC_End-SVC_Table)/4 -SVC_Count DCD SVC_Cnt - -; Import user SVC functions here. -; IMPORT __SVC_1 - - PUBLIC SVC_Table -SVC_Table -; Insert user SVC functions here. SVC 0 used by RTL Kernel. -; DCD __SVC_1 ; user SVC function - -SVC_End - - END - -/*---------------------------------------------------------------------------- - * end of file - *---------------------------------------------------------------------------*/