Akifumi Takahashi / PMRC16ch

Library to use my Photo MOS Relays Circuit having 16 or less channels.

Fork of PMRC4ch by Akifumi Takahashi

PMRC16ch.cpp@18:049283936e3f, 2018-06-26 (annotated)

Committer:
aktk
Date:
Tue Jun 26 13:00:40 2018 +0000
Revision:
18:049283936e3f
Parent:
17:08a68860396b
Child:
20:26972de3cf90
modified the name of constant in State: NaN -> ALLHiz; modified the procedure in init() so as to set the first state ALLHiZ

Who changed what in which revision?

UserRevisionLine numberNew contents of line
aktk 15:56703876e914 1 #include "PMRC16ch.h"
aktk 15:56703876e914 2 // A constractor whose arguments have all default value
aktk 15:56703876e914 3 // is a default constractor.
aktk 15:56703876e914 4 PMRC16ch::PMRC16ch():
aktk 15:56703876e914 5 m_num_ch(16),
aktk 15:56703876e914 6 m_SCK(DigitalOut(p11)),
aktk 15:56703876e914 7 m_CLR(DigitalOut(p12)),
aktk 15:56703876e914 8 m_RCK(DigitalOut(p13)),
aktk 15:56703876e914 9 m_SER(DigitalOut(p14)),
aktk 15:56703876e914 10 m_OUT(DigitalIn(p10))
aktk 15:56703876e914 11 {
aktk 15:56703876e914 12 init();
aktk 15:56703876e914 13 }
aktk 15:56703876e914 14
aktk 15:56703876e914 15 PMRC16ch::PMRC16ch(
aktk 15:56703876e914 16 uint8_t arg_num_ch,
aktk 15:56703876e914 17 PinName arg_SCK,
aktk 15:56703876e914 18 PinName arg_CLR,
aktk 15:56703876e914 19 PinName arg_RCK,
aktk 15:56703876e914 20 PinName arg_SER,
aktk 15:56703876e914 21 PinName arg_OUT
aktk 15:56703876e914 22 ):
aktk 15:56703876e914 23 m_num_ch(arg_num_ch),
aktk 15:56703876e914 24 m_SCK(DigitalOut(arg_SCK)),
aktk 15:56703876e914 25 m_CLR(DigitalOut(arg_CLR)),
aktk 15:56703876e914 26 m_RCK(DigitalOut(arg_RCK)),
aktk 15:56703876e914 27 m_SER(DigitalOut(arg_SER)),
aktk 15:56703876e914 28 m_OUT(DigitalIn(arg_OUT))
aktk 15:56703876e914 29 {
aktk 15:56703876e914 30 init();
aktk 15:56703876e914 31 }
aktk 15:56703876e914 32
aktk 15:56703876e914 33 void PMRC16ch::init()
aktk 15:56703876e914 34 {
aktk 15:56703876e914 35 m_CLR = 1;
aktk 15:56703876e914 36 m_SCK = m_RCK = 0;
aktk 18:049283936e3f 37 //reset shiftresister
aktk 18:049283936e3f 38 m_CLR = 0;
aktk 18:049283936e3f 39 update();
aktk 18:049283936e3f 40 //enable insertion data to SR
aktk 18:049283936e3f 41 m_CLR = 1;
aktk 18:049283936e3f 42 m_PMRC_state = ALLHiZ;
aktk 15:56703876e914 43 m_PMRC_POL = Cathodic;
aktk 15:56703876e914 44 }
aktk 15:56703876e914 45
aktk 17:08a68860396b 46 char PMRC16ch::allGround()
aktk 15:56703876e914 47 {
aktk 17:08a68860396b 48 if (m_PMRC_state == ALLGROUND) return 1;
aktk 15:56703876e914 49 sweep();
aktk 15:56703876e914 50 upload();
aktk 17:08a68860396b 51 return static_cast<char>(m_PMRC_state = ALLGROUND);
aktk 15:56703876e914 52 }
aktk 15:56703876e914 53
aktk 15:56703876e914 54 char PMRC16ch::setCh(State arg_state, Polarity arg_POL)
aktk 15:56703876e914 55 {
aktk 16:e81a30a098dd 56 m_PMRC_POL = arg_POL;
aktk 15:56703876e914 57 int num_of_shift = static_cast<int>(arg_state) - static_cast<int>(m_PMRC_state);
aktk 15:56703876e914 58
aktk 15:56703876e914 59 if( num_of_shift < 0 )
aktk 15:56703876e914 60 sweep();
aktk 15:56703876e914 61
aktk 17:08a68860396b 62 if( m_PMRC_state == ALLGROUND ) {
aktk 15:56703876e914 63 setStimbits();
aktk 15:56703876e914 64 num_of_shift = static_cast<char>(arg_state - 1);
aktk 15:56703876e914 65 }
aktk 15:56703876e914 66 shiftby(num_of_shift);
aktk 15:56703876e914 67 upload();
aktk 15:56703876e914 68
aktk 15:56703876e914 69 return static_cast<char>(m_PMRC_state = arg_state);
aktk 15:56703876e914 70 }
aktk 15:56703876e914 71 char PMRC16ch::setCh(char arg_state, Polarity arg_POL)
aktk 15:56703876e914 72 {
aktk 16:e81a30a098dd 73 m_PMRC_POL = arg_POL;
aktk 15:56703876e914 74 int8_t num_of_shift = arg_state - static_cast<int8_t>(m_PMRC_state);
aktk 15:56703876e914 75
aktk 15:56703876e914 76 if( num_of_shift < 0 )
aktk 15:56703876e914 77 sweep();
aktk 15:56703876e914 78
aktk 17:08a68860396b 79 if( m_PMRC_state == ALLGROUND ) {
aktk 15:56703876e914 80 setStimbits();
aktk 15:56703876e914 81 num_of_shift = static_cast<char>(arg_state - 1);
aktk 15:56703876e914 82 }
aktk 15:56703876e914 83 shiftby(num_of_shift);
aktk 15:56703876e914 84 upload();
aktk 15:56703876e914 85
aktk 15:56703876e914 86 return static_cast<char>(m_PMRC_state = static_cast<State>(arg_state));
aktk 15:56703876e914 87 }
aktk 15:56703876e914 88
aktk 15:56703876e914 89 void PMRC16ch::allHiZ()
aktk 15:56703876e914 90 {
aktk 15:56703876e914 91 //reset shiftresister
aktk 15:56703876e914 92 m_CLR = 0;
aktk 15:56703876e914 93 update();
aktk 15:56703876e914 94 //enable insertion data to SR
aktk 15:56703876e914 95 m_CLR = 1;
aktk 15:56703876e914 96 upload();
aktk 15:56703876e914 97 }
aktk 15:56703876e914 98
aktk 15:56703876e914 99 void PMRC16ch::setBits(const uint32_t bits, int num_of_bits, Polarity arg_POL)
aktk 15:56703876e914 100 {
aktk 16:e81a30a098dd 101 m_PMRC_POL = arg_POL;
aktk 15:56703876e914 102 //reset shiftresister
aktk 15:56703876e914 103 m_CLR = 0;
aktk 15:56703876e914 104 update();
aktk 15:56703876e914 105 //enable insertion data to SR
aktk 15:56703876e914 106 m_CLR = 1;
aktk 15:56703876e914 107 for(int i = 0; i < num_of_bits; i++){
aktk 16:e81a30a098dd 108 m_SER = (((bits >> i) & 0b0001) ^ m_PMRC_POL); //XOR Polarity
aktk 15:56703876e914 109 update();
aktk 15:56703876e914 110 }
aktk 15:56703876e914 111 upload();
aktk 15:56703876e914 112 }
aktk 15:56703876e914 113
aktk 15:56703876e914 114 void PMRC16ch::sweep()
aktk 15:56703876e914 115 {
aktk 15:56703876e914 116 int num_of_shift = (16 + 1) - static_cast<int>(m_PMRC_state);
aktk 15:56703876e914 117
aktk 15:56703876e914 118 shiftby(num_of_shift);
aktk 17:08a68860396b 119 m_PMRC_state = ALLGROUND;
aktk 15:56703876e914 120 }
aktk 15:56703876e914 121
aktk 15:56703876e914 122 void PMRC16ch::shiftby(int arg_num)
aktk 15:56703876e914 123 {
aktk 15:56703876e914 124 for(int i = 0; i < arg_num; i++) {
aktk 16:e81a30a098dd 125 // insert 1 XOR Polarity
aktk 16:e81a30a098dd 126 m_SER = 1 ^ m_PMRC_POL;
aktk 15:56703876e914 127 update();
aktk 16:e81a30a098dd 128 // insert 0 XOR Polarity
aktk 16:e81a30a098dd 129 m_SER = 0 ^ m_PMRC_POL;
aktk 15:56703876e914 130 update();
aktk 15:56703876e914 131 }
aktk 15:56703876e914 132 m_PMRC_state = static_cast<State>((static_cast<int>(m_PMRC_state) + arg_num) % (16 + 1));
aktk 15:56703876e914 133 }
aktk 15:56703876e914 134
aktk 15:56703876e914 135 void PMRC16ch::setStimbits()
aktk 15:56703876e914 136 {
aktk 16:e81a30a098dd 137 // insert 0 XOR Polarity
aktk 16:e81a30a098dd 138 m_SER = 0 ^ m_PMRC_POL;
aktk 15:56703876e914 139 update();
aktk 16:e81a30a098dd 140 // insert 1 XOR Polarity
aktk 16:e81a30a098dd 141 m_SER = 1 ^ m_PMRC_POL;
aktk 15:56703876e914 142 update();
aktk 15:56703876e914 143 m_PMRC_state = CH1;
aktk 15:56703876e914 144 }
aktk 15:56703876e914 145 void PMRC16ch::update()
aktk 15:56703876e914 146 {
aktk 15:56703876e914 147 //Shift-resister Clock update
aktk 15:56703876e914 148 m_SCK = 1;
aktk 15:56703876e914 149 m_SCK = 1;
aktk 15:56703876e914 150 m_SCK = 0;
aktk 15:56703876e914 151 m_SCK = 0;
aktk 15:56703876e914 152 }
aktk 15:56703876e914 153 void PMRC16ch::upload()
aktk 15:56703876e914 154 {
aktk 15:56703876e914 155 //FF Clock Update
aktk 15:56703876e914 156 m_RCK = 1;
aktk 15:56703876e914 157 m_RCK = 1;
aktk 15:56703876e914 158 m_RCK = 0;
aktk 15:56703876e914 159 m_RCK = 0;
aktk 15:56703876e914 160 }