123
Diff: utility/Enc28j60Eth.cpp
- Revision:
- 16:269f652b4d0b
- Parent:
- 15:53715cc81c63
- Child:
- 19:543c2d21e510
diff -r 53715cc81c63 -r 269f652b4d0b utility/Enc28j60Eth.cpp --- a/utility/Enc28j60Eth.cpp Sat Sep 07 17:42:42 2019 +0000 +++ b/utility/Enc28j60Eth.cpp Fri Jun 05 15:12:21 2020 +0000 @@ -25,6 +25,7 @@ */ #include "Enc28j60Eth.h" #include "mbed.h" +#include "mbed_version.h" extern "C" { @@ -63,7 +64,11 @@ _cs = 1; _spi.format(8, 0); // 8-bit, mode 0 _spi.frequency(10000000); // 10 Mbit/s - wait_ms(100); // for stable state +#if MBED_MAJOR_VERSION == 2 + wait_ms(100); +#else + thread_sleep_for(100); +#endif // perform system reset writeOp(ENC28J60_SOFT_RESET, 0, ENC28J60_SOFT_RESET); @@ -72,7 +77,11 @@ // while(!(readReg(ESTAT) & ESTAT_CLKRDY)); // The CLKRDY does not work. See Rev. B4 Silicon Errata point. // Just wait. +#if MBED_MAJOR_VERSION == 2 wait_ms(50); +#else + thread_sleep_for(50); +#endif // do bank 0 stuff // initialize receive buffer @@ -707,9 +716,17 @@ void Enc28j60Eth::powerOff() { writeOp(ENC28J60_BIT_FIELD_CLR, ECON1, ECON1_RXEN); +#if MBED_MAJOR_VERSION == 2 wait_ms(50); +#else + thread_sleep_for(50); +#endif writeOp(ENC28J60_BIT_FIELD_SET, ECON2, ECON2_VRPS); +#if MBED_MAJOR_VERSION == 2 wait_ms(50); +#else + thread_sleep_for(50); +#endif writeOp(ENC28J60_BIT_FIELD_SET, ECON2, ECON2_PWRSV); } @@ -722,9 +739,17 @@ void Enc28j60Eth::powerOn() { writeOp(ENC28J60_BIT_FIELD_CLR, ECON2, ECON2_PWRSV); +#if MBED_MAJOR_VERSION == 2 wait_ms(50); +#else + thread_sleep_for(50); +#endif writeOp(ENC28J60_BIT_FIELD_SET, ECON1, ECON1_RXEN); +#if MBED_MAJOR_VERSION == 2 wait_ms(50); +#else + thread_sleep_for(50); +#endif } /**