ECE 2036 Project

Dependencies:   mbed wave_player 4DGL-uLCD-SE

Committer:
abraha2d
Date:
Thu Nov 21 16:10:57 2019 +0000
Revision:
2:2042f29de6b7
Parent:
0:cf4396614a79
Because other peeps is wanting dis...

Who changed what in which revision?

UserRevisionLine numberNew contents of line
rconnorlawson 0:cf4396614a79 1 /* mbed Microcontroller Library
rconnorlawson 0:cf4396614a79 2 * Copyright (c) 2006-2012 ARM Limited
rconnorlawson 0:cf4396614a79 3 *
rconnorlawson 0:cf4396614a79 4 * Permission is hereby granted, free of charge, to any person obtaining a copy
rconnorlawson 0:cf4396614a79 5 * of this software and associated documentation files (the "Software"), to deal
rconnorlawson 0:cf4396614a79 6 * in the Software without restriction, including without limitation the rights
rconnorlawson 0:cf4396614a79 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
rconnorlawson 0:cf4396614a79 8 * copies of the Software, and to permit persons to whom the Software is
rconnorlawson 0:cf4396614a79 9 * furnished to do so, subject to the following conditions:
rconnorlawson 0:cf4396614a79 10 *
rconnorlawson 0:cf4396614a79 11 * The above copyright notice and this permission notice shall be included in
rconnorlawson 0:cf4396614a79 12 * all copies or substantial portions of the Software.
rconnorlawson 0:cf4396614a79 13 *
rconnorlawson 0:cf4396614a79 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
rconnorlawson 0:cf4396614a79 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
rconnorlawson 0:cf4396614a79 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
rconnorlawson 0:cf4396614a79 17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
rconnorlawson 0:cf4396614a79 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
rconnorlawson 0:cf4396614a79 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
rconnorlawson 0:cf4396614a79 20 * SOFTWARE.
rconnorlawson 0:cf4396614a79 21 */
rconnorlawson 0:cf4396614a79 22 /* Introduction
rconnorlawson 0:cf4396614a79 23 * ------------
rconnorlawson 0:cf4396614a79 24 * SD and MMC cards support a number of interfaces, but common to them all
rconnorlawson 0:cf4396614a79 25 * is one based on SPI. This is the one I'm implmenting because it means
rconnorlawson 0:cf4396614a79 26 * it is much more portable even though not so performant, and we already
rconnorlawson 0:cf4396614a79 27 * have the mbed SPI Interface!
rconnorlawson 0:cf4396614a79 28 *
rconnorlawson 0:cf4396614a79 29 * The main reference I'm using is Chapter 7, "SPI Mode" of:
rconnorlawson 0:cf4396614a79 30 * http://www.sdcard.org/developers/tech/sdcard/pls/Simplified_Physical_Layer_Spec.pdf
rconnorlawson 0:cf4396614a79 31 *
rconnorlawson 0:cf4396614a79 32 * SPI Startup
rconnorlawson 0:cf4396614a79 33 * -----------
rconnorlawson 0:cf4396614a79 34 * The SD card powers up in SD mode. The SPI interface mode is selected by
rconnorlawson 0:cf4396614a79 35 * asserting CS low and sending the reset command (CMD0). The card will
rconnorlawson 0:cf4396614a79 36 * respond with a (R1) response.
rconnorlawson 0:cf4396614a79 37 *
rconnorlawson 0:cf4396614a79 38 * CMD8 is optionally sent to determine the voltage range supported, and
rconnorlawson 0:cf4396614a79 39 * indirectly determine whether it is a version 1.x SD/non-SD card or
rconnorlawson 0:cf4396614a79 40 * version 2.x. I'll just ignore this for now.
rconnorlawson 0:cf4396614a79 41 *
rconnorlawson 0:cf4396614a79 42 * ACMD41 is repeatedly issued to initialise the card, until "in idle"
rconnorlawson 0:cf4396614a79 43 * (bit 0) of the R1 response goes to '0', indicating it is initialised.
rconnorlawson 0:cf4396614a79 44 *
rconnorlawson 0:cf4396614a79 45 * You should also indicate whether the host supports High Capicity cards,
rconnorlawson 0:cf4396614a79 46 * and check whether the card is high capacity - i'll also ignore this
rconnorlawson 0:cf4396614a79 47 *
rconnorlawson 0:cf4396614a79 48 * SPI Protocol
rconnorlawson 0:cf4396614a79 49 * ------------
rconnorlawson 0:cf4396614a79 50 * The SD SPI protocol is based on transactions made up of 8-bit words, with
rconnorlawson 0:cf4396614a79 51 * the host starting every bus transaction by asserting the CS signal low. The
rconnorlawson 0:cf4396614a79 52 * card always responds to commands, data blocks and errors.
rconnorlawson 0:cf4396614a79 53 *
rconnorlawson 0:cf4396614a79 54 * The protocol supports a CRC, but by default it is off (except for the
rconnorlawson 0:cf4396614a79 55 * first reset CMD0, where the CRC can just be pre-calculated, and CMD8)
rconnorlawson 0:cf4396614a79 56 * I'll leave the CRC off I think!
rconnorlawson 0:cf4396614a79 57 *
rconnorlawson 0:cf4396614a79 58 * Standard capacity cards have variable data block sizes, whereas High
rconnorlawson 0:cf4396614a79 59 * Capacity cards fix the size of data block to 512 bytes. I'll therefore
rconnorlawson 0:cf4396614a79 60 * just always use the Standard Capacity cards with a block size of 512 bytes.
rconnorlawson 0:cf4396614a79 61 * This is set with CMD16.
rconnorlawson 0:cf4396614a79 62 *
rconnorlawson 0:cf4396614a79 63 * You can read and write single blocks (CMD17, CMD25) or multiple blocks
rconnorlawson 0:cf4396614a79 64 * (CMD18, CMD25). For simplicity, I'll just use single block accesses. When
rconnorlawson 0:cf4396614a79 65 * the card gets a read command, it responds with a response token, and then
rconnorlawson 0:cf4396614a79 66 * a data token or an error.
rconnorlawson 0:cf4396614a79 67 *
rconnorlawson 0:cf4396614a79 68 * SPI Command Format
rconnorlawson 0:cf4396614a79 69 * ------------------
rconnorlawson 0:cf4396614a79 70 * Commands are 6-bytes long, containing the command, 32-bit argument, and CRC.
rconnorlawson 0:cf4396614a79 71 *
rconnorlawson 0:cf4396614a79 72 * +---------------+------------+------------+-----------+----------+--------------+
rconnorlawson 0:cf4396614a79 73 * | 01 | cmd[5:0] | arg[31:24] | arg[23:16] | arg[15:8] | arg[7:0] | crc[6:0] | 1 |
rconnorlawson 0:cf4396614a79 74 * +---------------+------------+------------+-----------+----------+--------------+
rconnorlawson 0:cf4396614a79 75 *
rconnorlawson 0:cf4396614a79 76 * As I'm not using CRC, I can fix that byte to what is needed for CMD0 (0x95)
rconnorlawson 0:cf4396614a79 77 *
rconnorlawson 0:cf4396614a79 78 * All Application Specific commands shall be preceded with APP_CMD (CMD55).
rconnorlawson 0:cf4396614a79 79 *
rconnorlawson 0:cf4396614a79 80 * SPI Response Format
rconnorlawson 0:cf4396614a79 81 * -------------------
rconnorlawson 0:cf4396614a79 82 * The main response format (R1) is a status byte (normally zero). Key flags:
rconnorlawson 0:cf4396614a79 83 * idle - 1 if the card is in an idle state/initialising
rconnorlawson 0:cf4396614a79 84 * cmd - 1 if an illegal command code was detected
rconnorlawson 0:cf4396614a79 85 *
rconnorlawson 0:cf4396614a79 86 * +-------------------------------------------------+
rconnorlawson 0:cf4396614a79 87 * R1 | 0 | arg | addr | seq | crc | cmd | erase | idle |
rconnorlawson 0:cf4396614a79 88 * +-------------------------------------------------+
rconnorlawson 0:cf4396614a79 89 *
rconnorlawson 0:cf4396614a79 90 * R1b is the same, except it is followed by a busy signal (zeros) until
rconnorlawson 0:cf4396614a79 91 * the first non-zero byte when it is ready again.
rconnorlawson 0:cf4396614a79 92 *
rconnorlawson 0:cf4396614a79 93 * Data Response Token
rconnorlawson 0:cf4396614a79 94 * -------------------
rconnorlawson 0:cf4396614a79 95 * Every data block written to the card is acknowledged by a byte
rconnorlawson 0:cf4396614a79 96 * response token
rconnorlawson 0:cf4396614a79 97 *
rconnorlawson 0:cf4396614a79 98 * +----------------------+
rconnorlawson 0:cf4396614a79 99 * | xxx | 0 | status | 1 |
rconnorlawson 0:cf4396614a79 100 * +----------------------+
rconnorlawson 0:cf4396614a79 101 * 010 - OK!
rconnorlawson 0:cf4396614a79 102 * 101 - CRC Error
rconnorlawson 0:cf4396614a79 103 * 110 - Write Error
rconnorlawson 0:cf4396614a79 104 *
rconnorlawson 0:cf4396614a79 105 * Single Block Read and Write
rconnorlawson 0:cf4396614a79 106 * ---------------------------
rconnorlawson 0:cf4396614a79 107 *
rconnorlawson 0:cf4396614a79 108 * Block transfers have a byte header, followed by the data, followed
rconnorlawson 0:cf4396614a79 109 * by a 16-bit CRC. In our case, the data will always be 512 bytes.
rconnorlawson 0:cf4396614a79 110 *
rconnorlawson 0:cf4396614a79 111 * +------+---------+---------+- - - -+---------+-----------+----------+
rconnorlawson 0:cf4396614a79 112 * | 0xFE | data[0] | data[1] | | data[n] | crc[15:8] | crc[7:0] |
rconnorlawson 0:cf4396614a79 113 * +------+---------+---------+- - - -+---------+-----------+----------+
rconnorlawson 0:cf4396614a79 114 */
rconnorlawson 0:cf4396614a79 115 #include "SDFileSystem.h"
rconnorlawson 0:cf4396614a79 116 #include "mbed_debug.h"
rconnorlawson 0:cf4396614a79 117
rconnorlawson 0:cf4396614a79 118 #define SD_COMMAND_TIMEOUT 5000
rconnorlawson 0:cf4396614a79 119
rconnorlawson 0:cf4396614a79 120 #define SD_DBG 0
rconnorlawson 0:cf4396614a79 121
rconnorlawson 0:cf4396614a79 122 SDFileSystem::SDFileSystem(PinName mosi, PinName miso, PinName sclk, PinName cs, const char* name) :
rconnorlawson 0:cf4396614a79 123 FATFileSystem(name), _spi(mosi, miso, sclk), _cs(cs) {
rconnorlawson 0:cf4396614a79 124 _cs = 1;
rconnorlawson 0:cf4396614a79 125 }
rconnorlawson 0:cf4396614a79 126
rconnorlawson 0:cf4396614a79 127 #define R1_IDLE_STATE (1 << 0)
rconnorlawson 0:cf4396614a79 128 #define R1_ERASE_RESET (1 << 1)
rconnorlawson 0:cf4396614a79 129 #define R1_ILLEGAL_COMMAND (1 << 2)
rconnorlawson 0:cf4396614a79 130 #define R1_COM_CRC_ERROR (1 << 3)
rconnorlawson 0:cf4396614a79 131 #define R1_ERASE_SEQUENCE_ERROR (1 << 4)
rconnorlawson 0:cf4396614a79 132 #define R1_ADDRESS_ERROR (1 << 5)
rconnorlawson 0:cf4396614a79 133 #define R1_PARAMETER_ERROR (1 << 6)
rconnorlawson 0:cf4396614a79 134
rconnorlawson 0:cf4396614a79 135 // Types
rconnorlawson 0:cf4396614a79 136 // - v1.x Standard Capacity
rconnorlawson 0:cf4396614a79 137 // - v2.x Standard Capacity
rconnorlawson 0:cf4396614a79 138 // - v2.x High Capacity
rconnorlawson 0:cf4396614a79 139 // - Not recognised as an SD Card
rconnorlawson 0:cf4396614a79 140 #define SDCARD_FAIL 0
rconnorlawson 0:cf4396614a79 141 #define SDCARD_V1 1
rconnorlawson 0:cf4396614a79 142 #define SDCARD_V2 2
rconnorlawson 0:cf4396614a79 143 #define SDCARD_V2HC 3
rconnorlawson 0:cf4396614a79 144
rconnorlawson 0:cf4396614a79 145 int SDFileSystem::initialise_card() {
rconnorlawson 0:cf4396614a79 146 // Set to 100kHz for initialisation, and clock card with cs = 1
rconnorlawson 0:cf4396614a79 147 _spi.frequency(100000);
rconnorlawson 0:cf4396614a79 148 _cs = 1;
rconnorlawson 0:cf4396614a79 149 for (int i = 0; i < 16; i++) {
rconnorlawson 0:cf4396614a79 150 _spi.write(0xFF);
rconnorlawson 0:cf4396614a79 151 }
rconnorlawson 0:cf4396614a79 152
rconnorlawson 0:cf4396614a79 153 // send CMD0, should return with all zeros except IDLE STATE set (bit 0)
rconnorlawson 0:cf4396614a79 154 if (_cmd(0, 0) != R1_IDLE_STATE) {
rconnorlawson 0:cf4396614a79 155 debug("No disk, or could not put SD card in to SPI idle state\n");
rconnorlawson 0:cf4396614a79 156 return SDCARD_FAIL;
rconnorlawson 0:cf4396614a79 157 }
rconnorlawson 0:cf4396614a79 158
rconnorlawson 0:cf4396614a79 159 // send CMD8 to determine whther it is ver 2.x
rconnorlawson 0:cf4396614a79 160 int r = _cmd8();
rconnorlawson 0:cf4396614a79 161 if (r == R1_IDLE_STATE) {
rconnorlawson 0:cf4396614a79 162 return initialise_card_v2();
rconnorlawson 0:cf4396614a79 163 } else if (r == (R1_IDLE_STATE | R1_ILLEGAL_COMMAND)) {
rconnorlawson 0:cf4396614a79 164 return initialise_card_v1();
rconnorlawson 0:cf4396614a79 165 } else {
rconnorlawson 0:cf4396614a79 166 debug("Not in idle state after sending CMD8 (not an SD card?)\n");
rconnorlawson 0:cf4396614a79 167 return SDCARD_FAIL;
rconnorlawson 0:cf4396614a79 168 }
rconnorlawson 0:cf4396614a79 169 }
rconnorlawson 0:cf4396614a79 170
rconnorlawson 0:cf4396614a79 171 int SDFileSystem::initialise_card_v1() {
rconnorlawson 0:cf4396614a79 172 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
rconnorlawson 0:cf4396614a79 173 _cmd(55, 0);
rconnorlawson 0:cf4396614a79 174 if (_cmd(41, 0) == 0) {
rconnorlawson 0:cf4396614a79 175 cdv = 512;
rconnorlawson 0:cf4396614a79 176 debug_if(SD_DBG, "\n\rInit: SEDCARD_V1\n\r");
rconnorlawson 0:cf4396614a79 177 return SDCARD_V1;
rconnorlawson 0:cf4396614a79 178 }
rconnorlawson 0:cf4396614a79 179 }
rconnorlawson 0:cf4396614a79 180
rconnorlawson 0:cf4396614a79 181 debug("Timeout waiting for v1.x card\n");
rconnorlawson 0:cf4396614a79 182 return SDCARD_FAIL;
rconnorlawson 0:cf4396614a79 183 }
rconnorlawson 0:cf4396614a79 184
rconnorlawson 0:cf4396614a79 185 int SDFileSystem::initialise_card_v2() {
rconnorlawson 0:cf4396614a79 186 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
rconnorlawson 0:cf4396614a79 187 wait_ms(50);
rconnorlawson 0:cf4396614a79 188 _cmd58();
rconnorlawson 0:cf4396614a79 189 _cmd(55, 0);
rconnorlawson 0:cf4396614a79 190 if (_cmd(41, 0x40000000) == 0) {
rconnorlawson 0:cf4396614a79 191 _cmd58();
rconnorlawson 0:cf4396614a79 192 debug_if(SD_DBG, "\n\rInit: SDCARD_V2\n\r");
rconnorlawson 0:cf4396614a79 193 cdv = 1;
rconnorlawson 0:cf4396614a79 194 return SDCARD_V2;
rconnorlawson 0:cf4396614a79 195 }
rconnorlawson 0:cf4396614a79 196 }
rconnorlawson 0:cf4396614a79 197
rconnorlawson 0:cf4396614a79 198 debug("Timeout waiting for v2.x card\n");
rconnorlawson 0:cf4396614a79 199 return SDCARD_FAIL;
rconnorlawson 0:cf4396614a79 200 }
rconnorlawson 0:cf4396614a79 201
rconnorlawson 0:cf4396614a79 202 int SDFileSystem::disk_initialize() {
rconnorlawson 0:cf4396614a79 203 int i = initialise_card();
rconnorlawson 0:cf4396614a79 204 debug_if(SD_DBG, "init card = %d\n", i);
rconnorlawson 0:cf4396614a79 205 _sectors = _sd_sectors();
rconnorlawson 0:cf4396614a79 206
rconnorlawson 0:cf4396614a79 207 // Set block length to 512 (CMD16)
rconnorlawson 0:cf4396614a79 208 if (_cmd(16, 512) != 0) {
rconnorlawson 0:cf4396614a79 209 debug("Set 512-byte block timed out\n");
rconnorlawson 0:cf4396614a79 210 return 1;
rconnorlawson 0:cf4396614a79 211 }
rconnorlawson 0:cf4396614a79 212
rconnorlawson 0:cf4396614a79 213 _spi.frequency(1000000); // Set to 1MHz for data transfer
rconnorlawson 0:cf4396614a79 214 return 0;
rconnorlawson 0:cf4396614a79 215 }
rconnorlawson 0:cf4396614a79 216
rconnorlawson 0:cf4396614a79 217 int SDFileSystem::disk_write(const uint8_t *buffer, uint64_t block_number) {
rconnorlawson 0:cf4396614a79 218 // set write address for single block (CMD24)
rconnorlawson 0:cf4396614a79 219 if (_cmd(24, block_number * cdv) != 0) {
rconnorlawson 0:cf4396614a79 220 return 1;
rconnorlawson 0:cf4396614a79 221 }
rconnorlawson 0:cf4396614a79 222
rconnorlawson 0:cf4396614a79 223 // send the data block
rconnorlawson 0:cf4396614a79 224 _write(buffer, 512);
rconnorlawson 0:cf4396614a79 225 return 0;
rconnorlawson 0:cf4396614a79 226 }
rconnorlawson 0:cf4396614a79 227
rconnorlawson 0:cf4396614a79 228 int SDFileSystem::disk_read(uint8_t *buffer, uint64_t block_number) {
rconnorlawson 0:cf4396614a79 229 // set read address for single block (CMD17)
rconnorlawson 0:cf4396614a79 230 if (_cmd(17, block_number * cdv) != 0) {
rconnorlawson 0:cf4396614a79 231 return 1;
rconnorlawson 0:cf4396614a79 232 }
rconnorlawson 0:cf4396614a79 233
rconnorlawson 0:cf4396614a79 234 // receive the data
rconnorlawson 0:cf4396614a79 235 _read(buffer, 512);
rconnorlawson 0:cf4396614a79 236 return 0;
rconnorlawson 0:cf4396614a79 237 }
rconnorlawson 0:cf4396614a79 238
rconnorlawson 0:cf4396614a79 239 int SDFileSystem::disk_status() { return 0; }
rconnorlawson 0:cf4396614a79 240 int SDFileSystem::disk_sync() { return 0; }
rconnorlawson 0:cf4396614a79 241 uint64_t SDFileSystem::disk_sectors() { return _sectors; }
rconnorlawson 0:cf4396614a79 242
rconnorlawson 0:cf4396614a79 243
rconnorlawson 0:cf4396614a79 244 // PRIVATE FUNCTIONS
rconnorlawson 0:cf4396614a79 245 int SDFileSystem::_cmd(int cmd, int arg) {
rconnorlawson 0:cf4396614a79 246 _cs = 0;
rconnorlawson 0:cf4396614a79 247
rconnorlawson 0:cf4396614a79 248 // send a command
rconnorlawson 0:cf4396614a79 249 _spi.write(0x40 | cmd);
rconnorlawson 0:cf4396614a79 250 _spi.write(arg >> 24);
rconnorlawson 0:cf4396614a79 251 _spi.write(arg >> 16);
rconnorlawson 0:cf4396614a79 252 _spi.write(arg >> 8);
rconnorlawson 0:cf4396614a79 253 _spi.write(arg >> 0);
rconnorlawson 0:cf4396614a79 254 _spi.write(0x95);
rconnorlawson 0:cf4396614a79 255
rconnorlawson 0:cf4396614a79 256 // wait for the repsonse (response[7] == 0)
rconnorlawson 0:cf4396614a79 257 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
rconnorlawson 0:cf4396614a79 258 int response = _spi.write(0xFF);
rconnorlawson 0:cf4396614a79 259 if (!(response & 0x80)) {
rconnorlawson 0:cf4396614a79 260 _cs = 1;
rconnorlawson 0:cf4396614a79 261 _spi.write(0xFF);
rconnorlawson 0:cf4396614a79 262 return response;
rconnorlawson 0:cf4396614a79 263 }
rconnorlawson 0:cf4396614a79 264 }
rconnorlawson 0:cf4396614a79 265 _cs = 1;
rconnorlawson 0:cf4396614a79 266 _spi.write(0xFF);
rconnorlawson 0:cf4396614a79 267 return -1; // timeout
rconnorlawson 0:cf4396614a79 268 }
rconnorlawson 0:cf4396614a79 269 int SDFileSystem::_cmdx(int cmd, int arg) {
rconnorlawson 0:cf4396614a79 270 _cs = 0;
rconnorlawson 0:cf4396614a79 271
rconnorlawson 0:cf4396614a79 272 // send a command
rconnorlawson 0:cf4396614a79 273 _spi.write(0x40 | cmd);
rconnorlawson 0:cf4396614a79 274 _spi.write(arg >> 24);
rconnorlawson 0:cf4396614a79 275 _spi.write(arg >> 16);
rconnorlawson 0:cf4396614a79 276 _spi.write(arg >> 8);
rconnorlawson 0:cf4396614a79 277 _spi.write(arg >> 0);
rconnorlawson 0:cf4396614a79 278 _spi.write(0x95);
rconnorlawson 0:cf4396614a79 279
rconnorlawson 0:cf4396614a79 280 // wait for the repsonse (response[7] == 0)
rconnorlawson 0:cf4396614a79 281 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
rconnorlawson 0:cf4396614a79 282 int response = _spi.write(0xFF);
rconnorlawson 0:cf4396614a79 283 if (!(response & 0x80)) {
rconnorlawson 0:cf4396614a79 284 return response;
rconnorlawson 0:cf4396614a79 285 }
rconnorlawson 0:cf4396614a79 286 }
rconnorlawson 0:cf4396614a79 287 _cs = 1;
rconnorlawson 0:cf4396614a79 288 _spi.write(0xFF);
rconnorlawson 0:cf4396614a79 289 return -1; // timeout
rconnorlawson 0:cf4396614a79 290 }
rconnorlawson 0:cf4396614a79 291
rconnorlawson 0:cf4396614a79 292
rconnorlawson 0:cf4396614a79 293 int SDFileSystem::_cmd58() {
rconnorlawson 0:cf4396614a79 294 _cs = 0;
rconnorlawson 0:cf4396614a79 295 int arg = 0;
rconnorlawson 0:cf4396614a79 296
rconnorlawson 0:cf4396614a79 297 // send a command
rconnorlawson 0:cf4396614a79 298 _spi.write(0x40 | 58);
rconnorlawson 0:cf4396614a79 299 _spi.write(arg >> 24);
rconnorlawson 0:cf4396614a79 300 _spi.write(arg >> 16);
rconnorlawson 0:cf4396614a79 301 _spi.write(arg >> 8);
rconnorlawson 0:cf4396614a79 302 _spi.write(arg >> 0);
rconnorlawson 0:cf4396614a79 303 _spi.write(0x95);
rconnorlawson 0:cf4396614a79 304
rconnorlawson 0:cf4396614a79 305 // wait for the repsonse (response[7] == 0)
rconnorlawson 0:cf4396614a79 306 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
rconnorlawson 0:cf4396614a79 307 int response = _spi.write(0xFF);
rconnorlawson 0:cf4396614a79 308 if (!(response & 0x80)) {
rconnorlawson 0:cf4396614a79 309 int ocr = _spi.write(0xFF) << 24;
rconnorlawson 0:cf4396614a79 310 ocr |= _spi.write(0xFF) << 16;
rconnorlawson 0:cf4396614a79 311 ocr |= _spi.write(0xFF) << 8;
rconnorlawson 0:cf4396614a79 312 ocr |= _spi.write(0xFF) << 0;
rconnorlawson 0:cf4396614a79 313 _cs = 1;
rconnorlawson 0:cf4396614a79 314 _spi.write(0xFF);
rconnorlawson 0:cf4396614a79 315 return response;
rconnorlawson 0:cf4396614a79 316 }
rconnorlawson 0:cf4396614a79 317 }
rconnorlawson 0:cf4396614a79 318 _cs = 1;
rconnorlawson 0:cf4396614a79 319 _spi.write(0xFF);
rconnorlawson 0:cf4396614a79 320 return -1; // timeout
rconnorlawson 0:cf4396614a79 321 }
rconnorlawson 0:cf4396614a79 322
rconnorlawson 0:cf4396614a79 323 int SDFileSystem::_cmd8() {
rconnorlawson 0:cf4396614a79 324 _cs = 0;
rconnorlawson 0:cf4396614a79 325
rconnorlawson 0:cf4396614a79 326 // send a command
rconnorlawson 0:cf4396614a79 327 _spi.write(0x40 | 8); // CMD8
rconnorlawson 0:cf4396614a79 328 _spi.write(0x00); // reserved
rconnorlawson 0:cf4396614a79 329 _spi.write(0x00); // reserved
rconnorlawson 0:cf4396614a79 330 _spi.write(0x01); // 3.3v
rconnorlawson 0:cf4396614a79 331 _spi.write(0xAA); // check pattern
rconnorlawson 0:cf4396614a79 332 _spi.write(0x87); // crc
rconnorlawson 0:cf4396614a79 333
rconnorlawson 0:cf4396614a79 334 // wait for the repsonse (response[7] == 0)
rconnorlawson 0:cf4396614a79 335 for (int i = 0; i < SD_COMMAND_TIMEOUT * 1000; i++) {
rconnorlawson 0:cf4396614a79 336 char response[5];
rconnorlawson 0:cf4396614a79 337 response[0] = _spi.write(0xFF);
rconnorlawson 0:cf4396614a79 338 if (!(response[0] & 0x80)) {
rconnorlawson 0:cf4396614a79 339 for (int j = 1; j < 5; j++) {
rconnorlawson 0:cf4396614a79 340 response[i] = _spi.write(0xFF);
rconnorlawson 0:cf4396614a79 341 }
rconnorlawson 0:cf4396614a79 342 _cs = 1;
rconnorlawson 0:cf4396614a79 343 _spi.write(0xFF);
rconnorlawson 0:cf4396614a79 344 return response[0];
rconnorlawson 0:cf4396614a79 345 }
rconnorlawson 0:cf4396614a79 346 }
rconnorlawson 0:cf4396614a79 347 _cs = 1;
rconnorlawson 0:cf4396614a79 348 _spi.write(0xFF);
rconnorlawson 0:cf4396614a79 349 return -1; // timeout
rconnorlawson 0:cf4396614a79 350 }
rconnorlawson 0:cf4396614a79 351
rconnorlawson 0:cf4396614a79 352 int SDFileSystem::_read(uint8_t *buffer, uint32_t length) {
rconnorlawson 0:cf4396614a79 353 _cs = 0;
rconnorlawson 0:cf4396614a79 354
rconnorlawson 0:cf4396614a79 355 // read until start byte (0xFF)
rconnorlawson 0:cf4396614a79 356 while (_spi.write(0xFF) != 0xFE);
rconnorlawson 0:cf4396614a79 357
rconnorlawson 0:cf4396614a79 358 // read data
rconnorlawson 0:cf4396614a79 359 for (int i = 0; i < length; i++) {
rconnorlawson 0:cf4396614a79 360 buffer[i] = _spi.write(0xFF);
rconnorlawson 0:cf4396614a79 361 }
rconnorlawson 0:cf4396614a79 362 _spi.write(0xFF); // checksum
rconnorlawson 0:cf4396614a79 363 _spi.write(0xFF);
rconnorlawson 0:cf4396614a79 364
rconnorlawson 0:cf4396614a79 365 _cs = 1;
rconnorlawson 0:cf4396614a79 366 _spi.write(0xFF);
rconnorlawson 0:cf4396614a79 367 return 0;
rconnorlawson 0:cf4396614a79 368 }
rconnorlawson 0:cf4396614a79 369
rconnorlawson 0:cf4396614a79 370 int SDFileSystem::_write(const uint8_t*buffer, uint32_t length) {
rconnorlawson 0:cf4396614a79 371 _cs = 0;
rconnorlawson 0:cf4396614a79 372
rconnorlawson 0:cf4396614a79 373 // indicate start of block
rconnorlawson 0:cf4396614a79 374 _spi.write(0xFE);
rconnorlawson 0:cf4396614a79 375
rconnorlawson 0:cf4396614a79 376 // write the data
rconnorlawson 0:cf4396614a79 377 for (int i = 0; i < length; i++) {
rconnorlawson 0:cf4396614a79 378 _spi.write(buffer[i]);
rconnorlawson 0:cf4396614a79 379 }
rconnorlawson 0:cf4396614a79 380
rconnorlawson 0:cf4396614a79 381 // write the checksum
rconnorlawson 0:cf4396614a79 382 _spi.write(0xFF);
rconnorlawson 0:cf4396614a79 383 _spi.write(0xFF);
rconnorlawson 0:cf4396614a79 384
rconnorlawson 0:cf4396614a79 385 // check the response token
rconnorlawson 0:cf4396614a79 386 if ((_spi.write(0xFF) & 0x1F) != 0x05) {
rconnorlawson 0:cf4396614a79 387 _cs = 1;
rconnorlawson 0:cf4396614a79 388 _spi.write(0xFF);
rconnorlawson 0:cf4396614a79 389 return 1;
rconnorlawson 0:cf4396614a79 390 }
rconnorlawson 0:cf4396614a79 391
rconnorlawson 0:cf4396614a79 392 // wait for write to finish
rconnorlawson 0:cf4396614a79 393 while (_spi.write(0xFF) == 0);
rconnorlawson 0:cf4396614a79 394
rconnorlawson 0:cf4396614a79 395 _cs = 1;
rconnorlawson 0:cf4396614a79 396 _spi.write(0xFF);
rconnorlawson 0:cf4396614a79 397 return 0;
rconnorlawson 0:cf4396614a79 398 }
rconnorlawson 0:cf4396614a79 399
rconnorlawson 0:cf4396614a79 400 static uint32_t ext_bits(unsigned char *data, int msb, int lsb) {
rconnorlawson 0:cf4396614a79 401 uint32_t bits = 0;
rconnorlawson 0:cf4396614a79 402 uint32_t size = 1 + msb - lsb;
rconnorlawson 0:cf4396614a79 403 for (int i = 0; i < size; i++) {
rconnorlawson 0:cf4396614a79 404 uint32_t position = lsb + i;
rconnorlawson 0:cf4396614a79 405 uint32_t byte = 15 - (position >> 3);
rconnorlawson 0:cf4396614a79 406 uint32_t bit = position & 0x7;
rconnorlawson 0:cf4396614a79 407 uint32_t value = (data[byte] >> bit) & 1;
rconnorlawson 0:cf4396614a79 408 bits |= value << i;
rconnorlawson 0:cf4396614a79 409 }
rconnorlawson 0:cf4396614a79 410 return bits;
rconnorlawson 0:cf4396614a79 411 }
rconnorlawson 0:cf4396614a79 412
rconnorlawson 0:cf4396614a79 413 uint64_t SDFileSystem::_sd_sectors() {
rconnorlawson 0:cf4396614a79 414 uint32_t c_size, c_size_mult, read_bl_len;
rconnorlawson 0:cf4396614a79 415 uint32_t block_len, mult, blocknr, capacity;
rconnorlawson 0:cf4396614a79 416 uint32_t hc_c_size;
rconnorlawson 0:cf4396614a79 417 uint64_t blocks;
rconnorlawson 0:cf4396614a79 418
rconnorlawson 0:cf4396614a79 419 // CMD9, Response R2 (R1 byte + 16-byte block read)
rconnorlawson 0:cf4396614a79 420 if (_cmdx(9, 0) != 0) {
rconnorlawson 0:cf4396614a79 421 debug("Didn't get a response from the disk\n");
rconnorlawson 0:cf4396614a79 422 return 0;
rconnorlawson 0:cf4396614a79 423 }
rconnorlawson 0:cf4396614a79 424
rconnorlawson 0:cf4396614a79 425 uint8_t csd[16];
rconnorlawson 0:cf4396614a79 426 if (_read(csd, 16) != 0) {
rconnorlawson 0:cf4396614a79 427 debug("Couldn't read csd response from disk\n");
rconnorlawson 0:cf4396614a79 428 return 0;
rconnorlawson 0:cf4396614a79 429 }
rconnorlawson 0:cf4396614a79 430
rconnorlawson 0:cf4396614a79 431 // csd_structure : csd[127:126]
rconnorlawson 0:cf4396614a79 432 // c_size : csd[73:62]
rconnorlawson 0:cf4396614a79 433 // c_size_mult : csd[49:47]
rconnorlawson 0:cf4396614a79 434 // read_bl_len : csd[83:80] - the *maximum* read block length
rconnorlawson 0:cf4396614a79 435
rconnorlawson 0:cf4396614a79 436 int csd_structure = ext_bits(csd, 127, 126);
rconnorlawson 0:cf4396614a79 437
rconnorlawson 0:cf4396614a79 438 switch (csd_structure) {
rconnorlawson 0:cf4396614a79 439 case 0:
rconnorlawson 0:cf4396614a79 440 cdv = 512;
rconnorlawson 0:cf4396614a79 441 c_size = ext_bits(csd, 73, 62);
rconnorlawson 0:cf4396614a79 442 c_size_mult = ext_bits(csd, 49, 47);
rconnorlawson 0:cf4396614a79 443 read_bl_len = ext_bits(csd, 83, 80);
rconnorlawson 0:cf4396614a79 444
rconnorlawson 0:cf4396614a79 445 block_len = 1 << read_bl_len;
rconnorlawson 0:cf4396614a79 446 mult = 1 << (c_size_mult + 2);
rconnorlawson 0:cf4396614a79 447 blocknr = (c_size + 1) * mult;
rconnorlawson 0:cf4396614a79 448 capacity = blocknr * block_len;
rconnorlawson 0:cf4396614a79 449 blocks = capacity / 512;
rconnorlawson 0:cf4396614a79 450 debug_if(SD_DBG, "\n\rSDCard\n\rc_size: %d \n\rcapacity: %ld \n\rsectors: %lld\n\r", c_size, capacity, blocks);
rconnorlawson 0:cf4396614a79 451 break;
rconnorlawson 0:cf4396614a79 452
rconnorlawson 0:cf4396614a79 453 case 1:
rconnorlawson 0:cf4396614a79 454 cdv = 1;
rconnorlawson 0:cf4396614a79 455 hc_c_size = ext_bits(csd, 63, 48);
rconnorlawson 0:cf4396614a79 456 blocks = (hc_c_size+1)*1024;
rconnorlawson 0:cf4396614a79 457 debug_if(SD_DBG, "\n\rSDHC Card \n\rhc_c_size: %d\n\rcapacity: %lld \n\rsectors: %lld\n\r", hc_c_size, blocks*512, blocks);
rconnorlawson 0:cf4396614a79 458 break;
rconnorlawson 0:cf4396614a79 459
rconnorlawson 0:cf4396614a79 460 default:
rconnorlawson 0:cf4396614a79 461 debug("CSD struct unsupported\r\n");
rconnorlawson 0:cf4396614a79 462 return 0;
rconnorlawson 0:cf4396614a79 463 };
rconnorlawson 0:cf4396614a79 464 return blocks;
rconnorlawson 0:cf4396614a79 465 }