Ernesto Palacios / FastPWM

Ley de Ohm

Fork of FastPWM by Erik -

Device/FastPWM_STM_TIM_PinOut.cpp@32:c87e19d668e2, 2017-05-09 (annotated)

Committer:
Yo_Robot
Date:
Tue May 09 16:34:49 2017 +0000
Revision:
32:c87e19d668e2
Parent:
28:3c8a0d977bc3 
modified version do not use

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Sissors 13:cdefd9d75b64 1 #include "mbed.h"
Sissors 13:cdefd9d75b64 2
Sissors 27:7f484dd7323d 3 #if defined (TARGET_NUCLEO_F030R8) || (TARGET_DISCO_F051R8)
Sissors 13:cdefd9d75b64 4 __IO uint32_t* getChannel(TIM_TypeDef* pwm, PinName pin) {
Sissors 13:cdefd9d75b64 5 switch (pin) {
Sissors 13:cdefd9d75b64 6 // Channels 1
Sissors 13:cdefd9d75b64 7 case PA_4: case PA_6: case PB_1: case PB_4: case PB_8: case PB_9: case PB_14: case PC_6: case PB_6: case PB_7:
Sissors 13:cdefd9d75b64 8 return &pwm->CCR1;
Sissors 13:cdefd9d75b64 9
Sissors 13:cdefd9d75b64 10 // Channels 2
Sissors 13:cdefd9d75b64 11 case PA_7: case PB_5: case PC_7:
Sissors 13:cdefd9d75b64 12 return &pwm->CCR2;
Sissors 13:cdefd9d75b64 13
Sissors 13:cdefd9d75b64 14 // Channels 3
Sissors 13:cdefd9d75b64 15 case PB_0: case PC_8:
Sissors 13:cdefd9d75b64 16 return &pwm->CCR3;
Sissors 13:cdefd9d75b64 17
Sissors 13:cdefd9d75b64 18 // Channels 4
Sissors 13:cdefd9d75b64 19 case PC_9:
Sissors 13:cdefd9d75b64 20 return &pwm->CCR4;
Sissors 13:cdefd9d75b64 21 }
Sissors 13:cdefd9d75b64 22 return NULL;
Sissors 13:cdefd9d75b64 23 }
Sissors 13:cdefd9d75b64 24 #endif
Sissors 13:cdefd9d75b64 25
Sissors 27:7f484dd7323d 26 #if defined (TARGET_NUCLEO_F103RB) || (TARGET_DISCO_F100RB)
Sissors 24:1f451660d8c0 27 __IO uint32_t* getChannel(TIM_TypeDef* pwm, PinName pin) {
jocis 16:ec208b5ec0bb 28 switch (pin) {
jocis 16:ec208b5ec0bb 29 // Channels 1 : PWMx/1
jocis 16:ec208b5ec0bb 30 case PA_6: case PA_8: case PA_15: case PB_4: case PC_6: case PB_13:
jocis 17:8378bc456f0d 31 return &pwm->CCR1;
jocis 16:ec208b5ec0bb 32
jocis 16:ec208b5ec0bb 33 // Channels 2 : PWMx/2
jocis 16:ec208b5ec0bb 34 case PA_1: case PA_7: case PA_9: case PB_3: case PB_5: case PC_7: case PB_14:
jocis 17:8378bc456f0d 35 return &pwm->CCR2;
jocis 16:ec208b5ec0bb 36
jocis 16:ec208b5ec0bb 37 // Channels 3 : PWMx/3
jocis 16:ec208b5ec0bb 38 case PA_2: case PA_10: case PB_0: case PB_10: case PC_8: case PB_15:
jocis 17:8378bc456f0d 39 return &pwm->CCR3;
jocis 16:ec208b5ec0bb 40
jocis 16:ec208b5ec0bb 41 // Channels 4 : PWMx/4
jocis 16:ec208b5ec0bb 42 case PA_3: case PA_11: case PB_1: case PB_11: case PC_9:
jocis 17:8378bc456f0d 43 return &pwm->CCR4;
jocis 16:ec208b5ec0bb 44 }
jocis 16:ec208b5ec0bb 45 return NULL;
jocis 16:ec208b5ec0bb 46 }
Sissors 19:ba7a5bf634b3 47 #endif
Sissors 19:ba7a5bf634b3 48
altaran 20:3c609bc4ae9c 49 #if defined TARGET_NUCLEO_F072RB
altaran 20:3c609bc4ae9c 50 __IO uint32_t* getChannel(TIM_TypeDef* pwm, PinName pin) {
altaran 20:3c609bc4ae9c 51 switch (pin) {
altaran 20:3c609bc4ae9c 52 // Channels 1 : PWMx/1
altaran 20:3c609bc4ae9c 53 case PA_2: case PA_6: case PA_4: case PA_7: case PA_8: case PB_1: case PB_4: case PB_8: case PB_9: case PB_14: case PC_6:
altaran 21:aa2884be5496 54 // Channels 1N : PWMx/1N
altaran 21:aa2884be5496 55 case PA_1: case PB_6: case PB_7: case PB_13:
altaran 20:3c609bc4ae9c 56 return &pwm->CCR1;
altaran 20:3c609bc4ae9c 57
altaran 20:3c609bc4ae9c 58 // Channels 2 : PWMx/2
altaran 20:3c609bc4ae9c 59 case PA_3: case PA_9: case PB_5: case PC_7: case PB_15:
altaran 20:3c609bc4ae9c 60 return &pwm->CCR2;
altaran 20:3c609bc4ae9c 61
altaran 20:3c609bc4ae9c 62 // Channels 3 : PWMx/3
altaran 20:3c609bc4ae9c 63 case PA_10: case PB_0: case PC_8:
altaran 20:3c609bc4ae9c 64 return &pwm->CCR3;
altaran 20:3c609bc4ae9c 65
altaran 20:3c609bc4ae9c 66 // Channels 4 : PWMx/4
altaran 20:3c609bc4ae9c 67 case PA_11: case PC_9:
altaran 20:3c609bc4ae9c 68 return &pwm->CCR4;
altaran 20:3c609bc4ae9c 69 }
altaran 20:3c609bc4ae9c 70 return NULL;
altaran 20:3c609bc4ae9c 71 }
Sissors 26:0c924507a81f 72 #endif
Sissors 26:0c924507a81f 73
Sissors 28:3c8a0d977bc3 74
Sissors 27:7f484dd7323d 75
Sissors 27:7f484dd7323d 76 #if defined (TARGET_NUCLEO_L152RE)
Sissors 27:7f484dd7323d 77 __IO uint32_t* getChannel(TIM_TypeDef* pwm, PinName pin) {
Sissors 27:7f484dd7323d 78 switch (pin) {
Sissors 27:7f484dd7323d 79 // Channels 1 : PWMx/1
Sissors 27:7f484dd7323d 80 case PA_6: case PB_4: case PB_12: case PB_13: case PC_6:
Sissors 27:7f484dd7323d 81 return &pwm->CCR1;
Sissors 27:7f484dd7323d 82
Sissors 27:7f484dd7323d 83 // Channels 2 : PWMx/2
Sissors 27:7f484dd7323d 84 case PA_1: case PA_7: case PB_3: case PB_5: case PB_14: case PB_7: case PC_7:
Sissors 27:7f484dd7323d 85 return &pwm->CCR2;
Sissors 27:7f484dd7323d 86
Sissors 27:7f484dd7323d 87 // Channels 3 : PWMx/3
Sissors 27:7f484dd7323d 88 case PA_2: case PB_0: case PB_8: case PB_10: case PC_8:
Sissors 27:7f484dd7323d 89 return &pwm->CCR3;
Sissors 27:7f484dd7323d 90
Sissors 27:7f484dd7323d 91 // Channels 4 : PWMx/4
Sissors 27:7f484dd7323d 92 case PA_3: case PB_1:case PB_9: case PB_11: case PC_9:
Sissors 27:7f484dd7323d 93 return &pwm->CCR4;
Sissors 27:7f484dd7323d 94 default:
Sissors 27:7f484dd7323d 95 /* NOP */
Sissors 27:7f484dd7323d 96 break;
Sissors 27:7f484dd7323d 97 }
Sissors 27:7f484dd7323d 98 return NULL;
Sissors 27:7f484dd7323d 99 }
Sissors 27:7f484dd7323d 100 #endif
Sissors 28:3c8a0d977bc3 101
Sissors 28:3c8a0d977bc3 102