Signal Generator

Dependencies:   IniManager RA8875 Watchdog mbed-rtos mbed

Fork of speaker_demo_Analog by jim hamblen

Committer:
WiredHome
Date:
Sat May 20 19:52:23 2017 +0000
Revision:
6:1f48212fbaf9
Parent:
5:49dd0c647a40
Signal Generator - a work in process as the need arises.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
WiredHome 6:1f48212fbaf9 1 //
WiredHome 6:1f48212fbaf9 2 // Signal Generate DAC Driver
WiredHome 6:1f48212fbaf9 3 //
WiredHome 6:1f48212fbaf9 4 // Derived from AN10917: Memory to DAC data transfers using the LPC1700's DMA
WiredHome 6:1f48212fbaf9 5 //
WiredHome 2:8f71b71fce1b 6
WiredHome 2:8f71b71fce1b 7 #include "SignalGenDAC.h"
WiredHome 2:8f71b71fce1b 8
WiredHome 5:49dd0c647a40 9 #define PI 3.14159 // for the sine-wave
WiredHome 2:8f71b71fce1b 10
WiredHome 2:8f71b71fce1b 11 /// The linked list structure used to control the DMA transfer
WiredHome 2:8f71b71fce1b 12 ///
WiredHome 2:8f71b71fce1b 13 typedef struct {
WiredHome 2:8f71b71fce1b 14 uint32_t source; /// start of source area
WiredHome 2:8f71b71fce1b 15 uint32_t destination;/// start of destination area
WiredHome 2:8f71b71fce1b 16 uint32_t next; /// address of next strLLI in chain
WiredHome 2:8f71b71fce1b 17 uint32_t control; /// DMACCxControl register
WiredHome 2:8f71b71fce1b 18 } LinkListItem_t;
WiredHome 2:8f71b71fce1b 19
WiredHome 3:d22f3e52d06a 20 /// The DACsignal memory, which is DMA sent to the DAC to play the waveform,
WiredHome 3:d22f3e52d06a 21 /// produced by scaling the VoltSignal array
WiredHome 2:8f71b71fce1b 22 ///
WiredHome 3:d22f3e52d06a 23 float VoltSignal[SIGNAL_MEM_ENTRIES] __attribute__ ((section("AHBSRAM0")));
WiredHome 3:d22f3e52d06a 24 signed long DACsignal[SIGNAL_MEM_ENTRIES] __attribute__ ((section("AHBSRAM0")));
WiredHome 2:8f71b71fce1b 25
WiredHome 2:8f71b71fce1b 26 /// The linked list item record, used by the DMA engine to decide how to play
WiredHome 2:8f71b71fce1b 27 ///
WiredHome 2:8f71b71fce1b 28 LinkListItem_t llio __attribute__ ((section("AHBSRAM0")));
WiredHome 2:8f71b71fce1b 29
WiredHome 2:8f71b71fce1b 30
WiredHome 2:8f71b71fce1b 31 SignalGenDAC::SignalGenDAC(PinName _aout, float _minV, float _maxV) :
WiredHome 2:8f71b71fce1b 32 minV(_minV), maxV(_maxV) {
WiredHome 2:8f71b71fce1b 33 aout = new AnalogOut(_aout);
WiredHome 2:8f71b71fce1b 34 }
WiredHome 2:8f71b71fce1b 35
WiredHome 2:8f71b71fce1b 36 SignalGenDAC::~SignalGenDAC() {
WiredHome 2:8f71b71fce1b 37 }
WiredHome 2:8f71b71fce1b 38
WiredHome 2:8f71b71fce1b 39 void SignalGenDAC::Start(bool oneShot) {
WiredHome 4:10281ddb673d 40 printf("Start(%d) w/%d samples\r\n", oneShot ? 1 : 0, numSamples);
WiredHome 3:d22f3e52d06a 41 isOn = (oneShot) ? false : true;
WiredHome 4:10281ddb673d 42
WiredHome 4:10281ddb673d 43 llio.source = (uint32_t)DACsignal;
WiredHome 4:10281ddb673d 44 llio.destination = (uint32_t)&LPC_DAC->DACR;
WiredHome 4:10281ddb673d 45 llio.next = (uint32_t)&llio;
WiredHome 4:10281ddb673d 46 llio.control = (1<<26) | (2<<21) | (2<<18) | numSamples;
WiredHome 4:10281ddb673d 47
WiredHome 4:10281ddb673d 48 LPC_SC->PCONP |= (1<<29);
WiredHome 4:10281ddb673d 49
WiredHome 4:10281ddb673d 50 /* Enable GPDMA and sync logic */
WiredHome 4:10281ddb673d 51 LPC_GPDMA->DMACConfig = 1;
WiredHome 4:10281ddb673d 52 LPC_GPDMA->DMACSync = (1<<6);
WiredHome 4:10281ddb673d 53
WiredHome 4:10281ddb673d 54 /* Load DMA Channel0 */
WiredHome 4:10281ddb673d 55 LPC_GPDMACH0->DMACCSrcAddr = (uint32_t)DACsignal;
WiredHome 4:10281ddb673d 56 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_DAC->DACR;
WiredHome 6:1f48212fbaf9 57 LPC_GPDMACH0->DMACCLLI = (oneShot) ? 0 : (uint32_t)&llio;
WiredHome 5:49dd0c647a40 58
WiredHome 6:1f48212fbaf9 59 int playSampleCount = numSamples + oneShot;
WiredHome 6:1f48212fbaf9 60 LPC_GPDMACH0->DMACCControl = playSampleCount // transfer size (0 - 11) = 64
WiredHome 4:10281ddb673d 61 | (0 << 12) // source burst size (12 - 14) = 1
WiredHome 4:10281ddb673d 62 | (0 << 15) // destination burst size (15 - 17) = 1
WiredHome 4:10281ddb673d 63 | (2 << 18) // source width (18 - 20) = 32 bit
WiredHome 4:10281ddb673d 64 | (2 << 21) // destination width (21 - 23) = 32 bit
WiredHome 4:10281ddb673d 65 | (0 << 24) // source AHB select (24) = AHB 0
WiredHome 4:10281ddb673d 66 | (0 << 25) // destination AHB select (25) = AHB 0
WiredHome 4:10281ddb673d 67 | (1 << 26) // source increment (26) = increment
WiredHome 4:10281ddb673d 68 | (0 << 27) // destination increment (27) = no increment
WiredHome 4:10281ddb673d 69 | (0 << 28) // mode select (28) = access in user mode
WiredHome 4:10281ddb673d 70 | (0 << 29) // (29) = access not bufferable
WiredHome 4:10281ddb673d 71 | (0 << 30) // (30) = access not cacheable
WiredHome 4:10281ddb673d 72 | (0 << 31); // terminal count interrupt disabled
WiredHome 4:10281ddb673d 73
WiredHome 4:10281ddb673d 74 LPC_GPDMACH0->DMACCConfig = 1
WiredHome 4:10281ddb673d 75 | (0 << 1) // source peripheral (1 - 5) = none
WiredHome 4:10281ddb673d 76 | (7 << 6) // destination peripheral (6 - 10) = DAC
WiredHome 4:10281ddb673d 77 | (1 << 11) // flow control (11 - 13) = mem to per
WiredHome 4:10281ddb673d 78 | (0 << 14) // (14) = mask out error interrupt
WiredHome 4:10281ddb673d 79 | (0 << 15) // (15) = mask out terminal count interrupt
WiredHome 4:10281ddb673d 80 | (0 << 16) // (16) = no locked transfers
WiredHome 4:10281ddb673d 81 | (0 << 18); // (27) = no HALT
WiredHome 4:10281ddb673d 82
WiredHome 4:10281ddb673d 83 /* DACclk = 25 MHz, so 10 usec interval */
WiredHome 6:1f48212fbaf9 84 LPC_DAC->DACCNTVAL = 18; // 16-bit reload value
WiredHome 4:10281ddb673d 85 /* DMA, timer running, dbuff */
WiredHome 4:10281ddb673d 86 LPC_DAC->DACCTRL =
WiredHome 4:10281ddb673d 87 1<<3 // DMA_ENA dma burst is enabled
WiredHome 4:10281ddb673d 88 | 1<<2 // CNT_ENA Timeout couner is enabled
WiredHome 4:10281ddb673d 89 | 1<<1; // DBLBUF_ENA double-buffering enabled
WiredHome 2:8f71b71fce1b 90 }
WiredHome 2:8f71b71fce1b 91
WiredHome 2:8f71b71fce1b 92 void SignalGenDAC::Stop(void) {
WiredHome 3:d22f3e52d06a 93 printf("Stop()\r\n");
WiredHome 3:d22f3e52d06a 94 LPC_GPDMACH0->DMACCLLI = 0;
WiredHome 5:49dd0c647a40 95 while (LPC_GPDMACH0->DMACCConfig & 1)
WiredHome 5:49dd0c647a40 96 wait_ms(1);
WiredHome 5:49dd0c647a40 97 aout->write(offset / maxV);
WiredHome 3:d22f3e52d06a 98 isOn = false;
WiredHome 2:8f71b71fce1b 99 }
WiredHome 2:8f71b71fce1b 100
WiredHome 2:8f71b71fce1b 101
WiredHome 6:1f48212fbaf9 102 void SignalGenDAC::PrepareWaveform(SG_Waveform mode, float _frequency, float _dutycycle, float _voltage, float _offset) {
WiredHome 2:8f71b71fce1b 103 int x, dcCount, firstQtr, lastQtr;
WiredHome 5:49dd0c647a40 104 frequency = _frequency;
WiredHome 5:49dd0c647a40 105 dutycycle = _dutycycle;
WiredHome 5:49dd0c647a40 106 voltage = _voltage;
WiredHome 5:49dd0c647a40 107 offset = _offset;
WiredHome 2:8f71b71fce1b 108 float upp = rangelimit(offset + voltage/2, minV, maxV);
WiredHome 2:8f71b71fce1b 109 float mid = rangelimit(offset, minV, maxV);
WiredHome 2:8f71b71fce1b 110 float low = rangelimit(offset - voltage/2, minV, maxV);
WiredHome 2:8f71b71fce1b 111 float v;
WiredHome 6:1f48212fbaf9 112 numSamples = 128; // Ideally, compute this based on the frequency for good resolution
WiredHome 2:8f71b71fce1b 113 dcCount = dutycycle/100.0 * numSamples;
WiredHome 2:8f71b71fce1b 114 firstQtr = dcCount / 2;
WiredHome 2:8f71b71fce1b 115 lastQtr = dcCount + (numSamples - dcCount)/2;
WiredHome 2:8f71b71fce1b 116
WiredHome 2:8f71b71fce1b 117 // Set the timebased based on the frequency
WiredHome 2:8f71b71fce1b 118 if (isOn) {
WiredHome 4:10281ddb673d 119 Stop();
WiredHome 2:8f71b71fce1b 120 }
WiredHome 4:10281ddb673d 121 printf("Generate wave for mode: %d\r\n", mode);
WiredHome 2:8f71b71fce1b 122 switch (mode) {
WiredHome 2:8f71b71fce1b 123 case SG_SINE:
WiredHome 2:8f71b71fce1b 124 for (x=0; x<numSamples; x++) {
WiredHome 2:8f71b71fce1b 125 if (x < dcCount) {
WiredHome 2:8f71b71fce1b 126 v = offset + voltage/2 * sin(x * 1 * PI / dcCount);
WiredHome 2:8f71b71fce1b 127 } else {
WiredHome 2:8f71b71fce1b 128 v = offset - voltage/2 * sin((x - dcCount) * 1 * PI / (numSamples-dcCount));
WiredHome 2:8f71b71fce1b 129 }
WiredHome 3:d22f3e52d06a 130 v = rangelimit(v, minV, maxV);
WiredHome 3:d22f3e52d06a 131 VoltSignal[x] = v;
WiredHome 2:8f71b71fce1b 132 }
WiredHome 6:1f48212fbaf9 133 VoltSignal[numSamples] = rangelimit(offset, minV, maxV);
WiredHome 2:8f71b71fce1b 134 break;
WiredHome 2:8f71b71fce1b 135 case SG_SQUARE:
WiredHome 2:8f71b71fce1b 136 for (x=0; x<numSamples; x++) {
WiredHome 6:1f48212fbaf9 137 if (0 && x == 0) {
WiredHome 6:1f48212fbaf9 138 v = rangelimit(offset, minV, maxV);
WiredHome 6:1f48212fbaf9 139 } else if (x < dcCount) {
WiredHome 2:8f71b71fce1b 140 v = rangelimit(offset + voltage/2, minV, maxV);
WiredHome 2:8f71b71fce1b 141 } else {
WiredHome 2:8f71b71fce1b 142 v = rangelimit(offset - voltage/2, minV, maxV);
WiredHome 2:8f71b71fce1b 143 }
WiredHome 3:d22f3e52d06a 144 VoltSignal[x] = v;
WiredHome 2:8f71b71fce1b 145 }
WiredHome 6:1f48212fbaf9 146 VoltSignal[numSamples] = rangelimit(offset, minV, maxV);
WiredHome 2:8f71b71fce1b 147 break;
WiredHome 2:8f71b71fce1b 148 case SG_TRIANGLE:
WiredHome 2:8f71b71fce1b 149 for (x=0; x<numSamples; x++) {
WiredHome 2:8f71b71fce1b 150 if (x < firstQtr) {
WiredHome 3:d22f3e52d06a 151 v = voltage/2 * (float)x/(firstQtr);
WiredHome 3:d22f3e52d06a 152 v += offset;
WiredHome 2:8f71b71fce1b 153 } else if (x < dcCount) {
WiredHome 3:d22f3e52d06a 154 v = voltage/2 * (float)x/(firstQtr);
WiredHome 3:d22f3e52d06a 155 v = voltage - (v - offset);
WiredHome 2:8f71b71fce1b 156 } else if (x < lastQtr) {
WiredHome 3:d22f3e52d06a 157 v = voltage * (float)(x - dcCount)/(numSamples - dcCount);
WiredHome 3:d22f3e52d06a 158 v = offset - v;
WiredHome 2:8f71b71fce1b 159 } else {
WiredHome 3:d22f3e52d06a 160 v = voltage * (float)(x - dcCount)/(numSamples - dcCount);
WiredHome 3:d22f3e52d06a 161 v = v + offset - voltage;
WiredHome 2:8f71b71fce1b 162 }
WiredHome 3:d22f3e52d06a 163 VoltSignal[x] = v;
WiredHome 2:8f71b71fce1b 164 }
WiredHome 6:1f48212fbaf9 165 VoltSignal[numSamples] = rangelimit(offset, minV, maxV);
WiredHome 2:8f71b71fce1b 166 break;
WiredHome 2:8f71b71fce1b 167 case SG_SAWTOOTH:
WiredHome 2:8f71b71fce1b 168 for (x=0; x<numSamples; x++) {
WiredHome 2:8f71b71fce1b 169 if (x < dcCount) {
WiredHome 3:d22f3e52d06a 170 v = offset - voltage/2 + (float)x/dcCount * voltage/2;
WiredHome 2:8f71b71fce1b 171 } else {
WiredHome 3:d22f3e52d06a 172 v = offset + (float)(x - dcCount)/(numSamples - dcCount) * voltage/2;
WiredHome 2:8f71b71fce1b 173 }
WiredHome 3:d22f3e52d06a 174 v = rangelimit(v, minV, maxV);
WiredHome 3:d22f3e52d06a 175 VoltSignal[x] = v;
WiredHome 2:8f71b71fce1b 176 }
WiredHome 6:1f48212fbaf9 177 VoltSignal[numSamples] = rangelimit(offset, minV, maxV);
WiredHome 2:8f71b71fce1b 178 break;
WiredHome 2:8f71b71fce1b 179 case SG_USER:
WiredHome 2:8f71b71fce1b 180 break;
WiredHome 2:8f71b71fce1b 181 }
WiredHome 3:d22f3e52d06a 182 //printf("DAC Data %3.2f %3.2f\r\n", voltage, offset);
WiredHome 6:1f48212fbaf9 183 for (x=0; x<=numSamples; x++) {
WiredHome 4:10281ddb673d 184 DACsignal[x] = ((uint16_t)(VoltSignal[x]/maxV * 1023) << 6);
WiredHome 4:10281ddb673d 185 printf("%3d, %5.3f, %d\r\n", x, VoltSignal[x], DACsignal[x]);
WiredHome 2:8f71b71fce1b 186 }
WiredHome 5:49dd0c647a40 187 if (!isOn) {
WiredHome 5:49dd0c647a40 188 aout->write(offset / maxV);
WiredHome 5:49dd0c647a40 189 }
WiredHome 2:8f71b71fce1b 190 }
WiredHome 2:8f71b71fce1b 191
WiredHome 2:8f71b71fce1b 192 float SignalGenDAC::rangelimit(float value, float min, float max) {
WiredHome 2:8f71b71fce1b 193 if (value < min)
WiredHome 2:8f71b71fce1b 194 return min;
WiredHome 2:8f71b71fce1b 195 else if (value > max)
WiredHome 2:8f71b71fce1b 196 return max;
WiredHome 2:8f71b71fce1b 197 else
WiredHome 2:8f71b71fce1b 198 return value;
WiredHome 2:8f71b71fce1b 199 }
WiredHome 2:8f71b71fce1b 200