Game_Master - 游戏王对战板，目前code还是空的

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游戏王对战板，目前code还是空的

mbed-os/targets/targets.json@0:9b3d4731edbb, 2018-06-21 (annotated)

Committer:: WFKnight
Date:: Thu Jun 21 13:51:43 2018 +0000
Revision:: 0:9b3d4731edbb

UART, RTOS, LED

Who changed what in which revision?

User	Revision	Line number	New contents of line
WFKnight	0:9b3d4731edbb	1	{
WFKnight	0:9b3d4731edbb	2	"Target": {
WFKnight	0:9b3d4731edbb	3	"core": null,
WFKnight	0:9b3d4731edbb	4	"default_toolchain": "ARM",
WFKnight	0:9b3d4731edbb	5	"supported_toolchains": null,
WFKnight	0:9b3d4731edbb	6	"extra_labels": [],
WFKnight	0:9b3d4731edbb	7	"is_disk_virtual": false,
WFKnight	0:9b3d4731edbb	8	"macros": [],
WFKnight	0:9b3d4731edbb	9	"device_has": [],
WFKnight	0:9b3d4731edbb	10	"features": [],
WFKnight	0:9b3d4731edbb	11	"detect_code": [],
WFKnight	0:9b3d4731edbb	12	"public": false,
WFKnight	0:9b3d4731edbb	13	"default_lib": "std",
WFKnight	0:9b3d4731edbb	14	"bootloader_supported": false,
WFKnight	0:9b3d4731edbb	15	"config": {
WFKnight	0:9b3d4731edbb	16	"console-uart-flow-control": {
WFKnight	0:9b3d4731edbb	17	"help": "Console hardware flow control. Options: null, RTS, CTS, RTSCTS.",
WFKnight	0:9b3d4731edbb	18	"value": null
WFKnight	0:9b3d4731edbb	19	},
WFKnight	0:9b3d4731edbb	20	"network-default-interface-type": {
WFKnight	0:9b3d4731edbb	21	"help": "Default network interface type. Typical options: null, ETHERNET, WIFI, CELLULAR, MESH",
WFKnight	0:9b3d4731edbb	22	"value": null
WFKnight	0:9b3d4731edbb	23	}
WFKnight	0:9b3d4731edbb	24	}
WFKnight	0:9b3d4731edbb	25	},
WFKnight	0:9b3d4731edbb	26	"CM4_UARM": {
WFKnight	0:9b3d4731edbb	27	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	28	"core": "Cortex-M4",
WFKnight	0:9b3d4731edbb	29	"default_toolchain": "uARM",
WFKnight	0:9b3d4731edbb	30	"public": false,
WFKnight	0:9b3d4731edbb	31	"supported_toolchains": ["uARM"],
WFKnight	0:9b3d4731edbb	32	"default_lib": "small"
WFKnight	0:9b3d4731edbb	33	},
WFKnight	0:9b3d4731edbb	34	"CM4_ARM": {
WFKnight	0:9b3d4731edbb	35	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	36	"core": "Cortex-M4",
WFKnight	0:9b3d4731edbb	37	"public": false,
WFKnight	0:9b3d4731edbb	38	"supported_toolchains": ["ARM"]
WFKnight	0:9b3d4731edbb	39	},
WFKnight	0:9b3d4731edbb	40	"CM4F_UARM": {
WFKnight	0:9b3d4731edbb	41	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	42	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	43	"default_toolchain": "uARM",
WFKnight	0:9b3d4731edbb	44	"public": false,
WFKnight	0:9b3d4731edbb	45	"supported_toolchains": ["uARM"],
WFKnight	0:9b3d4731edbb	46	"default_lib": "small"
WFKnight	0:9b3d4731edbb	47	},
WFKnight	0:9b3d4731edbb	48	"CM4F_ARM": {
WFKnight	0:9b3d4731edbb	49	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	50	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	51	"public": false,
WFKnight	0:9b3d4731edbb	52	"supported_toolchains": ["ARM"]
WFKnight	0:9b3d4731edbb	53	},
WFKnight	0:9b3d4731edbb	54	"LPCTarget": {
WFKnight	0:9b3d4731edbb	55	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	56	"post_binary_hook": {"function": "LPCTargetCode.lpc_patch"},
WFKnight	0:9b3d4731edbb	57	"public": false
WFKnight	0:9b3d4731edbb	58	},
WFKnight	0:9b3d4731edbb	59	"LPC11C24": {
WFKnight	0:9b3d4731edbb	60	"inherits": ["LPCTarget"],
WFKnight	0:9b3d4731edbb	61	"core": "Cortex-M0",
WFKnight	0:9b3d4731edbb	62	"extra_labels": ["NXP", "LPC11XX_11CXX", "LPC11CXX"],
WFKnight	0:9b3d4731edbb	63	"OUTPUT_EXT": "hex",
WFKnight	0:9b3d4731edbb	64	"macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
WFKnight	0:9b3d4731edbb	65	"supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
WFKnight	0:9b3d4731edbb	66	"device_has": ["ANALOGIN", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
WFKnight	0:9b3d4731edbb	67	"device_name": "LPC11C24FBD48/301"
WFKnight	0:9b3d4731edbb	68	},
WFKnight	0:9b3d4731edbb	69	"LPC1114": {
WFKnight	0:9b3d4731edbb	70	"inherits": ["LPCTarget"],
WFKnight	0:9b3d4731edbb	71	"core": "Cortex-M0",
WFKnight	0:9b3d4731edbb	72	"default_toolchain": "uARM",
WFKnight	0:9b3d4731edbb	73	"extra_labels": ["NXP", "LPC11XX_11CXX", "LPC11XX"],
WFKnight	0:9b3d4731edbb	74	"macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
WFKnight	0:9b3d4731edbb	75	"supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
WFKnight	0:9b3d4731edbb	76	"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
WFKnight	0:9b3d4731edbb	77	"default_lib": "small",
WFKnight	0:9b3d4731edbb	78	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	79	"device_name": "LPC1114FN28/102"
WFKnight	0:9b3d4731edbb	80	},
WFKnight	0:9b3d4731edbb	81	"LPC11U24": {
WFKnight	0:9b3d4731edbb	82	"inherits": ["LPCTarget"],
WFKnight	0:9b3d4731edbb	83	"core": "Cortex-M0",
WFKnight	0:9b3d4731edbb	84	"default_toolchain": "uARM",
WFKnight	0:9b3d4731edbb	85	"extra_labels": ["NXP", "LPC11UXX", "LPC11U24_401"],
WFKnight	0:9b3d4731edbb	86	"macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
WFKnight	0:9b3d4731edbb	87	"supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
WFKnight	0:9b3d4731edbb	88	"detect_code": ["1040"],
WFKnight	0:9b3d4731edbb	89	"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
WFKnight	0:9b3d4731edbb	90	"default_lib": "small",
WFKnight	0:9b3d4731edbb	91	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	92	"device_name": "LPC11U24FBD48/401"
WFKnight	0:9b3d4731edbb	93	},
WFKnight	0:9b3d4731edbb	94	"OC_MBUINO": {
WFKnight	0:9b3d4731edbb	95	"inherits": ["LPC11U24"],
WFKnight	0:9b3d4731edbb	96	"macros": ["TARGET_LPC11U24", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
WFKnight	0:9b3d4731edbb	97	"extra_labels": ["NXP", "LPC11UXX"],
WFKnight	0:9b3d4731edbb	98	"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
WFKnight	0:9b3d4731edbb	99	"release_versions": ["2"]
WFKnight	0:9b3d4731edbb	100	},
WFKnight	0:9b3d4731edbb	101	"LPC11U24_301": {
WFKnight	0:9b3d4731edbb	102	"inherits": ["LPCTarget"],
WFKnight	0:9b3d4731edbb	103	"core": "Cortex-M0",
WFKnight	0:9b3d4731edbb	104	"extra_labels": ["NXP", "LPC11UXX"],
WFKnight	0:9b3d4731edbb	105	"macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
WFKnight	0:9b3d4731edbb	106	"supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
WFKnight	0:9b3d4731edbb	107	"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
WFKnight	0:9b3d4731edbb	108	"device_name": "LPC11U24FHI33/301"
WFKnight	0:9b3d4731edbb	109	},
WFKnight	0:9b3d4731edbb	110	"LPC11U34_421": {
WFKnight	0:9b3d4731edbb	111	"inherits": ["LPCTarget"],
WFKnight	0:9b3d4731edbb	112	"core": "Cortex-M0",
WFKnight	0:9b3d4731edbb	113	"default_toolchain": "uARM",
WFKnight	0:9b3d4731edbb	114	"extra_labels": ["NXP", "LPC11UXX"],
WFKnight	0:9b3d4731edbb	115	"macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
WFKnight	0:9b3d4731edbb	116	"supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
WFKnight	0:9b3d4731edbb	117	"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
WFKnight	0:9b3d4731edbb	118	"default_lib": "small",
WFKnight	0:9b3d4731edbb	119	"device_name": "LPC11U34FBD48/311"
WFKnight	0:9b3d4731edbb	120	},
WFKnight	0:9b3d4731edbb	121	"MICRONFCBOARD": {
WFKnight	0:9b3d4731edbb	122	"inherits": ["LPC11U34_421"],
WFKnight	0:9b3d4731edbb	123	"macros_add": ["LPC11U34_421", "APPNEARME_MICRONFCBOARD"],
WFKnight	0:9b3d4731edbb	124	"extra_labels_add": ["APPNEARME_MICRONFCBOARD"],
WFKnight	0:9b3d4731edbb	125	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	126	"device_name": "LPC11U34FBD48/311"
WFKnight	0:9b3d4731edbb	127	},
WFKnight	0:9b3d4731edbb	128	"LPC11U35_401": {
WFKnight	0:9b3d4731edbb	129	"inherits": ["LPCTarget"],
WFKnight	0:9b3d4731edbb	130	"core": "Cortex-M0",
WFKnight	0:9b3d4731edbb	131	"default_toolchain": "uARM",
WFKnight	0:9b3d4731edbb	132	"extra_labels": ["NXP", "LPC11UXX"],
WFKnight	0:9b3d4731edbb	133	"macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
WFKnight	0:9b3d4731edbb	134	"supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
WFKnight	0:9b3d4731edbb	135	"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
WFKnight	0:9b3d4731edbb	136	"default_lib": "small",
WFKnight	0:9b3d4731edbb	137	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	138	"device_name": "LPC11U35FBD48/401"
WFKnight	0:9b3d4731edbb	139	},
WFKnight	0:9b3d4731edbb	140	"LPC11U35_501": {
WFKnight	0:9b3d4731edbb	141	"inherits": ["LPCTarget"],
WFKnight	0:9b3d4731edbb	142	"core": "Cortex-M0",
WFKnight	0:9b3d4731edbb	143	"default_toolchain": "uARM",
WFKnight	0:9b3d4731edbb	144	"extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"],
WFKnight	0:9b3d4731edbb	145	"macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
WFKnight	0:9b3d4731edbb	146	"supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
WFKnight	0:9b3d4731edbb	147	"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
WFKnight	0:9b3d4731edbb	148	"default_lib": "small",
WFKnight	0:9b3d4731edbb	149	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	150	"device_name": "LPC11U35FHI33/501"
WFKnight	0:9b3d4731edbb	151	},
WFKnight	0:9b3d4731edbb	152	"LPC11U35_501_IBDAP": {
WFKnight	0:9b3d4731edbb	153	"inherits": ["LPCTarget"],
WFKnight	0:9b3d4731edbb	154	"core": "Cortex-M0",
WFKnight	0:9b3d4731edbb	155	"default_toolchain": "uARM",
WFKnight	0:9b3d4731edbb	156	"extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"],
WFKnight	0:9b3d4731edbb	157	"macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
WFKnight	0:9b3d4731edbb	158	"supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
WFKnight	0:9b3d4731edbb	159	"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
WFKnight	0:9b3d4731edbb	160	"default_lib": "small",
WFKnight	0:9b3d4731edbb	161	"device_name": "LPC11U35FHI33/501"
WFKnight	0:9b3d4731edbb	162	},
WFKnight	0:9b3d4731edbb	163	"XADOW_M0": {
WFKnight	0:9b3d4731edbb	164	"inherits": ["LPC11U35_501"]
WFKnight	0:9b3d4731edbb	165	},
WFKnight	0:9b3d4731edbb	166	"LPC11U35_Y5_MBUG": {
WFKnight	0:9b3d4731edbb	167	"inherits": ["LPCTarget"],
WFKnight	0:9b3d4731edbb	168	"core": "Cortex-M0",
WFKnight	0:9b3d4731edbb	169	"default_toolchain": "uARM",
WFKnight	0:9b3d4731edbb	170	"extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"],
WFKnight	0:9b3d4731edbb	171	"macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
WFKnight	0:9b3d4731edbb	172	"supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
WFKnight	0:9b3d4731edbb	173	"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
WFKnight	0:9b3d4731edbb	174	"default_lib": "small",
WFKnight	0:9b3d4731edbb	175	"device_name": "LPC11U35FHI33/501"
WFKnight	0:9b3d4731edbb	176	},
WFKnight	0:9b3d4731edbb	177	"LPC11U37_501": {
WFKnight	0:9b3d4731edbb	178	"inherits": ["LPCTarget"],
WFKnight	0:9b3d4731edbb	179	"core": "Cortex-M0",
WFKnight	0:9b3d4731edbb	180	"default_toolchain": "uARM",
WFKnight	0:9b3d4731edbb	181	"extra_labels": ["NXP", "LPC11UXX"],
WFKnight	0:9b3d4731edbb	182	"macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
WFKnight	0:9b3d4731edbb	183	"supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
WFKnight	0:9b3d4731edbb	184	"default_lib": "small",
WFKnight	0:9b3d4731edbb	185	"device_name": "LPC11U37FBD64/501"
WFKnight	0:9b3d4731edbb	186	},
WFKnight	0:9b3d4731edbb	187	"LPCCAPPUCCINO": {
WFKnight	0:9b3d4731edbb	188	"inherits": ["LPC11U37_501"],
WFKnight	0:9b3d4731edbb	189	"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
WFKnight	0:9b3d4731edbb	190	"device_name": "LPC11U37FBD64/501"
WFKnight	0:9b3d4731edbb	191	},
WFKnight	0:9b3d4731edbb	192	"ARCH_GPRS": {
WFKnight	0:9b3d4731edbb	193	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	194	"core": "Cortex-M0",
WFKnight	0:9b3d4731edbb	195	"default_toolchain": "uARM",
WFKnight	0:9b3d4731edbb	196	"extra_labels": ["NXP", "LPC11UXX", "LPC11U37_501"],
WFKnight	0:9b3d4731edbb	197	"macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
WFKnight	0:9b3d4731edbb	198	"supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
WFKnight	0:9b3d4731edbb	199	"inherits": ["LPCTarget"],
WFKnight	0:9b3d4731edbb	200	"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
WFKnight	0:9b3d4731edbb	201	"default_lib": "small",
WFKnight	0:9b3d4731edbb	202	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	203	"device_name": "LPC11U37FBD64/501"
WFKnight	0:9b3d4731edbb	204	},
WFKnight	0:9b3d4731edbb	205	"LPC11U68": {
WFKnight	0:9b3d4731edbb	206	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	207	"core": "Cortex-M0+",
WFKnight	0:9b3d4731edbb	208	"default_toolchain": "uARM",
WFKnight	0:9b3d4731edbb	209	"extra_labels": ["NXP", "LPC11U6X"],
WFKnight	0:9b3d4731edbb	210	"supported_toolchains": ["ARM", "uARM", "GCC_CR", "GCC_ARM", "IAR"],
WFKnight	0:9b3d4731edbb	211	"inherits": ["LPCTarget"],
WFKnight	0:9b3d4731edbb	212	"detect_code": ["1168"],
WFKnight	0:9b3d4731edbb	213	"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SLEEP", "SPI"],
WFKnight	0:9b3d4731edbb	214	"default_lib": "small",
WFKnight	0:9b3d4731edbb	215	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	216	"device_name": "LPC11U68JBD100"
WFKnight	0:9b3d4731edbb	217	},
WFKnight	0:9b3d4731edbb	218	"LPC1347": {
WFKnight	0:9b3d4731edbb	219	"inherits": ["LPCTarget"],
WFKnight	0:9b3d4731edbb	220	"core": "Cortex-M3",
WFKnight	0:9b3d4731edbb	221	"extra_labels": ["NXP", "LPC13XX"],
WFKnight	0:9b3d4731edbb	222	"supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
WFKnight	0:9b3d4731edbb	223	"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
WFKnight	0:9b3d4731edbb	224	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	225	"device_name": "LPC1347FBD48"
WFKnight	0:9b3d4731edbb	226	},
WFKnight	0:9b3d4731edbb	227	"LPC1549": {
WFKnight	0:9b3d4731edbb	228	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	229	"core": "Cortex-M3",
WFKnight	0:9b3d4731edbb	230	"default_toolchain": "uARM",
WFKnight	0:9b3d4731edbb	231	"extra_labels": ["NXP", "LPC15XX"],
WFKnight	0:9b3d4731edbb	232	"supported_toolchains": ["uARM", "GCC_CR", "GCC_ARM", "IAR"],
WFKnight	0:9b3d4731edbb	233	"inherits": ["LPCTarget"],
WFKnight	0:9b3d4731edbb	234	"detect_code": ["1549"],
WFKnight	0:9b3d4731edbb	235	"device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "INTERRUPTIN", "PWMOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE"],
WFKnight	0:9b3d4731edbb	236	"default_lib": "small",
WFKnight	0:9b3d4731edbb	237	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	238	"device_name": "LPC1549JBD64"
WFKnight	0:9b3d4731edbb	239	},
WFKnight	0:9b3d4731edbb	240	"LPC1768": {
WFKnight	0:9b3d4731edbb	241	"inherits": ["LPCTarget"],
WFKnight	0:9b3d4731edbb	242	"core": "Cortex-M3",
WFKnight	0:9b3d4731edbb	243	"extra_labels": ["NXP", "LPC176X", "MBED_LPC1768", "NXP_EMAC"],
WFKnight	0:9b3d4731edbb	244	"supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
WFKnight	0:9b3d4731edbb	245	"detect_code": ["1010"],
WFKnight	0:9b3d4731edbb	246	"device_has": ["USTICKER", "ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "EMAC", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "FLASH"],
WFKnight	0:9b3d4731edbb	247	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	248	"features": ["LWIP"],
WFKnight	0:9b3d4731edbb	249	"device_name": "LPC1768",
WFKnight	0:9b3d4731edbb	250	"bootloader_supported": true,
WFKnight	0:9b3d4731edbb	251	"overrides": {
WFKnight	0:9b3d4731edbb	252	"network-default-interface-type": "ETHERNET"
WFKnight	0:9b3d4731edbb	253	}
WFKnight	0:9b3d4731edbb	254	},
WFKnight	0:9b3d4731edbb	255	"LPC1769": {
WFKnight	0:9b3d4731edbb	256	"inherits": ["LPC1768"],
WFKnight	0:9b3d4731edbb	257	"device_name": "LPC1769"
WFKnight	0:9b3d4731edbb	258	},
WFKnight	0:9b3d4731edbb	259	"ARCH_PRO": {
WFKnight	0:9b3d4731edbb	260	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	261	"core": "Cortex-M3",
WFKnight	0:9b3d4731edbb	262	"supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
WFKnight	0:9b3d4731edbb	263	"extra_labels": ["NXP", "LPC176X", "NXP_EMAC"],
WFKnight	0:9b3d4731edbb	264	"macros": ["TARGET_LPC1768"],
WFKnight	0:9b3d4731edbb	265	"inherits": ["LPCTarget"],
WFKnight	0:9b3d4731edbb	266	"device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "EMAC", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "FLASH"],
WFKnight	0:9b3d4731edbb	267	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	268	"features": ["LWIP"],
WFKnight	0:9b3d4731edbb	269	"device_name": "LPC1768",
WFKnight	0:9b3d4731edbb	270	"bootloader_supported": true,
WFKnight	0:9b3d4731edbb	271	"overrides": {
WFKnight	0:9b3d4731edbb	272	"network-default-interface-type": "ETHERNET"
WFKnight	0:9b3d4731edbb	273	}
WFKnight	0:9b3d4731edbb	274	},
WFKnight	0:9b3d4731edbb	275	"UBLOX_C027": {
WFKnight	0:9b3d4731edbb	276	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	277	"core": "Cortex-M3",
WFKnight	0:9b3d4731edbb	278	"supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
WFKnight	0:9b3d4731edbb	279	"extra_labels": ["NXP", "LPC176X", "NXP_EMAC"],
WFKnight	0:9b3d4731edbb	280	"config": {
WFKnight	0:9b3d4731edbb	281	"modem_is_on_board": {
WFKnight	0:9b3d4731edbb	282	"help": "Value: Tells the build system that the modem is on-board as oppose to a plug-in shield/module.",
WFKnight	0:9b3d4731edbb	283	"value": 1,
WFKnight	0:9b3d4731edbb	284	"macro_name": "MODEM_ON_BOARD"
WFKnight	0:9b3d4731edbb	285	},
WFKnight	0:9b3d4731edbb	286	"modem_data_connection_type": {
WFKnight	0:9b3d4731edbb	287	"help": "Value: Defines how the modem is wired up to the MCU, e.g., data connection can be a UART or USB and so forth.",
WFKnight	0:9b3d4731edbb	288	"value": 1,
WFKnight	0:9b3d4731edbb	289	"macro_name": "MODEM_ON_BOARD_UART"
WFKnight	0:9b3d4731edbb	290	}
WFKnight	0:9b3d4731edbb	291	},
WFKnight	0:9b3d4731edbb	292	"macros": ["TARGET_LPC1768"],
WFKnight	0:9b3d4731edbb	293	"inherits": ["LPCTarget"],
WFKnight	0:9b3d4731edbb	294	"device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "EMAC", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "FLASH"],
WFKnight	0:9b3d4731edbb	295	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	296	"features": ["LWIP"],
WFKnight	0:9b3d4731edbb	297	"device_name": "LPC1768",
WFKnight	0:9b3d4731edbb	298	"bootloader_supported": true,
WFKnight	0:9b3d4731edbb	299	"overrides": {
WFKnight	0:9b3d4731edbb	300	"network-default-interface-type": "CELLULAR"
WFKnight	0:9b3d4731edbb	301	}
WFKnight	0:9b3d4731edbb	302	},
WFKnight	0:9b3d4731edbb	303	"XBED_LPC1768": {
WFKnight	0:9b3d4731edbb	304	"inherits": ["LPCTarget"],
WFKnight	0:9b3d4731edbb	305	"core": "Cortex-M3",
WFKnight	0:9b3d4731edbb	306	"supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
WFKnight	0:9b3d4731edbb	307	"extra_labels": ["NXP", "LPC176X", "XBED_LPC1768"],
WFKnight	0:9b3d4731edbb	308	"macros": ["TARGET_LPC1768"],
WFKnight	0:9b3d4731edbb	309	"detect_code": ["1010"],
WFKnight	0:9b3d4731edbb	310	"device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "FLASH"],
WFKnight	0:9b3d4731edbb	311	"device_name": "LPC1768"
WFKnight	0:9b3d4731edbb	312	},
WFKnight	0:9b3d4731edbb	313	"LPC810": {
WFKnight	0:9b3d4731edbb	314	"inherits": ["LPCTarget"],
WFKnight	0:9b3d4731edbb	315	"core": "Cortex-M0+",
WFKnight	0:9b3d4731edbb	316	"default_toolchain": "uARM",
WFKnight	0:9b3d4731edbb	317	"extra_labels": ["NXP", "LPC81X"],
WFKnight	0:9b3d4731edbb	318	"is_disk_virtual": true,
WFKnight	0:9b3d4731edbb	319	"supported_toolchains": ["uARM", "IAR", "GCC_ARM"],
WFKnight	0:9b3d4731edbb	320	"device_has": ["I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE"],
WFKnight	0:9b3d4731edbb	321	"default_lib": "small",
WFKnight	0:9b3d4731edbb	322	"device_name": "LPC810M021FN8"
WFKnight	0:9b3d4731edbb	323	},
WFKnight	0:9b3d4731edbb	324	"LPC812": {
WFKnight	0:9b3d4731edbb	325	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	326	"core": "Cortex-M0+",
WFKnight	0:9b3d4731edbb	327	"default_toolchain": "uARM",
WFKnight	0:9b3d4731edbb	328	"extra_labels": ["NXP", "LPC81X"],
WFKnight	0:9b3d4731edbb	329	"is_disk_virtual": true,
WFKnight	0:9b3d4731edbb	330	"supported_toolchains": ["uARM", "IAR", "GCC_ARM"],
WFKnight	0:9b3d4731edbb	331	"inherits": ["LPCTarget"],
WFKnight	0:9b3d4731edbb	332	"detect_code": ["1050"],
WFKnight	0:9b3d4731edbb	333	"device_has": ["I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE"],
WFKnight	0:9b3d4731edbb	334	"default_lib": "small",
WFKnight	0:9b3d4731edbb	335	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	336	"device_name": "LPC812M101JDH20"
WFKnight	0:9b3d4731edbb	337	},
WFKnight	0:9b3d4731edbb	338	"LPC824": {
WFKnight	0:9b3d4731edbb	339	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	340	"core": "Cortex-M0+",
WFKnight	0:9b3d4731edbb	341	"default_toolchain": "uARM",
WFKnight	0:9b3d4731edbb	342	"extra_labels": ["NXP", "LPC82X"],
WFKnight	0:9b3d4731edbb	343	"is_disk_virtual": true,
WFKnight	0:9b3d4731edbb	344	"supported_toolchains": ["uARM", "GCC_ARM", "GCC_CR", "IAR"],
WFKnight	0:9b3d4731edbb	345	"inherits": ["LPCTarget"],
WFKnight	0:9b3d4731edbb	346	"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
WFKnight	0:9b3d4731edbb	347	"default_lib": "small",
WFKnight	0:9b3d4731edbb	348	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	349	"device_name": "LPC824M201JDH20"
WFKnight	0:9b3d4731edbb	350	},
WFKnight	0:9b3d4731edbb	351	"SSCI824": {
WFKnight	0:9b3d4731edbb	352	"inherits": ["LPCTarget"],
WFKnight	0:9b3d4731edbb	353	"core": "Cortex-M0+",
WFKnight	0:9b3d4731edbb	354	"default_toolchain": "uARM",
WFKnight	0:9b3d4731edbb	355	"extra_labels": ["NXP", "LPC82X"],
WFKnight	0:9b3d4731edbb	356	"is_disk_virtual": true,
WFKnight	0:9b3d4731edbb	357	"supported_toolchains": ["uARM", "GCC_ARM"],
WFKnight	0:9b3d4731edbb	358	"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
WFKnight	0:9b3d4731edbb	359	"default_lib": "small",
WFKnight	0:9b3d4731edbb	360	"release_versions": ["2"]
WFKnight	0:9b3d4731edbb	361	},
WFKnight	0:9b3d4731edbb	362	"MCU_LPC4088": {
WFKnight	0:9b3d4731edbb	363	"inherits": ["LPCTarget"],
WFKnight	0:9b3d4731edbb	364	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	365	"extra_labels": ["NXP", "LPC408X", "NXP_EMAC"],
WFKnight	0:9b3d4731edbb	366	"is_disk_virtual": true,
WFKnight	0:9b3d4731edbb	367	"supported_toolchains": ["ARM", "GCC_CR", "GCC_ARM", "IAR"],
WFKnight	0:9b3d4731edbb	368	"post_binary_hook": {
WFKnight	0:9b3d4731edbb	369	"function": "LPC4088Code.binary_hook"
WFKnight	0:9b3d4731edbb	370	},
WFKnight	0:9b3d4731edbb	371	"device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "EMAC", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
WFKnight	0:9b3d4731edbb	372	"features": ["LWIP"],
WFKnight	0:9b3d4731edbb	373	"device_name": "LPC4088FBD144",
WFKnight	0:9b3d4731edbb	374	"overrides": {
WFKnight	0:9b3d4731edbb	375	"network-default-interface-type": "ETHERNET"
WFKnight	0:9b3d4731edbb	376	}
WFKnight	0:9b3d4731edbb	377	},
WFKnight	0:9b3d4731edbb	378	"LPC4088": {
WFKnight	0:9b3d4731edbb	379	"inherits": ["MCU_LPC4088"],
WFKnight	0:9b3d4731edbb	380	"release_versions": ["2", "5"]
WFKnight	0:9b3d4731edbb	381	},
WFKnight	0:9b3d4731edbb	382	"LPC4088_DM": {
WFKnight	0:9b3d4731edbb	383	"inherits": ["MCU_LPC4088"],
WFKnight	0:9b3d4731edbb	384	"release_versions": ["2", "5"]
WFKnight	0:9b3d4731edbb	385	},
WFKnight	0:9b3d4731edbb	386	"LPC4330_M4": {
WFKnight	0:9b3d4731edbb	387	"inherits": ["LPCTarget"],
WFKnight	0:9b3d4731edbb	388	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	389	"extra_labels": ["NXP", "LPC43XX", "LPC4330"],
WFKnight	0:9b3d4731edbb	390	"supported_toolchains": ["ARM", "GCC_CR", "IAR", "GCC_ARM"],
WFKnight	0:9b3d4731edbb	391	"device_has": ["ANALOGIN", "ANALOGOUT", "DEBUG_AWARENESS", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
WFKnight	0:9b3d4731edbb	392	"device_name": "LPC4330"
WFKnight	0:9b3d4731edbb	393	},
WFKnight	0:9b3d4731edbb	394	"LPC4330_M0": {
WFKnight	0:9b3d4731edbb	395	"inherits": ["LPCTarget"],
WFKnight	0:9b3d4731edbb	396	"core": "Cortex-M0",
WFKnight	0:9b3d4731edbb	397	"extra_labels": ["NXP", "LPC43XX", "LPC4330"],
WFKnight	0:9b3d4731edbb	398	"supported_toolchains": ["ARM", "GCC_CR", "IAR"],
WFKnight	0:9b3d4731edbb	399	"device_has": ["ANALOGIN", "ANALOGOUT", "DEBUG_AWARENESS", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"]
WFKnight	0:9b3d4731edbb	400	},
WFKnight	0:9b3d4731edbb	401	"LPC4337": {
WFKnight	0:9b3d4731edbb	402	"inherits": ["LPCTarget"],
WFKnight	0:9b3d4731edbb	403	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	404	"extra_labels": ["NXP", "LPC43XX", "LPC4337"],
WFKnight	0:9b3d4731edbb	405	"supported_toolchains": ["ARM"],
WFKnight	0:9b3d4731edbb	406	"device_has": ["ANALOGIN", "ANALOGOUT", "DEBUG_AWARENESS", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
WFKnight	0:9b3d4731edbb	407	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	408	"device_name": "LPC4337"
WFKnight	0:9b3d4731edbb	409	},
WFKnight	0:9b3d4731edbb	410	"LPC1800": {
WFKnight	0:9b3d4731edbb	411	"inherits": ["LPCTarget"],
WFKnight	0:9b3d4731edbb	412	"core": "Cortex-M3",
WFKnight	0:9b3d4731edbb	413	"extra_labels": ["NXP", "LPC43XX"],
WFKnight	0:9b3d4731edbb	414	"public": false,
WFKnight	0:9b3d4731edbb	415	"supported_toolchains": ["ARM", "GCC_CR", "IAR"]
WFKnight	0:9b3d4731edbb	416	},
WFKnight	0:9b3d4731edbb	417	"LPC11U37H_401": {
WFKnight	0:9b3d4731edbb	418	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	419	"core": "Cortex-M0",
WFKnight	0:9b3d4731edbb	420	"default_toolchain": "uARM",
WFKnight	0:9b3d4731edbb	421	"extra_labels": ["NXP", "LPC11UXX"],
WFKnight	0:9b3d4731edbb	422	"macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
WFKnight	0:9b3d4731edbb	423	"supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR"],
WFKnight	0:9b3d4731edbb	424	"inherits": ["LPCTarget"],
WFKnight	0:9b3d4731edbb	425	"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
WFKnight	0:9b3d4731edbb	426	"default_lib": "small",
WFKnight	0:9b3d4731edbb	427	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	428	"device_name": "LPC11U37HFBD64/401"
WFKnight	0:9b3d4731edbb	429	},
WFKnight	0:9b3d4731edbb	430	"ELEKTOR_COCORICO": {
WFKnight	0:9b3d4731edbb	431	"core": "Cortex-M0+",
WFKnight	0:9b3d4731edbb	432	"default_toolchain": "uARM",
WFKnight	0:9b3d4731edbb	433	"extra_labels": ["NXP", "LPC81X"],
WFKnight	0:9b3d4731edbb	434	"supported_toolchains": ["uARM", "GCC_ARM", "IAR"],
WFKnight	0:9b3d4731edbb	435	"inherits": ["LPCTarget"],
WFKnight	0:9b3d4731edbb	436	"is_disk_virtual": true,
WFKnight	0:9b3d4731edbb	437	"detect_code": ["C000"],
WFKnight	0:9b3d4731edbb	438	"default_lib": "small",
WFKnight	0:9b3d4731edbb	439	"device_name": "LPC812M101JDH16"
WFKnight	0:9b3d4731edbb	440	},
WFKnight	0:9b3d4731edbb	441	"KL05Z": {
WFKnight	0:9b3d4731edbb	442	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	443	"core": "Cortex-M0+",
WFKnight	0:9b3d4731edbb	444	"default_toolchain": "uARM",
WFKnight	0:9b3d4731edbb	445	"extra_labels": ["Freescale", "KLXX"],
WFKnight	0:9b3d4731edbb	446	"is_disk_virtual": true,
WFKnight	0:9b3d4731edbb	447	"supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
WFKnight	0:9b3d4731edbb	448	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	449	"device_has": ["USTICKER", "ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
WFKnight	0:9b3d4731edbb	450	"default_lib": "small",
WFKnight	0:9b3d4731edbb	451	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	452	"device_name": "MKL05Z32xxx4"
WFKnight	0:9b3d4731edbb	453	},
WFKnight	0:9b3d4731edbb	454	"KL25Z": {
WFKnight	0:9b3d4731edbb	455	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	456	"core": "Cortex-M0+",
WFKnight	0:9b3d4731edbb	457	"extra_labels": ["Freescale", "KLXX"],
WFKnight	0:9b3d4731edbb	458	"is_disk_virtual": true,
WFKnight	0:9b3d4731edbb	459	"supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
WFKnight	0:9b3d4731edbb	460	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	461	"detect_code": ["0200"],
WFKnight	0:9b3d4731edbb	462	"device_has": ["USTICKER", "ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
WFKnight	0:9b3d4731edbb	463	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	464	"device_name": "MKL25Z128xxx4"
WFKnight	0:9b3d4731edbb	465	},
WFKnight	0:9b3d4731edbb	466	"KL26Z": {
WFKnight	0:9b3d4731edbb	467	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	468	"core": "Cortex-M0+",
WFKnight	0:9b3d4731edbb	469	"extra_labels": ["Freescale", "KLXX"],
WFKnight	0:9b3d4731edbb	470	"is_disk_virtual": true,
WFKnight	0:9b3d4731edbb	471	"supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
WFKnight	0:9b3d4731edbb	472	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	473	"device_has": ["USTICKER", "ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
WFKnight	0:9b3d4731edbb	474	"device_name": "MKL26Z128xxx4"
WFKnight	0:9b3d4731edbb	475	},
WFKnight	0:9b3d4731edbb	476	"KL46Z": {
WFKnight	0:9b3d4731edbb	477	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	478	"core": "Cortex-M0+",
WFKnight	0:9b3d4731edbb	479	"extra_labels": ["Freescale", "KLXX", "FLASH_CMSIS_ALGO"],
WFKnight	0:9b3d4731edbb	480	"is_disk_virtual": true,
WFKnight	0:9b3d4731edbb	481	"supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
WFKnight	0:9b3d4731edbb	482	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	483	"detect_code": ["0220"],
WFKnight	0:9b3d4731edbb	484	"device_has": ["USTICKER", "ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "FLASH"],
WFKnight	0:9b3d4731edbb	485	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	486	"device_name": "MKL46Z256xxx4",
WFKnight	0:9b3d4731edbb	487	"bootloader_supported": true
WFKnight	0:9b3d4731edbb	488	},
WFKnight	0:9b3d4731edbb	489	"K20D50M": {
WFKnight	0:9b3d4731edbb	490	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	491	"core": "Cortex-M4",
WFKnight	0:9b3d4731edbb	492	"extra_labels": ["Freescale", "K20XX"],
WFKnight	0:9b3d4731edbb	493	"is_disk_virtual": true,
WFKnight	0:9b3d4731edbb	494	"supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
WFKnight	0:9b3d4731edbb	495	"detect_code": ["0230"],
WFKnight	0:9b3d4731edbb	496	"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
WFKnight	0:9b3d4731edbb	497	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	498	"device_name": "MK20DX128xxx5"
WFKnight	0:9b3d4731edbb	499	},
WFKnight	0:9b3d4731edbb	500	"TEENSY3_1": {
WFKnight	0:9b3d4731edbb	501	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	502	"core": "Cortex-M4",
WFKnight	0:9b3d4731edbb	503	"extra_labels": ["Freescale", "K20XX", "K20DX256"],
WFKnight	0:9b3d4731edbb	504	"OUTPUT_EXT": "hex",
WFKnight	0:9b3d4731edbb	505	"is_disk_virtual": true,
WFKnight	0:9b3d4731edbb	506	"supported_toolchains": ["GCC_ARM", "ARM"],
WFKnight	0:9b3d4731edbb	507	"post_binary_hook": {
WFKnight	0:9b3d4731edbb	508	"function": "TEENSY3_1Code.binary_hook",
WFKnight	0:9b3d4731edbb	509	"toolchains": ["ARM_STD", "ARM_MICRO", "GCC_ARM"]
WFKnight	0:9b3d4731edbb	510	},
WFKnight	0:9b3d4731edbb	511	"detect_code": ["0230"],
WFKnight	0:9b3d4731edbb	512	"device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
WFKnight	0:9b3d4731edbb	513	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	514	"device_name": "MK20DX256xxx7"
WFKnight	0:9b3d4731edbb	515	},
WFKnight	0:9b3d4731edbb	516	"MCU_K22F512": {
WFKnight	0:9b3d4731edbb	517	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	518	"supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
WFKnight	0:9b3d4731edbb	519	"extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "MCU_K22F", "MCU_K22F512", "FRDM", "KPSDK_MCUS", "KPSDK_CODE"],
WFKnight	0:9b3d4731edbb	520	"is_disk_virtual": true,
WFKnight	0:9b3d4731edbb	521	"public": false,
WFKnight	0:9b3d4731edbb	522	"macros": ["CPU_MK22FN512VLH12", "FSL_RTOS_MBED"],
WFKnight	0:9b3d4731edbb	523	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	524	"detect_code": ["0231"],
WFKnight	0:9b3d4731edbb	525	"device_has": ["USTICKER", "LPTICKER", "RTC", "ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
WFKnight	0:9b3d4731edbb	526	"device_name": "MK22DN512xxx5"
WFKnight	0:9b3d4731edbb	527	},
WFKnight	0:9b3d4731edbb	528	"K22F": {
WFKnight	0:9b3d4731edbb	529	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	530	"inherits": ["MCU_K22F512"],
WFKnight	0:9b3d4731edbb	531	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	532	"extra_labels_add": ["FRDM"]
WFKnight	0:9b3d4731edbb	533	},
WFKnight	0:9b3d4731edbb	534	"KL27Z": {
WFKnight	0:9b3d4731edbb	535	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	536	"core": "Cortex-M0+",
WFKnight	0:9b3d4731edbb	537	"extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "FRDM"],
WFKnight	0:9b3d4731edbb	538	"macros": ["CPU_MKL27Z64VLH4", "FSL_RTOS_MBED"],
WFKnight	0:9b3d4731edbb	539	"supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
WFKnight	0:9b3d4731edbb	540	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	541	"is_disk_virtual": true,
WFKnight	0:9b3d4731edbb	542	"default_toolchain": "ARM",
WFKnight	0:9b3d4731edbb	543	"detect_code": ["0261"],
WFKnight	0:9b3d4731edbb	544	"device_has": ["USTICKER", "LPTICKER", "RTC", "ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
WFKnight	0:9b3d4731edbb	545	"default_lib": "std",
WFKnight	0:9b3d4731edbb	546	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	547	"device_name": "MKL27Z64xxx4"
WFKnight	0:9b3d4731edbb	548	},
WFKnight	0:9b3d4731edbb	549	"KL43Z": {
WFKnight	0:9b3d4731edbb	550	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	551	"core": "Cortex-M0+",
WFKnight	0:9b3d4731edbb	552	"supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
WFKnight	0:9b3d4731edbb	553	"extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "FRDM"],
WFKnight	0:9b3d4731edbb	554	"macros": ["CPU_MKL43Z256VLH4", "FSL_RTOS_MBED"],
WFKnight	0:9b3d4731edbb	555	"is_disk_virtual": true,
WFKnight	0:9b3d4731edbb	556	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	557	"detect_code": ["0262"],
WFKnight	0:9b3d4731edbb	558	"device_has": ["USTICKER", "LPTICKER", "RTC", "ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
WFKnight	0:9b3d4731edbb	559	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	560	"device_name": "MKL43Z256xxx4"
WFKnight	0:9b3d4731edbb	561	},
WFKnight	0:9b3d4731edbb	562	"KL82Z": {
WFKnight	0:9b3d4731edbb	563	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	564	"core": "Cortex-M0+",
WFKnight	0:9b3d4731edbb	565	"supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
WFKnight	0:9b3d4731edbb	566	"extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "FRDM"],
WFKnight	0:9b3d4731edbb	567	"macros": ["CPU_MKL82Z128VLK7", "FSL_RTOS_MBED"],
WFKnight	0:9b3d4731edbb	568	"is_disk_virtual": true,
WFKnight	0:9b3d4731edbb	569	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	570	"detect_code": ["0218"],
WFKnight	0:9b3d4731edbb	571	"device_has": ["USTICKER", "LPTICKER", "RTC", "ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
WFKnight	0:9b3d4731edbb	572	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	573	"device_name": "MKL82Z128xxx7"
WFKnight	0:9b3d4731edbb	574	},
WFKnight	0:9b3d4731edbb	575	"USENSE": {
WFKnight	0:9b3d4731edbb	576	"inherits": ["KL82Z"],
WFKnight	0:9b3d4731edbb	577	"extra_labels_remove": ["FRDM"],
WFKnight	0:9b3d4731edbb	578	"supported_form_factors": []
WFKnight	0:9b3d4731edbb	579	},
WFKnight	0:9b3d4731edbb	580	"KW24D": {
WFKnight	0:9b3d4731edbb	581	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	582	"core": "Cortex-M4",
WFKnight	0:9b3d4731edbb	583	"supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
WFKnight	0:9b3d4731edbb	584	"extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "FRDM"],
WFKnight	0:9b3d4731edbb	585	"is_disk_virtual": true,
WFKnight	0:9b3d4731edbb	586	"macros": ["CPU_MKW24D512VHA5", "FSL_RTOS_MBED"],
WFKnight	0:9b3d4731edbb	587	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	588	"detect_code": ["0250"],
WFKnight	0:9b3d4731edbb	589	"device_has": ["USTICKER", "LPTICKER", "RTC", "ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG", "FLASH"],
WFKnight	0:9b3d4731edbb	590	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	591	"device_name": "MKW24D512xxx5",
WFKnight	0:9b3d4731edbb	592	"bootloader_supported": true
WFKnight	0:9b3d4731edbb	593	},
WFKnight	0:9b3d4731edbb	594	"KW41Z": {
WFKnight	0:9b3d4731edbb	595	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	596	"core": "Cortex-M0+",
WFKnight	0:9b3d4731edbb	597	"supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
WFKnight	0:9b3d4731edbb	598	"extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "FRDM"],
WFKnight	0:9b3d4731edbb	599	"is_disk_virtual": true,
WFKnight	0:9b3d4731edbb	600	"macros": ["CPU_MKW41Z512VHT4", "FSL_RTOS_MBED"],
WFKnight	0:9b3d4731edbb	601	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	602	"detect_code": ["0201"],
WFKnight	0:9b3d4731edbb	603	"device_has": ["USTICKER", "LPTICKER", "RTC", "ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "TRNG", "STDIO_MESSAGES"],
WFKnight	0:9b3d4731edbb	604	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	605	"device_name": "MKW41Z512xxx4"
WFKnight	0:9b3d4731edbb	606	},
WFKnight	0:9b3d4731edbb	607	"MCU_K24F1M": {
WFKnight	0:9b3d4731edbb	608	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	609	"supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
WFKnight	0:9b3d4731edbb	610	"extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "MCU_K24F", "KPSDK_MCUS", "KPSDK_CODE"],
WFKnight	0:9b3d4731edbb	611	"is_disk_virtual": true,
WFKnight	0:9b3d4731edbb	612	"public": false,
WFKnight	0:9b3d4731edbb	613	"macros": ["CPU_MK24FN1M0VDC12", "FSL_RTOS_MBED"],
WFKnight	0:9b3d4731edbb	614	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	615	"device_has": ["USTICKER", "LPTICKER", "RTC", "ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE", "STDIO_MESSAGES", "TRNG", "FLASH"],
WFKnight	0:9b3d4731edbb	616	"device_name": "MK24FN1M0xxx12"
WFKnight	0:9b3d4731edbb	617	},
WFKnight	0:9b3d4731edbb	618	"RO359B": {
WFKnight	0:9b3d4731edbb	619	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	620	"inherits": ["MCU_K24F1M"],
WFKnight	0:9b3d4731edbb	621	"detect_code": ["1022"],
WFKnight	0:9b3d4731edbb	622	"release_versions": ["2", "5"]
WFKnight	0:9b3d4731edbb	623	},
WFKnight	0:9b3d4731edbb	624	"K64F": {
WFKnight	0:9b3d4731edbb	625	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	626	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	627	"supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
WFKnight	0:9b3d4731edbb	628	"extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "FRDM", "KPSDK_MCUS", "KPSDK_CODE", "MCU_K64F", "Freescale_EMAC"],
WFKnight	0:9b3d4731edbb	629	"is_disk_virtual": true,
WFKnight	0:9b3d4731edbb	630	"macros": ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED"],
WFKnight	0:9b3d4731edbb	631	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	632	"detect_code": ["0240"],
WFKnight	0:9b3d4731edbb	633	"device_has": ["USTICKER", "LPTICKER", "RTC", "CRC", "ANALOGIN", "ANALOGOUT", "EMAC", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE", "STDIO_MESSAGES", "STORAGE", "TRNG", "FLASH"],
WFKnight	0:9b3d4731edbb	634	"features": ["LWIP", "STORAGE"],
WFKnight	0:9b3d4731edbb	635	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	636	"device_name": "MK64FN1M0xxx12",
WFKnight	0:9b3d4731edbb	637	"bootloader_supported": true,
WFKnight	0:9b3d4731edbb	638	"overrides": {
WFKnight	0:9b3d4731edbb	639	"network-default-interface-type": "ETHERNET"
WFKnight	0:9b3d4731edbb	640	}
WFKnight	0:9b3d4731edbb	641	},
WFKnight	0:9b3d4731edbb	642	"EV_COG_AD4050LZ": {
WFKnight	0:9b3d4731edbb	643	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	644	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	645	"supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
WFKnight	0:9b3d4731edbb	646	"macros": ["__ADUCM4050__", "EV_COG_AD4050LZ"],
WFKnight	0:9b3d4731edbb	647	"extra_labels": ["Analog_Devices", "ADUCM4X50", "ADUCM4050", "EV_COG_AD4050LZ", "FLASH_CMSIS_ALGO"],
WFKnight	0:9b3d4731edbb	648	"device_has": ["FLASH", "USTICKER", "RTC", "SERIAL", "STDIO_MESSAGES", "TRNG", "SLEEP", "INTERRUPTIN", "SPI", "I2C", "ANALOGIN"],
WFKnight	0:9b3d4731edbb	649	"device_name": "ADuCM4050",
WFKnight	0:9b3d4731edbb	650	"detect_code": ["0603"],
WFKnight	0:9b3d4731edbb	651	"release_versions": ["5"],
WFKnight	0:9b3d4731edbb	652	"bootloader_supported": true
WFKnight	0:9b3d4731edbb	653	},
WFKnight	0:9b3d4731edbb	654	"EV_COG_AD3029LZ": {
WFKnight	0:9b3d4731edbb	655	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	656	"core": "Cortex-M3",
WFKnight	0:9b3d4731edbb	657	"supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
WFKnight	0:9b3d4731edbb	658	"macros": ["__ADUCM3029__", "EV_COG_AD3029LZ"],
WFKnight	0:9b3d4731edbb	659	"extra_labels": ["Analog_Devices", "ADUCM302X", "ADUCM3029", "EV_COG_AD3029LZ", "FLASH_CMSIS_ALGO"],
WFKnight	0:9b3d4731edbb	660	"device_has": ["FLASH", "USTICKER", "RTC", "SERIAL", "STDIO_MESSAGES", "TRNG", "SLEEP", "INTERRUPTIN", "SPI", "I2C", "ANALOGIN"],
WFKnight	0:9b3d4731edbb	661	"device_name": "ADuCM3029",
WFKnight	0:9b3d4731edbb	662	"detect_code": ["0602"],
WFKnight	0:9b3d4731edbb	663	"release_versions": ["5"],
WFKnight	0:9b3d4731edbb	664	"bootloader_supported": true
WFKnight	0:9b3d4731edbb	665	},
WFKnight	0:9b3d4731edbb	666	"MTS_GAMBIT": {
WFKnight	0:9b3d4731edbb	667	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	668	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	669	"supported_toolchains": ["ARM", "GCC_ARM"],
WFKnight	0:9b3d4731edbb	670	"extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "KPSDK_MCUS", "KPSDK_CODE", "MCU_K64F"],
WFKnight	0:9b3d4731edbb	671	"is_disk_virtual": true,
WFKnight	0:9b3d4731edbb	672	"macros": ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED", "TARGET_K64F"],
WFKnight	0:9b3d4731edbb	673	"device_has": ["USTICKER", "LPTICKER", "RTC", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE", "STDIO_MESSAGES", "FLASH"],
WFKnight	0:9b3d4731edbb	674	"device_name": "MK64FN1M0xxx12"
WFKnight	0:9b3d4731edbb	675	},
WFKnight	0:9b3d4731edbb	676	"HEXIWEAR": {
WFKnight	0:9b3d4731edbb	677	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	678	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	679	"extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "MCU_K64F"],
WFKnight	0:9b3d4731edbb	680	"supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
WFKnight	0:9b3d4731edbb	681	"macros": ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED", "TARGET_K64F"],
WFKnight	0:9b3d4731edbb	682	"is_disk_virtual": true,
WFKnight	0:9b3d4731edbb	683	"default_toolchain": "ARM",
WFKnight	0:9b3d4731edbb	684	"detect_code": ["0214"],
WFKnight	0:9b3d4731edbb	685	"device_has": ["USTICKER", "LPTICKER", "RTC", "ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE", "STDIO_MESSAGES", "TRNG", "FLASH"],
WFKnight	0:9b3d4731edbb	686	"default_lib": "std",
WFKnight	0:9b3d4731edbb	687	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	688	"device_name": "MK64FN1M0xxx12",
WFKnight	0:9b3d4731edbb	689	"bootloader_supported": true
WFKnight	0:9b3d4731edbb	690	},
WFKnight	0:9b3d4731edbb	691	"K66F": {
WFKnight	0:9b3d4731edbb	692	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	693	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	694	"supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
WFKnight	0:9b3d4731edbb	695	"extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "FRDM", "Freescale_EMAC"],
WFKnight	0:9b3d4731edbb	696	"is_disk_virtual": true,
WFKnight	0:9b3d4731edbb	697	"macros": ["CPU_MK66FN2M0VMD18", "FSL_RTOS_MBED"],
WFKnight	0:9b3d4731edbb	698	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	699	"detect_code": ["0311"],
WFKnight	0:9b3d4731edbb	700	"device_has": ["USTICKER", "LPTICKER", "RTC", "ANALOGIN", "ANALOGOUT", "EMAC", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG", "FLASH"],
WFKnight	0:9b3d4731edbb	701	"features": ["LWIP"],
WFKnight	0:9b3d4731edbb	702	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	703	"device_name": "MK66FN2M0xxx18",
WFKnight	0:9b3d4731edbb	704	"bootloader_supported": true,
WFKnight	0:9b3d4731edbb	705	"overrides": {
WFKnight	0:9b3d4731edbb	706	"network-default-interface-type": "ETHERNET"
WFKnight	0:9b3d4731edbb	707	}
WFKnight	0:9b3d4731edbb	708	},
WFKnight	0:9b3d4731edbb	709	"K82F": {
WFKnight	0:9b3d4731edbb	710	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	711	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	712	"supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
WFKnight	0:9b3d4731edbb	713	"extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "FRDM"],
WFKnight	0:9b3d4731edbb	714	"is_disk_virtual": true,
WFKnight	0:9b3d4731edbb	715	"macros": ["CPU_MK82FN256VDC15", "FSL_RTOS_MBED"],
WFKnight	0:9b3d4731edbb	716	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	717	"detect_code": ["0217"],
WFKnight	0:9b3d4731edbb	718	"device_has": ["USTICKER", "LPTICKER", "RTC", "ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG", "FLASH"],
WFKnight	0:9b3d4731edbb	719	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	720	"device_name": "MK82FN256xxx15"
WFKnight	0:9b3d4731edbb	721	},
WFKnight	0:9b3d4731edbb	722	"UBRIDGE": {
WFKnight	0:9b3d4731edbb	723	"inherits": ["K82F"],
WFKnight	0:9b3d4731edbb	724	"extra_labels_remove": ["FRDM"],
WFKnight	0:9b3d4731edbb	725	"supported_form_factors": []
WFKnight	0:9b3d4731edbb	726	},
WFKnight	0:9b3d4731edbb	727	"FAMILY_STM32": {
WFKnight	0:9b3d4731edbb	728	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	729	"public": false,
WFKnight	0:9b3d4731edbb	730	"extra_labels": ["STM"],
WFKnight	0:9b3d4731edbb	731	"supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
WFKnight	0:9b3d4731edbb	732	"macros": ["TRANSACTION_QUEUE_SIZE_SPI=2", "LPTICKER_DELAY_TICKS=3"],
WFKnight	0:9b3d4731edbb	733	"config": {
WFKnight	0:9b3d4731edbb	734	"lse_available": {
WFKnight	0:9b3d4731edbb	735	"help": "Define if a Low Speed External xtal (LSE) is available on the board (0 = No, 1 = Yes). If Yes, the LSE will be used to clock the RTC, LPUART, ... otherwise the Low Speed Internal clock (LSI) will be used",
WFKnight	0:9b3d4731edbb	736	"value": "1"
WFKnight	0:9b3d4731edbb	737	},
WFKnight	0:9b3d4731edbb	738	"stdio_uart_tx": {
WFKnight	0:9b3d4731edbb	739	"help": "default TX STDIO pins is defined in PinNames.h file, but it can be overridden"
WFKnight	0:9b3d4731edbb	740	},
WFKnight	0:9b3d4731edbb	741	"stdio_uart_rx": {
WFKnight	0:9b3d4731edbb	742	"help": "default RX STDIO pins is defined in PinNames.h file, but it can be overridden"
WFKnight	0:9b3d4731edbb	743	}
WFKnight	0:9b3d4731edbb	744	},
WFKnight	0:9b3d4731edbb	745	"device_has": ["USTICKER", "LPTICKER", "RTC", "ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"]
WFKnight	0:9b3d4731edbb	746	},
WFKnight	0:9b3d4731edbb	747	"MIMXRT1050_EVK": {
WFKnight	0:9b3d4731edbb	748	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	749	"core": "Cortex-M7FD",
WFKnight	0:9b3d4731edbb	750	"supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
WFKnight	0:9b3d4731edbb	751	"extra_labels": ["NXP", "MCUXpresso_MCUS", "EVK", "MIMXRT1050", "IMX"],
WFKnight	0:9b3d4731edbb	752	"is_disk_virtual": true,
WFKnight	0:9b3d4731edbb	753	"macros": ["CPU_MIMXRT1052DVL6A", "FSL_RTOS_MBED"],
WFKnight	0:9b3d4731edbb	754	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	755	"detect_code": ["0227"],
WFKnight	0:9b3d4731edbb	756	"device_has": ["USTICKER", "LPTICKER", "ANALOGIN", "I2C", "I2CSLAVE", "ERROR_RED", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
WFKnight	0:9b3d4731edbb	757	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	758	"device_name": "MIMXRT1052"
WFKnight	0:9b3d4731edbb	759	},
WFKnight	0:9b3d4731edbb	760	"LPC54114": {
WFKnight	0:9b3d4731edbb	761	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	762	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	763	"supported_toolchains": ["ARM", "IAR", "GCC_ARM"],
WFKnight	0:9b3d4731edbb	764	"extra_labels": ["NXP", "MCUXpresso_MCUS", "LPC54114_M4", "LPCXpresso", "LPC"],
WFKnight	0:9b3d4731edbb	765	"is_disk_virtual": true,
WFKnight	0:9b3d4731edbb	766	"macros": ["CPU_LPC54114J256BD64_cm4", "FSL_RTOS_MBED"],
WFKnight	0:9b3d4731edbb	767	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	768	"detect_code": ["1054"],
WFKnight	0:9b3d4731edbb	769	"device_has": ["USTICKER", "RTC", "ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "FLASH"],
WFKnight	0:9b3d4731edbb	770	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	771	"device_name" : "LPC54114J256BD64"
WFKnight	0:9b3d4731edbb	772	},
WFKnight	0:9b3d4731edbb	773	"MCU_LPC546XX": {
WFKnight	0:9b3d4731edbb	774	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	775	"supported_toolchains": ["ARM", "IAR", "GCC_ARM"],
WFKnight	0:9b3d4731edbb	776	"extra_labels": ["NXP", "MCUXpresso_MCUS", "LPCXpresso", "LPC", "LPC546XX", "NXP_EMAC"],
WFKnight	0:9b3d4731edbb	777	"is_disk_virtual": true,
WFKnight	0:9b3d4731edbb	778	"macros": ["CPU_LPC54628J512ET180", "FSL_RTOS_MBED"],
WFKnight	0:9b3d4731edbb	779	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	780	"device_has": ["USTICKER", "RTC", "ANALOGIN", "EMAC", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "FLASH", "TRNG"],
WFKnight	0:9b3d4731edbb	781	"features": ["LWIP"],
WFKnight	0:9b3d4731edbb	782	"device_name" : "LPC54628J512ET180",
WFKnight	0:9b3d4731edbb	783	"overrides": {
WFKnight	0:9b3d4731edbb	784	"network-default-interface-type": "ETHERNET"
WFKnight	0:9b3d4731edbb	785	}
WFKnight	0:9b3d4731edbb	786	},
WFKnight	0:9b3d4731edbb	787	"LPC546XX": {
WFKnight	0:9b3d4731edbb	788	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	789	"inherits": ["MCU_LPC546XX"],
WFKnight	0:9b3d4731edbb	790	"detect_code": ["1056"],
WFKnight	0:9b3d4731edbb	791	"release_versions": ["2", "5"]
WFKnight	0:9b3d4731edbb	792	},
WFKnight	0:9b3d4731edbb	793	"FF_LPC546XX": {
WFKnight	0:9b3d4731edbb	794	"inherits": ["MCU_LPC546XX"],
WFKnight	0:9b3d4731edbb	795	"extra_labels_remove" : ["LPCXpresso"],
WFKnight	0:9b3d4731edbb	796	"detect_code": ["8081"],
WFKnight	0:9b3d4731edbb	797	"release_versions": ["2", "5"]
WFKnight	0:9b3d4731edbb	798	},
WFKnight	0:9b3d4731edbb	799	"NUCLEO_F030R8": {
WFKnight	0:9b3d4731edbb	800	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	801	"supported_form_factors": ["ARDUINO", "MORPHO"],
WFKnight	0:9b3d4731edbb	802	"core": "Cortex-M0",
WFKnight	0:9b3d4731edbb	803	"extra_labels_add": ["STM32F0", "STM32F030R8"],
WFKnight	0:9b3d4731edbb	804	"config": {
WFKnight	0:9b3d4731edbb	805	"clock_source": {
WFKnight	0:9b3d4731edbb	806	"help": "Mask value : USE_PLL_HSE_EXTC \| USE_PLL_HSE_XTAL (need HW patch) \| USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	807	"value": "USE_PLL_HSE_EXTC\|USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	808	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	809	}
WFKnight	0:9b3d4731edbb	810	},
WFKnight	0:9b3d4731edbb	811	"detect_code": ["0725"],
WFKnight	0:9b3d4731edbb	812	"macros_add": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
WFKnight	0:9b3d4731edbb	813	"device_has_add": ["CRC", "SERIAL_FC"],
WFKnight	0:9b3d4731edbb	814	"device_has_remove": ["LPTICKER"],
WFKnight	0:9b3d4731edbb	815	"default_lib": "small",
WFKnight	0:9b3d4731edbb	816	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	817	"device_name": "STM32F030R8"
WFKnight	0:9b3d4731edbb	818	},
WFKnight	0:9b3d4731edbb	819	"NUCLEO_F031K6": {
WFKnight	0:9b3d4731edbb	820	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	821	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	822	"core": "Cortex-M0",
WFKnight	0:9b3d4731edbb	823	"default_toolchain": "uARM",
WFKnight	0:9b3d4731edbb	824	"extra_labels_add": ["STM32F0", "STM32F031K6"],
WFKnight	0:9b3d4731edbb	825	"config": {
WFKnight	0:9b3d4731edbb	826	"clock_source": {
WFKnight	0:9b3d4731edbb	827	"help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) \| USE_PLL_HSE_XTAL (need HW patch) \| USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	828	"value": "USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	829	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	830	}
WFKnight	0:9b3d4731edbb	831	},
WFKnight	0:9b3d4731edbb	832	"detect_code": ["0791"],
WFKnight	0:9b3d4731edbb	833	"overrides": {"lse_available": 0},
WFKnight	0:9b3d4731edbb	834	"macros_add": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
WFKnight	0:9b3d4731edbb	835	"device_has_add": ["CRC", "SERIAL_FC"],
WFKnight	0:9b3d4731edbb	836	"device_has_remove": ["LPTICKER"],
WFKnight	0:9b3d4731edbb	837	"default_lib": "small",
WFKnight	0:9b3d4731edbb	838	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	839	"device_name": "STM32F031K6"
WFKnight	0:9b3d4731edbb	840	},
WFKnight	0:9b3d4731edbb	841	"NUCLEO_F042K6": {
WFKnight	0:9b3d4731edbb	842	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	843	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	844	"core": "Cortex-M0",
WFKnight	0:9b3d4731edbb	845	"default_toolchain": "uARM",
WFKnight	0:9b3d4731edbb	846	"extra_labels_add": ["STM32F0", "STM32F042K6"],
WFKnight	0:9b3d4731edbb	847	"config": {
WFKnight	0:9b3d4731edbb	848	"clock_source": {
WFKnight	0:9b3d4731edbb	849	"help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) \| USE_PLL_HSE_XTAL (need HW patch) \| USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	850	"value": "USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	851	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	852	}
WFKnight	0:9b3d4731edbb	853	},
WFKnight	0:9b3d4731edbb	854	"detect_code": ["0785"],
WFKnight	0:9b3d4731edbb	855	"overrides": {"lse_available": 0},
WFKnight	0:9b3d4731edbb	856	"macros_add": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
WFKnight	0:9b3d4731edbb	857	"device_has_add": ["CAN", "CRC", "SERIAL_FC"],
WFKnight	0:9b3d4731edbb	858	"device_has_remove": ["LPTICKER"],
WFKnight	0:9b3d4731edbb	859	"default_lib": "small",
WFKnight	0:9b3d4731edbb	860	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	861	"device_name": "STM32F042K6"
WFKnight	0:9b3d4731edbb	862	},
WFKnight	0:9b3d4731edbb	863	"NUCLEO_F070RB": {
WFKnight	0:9b3d4731edbb	864	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	865	"supported_form_factors": ["ARDUINO", "MORPHO"],
WFKnight	0:9b3d4731edbb	866	"core": "Cortex-M0",
WFKnight	0:9b3d4731edbb	867	"extra_labels_add": ["STM32F0", "STM32F070RB"],
WFKnight	0:9b3d4731edbb	868	"config": {
WFKnight	0:9b3d4731edbb	869	"clock_source": {
WFKnight	0:9b3d4731edbb	870	"help": "Mask value : USE_PLL_HSE_EXTC \| USE_PLL_HSE_XTAL (need HW patch) \| USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	871	"value": "USE_PLL_HSE_EXTC\|USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	872	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	873	}
WFKnight	0:9b3d4731edbb	874	},
WFKnight	0:9b3d4731edbb	875	"detect_code": ["0755"],
WFKnight	0:9b3d4731edbb	876	"macros_add": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
WFKnight	0:9b3d4731edbb	877	"device_has_add": ["CRC", "SERIAL_FC", "SERIAL_ASYNCH", "FLASH"],
WFKnight	0:9b3d4731edbb	878	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	879	"device_name": "STM32F070RB"
WFKnight	0:9b3d4731edbb	880	},
WFKnight	0:9b3d4731edbb	881	"NUCLEO_F072RB": {
WFKnight	0:9b3d4731edbb	882	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	883	"supported_form_factors": ["ARDUINO", "MORPHO"],
WFKnight	0:9b3d4731edbb	884	"core": "Cortex-M0",
WFKnight	0:9b3d4731edbb	885	"extra_labels_add": ["STM32F0", "STM32F072RB"],
WFKnight	0:9b3d4731edbb	886	"config": {
WFKnight	0:9b3d4731edbb	887	"clock_source": {
WFKnight	0:9b3d4731edbb	888	"help": "Mask value : USE_PLL_HSE_EXTC \| USE_PLL_HSE_XTAL (need HW patch) \| USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	889	"value": "USE_PLL_HSE_EXTC\|USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	890	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	891	}
WFKnight	0:9b3d4731edbb	892	},
WFKnight	0:9b3d4731edbb	893	"detect_code": ["0730"],
WFKnight	0:9b3d4731edbb	894	"macros_add": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
WFKnight	0:9b3d4731edbb	895	"device_has_add": ["ANALOGOUT", "CAN", "CRC", "SERIAL_FC", "SERIAL_ASYNCH", "FLASH"],
WFKnight	0:9b3d4731edbb	896	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	897	"device_name": "STM32F072RB"
WFKnight	0:9b3d4731edbb	898	},
WFKnight	0:9b3d4731edbb	899	"NUCLEO_F091RC": {
WFKnight	0:9b3d4731edbb	900	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	901	"supported_form_factors": ["ARDUINO", "MORPHO"],
WFKnight	0:9b3d4731edbb	902	"core": "Cortex-M0",
WFKnight	0:9b3d4731edbb	903	"extra_labels_add": ["STM32F0", "STM32F091RC"],
WFKnight	0:9b3d4731edbb	904	"config": {
WFKnight	0:9b3d4731edbb	905	"clock_source": {
WFKnight	0:9b3d4731edbb	906	"help": "Mask value : USE_PLL_HSE_EXTC \| USE_PLL_HSE_XTAL (need HW patch) \| USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	907	"value": "USE_PLL_HSE_EXTC\|USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	908	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	909	}
WFKnight	0:9b3d4731edbb	910	},
WFKnight	0:9b3d4731edbb	911	"detect_code": ["0750"],
WFKnight	0:9b3d4731edbb	912	"macros_add": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
WFKnight	0:9b3d4731edbb	913	"device_has_add": ["ANALOGOUT", "CAN", "CRC", "SERIAL_FC", "SERIAL_ASYNCH", "FLASH"],
WFKnight	0:9b3d4731edbb	914	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	915	"device_name": "STM32F091RC"
WFKnight	0:9b3d4731edbb	916	},
WFKnight	0:9b3d4731edbb	917	"NUCLEO_F103RB": {
WFKnight	0:9b3d4731edbb	918	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	919	"supported_form_factors": ["ARDUINO", "MORPHO"],
WFKnight	0:9b3d4731edbb	920	"core": "Cortex-M3",
WFKnight	0:9b3d4731edbb	921	"extra_labels_add": ["STM32F1", "STM32F103RB"],
WFKnight	0:9b3d4731edbb	922	"config": {
WFKnight	0:9b3d4731edbb	923	"clock_source": {
WFKnight	0:9b3d4731edbb	924	"help": "Mask value : USE_PLL_HSE_EXTC (SYSCLK=72 MHz) \| USE_PLL_HSE_XTAL (need HW patch) \| USE_PLL_HSI (SYSCLK=64 MHz)",
WFKnight	0:9b3d4731edbb	925	"value": "USE_PLL_HSE_EXTC\|USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	926	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	927	},
WFKnight	0:9b3d4731edbb	928	"clock_source_usb": {
WFKnight	0:9b3d4731edbb	929	"help": "In case of HSI clock source, to get 48 Mhz USB, SYSCLK has to be reduced from 64 to 48 MHz (set 0 for the max SYSCLK value)",
WFKnight	0:9b3d4731edbb	930	"value": "0",
WFKnight	0:9b3d4731edbb	931	"macro_name": "CLOCK_SOURCE_USB"
WFKnight	0:9b3d4731edbb	932	}
WFKnight	0:9b3d4731edbb	933	},
WFKnight	0:9b3d4731edbb	934	"detect_code": ["0700"],
WFKnight	0:9b3d4731edbb	935	"device_has_add": ["CAN", "SERIAL_FC", "SERIAL_ASYNCH", "FLASH"],
WFKnight	0:9b3d4731edbb	936	"device_has_remove": ["LPTICKER"],
WFKnight	0:9b3d4731edbb	937	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	938	"device_name": "STM32F103RB"
WFKnight	0:9b3d4731edbb	939	},
WFKnight	0:9b3d4731edbb	940	"NUCLEO_F207ZG": {
WFKnight	0:9b3d4731edbb	941	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	942	"supported_form_factors": ["ARDUINO", "MORPHO"],
WFKnight	0:9b3d4731edbb	943	"core": "Cortex-M3",
WFKnight	0:9b3d4731edbb	944	"extra_labels_add": ["STM32F2", "STM32F207ZG", "STM_EMAC"],
WFKnight	0:9b3d4731edbb	945	"config": {
WFKnight	0:9b3d4731edbb	946	"d11_configuration": {
WFKnight	0:9b3d4731edbb	947	"help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)",
WFKnight	0:9b3d4731edbb	948	"value": "PA_7",
WFKnight	0:9b3d4731edbb	949	"macro_name": "STM32_D11_SPI_ETHERNET_PIN"
WFKnight	0:9b3d4731edbb	950	},
WFKnight	0:9b3d4731edbb	951	"clock_source": {
WFKnight	0:9b3d4731edbb	952	"help": "Mask value : USE_PLL_HSE_EXTC \| USE_PLL_HSE_XTAL (need HW patch) \| USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	953	"value": "USE_PLL_HSE_EXTC\|USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	954	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	955	}
WFKnight	0:9b3d4731edbb	956	},
WFKnight	0:9b3d4731edbb	957	"detect_code": ["0835"],
WFKnight	0:9b3d4731edbb	958	"macros_add": ["USBHOST_OTHER"],
WFKnight	0:9b3d4731edbb	959	"device_has_add": ["ANALOGOUT", "CAN", "EMAC", "SERIAL_ASYNCH", "SERIAL_FC", "FLASH"],
WFKnight	0:9b3d4731edbb	960	"device_has_remove": ["LPTICKER"],
WFKnight	0:9b3d4731edbb	961	"features": ["LWIP"],
WFKnight	0:9b3d4731edbb	962	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	963	"device_name": "STM32F207ZG",
WFKnight	0:9b3d4731edbb	964	"overrides": {
WFKnight	0:9b3d4731edbb	965	"network-default-interface-type": "ETHERNET"
WFKnight	0:9b3d4731edbb	966	}
WFKnight	0:9b3d4731edbb	967	},
WFKnight	0:9b3d4731edbb	968	"NUCLEO_F302R8": {
WFKnight	0:9b3d4731edbb	969	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	970	"supported_form_factors": ["ARDUINO", "MORPHO"],
WFKnight	0:9b3d4731edbb	971	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	972	"extra_labels_add": ["STM32F3", "STM32F302x8", "STM32F302R8"],
WFKnight	0:9b3d4731edbb	973	"config": {
WFKnight	0:9b3d4731edbb	974	"clock_source": {
WFKnight	0:9b3d4731edbb	975	"help": "Mask value : USE_PLL_HSE_EXTC \| USE_PLL_HSE_XTAL (need HW patch) \| USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	976	"value": "USE_PLL_HSE_EXTC\|USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	977	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	978	}
WFKnight	0:9b3d4731edbb	979	},
WFKnight	0:9b3d4731edbb	980	"detect_code": ["0705"],
WFKnight	0:9b3d4731edbb	981	"device_has_add": ["ANALOGOUT", "CAN", "CRC", "SERIAL_ASYNCH", "SERIAL_FC"],
WFKnight	0:9b3d4731edbb	982	"default_lib": "small",
WFKnight	0:9b3d4731edbb	983	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	984	"device_name": "STM32F302R8"
WFKnight	0:9b3d4731edbb	985	},
WFKnight	0:9b3d4731edbb	986	"NUCLEO_F303K8": {
WFKnight	0:9b3d4731edbb	987	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	988	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	989	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	990	"extra_labels_add": ["STM32F3", "STM32F303x8", "STM32F303K8"],
WFKnight	0:9b3d4731edbb	991	"config": {
WFKnight	0:9b3d4731edbb	992	"clock_source": {
WFKnight	0:9b3d4731edbb	993	"help": "Mask value : USE_PLL_HSE_EXTC \| USE_PLL_HSE_XTAL (need HW patch) \| USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	994	"value": "USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	995	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	996	}
WFKnight	0:9b3d4731edbb	997	},
WFKnight	0:9b3d4731edbb	998	"overrides": {"lse_available": 0},
WFKnight	0:9b3d4731edbb	999	"detect_code": ["0775"],
WFKnight	0:9b3d4731edbb	1000	"default_lib": "small",
WFKnight	0:9b3d4731edbb	1001	"device_has_add": ["ANALOGOUT", "CAN", "CRC", "SERIAL_FC"],
WFKnight	0:9b3d4731edbb	1002	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	1003	"device_name": "STM32F303K8"
WFKnight	0:9b3d4731edbb	1004	},
WFKnight	0:9b3d4731edbb	1005	"NUCLEO_F303RE": {
WFKnight	0:9b3d4731edbb	1006	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	1007	"supported_form_factors": ["ARDUINO", "MORPHO"],
WFKnight	0:9b3d4731edbb	1008	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	1009	"extra_labels_add": ["STM32F3", "STM32F303xE", "STM32F303RE"],
WFKnight	0:9b3d4731edbb	1010	"config": {
WFKnight	0:9b3d4731edbb	1011	"clock_source": {
WFKnight	0:9b3d4731edbb	1012	"help": "Mask value : USE_PLL_HSE_EXTC \| USE_PLL_HSE_XTAL (need HW patch) \| USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1013	"value": "USE_PLL_HSE_EXTC\|USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1014	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	1015	}
WFKnight	0:9b3d4731edbb	1016	},
WFKnight	0:9b3d4731edbb	1017	"detect_code": ["0745"],
WFKnight	0:9b3d4731edbb	1018	"device_has_add": ["ANALOGOUT", "CAN", "CRC", "SERIAL_ASYNCH", "SERIAL_FC", "FLASH"],
WFKnight	0:9b3d4731edbb	1019	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	1020	"device_name": "STM32F303RE"
WFKnight	0:9b3d4731edbb	1021	},
WFKnight	0:9b3d4731edbb	1022	"NUCLEO_F303ZE": {
WFKnight	0:9b3d4731edbb	1023	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	1024	"supported_form_factors": ["ARDUINO", "MORPHO"],
WFKnight	0:9b3d4731edbb	1025	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	1026	"extra_labels_add": ["STM32F3", "STM32F303xE", "STM32F303ZE"],
WFKnight	0:9b3d4731edbb	1027	"config": {
WFKnight	0:9b3d4731edbb	1028	"clock_source": {
WFKnight	0:9b3d4731edbb	1029	"help": "Mask value : USE_PLL_HSE_EXTC \| USE_PLL_HSE_XTAL (need HW patch) \| USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1030	"value": "USE_PLL_HSE_EXTC\|USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1031	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	1032	}
WFKnight	0:9b3d4731edbb	1033	},
WFKnight	0:9b3d4731edbb	1034	"detect_code": ["0747"],
WFKnight	0:9b3d4731edbb	1035	"device_has_add": ["ANALOGOUT", "CAN", "CRC", "FLASH"],
WFKnight	0:9b3d4731edbb	1036	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	1037	"device_name": "STM32F303ZE"
WFKnight	0:9b3d4731edbb	1038	},
WFKnight	0:9b3d4731edbb	1039	"NUCLEO_F334R8": {
WFKnight	0:9b3d4731edbb	1040	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	1041	"supported_form_factors": ["ARDUINO", "MORPHO"],
WFKnight	0:9b3d4731edbb	1042	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	1043	"extra_labels_add": ["STM32F3", "STM32F334x8", "STM32F334R8"],
WFKnight	0:9b3d4731edbb	1044	"config": {
WFKnight	0:9b3d4731edbb	1045	"clock_source": {
WFKnight	0:9b3d4731edbb	1046	"help": "Mask value : USE_PLL_HSE_EXTC \| USE_PLL_HSE_XTAL (need HW patch) \| USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1047	"value": "USE_PLL_HSE_EXTC\|USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1048	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	1049	}
WFKnight	0:9b3d4731edbb	1050	},
WFKnight	0:9b3d4731edbb	1051	"detect_code": ["0735"],
WFKnight	0:9b3d4731edbb	1052	"device_has_add": ["ANALOGOUT", "CAN", "CRC", "SERIAL_ASYNCH", "SERIAL_FC"],
WFKnight	0:9b3d4731edbb	1053	"default_lib": "small",
WFKnight	0:9b3d4731edbb	1054	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	1055	"device_name": "STM32F334R8"
WFKnight	0:9b3d4731edbb	1056	},
WFKnight	0:9b3d4731edbb	1057	"NUCLEO_F401RE": {
WFKnight	0:9b3d4731edbb	1058	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	1059	"supported_form_factors": ["ARDUINO", "MORPHO"],
WFKnight	0:9b3d4731edbb	1060	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	1061	"extra_labels_add": ["STM32F4", "STM32F401xE", "STM32F401RE"],
WFKnight	0:9b3d4731edbb	1062	"config": {
WFKnight	0:9b3d4731edbb	1063	"clock_source": {
WFKnight	0:9b3d4731edbb	1064	"help": "Mask value : USE_PLL_HSE_EXTC \| USE_PLL_HSE_XTAL (need HW patch) \| USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1065	"value": "USE_PLL_HSE_EXTC\|USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1066	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	1067	}
WFKnight	0:9b3d4731edbb	1068	},
WFKnight	0:9b3d4731edbb	1069	"detect_code": ["0720"],
WFKnight	0:9b3d4731edbb	1070	"macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
WFKnight	0:9b3d4731edbb	1071	"device_has_add": ["SERIAL_ASYNCH", "SERIAL_FC", "FLASH"],
WFKnight	0:9b3d4731edbb	1072	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	1073	"device_name": "STM32F401RE"
WFKnight	0:9b3d4731edbb	1074	},
WFKnight	0:9b3d4731edbb	1075	"STEVAL_3DP001V1": {
WFKnight	0:9b3d4731edbb	1076	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	1077	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	1078	"extra_labels_add": ["STM32F4", "STM32F401xE", "STM32F401VE"],
WFKnight	0:9b3d4731edbb	1079	"config": {
WFKnight	0:9b3d4731edbb	1080	"clock_source": {
WFKnight	0:9b3d4731edbb	1081	"help": "Mask value : USE_PLL_HSE_EXTC \| USE_PLL_HSE_XTAL \| USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1082	"value": "USE_PLL_HSE_XTAL\|USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1083	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	1084	}
WFKnight	0:9b3d4731edbb	1085	},
WFKnight	0:9b3d4731edbb	1086	"macros_add": ["USB_STM_HAL", "USBHOST_OTHER", "HSE_VALUE=25000000"],
WFKnight	0:9b3d4731edbb	1087	"device_has_add": ["SERIAL_ASYNCH", "SERIAL_FC", "FLASH"],
WFKnight	0:9b3d4731edbb	1088	"overrides": {"lse_available": 0},
WFKnight	0:9b3d4731edbb	1089	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	1090	"device_name": "STM32F401VE"
WFKnight	0:9b3d4731edbb	1091	},
WFKnight	0:9b3d4731edbb	1092	"NUCLEO_F410RB": {
WFKnight	0:9b3d4731edbb	1093	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	1094	"supported_form_factors": ["ARDUINO", "MORPHO"],
WFKnight	0:9b3d4731edbb	1095	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	1096	"extra_labels_add": ["STM32F4", "STM32F410RB","STM32F410xB", "STM32F410Rx"],
WFKnight	0:9b3d4731edbb	1097	"config": {
WFKnight	0:9b3d4731edbb	1098	"clock_source": {
WFKnight	0:9b3d4731edbb	1099	"help": "Mask value : USE_PLL_HSE_EXTC \| USE_PLL_HSE_XTAL (need HW patch) \| USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1100	"value": "USE_PLL_HSE_EXTC\|USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1101	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	1102	},
WFKnight	0:9b3d4731edbb	1103	"lpticker_lptim": {
WFKnight	0:9b3d4731edbb	1104	"help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
WFKnight	0:9b3d4731edbb	1105	"value": 1
WFKnight	0:9b3d4731edbb	1106	}
WFKnight	0:9b3d4731edbb	1107	},
WFKnight	0:9b3d4731edbb	1108	"detect_code": ["0744"],
WFKnight	0:9b3d4731edbb	1109	"device_has_add": ["ANALOGOUT", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
WFKnight	0:9b3d4731edbb	1110	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	1111	"device_name": "STM32F410RB"
WFKnight	0:9b3d4731edbb	1112	},
WFKnight	0:9b3d4731edbb	1113	"NUCLEO_F411RE": {
WFKnight	0:9b3d4731edbb	1114	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	1115	"supported_form_factors": ["ARDUINO", "MORPHO"],
WFKnight	0:9b3d4731edbb	1116	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	1117	"extra_labels_add": ["STM32F4", "STM32F411xE", "STM32F411RE"],
WFKnight	0:9b3d4731edbb	1118	"detect_code": ["0740"],
WFKnight	0:9b3d4731edbb	1119	"config": {
WFKnight	0:9b3d4731edbb	1120	"clock_source": {
WFKnight	0:9b3d4731edbb	1121	"help": "Mask value : USE_PLL_HSE_EXTC \| USE_PLL_HSE_XTAL (need HW patch) \| USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1122	"value": "USE_PLL_HSE_EXTC\|USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1123	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	1124	},
WFKnight	0:9b3d4731edbb	1125	"clock_source_usb": {
WFKnight	0:9b3d4731edbb	1126	"help": "As 48 Mhz clock is configured for USB, SYSCLK has to be reduced from 100 to 96 MHz (set 0 for the max SYSCLK value)",
WFKnight	0:9b3d4731edbb	1127	"value": "0",
WFKnight	0:9b3d4731edbb	1128	"macro_name": "CLOCK_SOURCE_USB"
WFKnight	0:9b3d4731edbb	1129	}
WFKnight	0:9b3d4731edbb	1130	},
WFKnight	0:9b3d4731edbb	1131	"macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
WFKnight	0:9b3d4731edbb	1132	"device_has_add": ["SERIAL_ASYNCH", "SERIAL_FC", "FLASH"],
WFKnight	0:9b3d4731edbb	1133	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	1134	"device_name": "STM32F411RE",
WFKnight	0:9b3d4731edbb	1135	"bootloader_supported": true
WFKnight	0:9b3d4731edbb	1136	},
WFKnight	0:9b3d4731edbb	1137	"NUCLEO_F412ZG": {
WFKnight	0:9b3d4731edbb	1138	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	1139	"supported_form_factors": ["ARDUINO", "MORPHO"],
WFKnight	0:9b3d4731edbb	1140	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	1141	"extra_labels_add": ["STM32F4", "STM32F412xG", "STM32F412ZG"],
WFKnight	0:9b3d4731edbb	1142	"config": {
WFKnight	0:9b3d4731edbb	1143	"clock_source": {
WFKnight	0:9b3d4731edbb	1144	"help": "Mask value : USE_PLL_HSE_EXTC \| USE_PLL_HSE_XTAL (need HW patch) \| USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1145	"value": "USE_PLL_HSE_EXTC\|USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1146	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	1147	}
WFKnight	0:9b3d4731edbb	1148	},
WFKnight	0:9b3d4731edbb	1149	"detect_code": ["0826"],
WFKnight	0:9b3d4731edbb	1150	"macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
WFKnight	0:9b3d4731edbb	1151	"device_has_add": ["CAN", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
WFKnight	0:9b3d4731edbb	1152	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	1153	"device_name": "STM32F412ZG",
WFKnight	0:9b3d4731edbb	1154	"bootloader_supported": true
WFKnight	0:9b3d4731edbb	1155	},
WFKnight	0:9b3d4731edbb	1156	"MTB_MXCHIP_EMW3166": {
WFKnight	0:9b3d4731edbb	1157	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	1158	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	1159	"extra_labels_add": ["STM32F4", "STM32F412xG", "STM32F412ZG", "WICED", "CYW43362"],
WFKnight	0:9b3d4731edbb	1160	"macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
WFKnight	0:9b3d4731edbb	1161	"device_has_add": ["CAN", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH", "EMAC"],
WFKnight	0:9b3d4731edbb	1162	"features": ["LWIP"],
WFKnight	0:9b3d4731edbb	1163	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	1164	"device_name": "STM32F412ZG",
WFKnight	0:9b3d4731edbb	1165	"bootloader_supported": true,
WFKnight	0:9b3d4731edbb	1166	"config": {
WFKnight	0:9b3d4731edbb	1167	"clock_source": {
WFKnight	0:9b3d4731edbb	1168	"help": "Mask value : USE_PLL_HSE_EXTC \| USE_PLL_HSE_XTAL (need HW patch) \| USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1169	"value": "USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1170	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	1171	}
WFKnight	0:9b3d4731edbb	1172	}
WFKnight	0:9b3d4731edbb	1173	},
WFKnight	0:9b3d4731edbb	1174	"USI_WM_BN_BM_22": {
WFKnight	0:9b3d4731edbb	1175	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	1176	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	1177	"extra_labels_add": ["STM32F4", "STM32F412xG", "STM32F412ZG"],
WFKnight	0:9b3d4731edbb	1178	"macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
WFKnight	0:9b3d4731edbb	1179	"device_has_add": ["SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
WFKnight	0:9b3d4731edbb	1180	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	1181	"device_name": "STM32F412ZG",
WFKnight	0:9b3d4731edbb	1182	"bootloader_supported": true,
WFKnight	0:9b3d4731edbb	1183	"config": {
WFKnight	0:9b3d4731edbb	1184	"clock_source": {
WFKnight	0:9b3d4731edbb	1185	"help": "Mask value : USE_PLL_HSE_EXTC \| USE_PLL_HSE_XTAL (need HW patch) \| USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1186	"value": "USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1187	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	1188	}
WFKnight	0:9b3d4731edbb	1189	}
WFKnight	0:9b3d4731edbb	1190	},
WFKnight	0:9b3d4731edbb	1191	"MTB_USI_WM_BN_BM_22": {
WFKnight	0:9b3d4731edbb	1192	"inherits": ["USI_WM_BN_BM_22"]
WFKnight	0:9b3d4731edbb	1193	},
WFKnight	0:9b3d4731edbb	1194	"MTB_ADV_WISE_1530": {
WFKnight	0:9b3d4731edbb	1195	"inherits": ["USI_WM_BN_BM_22"],
WFKnight	0:9b3d4731edbb	1196	"overrides": {
WFKnight	0:9b3d4731edbb	1197	"stdio_uart_tx": "PB_10",
WFKnight	0:9b3d4731edbb	1198	"stdio_uart_rx": "PC_11"
WFKnight	0:9b3d4731edbb	1199	}
WFKnight	0:9b3d4731edbb	1200	},
WFKnight	0:9b3d4731edbb	1201	"DISCO_F413ZH": {
WFKnight	0:9b3d4731edbb	1202	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	1203	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	1204	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	1205	"extra_labels_add": ["STM32F4", "STM32F413xx", "STM32F413ZH", "STM32F413xH"],
WFKnight	0:9b3d4731edbb	1206	"config": {
WFKnight	0:9b3d4731edbb	1207	"clock_source": {
WFKnight	0:9b3d4731edbb	1208	"help": "Mask value : USE_PLL_HSE_EXTC \| USE_PLL_HSE_XTAL (need HW patch) \| USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1209	"value": "USE_PLL_HSE_EXTC\|USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1210	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	1211	},
WFKnight	0:9b3d4731edbb	1212	"lpticker_lptim": {
WFKnight	0:9b3d4731edbb	1213	"help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
WFKnight	0:9b3d4731edbb	1214	"value": 1
WFKnight	0:9b3d4731edbb	1215	}
WFKnight	0:9b3d4731edbb	1216	},
WFKnight	0:9b3d4731edbb	1217	"detect_code": ["0743"],
WFKnight	0:9b3d4731edbb	1218	"macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
WFKnight	0:9b3d4731edbb	1219	"device_has_add": ["ANALOGOUT", "CAN", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
WFKnight	0:9b3d4731edbb	1220	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	1221	"device_name": "STM32F413ZH"
WFKnight	0:9b3d4731edbb	1222	},
WFKnight	0:9b3d4731edbb	1223	"NUCLEO_F413ZH": {
WFKnight	0:9b3d4731edbb	1224	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	1225	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	1226	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	1227	"extra_labels_add": ["STM32F4", "STM32F413xx", "STM32F413ZH", "STM32F413xH"],
WFKnight	0:9b3d4731edbb	1228	"config": {
WFKnight	0:9b3d4731edbb	1229	"clock_source": {
WFKnight	0:9b3d4731edbb	1230	"help": "Mask value : USE_PLL_HSE_EXTC \| USE_PLL_HSE_XTAL (need HW patch) \| USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1231	"value": "USE_PLL_HSE_EXTC\|USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1232	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	1233	},
WFKnight	0:9b3d4731edbb	1234	"lpticker_lptim": {
WFKnight	0:9b3d4731edbb	1235	"help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
WFKnight	0:9b3d4731edbb	1236	"value": 1
WFKnight	0:9b3d4731edbb	1237	}
WFKnight	0:9b3d4731edbb	1238	},
WFKnight	0:9b3d4731edbb	1239	"detect_code": ["0743"],
WFKnight	0:9b3d4731edbb	1240	"macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
WFKnight	0:9b3d4731edbb	1241	"device_has_add": ["ANALOGOUT", "CAN", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
WFKnight	0:9b3d4731edbb	1242	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	1243	"device_name": "STM32F413ZH"
WFKnight	0:9b3d4731edbb	1244	},
WFKnight	0:9b3d4731edbb	1245	"ELMO_F411RE": {
WFKnight	0:9b3d4731edbb	1246	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	1247	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	1248	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	1249	"default_toolchain": "uARM",
WFKnight	0:9b3d4731edbb	1250	"extra_labels_add": ["STM32F4", "STM32F411xE", "STM32F411RE"],
WFKnight	0:9b3d4731edbb	1251	"supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
WFKnight	0:9b3d4731edbb	1252	"detect_code": ["----"],
WFKnight	0:9b3d4731edbb	1253	"device_has_add": [],
WFKnight	0:9b3d4731edbb	1254	"default_lib": "small",
WFKnight	0:9b3d4731edbb	1255	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	1256	"device_name": "STM32F411RE"
WFKnight	0:9b3d4731edbb	1257	},
WFKnight	0:9b3d4731edbb	1258	"NUCLEO_F429ZI": {
WFKnight	0:9b3d4731edbb	1259	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	1260	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	1261	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	1262	"config": {
WFKnight	0:9b3d4731edbb	1263	"d11_configuration": {
WFKnight	0:9b3d4731edbb	1264	"help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)",
WFKnight	0:9b3d4731edbb	1265	"value": "PA_7",
WFKnight	0:9b3d4731edbb	1266	"macro_name": "STM32_D11_SPI_ETHERNET_PIN"
WFKnight	0:9b3d4731edbb	1267	},
WFKnight	0:9b3d4731edbb	1268	"clock_source": {
WFKnight	0:9b3d4731edbb	1269	"help": "Mask value : USE_PLL_HSE_EXTC \| USE_PLL_HSE_XTAL (need HW patch) \| USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1270	"value": "USE_PLL_HSE_EXTC\|USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1271	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	1272	},
WFKnight	0:9b3d4731edbb	1273	"clock_source_usb": {
WFKnight	0:9b3d4731edbb	1274	"help": "As 48 Mhz clock is configured for USB, SYSCLK has to be reduced from 180 to 168 MHz (set 0 for the max SYSCLK value)",
WFKnight	0:9b3d4731edbb	1275	"value": "1",
WFKnight	0:9b3d4731edbb	1276	"macro_name": "CLOCK_SOURCE_USB"
WFKnight	0:9b3d4731edbb	1277	}
WFKnight	0:9b3d4731edbb	1278	},
WFKnight	0:9b3d4731edbb	1279	"extra_labels_add": ["STM32F4", "STM32F429", "STM32F429ZI", "STM32F429xx", "STM32F429xI", "STM_EMAC"],
WFKnight	0:9b3d4731edbb	1280	"macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
WFKnight	0:9b3d4731edbb	1281	"device_has_add": ["ANALOGOUT", "CAN", "EMAC", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
WFKnight	0:9b3d4731edbb	1282	"detect_code": ["0796"],
WFKnight	0:9b3d4731edbb	1283	"features": ["LWIP"],
WFKnight	0:9b3d4731edbb	1284	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	1285	"device_name": "STM32F429ZI",
WFKnight	0:9b3d4731edbb	1286	"bootloader_supported": true,
WFKnight	0:9b3d4731edbb	1287	"overrides": {
WFKnight	0:9b3d4731edbb	1288	"network-default-interface-type": "ETHERNET"
WFKnight	0:9b3d4731edbb	1289	}
WFKnight	0:9b3d4731edbb	1290	},
WFKnight	0:9b3d4731edbb	1291	"NUCLEO_F439ZI": {
WFKnight	0:9b3d4731edbb	1292	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	1293	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	1294	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	1295	"config": {
WFKnight	0:9b3d4731edbb	1296	"d11_configuration": {
WFKnight	0:9b3d4731edbb	1297	"help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)",
WFKnight	0:9b3d4731edbb	1298	"value": "PA_7",
WFKnight	0:9b3d4731edbb	1299	"macro_name": "STM32_D11_SPI_ETHERNET_PIN"
WFKnight	0:9b3d4731edbb	1300	},
WFKnight	0:9b3d4731edbb	1301	"clock_source": {
WFKnight	0:9b3d4731edbb	1302	"help": "Mask value : USE_PLL_HSE_EXTC \| USE_PLL_HSE_XTAL (need HW patch) \| USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1303	"value": "USE_PLL_HSE_EXTC\|USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1304	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	1305	},
WFKnight	0:9b3d4731edbb	1306	"clock_source_usb": {
WFKnight	0:9b3d4731edbb	1307	"help": "As 48 Mhz clock is configured for USB, SYSCLK has to be reduced from 180 to 168 MHz (set 0 for the max SYSCLK value)",
WFKnight	0:9b3d4731edbb	1308	"value": "1",
WFKnight	0:9b3d4731edbb	1309	"macro_name": "CLOCK_SOURCE_USB"
WFKnight	0:9b3d4731edbb	1310	}
WFKnight	0:9b3d4731edbb	1311	},
WFKnight	0:9b3d4731edbb	1312	"extra_labels_add": ["STM32F4", "STM32F439", "STM32F439ZI", "STM32F439xx", "STM32F439xI", "STM_EMAC"],
WFKnight	0:9b3d4731edbb	1313	"macros_add": ["MBEDTLS_CONFIG_HW_SUPPORT", "USB_STM_HAL", "USBHOST_OTHER"],
WFKnight	0:9b3d4731edbb	1314	"device_has_add": ["ANALOGOUT", "CAN", "EMAC", "SERIAL_FC", "TRNG", "FLASH"],
WFKnight	0:9b3d4731edbb	1315	"detect_code": ["0797"],
WFKnight	0:9b3d4731edbb	1316	"features": ["LWIP"],
WFKnight	0:9b3d4731edbb	1317	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	1318	"device_name" : "STM32F439ZI",
WFKnight	0:9b3d4731edbb	1319	"bootloader_supported": true,
WFKnight	0:9b3d4731edbb	1320	"overrides": {
WFKnight	0:9b3d4731edbb	1321	"network-default-interface-type": "ETHERNET"
WFKnight	0:9b3d4731edbb	1322	}
WFKnight	0:9b3d4731edbb	1323	},
WFKnight	0:9b3d4731edbb	1324	"NUCLEO_F446RE": {
WFKnight	0:9b3d4731edbb	1325	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	1326	"supported_form_factors": ["ARDUINO", "MORPHO"],
WFKnight	0:9b3d4731edbb	1327	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	1328	"extra_labels_add": ["STM32F4", "STM32F446xE", "STM32F446RE"],
WFKnight	0:9b3d4731edbb	1329	"config": {
WFKnight	0:9b3d4731edbb	1330	"clock_source": {
WFKnight	0:9b3d4731edbb	1331	"help": "Mask value : USE_PLL_HSE_EXTC \| USE_PLL_HSE_XTAL (need HW patch) \| USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1332	"value": "USE_PLL_HSE_EXTC\|USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1333	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	1334	}
WFKnight	0:9b3d4731edbb	1335	},
WFKnight	0:9b3d4731edbb	1336	"detect_code": ["0777"],
WFKnight	0:9b3d4731edbb	1337	"macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
WFKnight	0:9b3d4731edbb	1338	"device_has_add": ["ANALOGOUT", "CAN", "SERIAL_ASYNCH", "SERIAL_FC", "FLASH"],
WFKnight	0:9b3d4731edbb	1339	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	1340	"device_name": "STM32F446RE",
WFKnight	0:9b3d4731edbb	1341	"bootloader_supported": true
WFKnight	0:9b3d4731edbb	1342	},
WFKnight	0:9b3d4731edbb	1343	"NUCLEO_F446ZE": {
WFKnight	0:9b3d4731edbb	1344	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	1345	"supported_form_factors": ["ARDUINO", "MORPHO"],
WFKnight	0:9b3d4731edbb	1346	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	1347	"extra_labels_add": ["STM32F4", "STM32F446xE", "STM32F446ZE"],
WFKnight	0:9b3d4731edbb	1348	"config": {
WFKnight	0:9b3d4731edbb	1349	"clock_source": {
WFKnight	0:9b3d4731edbb	1350	"help": "Mask value : USE_PLL_HSE_EXTC \| USE_PLL_HSE_XTAL (need HW patch) \| USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1351	"value": "USE_PLL_HSE_EXTC\|USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1352	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	1353	}
WFKnight	0:9b3d4731edbb	1354	},
WFKnight	0:9b3d4731edbb	1355	"detect_code": ["0778"],
WFKnight	0:9b3d4731edbb	1356	"macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
WFKnight	0:9b3d4731edbb	1357	"device_has_add": ["ANALOGOUT", "CAN", "SERIAL_ASYNCH", "SERIAL_FC", "FLASH"],
WFKnight	0:9b3d4731edbb	1358	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	1359	"device_name": "STM32F446ZE"
WFKnight	0:9b3d4731edbb	1360	},
WFKnight	0:9b3d4731edbb	1361	"B96B_F446VE": {
WFKnight	0:9b3d4731edbb	1362	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	1363	"supported_form_factors": ["ARDUINO", "MORPHO"],
WFKnight	0:9b3d4731edbb	1364	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	1365	"extra_labels_add": ["STM32F4", "STM32F446xE", "STM32F446VE"],
WFKnight	0:9b3d4731edbb	1366	"detect_code": ["0840"],
WFKnight	0:9b3d4731edbb	1367	"device_has_add": ["ANALOGOUT", "CAN", "SERIAL_ASYNCH", "SERIAL_FC", "FLASH"],
WFKnight	0:9b3d4731edbb	1368	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	1369	"device_name":"STM32F446VE"
WFKnight	0:9b3d4731edbb	1370	},
WFKnight	0:9b3d4731edbb	1371	"NUCLEO_F746ZG": {
WFKnight	0:9b3d4731edbb	1372	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	1373	"core": "Cortex-M7F",
WFKnight	0:9b3d4731edbb	1374	"extra_labels_add": ["STM32F7", "STM32F746", "STM32F746xG", "STM32F746ZG", "STM_EMAC"],
WFKnight	0:9b3d4731edbb	1375	"config": {
WFKnight	0:9b3d4731edbb	1376	"d11_configuration": {
WFKnight	0:9b3d4731edbb	1377	"help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)",
WFKnight	0:9b3d4731edbb	1378	"value": "PA_7",
WFKnight	0:9b3d4731edbb	1379	"macro_name": "STM32_D11_SPI_ETHERNET_PIN"
WFKnight	0:9b3d4731edbb	1380	},
WFKnight	0:9b3d4731edbb	1381	"clock_source": {
WFKnight	0:9b3d4731edbb	1382	"help": "Mask value : USE_PLL_HSE_EXTC \| USE_PLL_HSE_XTAL (need HW patch) \| USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1383	"value": "USE_PLL_HSE_EXTC\|USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1384	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	1385	},
WFKnight	0:9b3d4731edbb	1386	"lpticker_lptim": {
WFKnight	0:9b3d4731edbb	1387	"help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
WFKnight	0:9b3d4731edbb	1388	"value": 1
WFKnight	0:9b3d4731edbb	1389	}
WFKnight	0:9b3d4731edbb	1390	},
WFKnight	0:9b3d4731edbb	1391	"macros_add": ["USBHOST_OTHER"],
WFKnight	0:9b3d4731edbb	1392	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	1393	"detect_code": ["0816"],
WFKnight	0:9b3d4731edbb	1394	"device_has_add": ["LPTICKER", "ANALOGOUT", "CAN", "CRC", "EMAC", "SERIAL_ASYNCH", "TRNG", "FLASH"],
WFKnight	0:9b3d4731edbb	1395	"features": ["LWIP"],
WFKnight	0:9b3d4731edbb	1396	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	1397	"device_name": "STM32F746ZG",
WFKnight	0:9b3d4731edbb	1398	"bootloader_supported": true,
WFKnight	0:9b3d4731edbb	1399	"overrides": {
WFKnight	0:9b3d4731edbb	1400	"network-default-interface-type": "ETHERNET"
WFKnight	0:9b3d4731edbb	1401	}
WFKnight	0:9b3d4731edbb	1402	},
WFKnight	0:9b3d4731edbb	1403	"NUCLEO_F756ZG": {
WFKnight	0:9b3d4731edbb	1404	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	1405	"core": "Cortex-M7F",
WFKnight	0:9b3d4731edbb	1406	"extra_labels_add": ["STM32F7", "STM32F756", "STM32F756xG", "STM32F756ZG", "STM_EMAC"],
WFKnight	0:9b3d4731edbb	1407	"config": {
WFKnight	0:9b3d4731edbb	1408	"d11_configuration": {
WFKnight	0:9b3d4731edbb	1409	"help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)",
WFKnight	0:9b3d4731edbb	1410	"value": "PA_7",
WFKnight	0:9b3d4731edbb	1411	"macro_name": "STM32_D11_SPI_ETHERNET_PIN"
WFKnight	0:9b3d4731edbb	1412	},
WFKnight	0:9b3d4731edbb	1413	"clock_source": {
WFKnight	0:9b3d4731edbb	1414	"help": "Mask value : USE_PLL_HSE_EXTC \| USE_PLL_HSE_XTAL (need HW patch) \| USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1415	"value": "USE_PLL_HSE_EXTC\|USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1416	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	1417	},
WFKnight	0:9b3d4731edbb	1418	"lpticker_lptim": {
WFKnight	0:9b3d4731edbb	1419	"help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
WFKnight	0:9b3d4731edbb	1420	"value": 1
WFKnight	0:9b3d4731edbb	1421	}
WFKnight	0:9b3d4731edbb	1422	},
WFKnight	0:9b3d4731edbb	1423	"macros_add": ["TRANSACTION_QUEUE_SIZE_SPI=2", "USBHOST_OTHER", "MBEDTLS_CONFIG_HW_SUPPORT"],
WFKnight	0:9b3d4731edbb	1424	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	1425	"detect_code": ["0819"],
WFKnight	0:9b3d4731edbb	1426	"device_has_add": ["LPTICKER", "ANALOGOUT", "CAN", "CRC", "EMAC", "SERIAL_ASYNCH", "TRNG", "FLASH"],
WFKnight	0:9b3d4731edbb	1427	"features": ["LWIP"],
WFKnight	0:9b3d4731edbb	1428	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	1429	"device_name": "STM32F756ZG",
WFKnight	0:9b3d4731edbb	1430	"overrides": {
WFKnight	0:9b3d4731edbb	1431	"network-default-interface-type": "ETHERNET"
WFKnight	0:9b3d4731edbb	1432	}
WFKnight	0:9b3d4731edbb	1433	},
WFKnight	0:9b3d4731edbb	1434	"NUCLEO_F767ZI": {
WFKnight	0:9b3d4731edbb	1435	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	1436	"core": "Cortex-M7FD",
WFKnight	0:9b3d4731edbb	1437	"extra_labels_add": ["STM32F7", "STM32F767", "STM32F767xI", "STM32F767ZI", "STM_EMAC"],
WFKnight	0:9b3d4731edbb	1438	"config": {
WFKnight	0:9b3d4731edbb	1439	"flash_dual_bank": {
WFKnight	0:9b3d4731edbb	1440	"help": "Default board configuration is Single Bank Flash. If you enable Dual Bank with ST Link Utility, set value to 1",
WFKnight	0:9b3d4731edbb	1441	"value": "0"
WFKnight	0:9b3d4731edbb	1442	},
WFKnight	0:9b3d4731edbb	1443	"d11_configuration": {
WFKnight	0:9b3d4731edbb	1444	"help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)",
WFKnight	0:9b3d4731edbb	1445	"value": "PA_7",
WFKnight	0:9b3d4731edbb	1446	"macro_name": "STM32_D11_SPI_ETHERNET_PIN"
WFKnight	0:9b3d4731edbb	1447	},
WFKnight	0:9b3d4731edbb	1448	"clock_source": {
WFKnight	0:9b3d4731edbb	1449	"help": "Mask value : USE_PLL_HSE_EXTC \| USE_PLL_HSE_XTAL (need HW patch) \| USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1450	"value": "USE_PLL_HSE_EXTC\|USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1451	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	1452	},
WFKnight	0:9b3d4731edbb	1453	"lpticker_lptim": {
WFKnight	0:9b3d4731edbb	1454	"help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
WFKnight	0:9b3d4731edbb	1455	"value": 1
WFKnight	0:9b3d4731edbb	1456	}
WFKnight	0:9b3d4731edbb	1457	},
WFKnight	0:9b3d4731edbb	1458	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	1459	"macros_add": ["USBHOST_OTHER"],
WFKnight	0:9b3d4731edbb	1460	"detect_code": ["0818"],
WFKnight	0:9b3d4731edbb	1461	"device_has_add": ["LPTICKER", "ANALOGOUT", "CAN", "CRC", "EMAC", "SERIAL_ASYNCH", "TRNG", "FLASH"],
WFKnight	0:9b3d4731edbb	1462	"features": ["LWIP"],
WFKnight	0:9b3d4731edbb	1463	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	1464	"device_name": "STM32F767ZI",
WFKnight	0:9b3d4731edbb	1465	"bootloader_supported": true,
WFKnight	0:9b3d4731edbb	1466	"overrides": {
WFKnight	0:9b3d4731edbb	1467	"network-default-interface-type": "ETHERNET"
WFKnight	0:9b3d4731edbb	1468	}
WFKnight	0:9b3d4731edbb	1469	},
WFKnight	0:9b3d4731edbb	1470	"NUCLEO_L011K4": {
WFKnight	0:9b3d4731edbb	1471	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	1472	"core": "Cortex-M0+",
WFKnight	0:9b3d4731edbb	1473	"extra_labels_add": ["STM32L0", "STM32L011K4"],
WFKnight	0:9b3d4731edbb	1474	"supported_toolchains": ["uARM"],
WFKnight	0:9b3d4731edbb	1475	"default_toolchain": "uARM",
WFKnight	0:9b3d4731edbb	1476	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	1477	"config": {
WFKnight	0:9b3d4731edbb	1478	"clock_source": {
WFKnight	0:9b3d4731edbb	1479	"help": "Mask value : USE_PLL_HSE_EXTC \| USE_PLL_HSE_XTAL (need HW patch) \| USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1480	"value": "USE_PLL_HSE_EXTC\|USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1481	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	1482	},
WFKnight	0:9b3d4731edbb	1483	"lpticker_lptim": {
WFKnight	0:9b3d4731edbb	1484	"help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
WFKnight	0:9b3d4731edbb	1485	"value": 1
WFKnight	0:9b3d4731edbb	1486	}
WFKnight	0:9b3d4731edbb	1487	},
WFKnight	0:9b3d4731edbb	1488	"detect_code": ["0780"],
WFKnight	0:9b3d4731edbb	1489	"device_has_add": ["CRC", "SERIAL_FC", "FLASH"],
WFKnight	0:9b3d4731edbb	1490	"default_lib": "small",
WFKnight	0:9b3d4731edbb	1491	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	1492	"device_name": "STM32L011K4"
WFKnight	0:9b3d4731edbb	1493	},
WFKnight	0:9b3d4731edbb	1494	"NUCLEO_L031K6": {
WFKnight	0:9b3d4731edbb	1495	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	1496	"core": "Cortex-M0+",
WFKnight	0:9b3d4731edbb	1497	"extra_labels_add": ["STM32L0", "STM32L031K6"],
WFKnight	0:9b3d4731edbb	1498	"default_toolchain": "uARM",
WFKnight	0:9b3d4731edbb	1499	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	1500	"config": {
WFKnight	0:9b3d4731edbb	1501	"clock_source": {
WFKnight	0:9b3d4731edbb	1502	"help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) \| USE_PLL_HSE_XTAL (need HW patch) \| USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1503	"value": "USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1504	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	1505	},
WFKnight	0:9b3d4731edbb	1506	"lpticker_lptim": {
WFKnight	0:9b3d4731edbb	1507	"help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
WFKnight	0:9b3d4731edbb	1508	"value": 1
WFKnight	0:9b3d4731edbb	1509	}
WFKnight	0:9b3d4731edbb	1510	},
WFKnight	0:9b3d4731edbb	1511	"detect_code": ["0790"],
WFKnight	0:9b3d4731edbb	1512	"device_has_add": ["CRC", "SERIAL_FC", "FLASH"],
WFKnight	0:9b3d4731edbb	1513	"default_lib": "small",
WFKnight	0:9b3d4731edbb	1514	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	1515	"device_name": "STM32L031K6"
WFKnight	0:9b3d4731edbb	1516	},
WFKnight	0:9b3d4731edbb	1517	"NUCLEO_L053R8": {
WFKnight	0:9b3d4731edbb	1518	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	1519	"supported_form_factors": ["ARDUINO", "MORPHO"],
WFKnight	0:9b3d4731edbb	1520	"core": "Cortex-M0+",
WFKnight	0:9b3d4731edbb	1521	"extra_labels_add": ["STM32L0", "STM32L053x8", "STM32L053R8"],
WFKnight	0:9b3d4731edbb	1522	"config": {
WFKnight	0:9b3d4731edbb	1523	"clock_source": {
WFKnight	0:9b3d4731edbb	1524	"help": "Mask value : USE_PLL_HSE_EXTC \| USE_PLL_HSE_XTAL (need HW patch) \| USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1525	"value": "USE_PLL_HSE_EXTC\|USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1526	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	1527	},
WFKnight	0:9b3d4731edbb	1528	"lpticker_lptim": {
WFKnight	0:9b3d4731edbb	1529	"help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
WFKnight	0:9b3d4731edbb	1530	"value": 1
WFKnight	0:9b3d4731edbb	1531	}
WFKnight	0:9b3d4731edbb	1532	},
WFKnight	0:9b3d4731edbb	1533	"detect_code": ["0715"],
WFKnight	0:9b3d4731edbb	1534	"device_has_add": ["ANALOGOUT", "CRC", "SERIAL_FC", "SERIAL_ASYNCH", "FLASH"],
WFKnight	0:9b3d4731edbb	1535	"default_lib": "small",
WFKnight	0:9b3d4731edbb	1536	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	1537	"device_name": "STM32L053R8"
WFKnight	0:9b3d4731edbb	1538	},
WFKnight	0:9b3d4731edbb	1539	"NUCLEO_L073RZ": {
WFKnight	0:9b3d4731edbb	1540	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	1541	"supported_form_factors": ["ARDUINO", "MORPHO"],
WFKnight	0:9b3d4731edbb	1542	"core": "Cortex-M0+",
WFKnight	0:9b3d4731edbb	1543	"extra_labels_add": ["STM32L0", "STM32L073RZ", "STM32L073xx"],
WFKnight	0:9b3d4731edbb	1544	"config": {
WFKnight	0:9b3d4731edbb	1545	"clock_source": {
WFKnight	0:9b3d4731edbb	1546	"help": "Mask value : USE_PLL_HSE_EXTC \| USE_PLL_HSE_XTAL (need HW patch) \| USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1547	"value": "USE_PLL_HSE_EXTC\|USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1548	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	1549	},
WFKnight	0:9b3d4731edbb	1550	"lpticker_lptim": {
WFKnight	0:9b3d4731edbb	1551	"help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
WFKnight	0:9b3d4731edbb	1552	"value": 1
WFKnight	0:9b3d4731edbb	1553	}
WFKnight	0:9b3d4731edbb	1554	},
WFKnight	0:9b3d4731edbb	1555	"detect_code": ["0760"],
WFKnight	0:9b3d4731edbb	1556	"device_has_add": ["ANALOGOUT", "CRC", "SERIAL_FC", "SERIAL_ASYNCH", "TRNG", "FLASH"],
WFKnight	0:9b3d4731edbb	1557	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	1558	"device_name": "STM32L073RZ"
WFKnight	0:9b3d4731edbb	1559	},
WFKnight	0:9b3d4731edbb	1560	"NUCLEO_L152RE": {
WFKnight	0:9b3d4731edbb	1561	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	1562	"supported_form_factors": ["ARDUINO", "MORPHO"],
WFKnight	0:9b3d4731edbb	1563	"core": "Cortex-M3",
WFKnight	0:9b3d4731edbb	1564	"extra_labels_add": ["STM32L1", "STM32L152RE"],
WFKnight	0:9b3d4731edbb	1565	"config": {
WFKnight	0:9b3d4731edbb	1566	"clock_source": {
WFKnight	0:9b3d4731edbb	1567	"help": "Mask value : USE_PLL_HSE_EXTC \| USE_PLL_HSE_XTAL (need HW patch) \| USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1568	"value": "USE_PLL_HSE_EXTC\|USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1569	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	1570	}
WFKnight	0:9b3d4731edbb	1571	},
WFKnight	0:9b3d4731edbb	1572	"detect_code": ["0710"],
WFKnight	0:9b3d4731edbb	1573	"device_has_add": ["ANALOGOUT", "SERIAL_ASYNCH", "SERIAL_FC", "FLASH"],
WFKnight	0:9b3d4731edbb	1574	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	1575	"device_name": "STM32L152RE"
WFKnight	0:9b3d4731edbb	1576	},
WFKnight	0:9b3d4731edbb	1577	"NUCLEO_L432KC": {
WFKnight	0:9b3d4731edbb	1578	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	1579	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	1580	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	1581	"extra_labels_add": ["STM32L4", "STM32L432xC", "STM32L432KC"],
WFKnight	0:9b3d4731edbb	1582	"config": {
WFKnight	0:9b3d4731edbb	1583	"clock_source": {
WFKnight	0:9b3d4731edbb	1584	"help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) \| USE_PLL_HSE_XTAL (need HW patch) \| USE_PLL_HSI \| USE_PLL_MSI",
WFKnight	0:9b3d4731edbb	1585	"value": "USE_PLL_MSI",
WFKnight	0:9b3d4731edbb	1586	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	1587	},
WFKnight	0:9b3d4731edbb	1588	"lpticker_lptim": {
WFKnight	0:9b3d4731edbb	1589	"help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
WFKnight	0:9b3d4731edbb	1590	"value": 1
WFKnight	0:9b3d4731edbb	1591	}
WFKnight	0:9b3d4731edbb	1592	},
WFKnight	0:9b3d4731edbb	1593	"detect_code": ["0770"],
WFKnight	0:9b3d4731edbb	1594	"device_has_add": ["ANALOGOUT", "CRC", "SERIAL_FC", "SERIAL_ASYNCH", "CAN", "TRNG", "FLASH"],
WFKnight	0:9b3d4731edbb	1595	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	1596	"device_name": "STM32L432KC",
WFKnight	0:9b3d4731edbb	1597	"bootloader_supported": true
WFKnight	0:9b3d4731edbb	1598	},
WFKnight	0:9b3d4731edbb	1599	"NUCLEO_L433RC_P": {
WFKnight	0:9b3d4731edbb	1600	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	1601	"supported_form_factors": ["ARDUINO", "MORPHO"],
WFKnight	0:9b3d4731edbb	1602	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	1603	"extra_labels_add": ["STM32L4", "STM32L433xC", "STM32L433RC"],
WFKnight	0:9b3d4731edbb	1604	"config": {
WFKnight	0:9b3d4731edbb	1605	"clock_source": {
WFKnight	0:9b3d4731edbb	1606	"help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) \| USE_PLL_HSE_XTAL (need HW patch) \| USE_PLL_HSI \| USE_PLL_MSI",
WFKnight	0:9b3d4731edbb	1607	"value": "USE_PLL_MSI",
WFKnight	0:9b3d4731edbb	1608	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	1609	},
WFKnight	0:9b3d4731edbb	1610	"lpticker_lptim": {
WFKnight	0:9b3d4731edbb	1611	"help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
WFKnight	0:9b3d4731edbb	1612	"value": 1
WFKnight	0:9b3d4731edbb	1613	}
WFKnight	0:9b3d4731edbb	1614	},
WFKnight	0:9b3d4731edbb	1615	"detect_code": ["0779"],
WFKnight	0:9b3d4731edbb	1616	"device_has_add": ["ANALOGOUT", "CRC", "SERIAL_FC", "SERIAL_ASYNCH", "CAN", "TRNG", "FLASH"],
WFKnight	0:9b3d4731edbb	1617	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	1618	"device_name": "STM32L433RC",
WFKnight	0:9b3d4731edbb	1619	"bootloader_supported": true
WFKnight	0:9b3d4731edbb	1620	},
WFKnight	0:9b3d4731edbb	1621	"MTB_ADV_WISE_1510": {
WFKnight	0:9b3d4731edbb	1622	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	1623	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	1624	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	1625	"extra_labels_add": ["STM32L4", "STM32L443xC", "STM32L443RC"],
WFKnight	0:9b3d4731edbb	1626	"config": {
WFKnight	0:9b3d4731edbb	1627	"clock_source": {
WFKnight	0:9b3d4731edbb	1628	"help": "Mask value : USE_PLL_HSI \| USE_PLL_MSI",
WFKnight	0:9b3d4731edbb	1629	"value": "USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1630	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	1631	}
WFKnight	0:9b3d4731edbb	1632	},
WFKnight	0:9b3d4731edbb	1633	"overrides": {"lse_available": 0},
WFKnight	0:9b3d4731edbb	1634	"release_versions": ["5"],
WFKnight	0:9b3d4731edbb	1635	"device_has_add": ["ANALOGOUT", "CRC", "SERIAL_FC", "SERIAL_ASYNCH", "CAN", "TRNG", "FLASH"],
WFKnight	0:9b3d4731edbb	1636	"device_has_remove": ["LPTICKER"],
WFKnight	0:9b3d4731edbb	1637	"macros_add": ["MBEDTLS_CONFIG_HW_SUPPORT"],
WFKnight	0:9b3d4731edbb	1638	"device_name" : "STM32L443RC",
WFKnight	0:9b3d4731edbb	1639	"detect_code": ["0458"],
WFKnight	0:9b3d4731edbb	1640	"bootloader_supported": true
WFKnight	0:9b3d4731edbb	1641	},
WFKnight	0:9b3d4731edbb	1642	"NUCLEO_L476RG": {
WFKnight	0:9b3d4731edbb	1643	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	1644	"supported_form_factors": ["ARDUINO", "MORPHO"],
WFKnight	0:9b3d4731edbb	1645	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	1646	"extra_labels_add": ["STM32L4", "STM32L476RG", "STM32L476xG"],
WFKnight	0:9b3d4731edbb	1647	"config": {
WFKnight	0:9b3d4731edbb	1648	"clock_source": {
WFKnight	0:9b3d4731edbb	1649	"help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) \| USE_PLL_HSE_XTAL (need HW patch) \| USE_PLL_HSI \| USE_PLL_MSI",
WFKnight	0:9b3d4731edbb	1650	"value": "USE_PLL_MSI",
WFKnight	0:9b3d4731edbb	1651	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	1652	},
WFKnight	0:9b3d4731edbb	1653	"lpticker_lptim": {
WFKnight	0:9b3d4731edbb	1654	"help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
WFKnight	0:9b3d4731edbb	1655	"value": 1
WFKnight	0:9b3d4731edbb	1656	}
WFKnight	0:9b3d4731edbb	1657	},
WFKnight	0:9b3d4731edbb	1658	"detect_code": ["0765"],
WFKnight	0:9b3d4731edbb	1659	"macros_add": ["USBHOST_OTHER", "TWO_RAM_REGIONS"],
WFKnight	0:9b3d4731edbb	1660	"device_has_add": ["ANALOGOUT", "CAN", "CRC", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
WFKnight	0:9b3d4731edbb	1661	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	1662	"device_name": "STM32L476RG",
WFKnight	0:9b3d4731edbb	1663	"bootloader_supported": true
WFKnight	0:9b3d4731edbb	1664	},
WFKnight	0:9b3d4731edbb	1665	"SILICA_SENSOR_NODE": {
WFKnight	0:9b3d4731edbb	1666	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	1667	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	1668	"default_toolchain": "GCC_ARM",
WFKnight	0:9b3d4731edbb	1669	"extra_labels_add": ["STM32L4", "STM32L476xG", "STM32L476JG"],
WFKnight	0:9b3d4731edbb	1670	"config": {
WFKnight	0:9b3d4731edbb	1671	"clock_source": {
WFKnight	0:9b3d4731edbb	1672	"help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) \| USE_PLL_HSE_XTAL (need HW patch) \| USE_PLL_HSI \| USE_PLL_MSI",
WFKnight	0:9b3d4731edbb	1673	"value": "USE_PLL_MSI",
WFKnight	0:9b3d4731edbb	1674	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	1675	}
WFKnight	0:9b3d4731edbb	1676	},
WFKnight	0:9b3d4731edbb	1677	"detect_code": ["0766"],
WFKnight	0:9b3d4731edbb	1678	"macros_add": ["USBHOST_OTHER", "TWO_RAM_REGIONS"],
WFKnight	0:9b3d4731edbb	1679	"device_has_add": ["ANALOGOUT", "CAN", "CRC", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
WFKnight	0:9b3d4731edbb	1680	"release_versions": ["5"],
WFKnight	0:9b3d4731edbb	1681	"device_name": "STM32L476JG"
WFKnight	0:9b3d4731edbb	1682	},
WFKnight	0:9b3d4731edbb	1683	"NUCLEO_L486RG": {
WFKnight	0:9b3d4731edbb	1684	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	1685	"supported_form_factors": ["ARDUINO", "MORPHO"],
WFKnight	0:9b3d4731edbb	1686	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	1687	"extra_labels_add": ["STM32L4", "STM32L486RG", "STM32L486xG"],
WFKnight	0:9b3d4731edbb	1688	"config": {
WFKnight	0:9b3d4731edbb	1689	"clock_source": {
WFKnight	0:9b3d4731edbb	1690	"help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) \| USE_PLL_HSE_XTAL (need HW patch) \| USE_PLL_HSI \| USE_PLL_MSI",
WFKnight	0:9b3d4731edbb	1691	"value": "USE_PLL_MSI",
WFKnight	0:9b3d4731edbb	1692	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	1693	},
WFKnight	0:9b3d4731edbb	1694	"lpticker_lptim": {
WFKnight	0:9b3d4731edbb	1695	"help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
WFKnight	0:9b3d4731edbb	1696	"value": 1
WFKnight	0:9b3d4731edbb	1697	}
WFKnight	0:9b3d4731edbb	1698	},
WFKnight	0:9b3d4731edbb	1699	"detect_code": ["0827"],
WFKnight	0:9b3d4731edbb	1700	"macros_add": ["USBHOST_OTHER", "MBEDTLS_CONFIG_HW_SUPPORT", "TWO_RAM_REGIONS"],
WFKnight	0:9b3d4731edbb	1701	"device_has_add": ["ANALOGOUT", "CAN", "CRC", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
WFKnight	0:9b3d4731edbb	1702	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	1703	"device_name": "STM32L486RG"
WFKnight	0:9b3d4731edbb	1704	},
WFKnight	0:9b3d4731edbb	1705	"MTB_ADV_WISE_1570": {
WFKnight	0:9b3d4731edbb	1706	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	1707	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	1708	"extra_labels_add": ["STM32L4", "STM32L486RG", "STM32L486xG", "WISE_1570"],
WFKnight	0:9b3d4731edbb	1709	"config": {
WFKnight	0:9b3d4731edbb	1710	"clock_source": {
WFKnight	0:9b3d4731edbb	1711	"help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) \| USE_PLL_HSE_XTAL (need HW patch) \| USE_PLL_HSI \| USE_PLL_MSI",
WFKnight	0:9b3d4731edbb	1712	"value": "USE_PLL_HSE_XTAL",
WFKnight	0:9b3d4731edbb	1713	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	1714	}
WFKnight	0:9b3d4731edbb	1715	},
WFKnight	0:9b3d4731edbb	1716	"detect_code": ["0460"],
WFKnight	0:9b3d4731edbb	1717	"macros_add": ["MBEDTLS_CONFIG_HW_SUPPORT", "WISE_1570", "TWO_RAM_REGIONS"],
WFKnight	0:9b3d4731edbb	1718	"device_has_add": ["ANALOGOUT", "CRC", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
WFKnight	0:9b3d4731edbb	1719	"device_has_remove": ["LPTICKER"],
WFKnight	0:9b3d4731edbb	1720	"release_versions": ["5"],
WFKnight	0:9b3d4731edbb	1721	"device_name": "STM32L486RG",
WFKnight	0:9b3d4731edbb	1722	"bootloader_supported": true,
WFKnight	0:9b3d4731edbb	1723	"OUTPUT_EXT": "hex"
WFKnight	0:9b3d4731edbb	1724	},
WFKnight	0:9b3d4731edbb	1725	"ARCH_MAX": {
WFKnight	0:9b3d4731edbb	1726	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	1727	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	1728	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	1729	"supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
WFKnight	0:9b3d4731edbb	1730	"program_cycle_s": 2,
WFKnight	0:9b3d4731edbb	1731	"extra_labels_add": ["STM32F4", "STM32F407", "STM32F407xG", "STM32F407VG"],
WFKnight	0:9b3d4731edbb	1732	"device_has_add": ["ANALOGOUT"],
WFKnight	0:9b3d4731edbb	1733	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	1734	"device_name": "STM32F407VG"
WFKnight	0:9b3d4731edbb	1735	},
WFKnight	0:9b3d4731edbb	1736	"WIO_3G": {
WFKnight	0:9b3d4731edbb	1737	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	1738	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	1739	"config": {
WFKnight	0:9b3d4731edbb	1740	"clock_source": {
WFKnight	0:9b3d4731edbb	1741	"help": "Mask value : USE_PLL_HSE_EXTC \| USE_PLL_HSE_XTAL \| USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1742	"value": "USE_PLL_HSE_XTAL\|USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1743	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	1744	},
WFKnight	0:9b3d4731edbb	1745	"clock_source_usb": {
WFKnight	0:9b3d4731edbb	1746	"help": "As 48 Mhz clock is configured for USB, SYSCLK has to be reduced from 180 to 168 MHz (set 0 for the max SYSCLK value)",
WFKnight	0:9b3d4731edbb	1747	"value": "1",
WFKnight	0:9b3d4731edbb	1748	"macro_name": "CLOCK_SOURCE_USB"
WFKnight	0:9b3d4731edbb	1749	},
WFKnight	0:9b3d4731edbb	1750	"modem_is_on_board": {
WFKnight	0:9b3d4731edbb	1751	"help": "Value: Tells the build system that the modem is on-board as oppose to a plug-in shield/module.",
WFKnight	0:9b3d4731edbb	1752	"value": 1,
WFKnight	0:9b3d4731edbb	1753	"macro_name": "MODEM_ON_BOARD"
WFKnight	0:9b3d4731edbb	1754	},
WFKnight	0:9b3d4731edbb	1755	"modem_data_connection_type": {
WFKnight	0:9b3d4731edbb	1756	"help": "Value: Defines how the modem is wired up to the MCU, e.g., data connection can be a UART or USB and so forth.",
WFKnight	0:9b3d4731edbb	1757	"value": 1,
WFKnight	0:9b3d4731edbb	1758	"macro_name": "MODEM_ON_BOARD_UART"
WFKnight	0:9b3d4731edbb	1759	}
WFKnight	0:9b3d4731edbb	1760	},
WFKnight	0:9b3d4731edbb	1761	"extra_labels_add": ["STM32F4", "STM32F439", "STM32F439VI", "STM32F439xx", "STM32F439xI"],
WFKnight	0:9b3d4731edbb	1762	"macros_add": ["MBEDTLS_CONFIG_HW_SUPPORT", "USB_STM_HAL", "USBHOST_OTHER"],
WFKnight	0:9b3d4731edbb	1763	"device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_FC", "TRNG", "FLASH"],
WFKnight	0:9b3d4731edbb	1764	"detect_code": ["9014"],
WFKnight	0:9b3d4731edbb	1765	"features": ["LWIP"],
WFKnight	0:9b3d4731edbb	1766	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	1767	"device_name" : "STM32F439VI",
WFKnight	0:9b3d4731edbb	1768	"bootloader_supported": true
WFKnight	0:9b3d4731edbb	1769	},
WFKnight	0:9b3d4731edbb	1770	"DISCO_F051R8": {
WFKnight	0:9b3d4731edbb	1771	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	1772	"core": "Cortex-M0",
WFKnight	0:9b3d4731edbb	1773	"extra_labels_add": ["STM32F0", "STM32F051", "STM32F051R8"],
WFKnight	0:9b3d4731edbb	1774	"supported_toolchains": ["GCC_ARM"],
WFKnight	0:9b3d4731edbb	1775	"config": {
WFKnight	0:9b3d4731edbb	1776	"clock_source": {
WFKnight	0:9b3d4731edbb	1777	"help": "Mask value : USE_PLL_HSE_EXTC \| USE_PLL_HSE_XTAL (need HW patch) \| USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1778	"value": "USE_PLL_HSE_EXTC\|USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1779	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	1780	}
WFKnight	0:9b3d4731edbb	1781	},
WFKnight	0:9b3d4731edbb	1782	"macros_add": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
WFKnight	0:9b3d4731edbb	1783	"device_has_add": ["CRC", "SERIAL_FC"],
WFKnight	0:9b3d4731edbb	1784	"device_has_remove": ["LPTICKER"],
WFKnight	0:9b3d4731edbb	1785	"device_name": "STM32F051R8"
WFKnight	0:9b3d4731edbb	1786	},
WFKnight	0:9b3d4731edbb	1787	"DISCO_F100RB": {
WFKnight	0:9b3d4731edbb	1788	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	1789	"core": "Cortex-M3",
WFKnight	0:9b3d4731edbb	1790	"extra_labels_add": ["STM32F1", "STM32F100RB"],
WFKnight	0:9b3d4731edbb	1791	"supported_toolchains": ["GCC_ARM"],
WFKnight	0:9b3d4731edbb	1792	"device_has_add": [],
WFKnight	0:9b3d4731edbb	1793	"device_has_remove": ["LPTICKER"],
WFKnight	0:9b3d4731edbb	1794	"device_name": "STM32F100RB"
WFKnight	0:9b3d4731edbb	1795	},
WFKnight	0:9b3d4731edbb	1796	"DISCO_F303VC": {
WFKnight	0:9b3d4731edbb	1797	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	1798	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	1799	"extra_labels_add": ["STM32F3", "STM32F303", "STM32F303xC", "STM32F303VC"],
WFKnight	0:9b3d4731edbb	1800	"overrides": {"lse_available": 0},
WFKnight	0:9b3d4731edbb	1801	"config": {
WFKnight	0:9b3d4731edbb	1802	"clock_source": {
WFKnight	0:9b3d4731edbb	1803	"help": "Mask value : USE_PLL_HSE_EXTC \| USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1804	"value": "USE_PLL_HSE_EXTC\|USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1805	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	1806	}
WFKnight	0:9b3d4731edbb	1807	},
WFKnight	0:9b3d4731edbb	1808	"supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
WFKnight	0:9b3d4731edbb	1809	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	1810	"device_has_add": ["ANALOGOUT", "CAN", "CRC", "SERIAL_FC"],
WFKnight	0:9b3d4731edbb	1811	"device_name": "STM32F303VC"
WFKnight	0:9b3d4731edbb	1812	},
WFKnight	0:9b3d4731edbb	1813	"DISCO_F334C8": {
WFKnight	0:9b3d4731edbb	1814	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	1815	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	1816	"extra_labels_add": ["STM32F3", "STM32F334x8","STM32F334C8"],
WFKnight	0:9b3d4731edbb	1817	"config": {
WFKnight	0:9b3d4731edbb	1818	"clock_source": {
WFKnight	0:9b3d4731edbb	1819	"help": "Mask value : USE_PLL_HSE_EXTC \| USE_PLL_HSE_XTAL (need HW patch) \| USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1820	"value": "USE_PLL_HSE_EXTC\|USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1821	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	1822	}
WFKnight	0:9b3d4731edbb	1823	},
WFKnight	0:9b3d4731edbb	1824	"overrides": {"lse_available": 0},
WFKnight	0:9b3d4731edbb	1825	"detect_code": ["0810"],
WFKnight	0:9b3d4731edbb	1826	"device_has_add": ["ANALOGOUT", "CRC", "SERIAL_ASYNCH", "SERIAL_FC"],
WFKnight	0:9b3d4731edbb	1827	"default_lib": "small",
WFKnight	0:9b3d4731edbb	1828	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	1829	"device_name": "STM32F334C8"
WFKnight	0:9b3d4731edbb	1830	},
WFKnight	0:9b3d4731edbb	1831	"DISCO_F407VG": {
WFKnight	0:9b3d4731edbb	1832	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	1833	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	1834	"extra_labels_add": ["STM32F4", "STM32F407", "STM32F407xG", "STM32F407VG"],
WFKnight	0:9b3d4731edbb	1835	"supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
WFKnight	0:9b3d4731edbb	1836	"config": {
WFKnight	0:9b3d4731edbb	1837	"clock_source": {
WFKnight	0:9b3d4731edbb	1838	"help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) \| USE_PLL_HSE_XTAL \| USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1839	"value": "USE_PLL_HSE_XTAL\|USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1840	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	1841	}
WFKnight	0:9b3d4731edbb	1842	},
WFKnight	0:9b3d4731edbb	1843	"macros_add": ["USB_STM_HAL"],
WFKnight	0:9b3d4731edbb	1844	"overrides": {"lse_available": 0},
WFKnight	0:9b3d4731edbb	1845	"device_has_add": ["ANALOGOUT"],
WFKnight	0:9b3d4731edbb	1846	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	1847	"device_name": "STM32F407VG"
WFKnight	0:9b3d4731edbb	1848	},
WFKnight	0:9b3d4731edbb	1849	"DISCO_F429ZI": {
WFKnight	0:9b3d4731edbb	1850	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	1851	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	1852	"extra_labels_add": ["STM32F4", "STM32F429", "STM32F429ZI", "STM32F429xI", "STM32F429xx"],
WFKnight	0:9b3d4731edbb	1853	"config": {
WFKnight	0:9b3d4731edbb	1854	"clock_source": {
WFKnight	0:9b3d4731edbb	1855	"help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) \| USE_PLL_HSE_XTAL \| USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1856	"value": "USE_PLL_HSE_XTAL\|USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1857	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	1858	},
WFKnight	0:9b3d4731edbb	1859	"clock_source_usb": {
WFKnight	0:9b3d4731edbb	1860	"help": "As 48 Mhz clock is configured for USB, SYSCLK has to be reduced from 180 to 168 MHz (set 0 for the max SYSCLK value)",
WFKnight	0:9b3d4731edbb	1861	"value": "1",
WFKnight	0:9b3d4731edbb	1862	"macro_name": "CLOCK_SOURCE_USB"
WFKnight	0:9b3d4731edbb	1863	}
WFKnight	0:9b3d4731edbb	1864	},
WFKnight	0:9b3d4731edbb	1865	"overrides": {"lse_available": 0},
WFKnight	0:9b3d4731edbb	1866	"macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
WFKnight	0:9b3d4731edbb	1867	"device_has_add": ["ANALOGOUT", "CAN", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
WFKnight	0:9b3d4731edbb	1868	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	1869	"device_name": "STM32F429ZI",
WFKnight	0:9b3d4731edbb	1870	"bootloader_supported": true
WFKnight	0:9b3d4731edbb	1871	},
WFKnight	0:9b3d4731edbb	1872	"DISCO_F469NI": {
WFKnight	0:9b3d4731edbb	1873	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	1874	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	1875	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	1876	"extra_labels_add": ["STM32F4", "STM32F469", "STM32F469NI", "STM32F469xI", "STM32F469xx"],
WFKnight	0:9b3d4731edbb	1877	"config": {
WFKnight	0:9b3d4731edbb	1878	"clock_source": {
WFKnight	0:9b3d4731edbb	1879	"help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) \| USE_PLL_HSE_XTAL \| USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1880	"value": "USE_PLL_HSE_XTAL\|USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1881	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	1882	}
WFKnight	0:9b3d4731edbb	1883	},
WFKnight	0:9b3d4731edbb	1884	"detect_code": ["0788"],
WFKnight	0:9b3d4731edbb	1885	"macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
WFKnight	0:9b3d4731edbb	1886	"device_has_add": ["ANALOGOUT", "CAN", "SERIAL_FC", "TRNG", "FLASH"],
WFKnight	0:9b3d4731edbb	1887	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	1888	"device_name": "STM32F469NI"
WFKnight	0:9b3d4731edbb	1889	},
WFKnight	0:9b3d4731edbb	1890	"DISCO_L053C8": {
WFKnight	0:9b3d4731edbb	1891	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	1892	"core": "Cortex-M0+",
WFKnight	0:9b3d4731edbb	1893	"extra_labels_add": ["STM32L0", "STM32L053x8", "STM32L053C8"],
WFKnight	0:9b3d4731edbb	1894	"config": {
WFKnight	0:9b3d4731edbb	1895	"clock_source": {
WFKnight	0:9b3d4731edbb	1896	"help": "Mask value : USE_PLL_HSE_EXTC \| USE_PLL_HSE_XTAL (need HW patch) \| USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1897	"value": "USE_PLL_HSE_EXTC\|USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1898	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	1899	},
WFKnight	0:9b3d4731edbb	1900	"lpticker_lptim": {
WFKnight	0:9b3d4731edbb	1901	"help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
WFKnight	0:9b3d4731edbb	1902	"value": 1
WFKnight	0:9b3d4731edbb	1903
WFKnight	0:9b3d4731edbb	1904	}
WFKnight	0:9b3d4731edbb	1905	},
WFKnight	0:9b3d4731edbb	1906	"overrides": {"lse_available": 0},
WFKnight	0:9b3d4731edbb	1907	"device_has_add": ["ANALOGOUT", "CRC", "SERIAL_FC", "FLASH"],
WFKnight	0:9b3d4731edbb	1908	"default_lib": "small",
WFKnight	0:9b3d4731edbb	1909	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	1910	"device_name": "STM32L053C8"
WFKnight	0:9b3d4731edbb	1911	},
WFKnight	0:9b3d4731edbb	1912	"DISCO_L072CZ_LRWAN1": {
WFKnight	0:9b3d4731edbb	1913	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	1914	"core": "Cortex-M0+",
WFKnight	0:9b3d4731edbb	1915	"extra_labels_add": ["STM32L0", "STM32L072CZ", "STM32L072xZ", "STM32L072xx"],
WFKnight	0:9b3d4731edbb	1916	"supported_form_factors": ["ARDUINO", "MORPHO"],
WFKnight	0:9b3d4731edbb	1917	"config": {
WFKnight	0:9b3d4731edbb	1918	"clock_source": {
WFKnight	0:9b3d4731edbb	1919	"help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) \| USE_PLL_HSE_XTAL (need HW patch) \| USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1920	"value": "USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1921	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	1922	},
WFKnight	0:9b3d4731edbb	1923	"lpticker_lptim": {
WFKnight	0:9b3d4731edbb	1924	"help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
WFKnight	0:9b3d4731edbb	1925	"value": 1
WFKnight	0:9b3d4731edbb	1926	}
WFKnight	0:9b3d4731edbb	1927	},
WFKnight	0:9b3d4731edbb	1928	"detect_code": ["0833"],
WFKnight	0:9b3d4731edbb	1929	"device_has_add": ["ANALOGOUT", "SERIAL_FC", "SERIAL_ASYNCH", "TRNG", "FLASH"],
WFKnight	0:9b3d4731edbb	1930	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	1931	"device_name": "STM32L072CZ"
WFKnight	0:9b3d4731edbb	1932	},
WFKnight	0:9b3d4731edbb	1933	"MTB_MURATA_ABZ": {
WFKnight	0:9b3d4731edbb	1934	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	1935	"core": "Cortex-M0+",
WFKnight	0:9b3d4731edbb	1936	"extra_labels_add": ["STM32L0", "STM32L0x2xZ", "STM32L082CZ", "STM32L082xx"],
WFKnight	0:9b3d4731edbb	1937	"detect_code": ["0456"],
WFKnight	0:9b3d4731edbb	1938	"device_has_add": ["ANALOGOUT", "SERIAL_FC", "SERIAL_ASYNCH", "TRNG", "FLASH"],
WFKnight	0:9b3d4731edbb	1939	"device_has_remove": ["LPTICKER"],
WFKnight	0:9b3d4731edbb	1940	"release_versions": ["5"],
WFKnight	0:9b3d4731edbb	1941	"device_name": "STM32L082CZ"
WFKnight	0:9b3d4731edbb	1942	},
WFKnight	0:9b3d4731edbb	1943	"DISCO_F746NG": {
WFKnight	0:9b3d4731edbb	1944	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	1945	"core": "Cortex-M7F",
WFKnight	0:9b3d4731edbb	1946	"extra_labels_add": ["STM32F7", "STM32F746", "STM32F746xG", "STM32F746NG", "STM_EMAC"],
WFKnight	0:9b3d4731edbb	1947	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	1948	"config": {
WFKnight	0:9b3d4731edbb	1949	"clock_source": {
WFKnight	0:9b3d4731edbb	1950	"help": "Mask value : USE_PLL_HSE_EXTC \| USE_PLL_HSE_XTAL \| USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1951	"value": "USE_PLL_HSE_XTAL\|USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1952	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	1953	},
WFKnight	0:9b3d4731edbb	1954	"usb_speed": {
WFKnight	0:9b3d4731edbb	1955	"help": "Select the USB speed/connector (0=FullSpeed, 1=HighSpeed)",
WFKnight	0:9b3d4731edbb	1956	"value": "1"
WFKnight	0:9b3d4731edbb	1957	},
WFKnight	0:9b3d4731edbb	1958	"lpticker_lptim": {
WFKnight	0:9b3d4731edbb	1959	"help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
WFKnight	0:9b3d4731edbb	1960	"value": 1
WFKnight	0:9b3d4731edbb	1961	}
WFKnight	0:9b3d4731edbb	1962	},
WFKnight	0:9b3d4731edbb	1963	"detect_code": ["0815"],
WFKnight	0:9b3d4731edbb	1964	"macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
WFKnight	0:9b3d4731edbb	1965	"device_has_add": ["LPTICKER", "ANALOGOUT", "CAN", "EMAC", "SERIAL_ASYNCH", "TRNG", "FLASH"],
WFKnight	0:9b3d4731edbb	1966	"features": ["LWIP"],
WFKnight	0:9b3d4731edbb	1967	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	1968	"device_name": "STM32F746NG",
WFKnight	0:9b3d4731edbb	1969	"overrides": {
WFKnight	0:9b3d4731edbb	1970	"network-default-interface-type": "ETHERNET"
WFKnight	0:9b3d4731edbb	1971	}
WFKnight	0:9b3d4731edbb	1972	},
WFKnight	0:9b3d4731edbb	1973	"DISCO_F769NI": {
WFKnight	0:9b3d4731edbb	1974	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	1975	"core": "Cortex-M7FD",
WFKnight	0:9b3d4731edbb	1976	"extra_labels_add": ["STM32F7", "STM32F769", "STM32F769xI", "STM32F769NI", "STM_EMAC"],
WFKnight	0:9b3d4731edbb	1977	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	1978	"config": {
WFKnight	0:9b3d4731edbb	1979	"flash_dual_bank": {
WFKnight	0:9b3d4731edbb	1980	"help": "Default board configuration is Single Bank Flash. If you enable Dual Bank with ST Link Utility, set value to 1",
WFKnight	0:9b3d4731edbb	1981	"value": "0"
WFKnight	0:9b3d4731edbb	1982	},
WFKnight	0:9b3d4731edbb	1983	"clock_source": {
WFKnight	0:9b3d4731edbb	1984	"help": "Mask value : USE_PLL_HSE_EXTC \| USE_PLL_HSE_XTAL \| USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1985	"value": "USE_PLL_HSE_EXTC\|USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	1986	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	1987	},
WFKnight	0:9b3d4731edbb	1988	"lpticker_lptim": {
WFKnight	0:9b3d4731edbb	1989	"help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
WFKnight	0:9b3d4731edbb	1990	"value": 1
WFKnight	0:9b3d4731edbb	1991	}
WFKnight	0:9b3d4731edbb	1992	},
WFKnight	0:9b3d4731edbb	1993	"detect_code": ["0817"],
WFKnight	0:9b3d4731edbb	1994	"macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
WFKnight	0:9b3d4731edbb	1995	"device_has_add": ["LPTICKER", "ANALOGOUT", "CAN", "EMAC", "SERIAL_ASYNCH", "TRNG", "FLASH"],
WFKnight	0:9b3d4731edbb	1996	"features": ["LWIP"],
WFKnight	0:9b3d4731edbb	1997	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	1998	"device_name": "STM32F769NI",
WFKnight	0:9b3d4731edbb	1999	"overrides": {
WFKnight	0:9b3d4731edbb	2000	"network-default-interface-type": "ETHERNET"
WFKnight	0:9b3d4731edbb	2001	}
WFKnight	0:9b3d4731edbb	2002	},
WFKnight	0:9b3d4731edbb	2003	"DISCO_L475VG_IOT01A": {
WFKnight	0:9b3d4731edbb	2004	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	2005	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	2006	"extra_labels_add": ["STM32L4", "STM32L475xG", "STM32L475VG"],
WFKnight	0:9b3d4731edbb	2007	"config": {
WFKnight	0:9b3d4731edbb	2008	"clock_source": {
WFKnight	0:9b3d4731edbb	2009	"help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) \| USE_PLL_HSE_XTAL (need HW patch) \| USE_PLL_HSI \| USE_PLL_MSI",
WFKnight	0:9b3d4731edbb	2010	"value": "USE_PLL_MSI",
WFKnight	0:9b3d4731edbb	2011	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	2012	},
WFKnight	0:9b3d4731edbb	2013	"lpticker_lptim": {
WFKnight	0:9b3d4731edbb	2014	"help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
WFKnight	0:9b3d4731edbb	2015	"value": 1
WFKnight	0:9b3d4731edbb	2016	}
WFKnight	0:9b3d4731edbb	2017	},
WFKnight	0:9b3d4731edbb	2018	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	2019	"detect_code": ["0764"],
WFKnight	0:9b3d4731edbb	2020	"macros_add": ["USBHOST_OTHER"],
WFKnight	0:9b3d4731edbb	2021	"device_has_add": ["ANALOGOUT", "CAN", "SERIAL_FC", "TRNG", "FLASH"],
WFKnight	0:9b3d4731edbb	2022	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	2023	"device_name": "STM32L475VG",
WFKnight	0:9b3d4731edbb	2024	"bootloader_supported": true
WFKnight	0:9b3d4731edbb	2025	},
WFKnight	0:9b3d4731edbb	2026	"DISCO_L476VG": {
WFKnight	0:9b3d4731edbb	2027	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	2028	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	2029	"extra_labels_add": ["STM32L4", "STM32L476xG", "STM32L476VG"],
WFKnight	0:9b3d4731edbb	2030	"config": {
WFKnight	0:9b3d4731edbb	2031	"clock_source": {
WFKnight	0:9b3d4731edbb	2032	"help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) \| USE_PLL_HSE_XTAL (need HW patch) \| USE_PLL_HSI \| USE_PLL_MSI",
WFKnight	0:9b3d4731edbb	2033	"value": "USE_PLL_MSI",
WFKnight	0:9b3d4731edbb	2034	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	2035	},
WFKnight	0:9b3d4731edbb	2036	"lpticker_lptim": {
WFKnight	0:9b3d4731edbb	2037	"help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
WFKnight	0:9b3d4731edbb	2038	"value": 1
WFKnight	0:9b3d4731edbb	2039	}
WFKnight	0:9b3d4731edbb	2040	},
WFKnight	0:9b3d4731edbb	2041	"detect_code": ["0820"],
WFKnight	0:9b3d4731edbb	2042	"macros_add": ["USBHOST_OTHER"],
WFKnight	0:9b3d4731edbb	2043	"device_has_add": ["ANALOGOUT", "CAN", "SERIAL_FC", "TRNG", "FLASH"],
WFKnight	0:9b3d4731edbb	2044	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	2045	"device_name": "STM32L476VG",
WFKnight	0:9b3d4731edbb	2046	"bootloader_supported": true
WFKnight	0:9b3d4731edbb	2047	},
WFKnight	0:9b3d4731edbb	2048	"MTS_MDOT_F405RG": {
WFKnight	0:9b3d4731edbb	2049	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	2050	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	2051	"extra_labels_add": ["STM32F4", "STM32F405RG"],
WFKnight	0:9b3d4731edbb	2052	"is_disk_virtual": true,
WFKnight	0:9b3d4731edbb	2053	"macros_add": ["HSE_VALUE=26000000"],
WFKnight	0:9b3d4731edbb	2054	"device_has_add": ["ANALOGOUT"],
WFKnight	0:9b3d4731edbb	2055	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	2056	"device_name": "STM32F405RG"
WFKnight	0:9b3d4731edbb	2057	},
WFKnight	0:9b3d4731edbb	2058	"MTS_MDOT_F411RE": {
WFKnight	0:9b3d4731edbb	2059	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	2060	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	2061	"extra_labels_add": ["STM32F4", "STM32F411RE"],
WFKnight	0:9b3d4731edbb	2062	"macros_add": ["HSE_VALUE=26000000", "USE_PLL_HSE_EXTC=0", "VECT_TAB_OFFSET=0x00010000"],
WFKnight	0:9b3d4731edbb	2063	"post_binary_hook": {
WFKnight	0:9b3d4731edbb	2064	"function": "MTSCode.combine_bins_mts_dot",
WFKnight	0:9b3d4731edbb	2065	"toolchains": ["GCC_ARM", "ARM_STD", "ARM_MICRO", "IAR"]
WFKnight	0:9b3d4731edbb	2066	},
WFKnight	0:9b3d4731edbb	2067	"device_has_add": [],
WFKnight	0:9b3d4731edbb	2068	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	2069	"device_name": "STM32F411RE"
WFKnight	0:9b3d4731edbb	2070	},
WFKnight	0:9b3d4731edbb	2071	"MTS_DRAGONFLY_F411RE": {
WFKnight	0:9b3d4731edbb	2072	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	2073	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	2074	"extra_labels_add": ["STM32F4", "STM32F411RE"],
WFKnight	0:9b3d4731edbb	2075	"config": {
WFKnight	0:9b3d4731edbb	2076	"modem_is_on_board": {
WFKnight	0:9b3d4731edbb	2077	"help": "Value: Tells the build system that the modem is on-board as oppose to a plug-in shield/module.",
WFKnight	0:9b3d4731edbb	2078	"value": 1,
WFKnight	0:9b3d4731edbb	2079	"macro_name": "MODEM_ON_BOARD"
WFKnight	0:9b3d4731edbb	2080	},
WFKnight	0:9b3d4731edbb	2081	"modem_data_connection_type": {
WFKnight	0:9b3d4731edbb	2082	"help": "Value: Defines how an on-board modem is wired up to the MCU, e.g., data connection can be a UART or USB and so forth.",
WFKnight	0:9b3d4731edbb	2083	"value": 1,
WFKnight	0:9b3d4731edbb	2084	"macro_name": "MODEM_ON_BOARD_UART"
WFKnight	0:9b3d4731edbb	2085	}
WFKnight	0:9b3d4731edbb	2086	},
WFKnight	0:9b3d4731edbb	2087	"overrides": {"lse_available": 0},
WFKnight	0:9b3d4731edbb	2088	"macros_add": ["HSE_VALUE=26000000", "VECT_TAB_OFFSET=0x08010000"],
WFKnight	0:9b3d4731edbb	2089	"post_binary_hook": {
WFKnight	0:9b3d4731edbb	2090	"function": "MTSCode.combine_bins_mts_dragonfly",
WFKnight	0:9b3d4731edbb	2091	"toolchains": ["GCC_ARM", "ARM_STD", "ARM_MICRO", "IAR"]
WFKnight	0:9b3d4731edbb	2092	},
WFKnight	0:9b3d4731edbb	2093	"device_has_add": [],
WFKnight	0:9b3d4731edbb	2094	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	2095	"device_name": "STM32F411RE"
WFKnight	0:9b3d4731edbb	2096	},
WFKnight	0:9b3d4731edbb	2097	"MTB_MTS_DRAGONFLY": {
WFKnight	0:9b3d4731edbb	2098	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	2099	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	2100	"extra_labels_add": ["STM32F4", "STM32F411RE"],
WFKnight	0:9b3d4731edbb	2101	"config": {
WFKnight	0:9b3d4731edbb	2102	"modem_is_on_board": {
WFKnight	0:9b3d4731edbb	2103	"help": "Value: Tells the build system that the modem is on-board as oppose to a plug-in shield/module.",
WFKnight	0:9b3d4731edbb	2104	"value": 1,
WFKnight	0:9b3d4731edbb	2105	"macro_name": "MODEM_ON_BOARD"
WFKnight	0:9b3d4731edbb	2106	},
WFKnight	0:9b3d4731edbb	2107	"modem_data_connection_type": {
WFKnight	0:9b3d4731edbb	2108	"help": "Value: Defines how an on-board modem is wired up to the MCU, e.g., data connection can be a UART or USB and so forth.",
WFKnight	0:9b3d4731edbb	2109	"value": 1,
WFKnight	0:9b3d4731edbb	2110	"macro_name": "MODEM_ON_BOARD_UART"
WFKnight	0:9b3d4731edbb	2111	}
WFKnight	0:9b3d4731edbb	2112	},
WFKnight	0:9b3d4731edbb	2113	"overrides": {
WFKnight	0:9b3d4731edbb	2114	"lse_available": 0
WFKnight	0:9b3d4731edbb	2115	},
WFKnight	0:9b3d4731edbb	2116	"macros_add": ["HSE_VALUE=26000000", "VECT_TAB_OFFSET=0x08010000"],
WFKnight	0:9b3d4731edbb	2117	"post_binary_hook": {
WFKnight	0:9b3d4731edbb	2118	"function": "MTSCode.combine_bins_mtb_mts_dragonfly",
WFKnight	0:9b3d4731edbb	2119	"toolchains": ["GCC_ARM", "ARM_STD", "ARM_MICRO", "IAR"]
WFKnight	0:9b3d4731edbb	2120	},
WFKnight	0:9b3d4731edbb	2121	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	2122	"device_name": "STM32F411RE",
WFKnight	0:9b3d4731edbb	2123	"bootloader_supported": true
WFKnight	0:9b3d4731edbb	2124	},
WFKnight	0:9b3d4731edbb	2125	"XDOT_L151CC": {
WFKnight	0:9b3d4731edbb	2126	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	2127	"core": "Cortex-M3",
WFKnight	0:9b3d4731edbb	2128	"default_toolchain": "ARM",
WFKnight	0:9b3d4731edbb	2129	"extra_labels_add": ["STM32L1", "STM32L151CC"],
WFKnight	0:9b3d4731edbb	2130	"config": {
WFKnight	0:9b3d4731edbb	2131	"hse_value": {
WFKnight	0:9b3d4731edbb	2132	"value": "24000000",
WFKnight	0:9b3d4731edbb	2133	"macro_name": "HSE_VALUE"
WFKnight	0:9b3d4731edbb	2134	}
WFKnight	0:9b3d4731edbb	2135	},
WFKnight	0:9b3d4731edbb	2136	"supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
WFKnight	0:9b3d4731edbb	2137	"device_has_add": ["ANALOGOUT", "FLASH"],
WFKnight	0:9b3d4731edbb	2138	"release_versions": ["5"],
WFKnight	0:9b3d4731edbb	2139	"device_name": "STM32L151CC",
WFKnight	0:9b3d4731edbb	2140	"bootloader_supported": true
WFKnight	0:9b3d4731edbb	2141	},
WFKnight	0:9b3d4731edbb	2142	"FF1705_L151CC": {
WFKnight	0:9b3d4731edbb	2143	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	2144	"inherits": ["XDOT_L151CC"],
WFKnight	0:9b3d4731edbb	2145	"detect_code": ["8080"]
WFKnight	0:9b3d4731edbb	2146	},
WFKnight	0:9b3d4731edbb	2147	"MTB_MTS_XDOT": {
WFKnight	0:9b3d4731edbb	2148	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	2149	"core": "Cortex-M3",
WFKnight	0:9b3d4731edbb	2150	"default_toolchain": "ARM",
WFKnight	0:9b3d4731edbb	2151	"extra_labels_add": ["STM32L1", "STM32L151CC"],
WFKnight	0:9b3d4731edbb	2152	"config": {
WFKnight	0:9b3d4731edbb	2153	"hse_value": {
WFKnight	0:9b3d4731edbb	2154	"value": "24000000",
WFKnight	0:9b3d4731edbb	2155	"macro_name": "HSE_VALUE"
WFKnight	0:9b3d4731edbb	2156	}
WFKnight	0:9b3d4731edbb	2157	},
WFKnight	0:9b3d4731edbb	2158	"overrides": {
WFKnight	0:9b3d4731edbb	2159	"stdio_uart_tx": "PA_2",
WFKnight	0:9b3d4731edbb	2160	"stdio_uart_rx": "PA_3"
WFKnight	0:9b3d4731edbb	2161	},
WFKnight	0:9b3d4731edbb	2162	"supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
WFKnight	0:9b3d4731edbb	2163	"device_has_add": ["ANALOGOUT", "FLASH"],
WFKnight	0:9b3d4731edbb	2164	"release_versions": ["5"],
WFKnight	0:9b3d4731edbb	2165	"device_name": "STM32L151CC",
WFKnight	0:9b3d4731edbb	2166	"bootloader_supported": true
WFKnight	0:9b3d4731edbb	2167	},
WFKnight	0:9b3d4731edbb	2168	"MTB_RAK811": {
WFKnight	0:9b3d4731edbb	2169	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	2170	"core": "Cortex-M3",
WFKnight	0:9b3d4731edbb	2171	"default_toolchain": "ARM",
WFKnight	0:9b3d4731edbb	2172	"extra_labels_add": ["STM32L1", "STM32L151xBA", "STM32L151CBA"],
WFKnight	0:9b3d4731edbb	2173	"supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
WFKnight	0:9b3d4731edbb	2174	"device_has_add": ["ANALOGOUT"],
WFKnight	0:9b3d4731edbb	2175	"release_versions": ["5"],
WFKnight	0:9b3d4731edbb	2176	"device_name": "STM32L151CBxxA",
WFKnight	0:9b3d4731edbb	2177	"bootloader_supported": true
WFKnight	0:9b3d4731edbb	2178	},
WFKnight	0:9b3d4731edbb	2179	"MOTE_L152RC": {
WFKnight	0:9b3d4731edbb	2180	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	2181	"core": "Cortex-M3",
WFKnight	0:9b3d4731edbb	2182	"default_toolchain": "uARM",
WFKnight	0:9b3d4731edbb	2183	"extra_labels_add": ["STM32L1", "STM32L152RC"],
WFKnight	0:9b3d4731edbb	2184	"overrides": {"lse_available": 0},
WFKnight	0:9b3d4731edbb	2185	"detect_code": ["4100"],
WFKnight	0:9b3d4731edbb	2186	"device_has_add": ["ANALOGOUT"],
WFKnight	0:9b3d4731edbb	2187	"default_lib": "small",
WFKnight	0:9b3d4731edbb	2188	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	2189	"device_name": "STM32L152RC"
WFKnight	0:9b3d4731edbb	2190	},
WFKnight	0:9b3d4731edbb	2191	"DISCO_F401VC": {
WFKnight	0:9b3d4731edbb	2192	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	2193	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	2194	"default_toolchain": "GCC_ARM",
WFKnight	0:9b3d4731edbb	2195	"extra_labels_add": ["STM32F4", "STM32F401", "STM32F401xC", "STM32F401VC"],
WFKnight	0:9b3d4731edbb	2196	"supported_toolchains": ["GCC_ARM"],
WFKnight	0:9b3d4731edbb	2197	"device_has_add": [],
WFKnight	0:9b3d4731edbb	2198	"device_name": "STM32F401VC"
WFKnight	0:9b3d4731edbb	2199	},
WFKnight	0:9b3d4731edbb	2200	"MODULE_UBLOX_ODIN_W2": {
WFKnight	0:9b3d4731edbb	2201	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	2202	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	2203	"extra_labels_add": ["STM32F4", "STM32F439", "STM32F439ZI","STM32F439xx", "STM32F439xI", "STM_EMAC"],
WFKnight	0:9b3d4731edbb	2204	"macros": ["MBEDTLS_CONFIG_HW_SUPPORT", "HSE_VALUE=24000000", "HSE_STARTUP_TIMEOUT=5000", "CB_INTERFACE_SDIO","CB_CHIP_WL18XX","SUPPORT_80211D_ALWAYS","WLAN_ENABLED","CB_FEATURE_802DOT11W","CB_FEATURE_802DOT11R","MBEDTLS_ARC4_C","MBEDTLS_DES_C","MBEDTLS_MD4_C","MBEDTLS_MD5_C","MBEDTLS_SHA1_C"],
WFKnight	0:9b3d4731edbb	2205	"device_has_add": ["CAN", "EMAC", "TRNG", "FLASH", "WIFI"],
WFKnight	0:9b3d4731edbb	2206	"device_has_remove": [],
WFKnight	0:9b3d4731edbb	2207	"features": ["LWIP"],
WFKnight	0:9b3d4731edbb	2208	"device_name": "STM32F439ZI",
WFKnight	0:9b3d4731edbb	2209	"public": false,
WFKnight	0:9b3d4731edbb	2210	"bootloader_supported": true,
WFKnight	0:9b3d4731edbb	2211	"overrides": {
WFKnight	0:9b3d4731edbb	2212	"network-default-interface-type": "WIFI"
WFKnight	0:9b3d4731edbb	2213	}
WFKnight	0:9b3d4731edbb	2214	},
WFKnight	0:9b3d4731edbb	2215	"UBLOX_EVK_ODIN_W2": {
WFKnight	0:9b3d4731edbb	2216	"inherits": ["MODULE_UBLOX_ODIN_W2"],
WFKnight	0:9b3d4731edbb	2217	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	2218	"release_versions": ["5"],
WFKnight	0:9b3d4731edbb	2219	"device_has_remove": [],
WFKnight	0:9b3d4731edbb	2220	"config": {
WFKnight	0:9b3d4731edbb	2221	"stdio_uart_tx_help": {
WFKnight	0:9b3d4731edbb	2222	"help": "Value: D8(default) or D1"
WFKnight	0:9b3d4731edbb	2223	},
WFKnight	0:9b3d4731edbb	2224	"stdio_uart_rx_help": {
WFKnight	0:9b3d4731edbb	2225	"help": "Value: D2(default) or D0"
WFKnight	0:9b3d4731edbb	2226	}
WFKnight	0:9b3d4731edbb	2227	},
WFKnight	0:9b3d4731edbb	2228	"overrides": {
WFKnight	0:9b3d4731edbb	2229	"stdio_uart_tx": "D8",
WFKnight	0:9b3d4731edbb	2230	"stdio_uart_rx": "D2"
WFKnight	0:9b3d4731edbb	2231	}
WFKnight	0:9b3d4731edbb	2232	},
WFKnight	0:9b3d4731edbb	2233	"MBED_CONNECT_ODIN": {
WFKnight	0:9b3d4731edbb	2234	"inherits": ["MODULE_UBLOX_ODIN_W2"],
WFKnight	0:9b3d4731edbb	2235	"release_versions": ["5"],
WFKnight	0:9b3d4731edbb	2236	"config": {
WFKnight	0:9b3d4731edbb	2237	"stdio_uart_tx_help": {
WFKnight	0:9b3d4731edbb	2238	"help": "Value: PA_9(default) or PD_8"
WFKnight	0:9b3d4731edbb	2239	},
WFKnight	0:9b3d4731edbb	2240	"stdio_uart_rx_help": {
WFKnight	0:9b3d4731edbb	2241	"help": "Value: PA_10(default) or PD_9"
WFKnight	0:9b3d4731edbb	2242	}
WFKnight	0:9b3d4731edbb	2243	},
WFKnight	0:9b3d4731edbb	2244	"overrides": {
WFKnight	0:9b3d4731edbb	2245	"stdio_uart_tx": "PA_9",
WFKnight	0:9b3d4731edbb	2246	"stdio_uart_rx": "PA_10"
WFKnight	0:9b3d4731edbb	2247	}
WFKnight	0:9b3d4731edbb	2248	},
WFKnight	0:9b3d4731edbb	2249	"MTB_UBLOX_ODIN_W2": {
WFKnight	0:9b3d4731edbb	2250	"inherits": ["MODULE_UBLOX_ODIN_W2"],
WFKnight	0:9b3d4731edbb	2251	"device_has_add": [],
WFKnight	0:9b3d4731edbb	2252	"release_versions": ["5"]
WFKnight	0:9b3d4731edbb	2253	},
WFKnight	0:9b3d4731edbb	2254	"UBLOX_C030": {
WFKnight	0:9b3d4731edbb	2255	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	2256	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	2257	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	2258	"supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
WFKnight	0:9b3d4731edbb	2259	"extra_labels_add": ["STM32F4", "STM32F437", "STM32F437VG", "STM32F437xx", "STM32F437xG", "STM_EMAC"],
WFKnight	0:9b3d4731edbb	2260	"config": {
WFKnight	0:9b3d4731edbb	2261	"modem_is_on_board": {
WFKnight	0:9b3d4731edbb	2262	"help": "Value: Tells the build system that the modem is on-board as oppose to a plug-in shield/module.",
WFKnight	0:9b3d4731edbb	2263	"value": 1,
WFKnight	0:9b3d4731edbb	2264	"macro_name": "MODEM_ON_BOARD"
WFKnight	0:9b3d4731edbb	2265	},
WFKnight	0:9b3d4731edbb	2266	"modem_data_connection_type": {
WFKnight	0:9b3d4731edbb	2267	"help": "Value: Defines how the modem is wired up to the MCU, e.g., data connection can be a UART or USB and so forth.",
WFKnight	0:9b3d4731edbb	2268	"value": 1,
WFKnight	0:9b3d4731edbb	2269	"macro_name": "MODEM_ON_BOARD_UART"
WFKnight	0:9b3d4731edbb	2270	}
WFKnight	0:9b3d4731edbb	2271	},
WFKnight	0:9b3d4731edbb	2272	"macros_add": ["MBEDTLS_CONFIG_HW_SUPPORT", "HSE_VALUE=12000000", "GNSSBAUD=9600"],
WFKnight	0:9b3d4731edbb	2273	"overrides": {"lse_available": 0},
WFKnight	0:9b3d4731edbb	2274	"device_has_add": ["ANALOGOUT", "EMAC", "SERIAL_FC", "TRNG", "FLASH"],
WFKnight	0:9b3d4731edbb	2275	"features": ["LWIP"],
WFKnight	0:9b3d4731edbb	2276	"public": false,
WFKnight	0:9b3d4731edbb	2277	"device_name": "STM32F437VG",
WFKnight	0:9b3d4731edbb	2278	"bootloader_supported": true,
WFKnight	0:9b3d4731edbb	2279	"overrides": {
WFKnight	0:9b3d4731edbb	2280	"network-default-interface-type": "ETHERNET"
WFKnight	0:9b3d4731edbb	2281	}
WFKnight	0:9b3d4731edbb	2282	},
WFKnight	0:9b3d4731edbb	2283	"UBLOX_C030_U201": {
WFKnight	0:9b3d4731edbb	2284	"inherits": ["UBLOX_C030"],
WFKnight	0:9b3d4731edbb	2285	"release_versions": ["5"]
WFKnight	0:9b3d4731edbb	2286	},
WFKnight	0:9b3d4731edbb	2287	"UBLOX_C030_N211": {
WFKnight	0:9b3d4731edbb	2288	"inherits": ["UBLOX_C030"],
WFKnight	0:9b3d4731edbb	2289	"release_versions": ["5"]
WFKnight	0:9b3d4731edbb	2290	},
WFKnight	0:9b3d4731edbb	2291	"UBLOX_C030_R410M": {
WFKnight	0:9b3d4731edbb	2292	"inherits": ["UBLOX_C030"],
WFKnight	0:9b3d4731edbb	2293	"release_versions": ["5"]
WFKnight	0:9b3d4731edbb	2294	},
WFKnight	0:9b3d4731edbb	2295	"NZ32_SC151": {
WFKnight	0:9b3d4731edbb	2296	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	2297	"core": "Cortex-M3",
WFKnight	0:9b3d4731edbb	2298	"default_toolchain": "uARM",
WFKnight	0:9b3d4731edbb	2299	"program_cycle_s": 1.5,
WFKnight	0:9b3d4731edbb	2300	"extra_labels_add": ["STM32L1", "STM32L151RC"],
WFKnight	0:9b3d4731edbb	2301	"overrides": {"lse_available": 0},
WFKnight	0:9b3d4731edbb	2302	"supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
WFKnight	0:9b3d4731edbb	2303	"device_has_add": ["ANALOGOUT"],
WFKnight	0:9b3d4731edbb	2304	"default_lib": "small",
WFKnight	0:9b3d4731edbb	2305	"device_name": "STM32L151RC"
WFKnight	0:9b3d4731edbb	2306	},
WFKnight	0:9b3d4731edbb	2307	"MCU_NRF51": {
WFKnight	0:9b3d4731edbb	2308	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	2309	"core": "Cortex-M0",
WFKnight	0:9b3d4731edbb	2310	"OVERRIDE_BOOTLOADER_FILENAME": "nrf51822_bootloader.hex",
WFKnight	0:9b3d4731edbb	2311	"macros": ["NRF51", "TARGET_NRF51822", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
WFKnight	0:9b3d4731edbb	2312	"MERGE_BOOTLOADER": false,
WFKnight	0:9b3d4731edbb	2313	"extra_labels": ["NORDIC", "MCU_NRF51", "MCU_NRF51822"],
WFKnight	0:9b3d4731edbb	2314	"OUTPUT_EXT": "hex",
WFKnight	0:9b3d4731edbb	2315	"is_disk_virtual": true,
WFKnight	0:9b3d4731edbb	2316	"supported_toolchains": ["ARM", "GCC_ARM"],
WFKnight	0:9b3d4731edbb	2317	"public": false,
WFKnight	0:9b3d4731edbb	2318	"MERGE_SOFT_DEVICE": true,
WFKnight	0:9b3d4731edbb	2319	"EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
WFKnight	0:9b3d4731edbb	2320	{
WFKnight	0:9b3d4731edbb	2321	"boot": "s130_nrf51_1.0.0_bootloader.hex",
WFKnight	0:9b3d4731edbb	2322	"name": "s130_nrf51_1.0.0_softdevice.hex",
WFKnight	0:9b3d4731edbb	2323	"offset": 114688
WFKnight	0:9b3d4731edbb	2324	},
WFKnight	0:9b3d4731edbb	2325	{
WFKnight	0:9b3d4731edbb	2326	"boot": "s110_nrf51822_8.0.0_bootloader.hex",
WFKnight	0:9b3d4731edbb	2327	"name": "s110_nrf51822_8.0.0_softdevice.hex",
WFKnight	0:9b3d4731edbb	2328	"offset": 98304
WFKnight	0:9b3d4731edbb	2329	},
WFKnight	0:9b3d4731edbb	2330	{
WFKnight	0:9b3d4731edbb	2331	"boot": "s110_nrf51822_7.1.0_bootloader.hex",
WFKnight	0:9b3d4731edbb	2332	"name": "s110_nrf51822_7.1.0_softdevice.hex",
WFKnight	0:9b3d4731edbb	2333	"offset": 90112
WFKnight	0:9b3d4731edbb	2334	},
WFKnight	0:9b3d4731edbb	2335	{
WFKnight	0:9b3d4731edbb	2336	"boot": "s110_nrf51822_7.0.0_bootloader.hex",
WFKnight	0:9b3d4731edbb	2337	"name": "s110_nrf51822_7.0.0_softdevice.hex",
WFKnight	0:9b3d4731edbb	2338	"offset": 90112
WFKnight	0:9b3d4731edbb	2339	},
WFKnight	0:9b3d4731edbb	2340	{
WFKnight	0:9b3d4731edbb	2341	"boot": "s110_nrf51822_6.0.0_bootloader.hex",
WFKnight	0:9b3d4731edbb	2342	"name": "s110_nrf51822_6.0.0_softdevice.hex",
WFKnight	0:9b3d4731edbb	2343	"offset": 81920
WFKnight	0:9b3d4731edbb	2344	}
WFKnight	0:9b3d4731edbb	2345	],
WFKnight	0:9b3d4731edbb	2346	"detect_code": ["1070"],
WFKnight	0:9b3d4731edbb	2347	"post_binary_hook": {
WFKnight	0:9b3d4731edbb	2348	"function": "MCU_NRF51Code.binary_hook",
WFKnight	0:9b3d4731edbb	2349	"toolchains": ["ARM_STD", "GCC_ARM"]
WFKnight	0:9b3d4731edbb	2350	},
WFKnight	0:9b3d4731edbb	2351	"program_cycle_s": 6,
WFKnight	0:9b3d4731edbb	2352	"features": ["BLE"],
WFKnight	0:9b3d4731edbb	2353	"device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"]
WFKnight	0:9b3d4731edbb	2354	},
WFKnight	0:9b3d4731edbb	2355	"MCU_NRF51_16K_BASE": {
WFKnight	0:9b3d4731edbb	2356	"inherits": ["MCU_NRF51"],
WFKnight	0:9b3d4731edbb	2357	"extra_labels_add": ["MCU_NORDIC_16K", "MCU_NRF51_16K"],
WFKnight	0:9b3d4731edbb	2358	"macros_add": ["TARGET_MCU_NORDIC_16K", "TARGET_MCU_NRF51_16K"],
WFKnight	0:9b3d4731edbb	2359	"public": false,
WFKnight	0:9b3d4731edbb	2360	"default_lib": "small"
WFKnight	0:9b3d4731edbb	2361	},
WFKnight	0:9b3d4731edbb	2362	"MCU_NRF51_16K_BOOT_BASE": {
WFKnight	0:9b3d4731edbb	2363	"inherits": ["MCU_NRF51_16K_BASE"],
WFKnight	0:9b3d4731edbb	2364	"MERGE_BOOTLOADER": true,
WFKnight	0:9b3d4731edbb	2365	"extra_labels_add": ["MCU_NRF51_16K_BOOT"],
WFKnight	0:9b3d4731edbb	2366	"macros_add": ["TARGET_MCU_NRF51_16K_BOOT", "TARGET_OTA_ENABLED"],
WFKnight	0:9b3d4731edbb	2367	"public": false
WFKnight	0:9b3d4731edbb	2368	},
WFKnight	0:9b3d4731edbb	2369	"MCU_NRF51_16K_OTA_BASE": {
WFKnight	0:9b3d4731edbb	2370	"inherits": ["MCU_NRF51_16K_BASE"],
WFKnight	0:9b3d4731edbb	2371	"public": false,
WFKnight	0:9b3d4731edbb	2372	"extra_labels_add": ["MCU_NRF51_16K_OTA"],
WFKnight	0:9b3d4731edbb	2373	"macros_add": ["TARGET_MCU_NRF51_16K_OTA", "TARGET_OTA_ENABLED"],
WFKnight	0:9b3d4731edbb	2374	"MERGE_SOFT_DEVICE": false
WFKnight	0:9b3d4731edbb	2375	},
WFKnight	0:9b3d4731edbb	2376	"MCU_NRF51_16K": {
WFKnight	0:9b3d4731edbb	2377	"inherits": ["MCU_NRF51_16K_BASE"],
WFKnight	0:9b3d4731edbb	2378	"extra_labels_add": ["MCU_NRF51_16K_S130"],
WFKnight	0:9b3d4731edbb	2379	"macros_add": ["TARGET_MCU_NRF51_16K_S130"],
WFKnight	0:9b3d4731edbb	2380	"public": false
WFKnight	0:9b3d4731edbb	2381	},
WFKnight	0:9b3d4731edbb	2382	"MCU_NRF51_S110": {
WFKnight	0:9b3d4731edbb	2383	"extra_labels_add": ["MCU_NRF51_16K_S110"],
WFKnight	0:9b3d4731edbb	2384	"macros_add": ["TARGET_MCU_NRF51_16K_S110"],
WFKnight	0:9b3d4731edbb	2385	"EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
WFKnight	0:9b3d4731edbb	2386	{
WFKnight	0:9b3d4731edbb	2387	"name": "s110_nrf51822_8.0.0_softdevice.hex",
WFKnight	0:9b3d4731edbb	2388	"boot": "s110_nrf51822_8.0.0_bootloader.hex",
WFKnight	0:9b3d4731edbb	2389	"offset": 98304
WFKnight	0:9b3d4731edbb	2390	},
WFKnight	0:9b3d4731edbb	2391	{
WFKnight	0:9b3d4731edbb	2392	"name": "s110_nrf51822_7.1.0_softdevice.hex",
WFKnight	0:9b3d4731edbb	2393	"boot": "s110_nrf51822_7.1.0_bootloader.hex",
WFKnight	0:9b3d4731edbb	2394	"offset": 90112
WFKnight	0:9b3d4731edbb	2395	}
WFKnight	0:9b3d4731edbb	2396	],
WFKnight	0:9b3d4731edbb	2397	"public": false
WFKnight	0:9b3d4731edbb	2398	},
WFKnight	0:9b3d4731edbb	2399	"MCU_NRF51_16K_S110": {
WFKnight	0:9b3d4731edbb	2400	"inherits": ["MCU_NRF51_S110", "MCU_NRF51_16K_BASE"],
WFKnight	0:9b3d4731edbb	2401	"public": false
WFKnight	0:9b3d4731edbb	2402	},
WFKnight	0:9b3d4731edbb	2403	"MCU_NRF51_16K_BOOT": {
WFKnight	0:9b3d4731edbb	2404	"inherits": ["MCU_NRF51_16K_BOOT_BASE"],
WFKnight	0:9b3d4731edbb	2405	"extra_labels_add": ["MCU_NRF51_16K_S130"],
WFKnight	0:9b3d4731edbb	2406	"macros_add": ["TARGET_MCU_NRF51_16K_S130"],
WFKnight	0:9b3d4731edbb	2407	"public": false
WFKnight	0:9b3d4731edbb	2408	},
WFKnight	0:9b3d4731edbb	2409	"MCU_NRF51_16K_BOOT_S110": {
WFKnight	0:9b3d4731edbb	2410	"inherits": ["MCU_NRF51_S110", "MCU_NRF51_16K_BOOT_BASE"],
WFKnight	0:9b3d4731edbb	2411	"public": false
WFKnight	0:9b3d4731edbb	2412	},
WFKnight	0:9b3d4731edbb	2413	"MCU_NRF51_16K_OTA": {
WFKnight	0:9b3d4731edbb	2414	"inherits": ["MCU_NRF51_16K_OTA_BASE"],
WFKnight	0:9b3d4731edbb	2415	"extra_labels_add": ["MCU_NRF51_16K_S130"],
WFKnight	0:9b3d4731edbb	2416	"macros_add": ["TARGET_MCU_NRF51_16K_S130"],
WFKnight	0:9b3d4731edbb	2417	"public": false
WFKnight	0:9b3d4731edbb	2418	},
WFKnight	0:9b3d4731edbb	2419	"MCU_NRF51_16K_OTA_S110": {
WFKnight	0:9b3d4731edbb	2420	"inherits": ["MCU_NRF51_S110", "MCU_NRF51_16K_OTA_BASE"],
WFKnight	0:9b3d4731edbb	2421	"public": false
WFKnight	0:9b3d4731edbb	2422	},
WFKnight	0:9b3d4731edbb	2423	"MCU_NRF51_32K": {
WFKnight	0:9b3d4731edbb	2424	"inherits": ["MCU_NRF51"],
WFKnight	0:9b3d4731edbb	2425	"extra_labels_add": ["MCU_NORDIC_32K", "MCU_NRF51_32K"],
WFKnight	0:9b3d4731edbb	2426	"macros_add": ["TARGET_MCU_NORDIC_32K", "TARGET_MCU_NRF51_32K"],
WFKnight	0:9b3d4731edbb	2427	"public": false
WFKnight	0:9b3d4731edbb	2428	},
WFKnight	0:9b3d4731edbb	2429	"MCU_NRF51_32K_BOOT": {
WFKnight	0:9b3d4731edbb	2430	"inherits": ["MCU_NRF51_32K"],
WFKnight	0:9b3d4731edbb	2431	"MERGE_BOOTLOADER": true,
WFKnight	0:9b3d4731edbb	2432	"extra_labels_add": ["MCU_NRF51_32K_BOOT"],
WFKnight	0:9b3d4731edbb	2433	"macros_add": ["TARGET_MCU_NRF51_32K_BOOT", "TARGET_OTA_ENABLED"],
WFKnight	0:9b3d4731edbb	2434	"public": false
WFKnight	0:9b3d4731edbb	2435	},
WFKnight	0:9b3d4731edbb	2436	"MCU_NRF51_32K_OTA": {
WFKnight	0:9b3d4731edbb	2437	"inherits": ["MCU_NRF51_32K"],
WFKnight	0:9b3d4731edbb	2438	"public": false,
WFKnight	0:9b3d4731edbb	2439	"extra_labels_add": ["MCU_NRF51_32K_OTA"],
WFKnight	0:9b3d4731edbb	2440	"macros_add": ["TARGET_MCU_NRF51_32K_OTA", "TARGET_OTA_ENABLED"],
WFKnight	0:9b3d4731edbb	2441	"MERGE_SOFT_DEVICE": false
WFKnight	0:9b3d4731edbb	2442	},
WFKnight	0:9b3d4731edbb	2443	"NRF51822": {
WFKnight	0:9b3d4731edbb	2444	"inherits": ["MCU_NRF51_16K"],
WFKnight	0:9b3d4731edbb	2445	"extra_labels_add": ["NRF51822", "NRF51822_MKIT"],
WFKnight	0:9b3d4731edbb	2446	"macros_add": ["TARGET_NRF51822_MKIT"],
WFKnight	0:9b3d4731edbb	2447	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	2448	"device_name": "nRF51822_xxAA"
WFKnight	0:9b3d4731edbb	2449	},
WFKnight	0:9b3d4731edbb	2450	"NRF51822_BOOT": {
WFKnight	0:9b3d4731edbb	2451	"inherits": ["MCU_NRF51_16K_BOOT"],
WFKnight	0:9b3d4731edbb	2452	"extra_labels_add": ["NRF51822", "NRF51822_MKIT"],
WFKnight	0:9b3d4731edbb	2453	"macros_add": ["TARGET_NRF51822_MKIT"]
WFKnight	0:9b3d4731edbb	2454	},
WFKnight	0:9b3d4731edbb	2455	"NRF51822_OTA": {
WFKnight	0:9b3d4731edbb	2456	"inherits": ["MCU_NRF51_16K_OTA"],
WFKnight	0:9b3d4731edbb	2457	"extra_labels_add": ["NRF51822", "NRF51822_MKIT"],
WFKnight	0:9b3d4731edbb	2458	"macros_add": ["TARGET_NRF51822_MKIT"]
WFKnight	0:9b3d4731edbb	2459	},
WFKnight	0:9b3d4731edbb	2460	"ARCH_BLE": {
WFKnight	0:9b3d4731edbb	2461	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	2462	"inherits": ["MCU_NRF51_16K"],
WFKnight	0:9b3d4731edbb	2463	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	2464	"device_name": "nRF51822_xxAA"
WFKnight	0:9b3d4731edbb	2465	},
WFKnight	0:9b3d4731edbb	2466	"ARCH_BLE_BOOT": {
WFKnight	0:9b3d4731edbb	2467	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	2468	"inherits": ["MCU_NRF51_16K_BOOT"],
WFKnight	0:9b3d4731edbb	2469	"extra_labels_add": ["ARCH_BLE"],
WFKnight	0:9b3d4731edbb	2470	"macros_add": ["TARGET_ARCH_BLE"]
WFKnight	0:9b3d4731edbb	2471	},
WFKnight	0:9b3d4731edbb	2472	"ARCH_BLE_OTA": {
WFKnight	0:9b3d4731edbb	2473	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	2474	"inherits": ["MCU_NRF51_16K_OTA"],
WFKnight	0:9b3d4731edbb	2475	"extra_labels_add": ["ARCH_BLE"],
WFKnight	0:9b3d4731edbb	2476	"macros_add": ["TARGET_ARCH_BLE"]
WFKnight	0:9b3d4731edbb	2477	},
WFKnight	0:9b3d4731edbb	2478	"ARCH_LINK": {
WFKnight	0:9b3d4731edbb	2479	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	2480	"inherits": ["MCU_NRF51_16K"],
WFKnight	0:9b3d4731edbb	2481	"extra_labels_add": ["ARCH_BLE"],
WFKnight	0:9b3d4731edbb	2482	"macros_add": ["TARGET_ARCH_BLE"]
WFKnight	0:9b3d4731edbb	2483	},
WFKnight	0:9b3d4731edbb	2484	"ARCH_LINK_BOOT": {
WFKnight	0:9b3d4731edbb	2485	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	2486	"inherits": ["MCU_NRF51_16K_BOOT"],
WFKnight	0:9b3d4731edbb	2487	"extra_labels_add": ["ARCH_BLE", "ARCH_LINK"],
WFKnight	0:9b3d4731edbb	2488	"macros_add": ["TARGET_ARCH_BLE", "TARGET_ARCH_LINK"]
WFKnight	0:9b3d4731edbb	2489	},
WFKnight	0:9b3d4731edbb	2490	"ARCH_LINK_OTA": {
WFKnight	0:9b3d4731edbb	2491	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	2492	"inherits": ["MCU_NRF51_16K_OTA"],
WFKnight	0:9b3d4731edbb	2493	"extra_labels_add": ["ARCH_BLE", "ARCH_LINK"],
WFKnight	0:9b3d4731edbb	2494	"macros_add": ["TARGET_ARCH_BLE", "TARGET_ARCH_LINK"]
WFKnight	0:9b3d4731edbb	2495	},
WFKnight	0:9b3d4731edbb	2496	"SEEED_TINY_BLE": {
WFKnight	0:9b3d4731edbb	2497	"inherits": ["MCU_NRF51_16K"],
WFKnight	0:9b3d4731edbb	2498	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	2499	"device_name": "nRF51822_xxAA"
WFKnight	0:9b3d4731edbb	2500	},
WFKnight	0:9b3d4731edbb	2501	"SEEED_TINY_BLE_BOOT": {
WFKnight	0:9b3d4731edbb	2502	"inherits": ["MCU_NRF51_16K_BOOT"],
WFKnight	0:9b3d4731edbb	2503	"extra_labels_add": ["SEEED_TINY_BLE"],
WFKnight	0:9b3d4731edbb	2504	"macros_add": ["TARGET_SEEED_TINY_BLE"]
WFKnight	0:9b3d4731edbb	2505	},
WFKnight	0:9b3d4731edbb	2506	"SEEED_TINY_BLE_OTA": {
WFKnight	0:9b3d4731edbb	2507	"inherits": ["MCU_NRF51_16K_OTA"],
WFKnight	0:9b3d4731edbb	2508	"extra_labels_add": ["SEEED_TINY_BLE"],
WFKnight	0:9b3d4731edbb	2509	"macros_add": ["TARGET_SEEED_TINY_BLE"]
WFKnight	0:9b3d4731edbb	2510	},
WFKnight	0:9b3d4731edbb	2511	"HRM1017": {
WFKnight	0:9b3d4731edbb	2512	"inherits": ["MCU_NRF51_16K"],
WFKnight	0:9b3d4731edbb	2513	"macros_add": ["TARGET_NRF_LFCLK_RC"],
WFKnight	0:9b3d4731edbb	2514	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	2515	"device_name": "nRF51822_xxAA"
WFKnight	0:9b3d4731edbb	2516	},
WFKnight	0:9b3d4731edbb	2517	"HRM1017_BOOT": {
WFKnight	0:9b3d4731edbb	2518	"inherits": ["MCU_NRF51_16K_BOOT"],
WFKnight	0:9b3d4731edbb	2519	"extra_labels_add": ["HRM1017"],
WFKnight	0:9b3d4731edbb	2520	"macros_add": ["TARGET_HRM1017", "TARGET_NRF_LFCLK_RC"]
WFKnight	0:9b3d4731edbb	2521	},
WFKnight	0:9b3d4731edbb	2522	"HRM1017_OTA": {
WFKnight	0:9b3d4731edbb	2523	"inherits": ["MCU_NRF51_16K_OTA"],
WFKnight	0:9b3d4731edbb	2524	"extra_labels_add": ["HRM1017"],
WFKnight	0:9b3d4731edbb	2525	"macros_add": ["TARGET_HRM1017", "TARGET_NRF_LFCLK_RC"]
WFKnight	0:9b3d4731edbb	2526	},
WFKnight	0:9b3d4731edbb	2527	"RBLAB_NRF51822": {
WFKnight	0:9b3d4731edbb	2528	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	2529	"inherits": ["MCU_NRF51_16K"],
WFKnight	0:9b3d4731edbb	2530	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	2531	"device_name": "nRF51822_xxAA"
WFKnight	0:9b3d4731edbb	2532	},
WFKnight	0:9b3d4731edbb	2533	"RBLAB_NRF51822_BOOT": {
WFKnight	0:9b3d4731edbb	2534	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	2535	"inherits": ["MCU_NRF51_16K_BOOT"],
WFKnight	0:9b3d4731edbb	2536	"extra_labels_add": ["RBLAB_NRF51822"],
WFKnight	0:9b3d4731edbb	2537	"macros_add": ["TARGET_RBLAB_NRF51822"]
WFKnight	0:9b3d4731edbb	2538	},
WFKnight	0:9b3d4731edbb	2539	"RBLAB_NRF51822_OTA": {
WFKnight	0:9b3d4731edbb	2540	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	2541	"inherits": ["MCU_NRF51_16K_OTA"],
WFKnight	0:9b3d4731edbb	2542	"extra_labels_add": ["RBLAB_NRF51822"],
WFKnight	0:9b3d4731edbb	2543	"macros_add": ["TARGET_RBLAB_NRF51822"]
WFKnight	0:9b3d4731edbb	2544	},
WFKnight	0:9b3d4731edbb	2545	"RBLAB_BLENANO": {
WFKnight	0:9b3d4731edbb	2546	"inherits": ["MCU_NRF51_16K"],
WFKnight	0:9b3d4731edbb	2547	"release_versions": ["2"]
WFKnight	0:9b3d4731edbb	2548	},
WFKnight	0:9b3d4731edbb	2549	"RBLAB_BLENANO_BOOT": {
WFKnight	0:9b3d4731edbb	2550	"inherits": ["MCU_NRF51_16K_BOOT"],
WFKnight	0:9b3d4731edbb	2551	"extra_labels_add": ["RBLAB_BLENANO"],
WFKnight	0:9b3d4731edbb	2552	"macros_add": ["TARGET_RBLAB_BLENANO"]
WFKnight	0:9b3d4731edbb	2553	},
WFKnight	0:9b3d4731edbb	2554	"RBLAB_BLENANO_OTA": {
WFKnight	0:9b3d4731edbb	2555	"inherits": ["MCU_NRF51_16K_OTA"],
WFKnight	0:9b3d4731edbb	2556	"extra_labels_add": ["RBLAB_BLENANO"],
WFKnight	0:9b3d4731edbb	2557	"macros_add": ["TARGET_RBLAB_BLENANO"]
WFKnight	0:9b3d4731edbb	2558	},
WFKnight	0:9b3d4731edbb	2559	"RBLAB_BLENANO2": {
WFKnight	0:9b3d4731edbb	2560	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	2561	"inherits": ["MCU_NRF52832"],
WFKnight	0:9b3d4731edbb	2562	"release_versions": ["5"],
WFKnight	0:9b3d4731edbb	2563	"device_name": "nRF52832_xxAA"
WFKnight	0:9b3d4731edbb	2564	},
WFKnight	0:9b3d4731edbb	2565	"NRF51822_Y5_MBUG": {
WFKnight	0:9b3d4731edbb	2566	"inherits": ["MCU_NRF51_16K"]
WFKnight	0:9b3d4731edbb	2567	},
WFKnight	0:9b3d4731edbb	2568	"WALLBOT_BLE": {
WFKnight	0:9b3d4731edbb	2569	"inherits": ["MCU_NRF51_16K"],
WFKnight	0:9b3d4731edbb	2570	"release_versions": ["2"]
WFKnight	0:9b3d4731edbb	2571	},
WFKnight	0:9b3d4731edbb	2572	"WALLBOT_BLE_BOOT": {
WFKnight	0:9b3d4731edbb	2573	"inherits": ["MCU_NRF51_16K_BOOT"],
WFKnight	0:9b3d4731edbb	2574	"extra_labels_add": ["WALLBOT_BLE"],
WFKnight	0:9b3d4731edbb	2575	"macros_add": ["TARGET_WALLBOT_BLE"]
WFKnight	0:9b3d4731edbb	2576	},
WFKnight	0:9b3d4731edbb	2577	"WALLBOT_BLE_OTA": {
WFKnight	0:9b3d4731edbb	2578	"inherits": ["MCU_NRF51_16K_OTA"],
WFKnight	0:9b3d4731edbb	2579	"extra_labels_add": ["WALLBOT_BLE"],
WFKnight	0:9b3d4731edbb	2580	"macros_add": ["TARGET_WALLBOT_BLE"]
WFKnight	0:9b3d4731edbb	2581	},
WFKnight	0:9b3d4731edbb	2582	"DELTA_DFCM_NNN40": {
WFKnight	0:9b3d4731edbb	2583	"inherits": ["MCU_NRF51_32K"],
WFKnight	0:9b3d4731edbb	2584	"program_cycle_s": 10,
WFKnight	0:9b3d4731edbb	2585	"macros_add": ["TARGET_NRF_LFCLK_RC"],
WFKnight	0:9b3d4731edbb	2586	"device_has": ["ANALOGIN", "DEBUG_AWARENESS", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
WFKnight	0:9b3d4731edbb	2587	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	2588	"device_name": "nRF51822_xxAA"
WFKnight	0:9b3d4731edbb	2589	},
WFKnight	0:9b3d4731edbb	2590	"DELTA_DFCM_NNN40_BOOT": {
WFKnight	0:9b3d4731edbb	2591	"inherits": ["MCU_NRF51_32K_BOOT"],
WFKnight	0:9b3d4731edbb	2592	"program_cycle_s": 10,
WFKnight	0:9b3d4731edbb	2593	"extra_labels_add": ["DELTA_DFCM_NNN40"],
WFKnight	0:9b3d4731edbb	2594	"macros_add": ["TARGET_DELTA_DFCM_NNN40", "TARGET_NRF_LFCLK_RC"]
WFKnight	0:9b3d4731edbb	2595	},
WFKnight	0:9b3d4731edbb	2596	"DELTA_DFCM_NNN40_OTA": {
WFKnight	0:9b3d4731edbb	2597	"inherits": ["MCU_NRF51_32K_OTA"],
WFKnight	0:9b3d4731edbb	2598	"program_cycle_s": 10,
WFKnight	0:9b3d4731edbb	2599	"extra_labels_add": ["DELTA_DFCM_NNN40"],
WFKnight	0:9b3d4731edbb	2600	"macros_add": ["TARGET_DELTA_DFCM_NNN40", "TARGET_NRF_LFCLK_RC"]
WFKnight	0:9b3d4731edbb	2601	},
WFKnight	0:9b3d4731edbb	2602	"DELTA_DFCM_NNN50": {
WFKnight	0:9b3d4731edbb	2603	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	2604	"inherits": ["MCU_NRF51_32K_UNIFIED"],
WFKnight	0:9b3d4731edbb	2605	"device_has": ["USTICKER", "LPTICKER", "ANALOGIN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
WFKnight	0:9b3d4731edbb	2606	"device_name": "nRF51822_xxAC"
WFKnight	0:9b3d4731edbb	2607	},
WFKnight	0:9b3d4731edbb	2608	"DELTA_DFCM_NNN50_BOOT": {
WFKnight	0:9b3d4731edbb	2609	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	2610	"inherits": ["MCU_NRF51_32K_BOOT"],
WFKnight	0:9b3d4731edbb	2611	"extra_labels_add": ["DELTA_DFCM_NNN50"],
WFKnight	0:9b3d4731edbb	2612	"macros_add": ["TARGET_DELTA_DFCM_NNN50"]
WFKnight	0:9b3d4731edbb	2613	},
WFKnight	0:9b3d4731edbb	2614	"DELTA_DFCM_NNN50_OTA": {
WFKnight	0:9b3d4731edbb	2615	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	2616	"inherits": ["MCU_NRF51_32K_OTA"],
WFKnight	0:9b3d4731edbb	2617	"extra_labels_add": ["DELTA_DFCM_NNN50"],
WFKnight	0:9b3d4731edbb	2618	"macros_add": ["TARGET_DELTA_DFCM_NNN50"]
WFKnight	0:9b3d4731edbb	2619	},
WFKnight	0:9b3d4731edbb	2620	"NRF51_DK_LEGACY": {
WFKnight	0:9b3d4731edbb	2621	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	2622	"inherits": ["MCU_NRF51_32K"],
WFKnight	0:9b3d4731edbb	2623	"extra_labels_add": ["NRF51_DK"]
WFKnight	0:9b3d4731edbb	2624	},
WFKnight	0:9b3d4731edbb	2625	"NRF51_DK_BOOT": {
WFKnight	0:9b3d4731edbb	2626	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	2627	"inherits": ["MCU_NRF51_32K_BOOT"],
WFKnight	0:9b3d4731edbb	2628	"extra_labels_add": ["NRF51_DK"],
WFKnight	0:9b3d4731edbb	2629	"macros_add": ["TARGET_NRF51_DK"]
WFKnight	0:9b3d4731edbb	2630	},
WFKnight	0:9b3d4731edbb	2631	"NRF51_DK_OTA": {
WFKnight	0:9b3d4731edbb	2632	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	2633	"inherits": ["MCU_NRF51_32K_OTA"],
WFKnight	0:9b3d4731edbb	2634	"extra_labels_add": ["NRF51_DK"],
WFKnight	0:9b3d4731edbb	2635	"macros_add": ["TARGET_NRF51_DK"]
WFKnight	0:9b3d4731edbb	2636	},
WFKnight	0:9b3d4731edbb	2637	"NRF51_DONGLE_LEGACY": {
WFKnight	0:9b3d4731edbb	2638	"inherits": ["MCU_NRF51_32K"],
WFKnight	0:9b3d4731edbb	2639	"extra_labels_add": ["NRF51_DONGLE"],
WFKnight	0:9b3d4731edbb	2640	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	2641	"device_name": "nRF51822_xxAA"
WFKnight	0:9b3d4731edbb	2642	},
WFKnight	0:9b3d4731edbb	2643	"NRF51_DONGLE_BOOT": {
WFKnight	0:9b3d4731edbb	2644	"inherits": ["MCU_NRF51_32K_BOOT"],
WFKnight	0:9b3d4731edbb	2645	"extra_labels_add": ["NRF51_DONGLE"],
WFKnight	0:9b3d4731edbb	2646	"macros_add": ["TARGET_NRF51_DONGLE"]
WFKnight	0:9b3d4731edbb	2647	},
WFKnight	0:9b3d4731edbb	2648	"NRF51_DONGLE_OTA": {
WFKnight	0:9b3d4731edbb	2649	"inherits": ["MCU_NRF51_32K_OTA"],
WFKnight	0:9b3d4731edbb	2650	"extra_labels_add": ["NRF51_DONGLE"],
WFKnight	0:9b3d4731edbb	2651	"macros_add": ["TARGET_NRF51_DONGLE"]
WFKnight	0:9b3d4731edbb	2652	},
WFKnight	0:9b3d4731edbb	2653	"NRF51_MICROBIT": {
WFKnight	0:9b3d4731edbb	2654	"inherits": ["MCU_NRF51_16K_S110"],
WFKnight	0:9b3d4731edbb	2655	"macros_add": ["TARGET_NRF_LFCLK_RC"],
WFKnight	0:9b3d4731edbb	2656	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	2657	"device_name": "nRF51822_xxAA"
WFKnight	0:9b3d4731edbb	2658	},
WFKnight	0:9b3d4731edbb	2659	"NRF51_MICROBIT_BOOT": {
WFKnight	0:9b3d4731edbb	2660	"inherits": ["MCU_NRF51_16K_BOOT_S110"],
WFKnight	0:9b3d4731edbb	2661	"extra_labels_add": ["NRF51_MICROBIT"],
WFKnight	0:9b3d4731edbb	2662	"macros_add": ["TARGET_NRF51_MICROBIT", "TARGET_NRF_LFCLK_RC"]
WFKnight	0:9b3d4731edbb	2663	},
WFKnight	0:9b3d4731edbb	2664	"NRF51_MICROBIT_OTA": {
WFKnight	0:9b3d4731edbb	2665	"inherits": ["MCU_NRF51_16K_OTA_S110"],
WFKnight	0:9b3d4731edbb	2666	"extra_labels_add": ["NRF51_MICROBIT"],
WFKnight	0:9b3d4731edbb	2667	"macros_add": ["TARGET_NRF51_MICROBIT", "TARGET_NRF_LFCLK_RC"]
WFKnight	0:9b3d4731edbb	2668	},
WFKnight	0:9b3d4731edbb	2669	"NRF51_MICROBIT_B": {
WFKnight	0:9b3d4731edbb	2670	"inherits": ["MCU_NRF51_16K"],
WFKnight	0:9b3d4731edbb	2671	"extra_labels_add": ["NRF51_MICROBIT"],
WFKnight	0:9b3d4731edbb	2672	"macros_add": ["TARGET_NRF51_MICROBIT", "TARGET_NRF_LFCLK_RC"],
WFKnight	0:9b3d4731edbb	2673	"release_versions": ["2"]
WFKnight	0:9b3d4731edbb	2674	},
WFKnight	0:9b3d4731edbb	2675	"NRF51_MICROBIT_B_BOOT": {
WFKnight	0:9b3d4731edbb	2676	"inherits": ["MCU_NRF51_16K_BOOT"],
WFKnight	0:9b3d4731edbb	2677	"extra_labels_add": ["NRF51_MICROBIT"],
WFKnight	0:9b3d4731edbb	2678	"macros_add": ["TARGET_NRF51_MICROBIT", "TARGET_NRF_LFCLK_RC"]
WFKnight	0:9b3d4731edbb	2679	},
WFKnight	0:9b3d4731edbb	2680	"NRF51_MICROBIT_B_OTA": {
WFKnight	0:9b3d4731edbb	2681	"inherits": ["MCU_NRF51_16K_OTA"],
WFKnight	0:9b3d4731edbb	2682	"extra_labels_add": ["NRF51_MICROBIT"],
WFKnight	0:9b3d4731edbb	2683	"macros_add": ["TARGET_NRF51_MICROBIT", "TARGET_NRF_LFCLK_RC"]
WFKnight	0:9b3d4731edbb	2684	},
WFKnight	0:9b3d4731edbb	2685	"MTM_MTCONNECT04S": {
WFKnight	0:9b3d4731edbb	2686	"inherits": ["MCU_NRF51_32K"],
WFKnight	0:9b3d4731edbb	2687	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	2688	"device_name": "nRF51822_xxAA"
WFKnight	0:9b3d4731edbb	2689	},
WFKnight	0:9b3d4731edbb	2690	"MTM_MTCONNECT04S_BOOT": {
WFKnight	0:9b3d4731edbb	2691	"inherits": ["MCU_NRF51_32K_BOOT"],
WFKnight	0:9b3d4731edbb	2692	"extra_labels_add": ["MTM_CONNECT04S"],
WFKnight	0:9b3d4731edbb	2693	"macros_add": ["TARGET_MTM_CONNECT04S"]
WFKnight	0:9b3d4731edbb	2694	},
WFKnight	0:9b3d4731edbb	2695	"MTM_MTCONNECT04S_OTA": {
WFKnight	0:9b3d4731edbb	2696	"inherits": ["MCU_NRF51_32K_OTA"],
WFKnight	0:9b3d4731edbb	2697	"extra_labels_add": ["MTM_CONNECT04S"],
WFKnight	0:9b3d4731edbb	2698	"macros_add": ["TARGET_MTM_CONNECT04S"]
WFKnight	0:9b3d4731edbb	2699	},
WFKnight	0:9b3d4731edbb	2700	"MTB_LAIRD_BL600": {
WFKnight	0:9b3d4731edbb	2701	"inherits": ["MCU_NRF51_32K_UNIFIED"],
WFKnight	0:9b3d4731edbb	2702	"device_has": ["USTICKER", "LPTICKER", "ANALOGIN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
WFKnight	0:9b3d4731edbb	2703	"device_name": "nRF51822_xxAA",
WFKnight	0:9b3d4731edbb	2704	"release_versions" : ["5"],
WFKnight	0:9b3d4731edbb	2705	"extra_labels_add": ["MTB_LAIRD_BL600"],
WFKnight	0:9b3d4731edbb	2706	"config": {
WFKnight	0:9b3d4731edbb	2707	"usb_tx": {
WFKnight	0:9b3d4731edbb	2708	"help": "Value SIO_21",
WFKnight	0:9b3d4731edbb	2709	"value": "SIO_21"
WFKnight	0:9b3d4731edbb	2710	},
WFKnight	0:9b3d4731edbb	2711	"usb_rx": {
WFKnight	0:9b3d4731edbb	2712	"help": "Value SIO_22",
WFKnight	0:9b3d4731edbb	2713	"value": "SIO_22"
WFKnight	0:9b3d4731edbb	2714	},
WFKnight	0:9b3d4731edbb	2715	"stdio_uart": {
WFKnight	0:9b3d4731edbb	2716	"help": "Value: UART_0",
WFKnight	0:9b3d4731edbb	2717	"value": "UART_0",
WFKnight	0:9b3d4731edbb	2718	"macro_name": "STDIO_UART"
WFKnight	0:9b3d4731edbb	2719	}
WFKnight	0:9b3d4731edbb	2720	},
WFKnight	0:9b3d4731edbb	2721	"overrides": {
WFKnight	0:9b3d4731edbb	2722	"uart_hwfc": 0
WFKnight	0:9b3d4731edbb	2723	}
WFKnight	0:9b3d4731edbb	2724	},
WFKnight	0:9b3d4731edbb	2725	"TY51822R3": {
WFKnight	0:9b3d4731edbb	2726	"inherits": ["MCU_NRF51_32K_UNIFIED"],
WFKnight	0:9b3d4731edbb	2727	"macros_add": ["TARGET_NRF_32MHZ_XTAL"],
WFKnight	0:9b3d4731edbb	2728	"device_has": ["USTICKER", "LPTICKER", "ANALOGIN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
WFKnight	0:9b3d4731edbb	2729	"detect_code": ["1019"],
WFKnight	0:9b3d4731edbb	2730	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	2731	"overrides": {"uart_hwfc": 0},
WFKnight	0:9b3d4731edbb	2732	"device_name": "nRF51822_xxAA"
WFKnight	0:9b3d4731edbb	2733	},
WFKnight	0:9b3d4731edbb	2734	"TY51822R3_BOOT": {
WFKnight	0:9b3d4731edbb	2735	"inherits": ["MCU_NRF51_32K_BOOT"],
WFKnight	0:9b3d4731edbb	2736	"extra_labels_add": ["TY51822R3"],
WFKnight	0:9b3d4731edbb	2737	"macros_add": ["TARGET_TY51822R3", "TARGET_NRF_32MHZ_XTAL"]
WFKnight	0:9b3d4731edbb	2738	},
WFKnight	0:9b3d4731edbb	2739	"TY51822R3_OTA": {
WFKnight	0:9b3d4731edbb	2740	"inherits": ["MCU_NRF51_32K_OTA"],
WFKnight	0:9b3d4731edbb	2741	"extra_labels_add": ["NRF51_DK"],
WFKnight	0:9b3d4731edbb	2742	"macros_add": ["TARGET_TY51822R3", "TARGET_NRF_32MHZ_XTAL"]
WFKnight	0:9b3d4731edbb	2743	},
WFKnight	0:9b3d4731edbb	2744	"ARM_MPS2_Target": {
WFKnight	0:9b3d4731edbb	2745	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	2746	"public": false,
WFKnight	0:9b3d4731edbb	2747	"device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"]
WFKnight	0:9b3d4731edbb	2748	},
WFKnight	0:9b3d4731edbb	2749	"ARM_MPS2_M0": {
WFKnight	0:9b3d4731edbb	2750	"inherits": ["ARM_MPS2_Target"],
WFKnight	0:9b3d4731edbb	2751	"core": "Cortex-M0",
WFKnight	0:9b3d4731edbb	2752	"supported_toolchains": ["ARM"],
WFKnight	0:9b3d4731edbb	2753	"extra_labels": ["ARM_SSG", "MPS2", "MPS2_M0"],
WFKnight	0:9b3d4731edbb	2754	"macros": ["CMSDK_CM0", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
WFKnight	0:9b3d4731edbb	2755	"device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
WFKnight	0:9b3d4731edbb	2756	"release_versions": ["2"]
WFKnight	0:9b3d4731edbb	2757	},
WFKnight	0:9b3d4731edbb	2758	"ARM_MPS2_M0P": {
WFKnight	0:9b3d4731edbb	2759	"inherits": ["ARM_MPS2_Target"],
WFKnight	0:9b3d4731edbb	2760	"core": "Cortex-M0+",
WFKnight	0:9b3d4731edbb	2761	"supported_toolchains": ["ARM"],
WFKnight	0:9b3d4731edbb	2762	"extra_labels": ["ARM_SSG", "MPS2", "MPS2_M0P"],
WFKnight	0:9b3d4731edbb	2763	"macros": ["CMSDK_CM0plus"],
WFKnight	0:9b3d4731edbb	2764	"device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
WFKnight	0:9b3d4731edbb	2765	"release_versions": ["2"]
WFKnight	0:9b3d4731edbb	2766	},
WFKnight	0:9b3d4731edbb	2767	"ARM_MPS2_M3": {
WFKnight	0:9b3d4731edbb	2768	"inherits": ["ARM_MPS2_Target"],
WFKnight	0:9b3d4731edbb	2769	"core": "Cortex-M3",
WFKnight	0:9b3d4731edbb	2770	"supported_toolchains": ["ARM"],
WFKnight	0:9b3d4731edbb	2771	"extra_labels": ["ARM_SSG", "MPS2", "MPS2_M3"],
WFKnight	0:9b3d4731edbb	2772	"macros": ["CMSDK_CM3"],
WFKnight	0:9b3d4731edbb	2773	"device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
WFKnight	0:9b3d4731edbb	2774	"release_versions": ["2"]
WFKnight	0:9b3d4731edbb	2775	},
WFKnight	0:9b3d4731edbb	2776	"ARM_MPS2_M4": {
WFKnight	0:9b3d4731edbb	2777	"inherits": ["ARM_MPS2_Target"],
WFKnight	0:9b3d4731edbb	2778	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	2779	"supported_toolchains": ["ARM"],
WFKnight	0:9b3d4731edbb	2780	"extra_labels": ["ARM_SSG", "MPS2", "MPS2_M4"],
WFKnight	0:9b3d4731edbb	2781	"macros": ["CMSDK_CM4"],
WFKnight	0:9b3d4731edbb	2782	"device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
WFKnight	0:9b3d4731edbb	2783	"release_versions": ["2"]
WFKnight	0:9b3d4731edbb	2784	},
WFKnight	0:9b3d4731edbb	2785	"ARM_MPS2_M7": {
WFKnight	0:9b3d4731edbb	2786	"inherits": ["ARM_MPS2_Target"],
WFKnight	0:9b3d4731edbb	2787	"core": "Cortex-M7",
WFKnight	0:9b3d4731edbb	2788	"supported_toolchains": ["ARM"],
WFKnight	0:9b3d4731edbb	2789	"extra_labels": ["ARM_SSG", "MPS2", "MPS2_M7"],
WFKnight	0:9b3d4731edbb	2790	"macros": ["CMSDK_CM7"],
WFKnight	0:9b3d4731edbb	2791	"device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
WFKnight	0:9b3d4731edbb	2792	"release_versions": ["2"]
WFKnight	0:9b3d4731edbb	2793	},
WFKnight	0:9b3d4731edbb	2794	"ARM_IOTSS_Target": {
WFKnight	0:9b3d4731edbb	2795	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	2796	"public": false,
WFKnight	0:9b3d4731edbb	2797	"device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"]
WFKnight	0:9b3d4731edbb	2798	},
WFKnight	0:9b3d4731edbb	2799	"ARM_IOTSS_BEID": {
WFKnight	0:9b3d4731edbb	2800	"inherits": ["ARM_IOTSS_Target"],
WFKnight	0:9b3d4731edbb	2801	"core": "Cortex-M3",
WFKnight	0:9b3d4731edbb	2802	"supported_toolchains": ["ARM"],
WFKnight	0:9b3d4731edbb	2803	"extra_labels": ["ARM_SSG", "IOTSS", "IOTSS_BEID"],
WFKnight	0:9b3d4731edbb	2804	"macros": ["CMSDK_BEID"],
WFKnight	0:9b3d4731edbb	2805	"device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
WFKnight	0:9b3d4731edbb	2806	"release_versions": ["2"]
WFKnight	0:9b3d4731edbb	2807	},
WFKnight	0:9b3d4731edbb	2808	"ARM_CM3DS_MPS2": {
WFKnight	0:9b3d4731edbb	2809	"inherits": ["ARM_IOTSS_Target"],
WFKnight	0:9b3d4731edbb	2810	"core": "Cortex-M3",
WFKnight	0:9b3d4731edbb	2811	"supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
WFKnight	0:9b3d4731edbb	2812	"extra_labels": ["ARM_SSG", "CM3DS_MPS2"],
WFKnight	0:9b3d4731edbb	2813	"OUTPUT_EXT": "elf",
WFKnight	0:9b3d4731edbb	2814	"macros": ["CMSDK_CM3DS"],
WFKnight	0:9b3d4731edbb	2815	"device_has": ["ANALOGIN", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SPI", "TRNG"],
WFKnight	0:9b3d4731edbb	2816	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	2817	"copy_method": "mps2",
WFKnight	0:9b3d4731edbb	2818	"reset_method": "reboot.txt"
WFKnight	0:9b3d4731edbb	2819	},
WFKnight	0:9b3d4731edbb	2820	"ARM_BEETLE_SOC": {
WFKnight	0:9b3d4731edbb	2821	"inherits": ["ARM_IOTSS_Target"],
WFKnight	0:9b3d4731edbb	2822	"core": "Cortex-M3",
WFKnight	0:9b3d4731edbb	2823	"supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
WFKnight	0:9b3d4731edbb	2824	"default_toolchain": "ARM",
WFKnight	0:9b3d4731edbb	2825	"extra_labels": ["ARM_SSG", "BEETLE"],
WFKnight	0:9b3d4731edbb	2826	"macros": ["CMSDK_BEETLE", "WSF_MS_PER_TICK=20", "WSF_TOKEN_ENABLED=FALSE", "WSF_TRACE_ENABLED=TRUE", "WSF_ASSERT_ENABLED=FALSE", "WSF_PRINTF_MAX_LEN=128", "ASIC", "CONFIG_HOST_REV=0x20", "CONFIG_ALLOW_DEEP_SLEEP=FALSE", "HCI_VS_TARGET", "CONFIG_ALLOW_SETTING_WRITE=TRUE", "WSF_MAX_HANDLERS=20", "NO_LEDS"],
WFKnight	0:9b3d4731edbb	2827	"device_has": ["ANALOGIN", "CLCD", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SLEEP", "SPI"],
WFKnight	0:9b3d4731edbb	2828	"features": ["BLE"],
WFKnight	0:9b3d4731edbb	2829	"release_versions": ["2", "5"]
WFKnight	0:9b3d4731edbb	2830	},
WFKnight	0:9b3d4731edbb	2831	"RZ_A1XX": {
WFKnight	0:9b3d4731edbb	2832	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	2833	"core": "Cortex-A9",
WFKnight	0:9b3d4731edbb	2834	"supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
WFKnight	0:9b3d4731edbb	2835	"extra_labels": ["RENESAS", "RZ_A1XX"],
WFKnight	0:9b3d4731edbb	2836	"device_has": ["SLEEP", "USTICKER", "RTC", "ANALOGIN", "CAN", "ETHERNET", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
WFKnight	0:9b3d4731edbb	2837	"features": ["LWIP"],
WFKnight	0:9b3d4731edbb	2838	"program_cycle_s": 2,
WFKnight	0:9b3d4731edbb	2839	"overrides": {
WFKnight	0:9b3d4731edbb	2840	"network-default-interface-type": "ETHERNET"
WFKnight	0:9b3d4731edbb	2841	}
WFKnight	0:9b3d4731edbb	2842	},
WFKnight	0:9b3d4731edbb	2843	"RZ_A1H": {
WFKnight	0:9b3d4731edbb	2844	"inherits": ["RZ_A1XX"],
WFKnight	0:9b3d4731edbb	2845	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	2846	"extra_labels_add": ["RZA1H", "MBRZA1H", "RZ_A1_EMAC"],
WFKnight	0:9b3d4731edbb	2847	"device_has_add": ["EMAC"],
WFKnight	0:9b3d4731edbb	2848	"release_versions": ["2", "5"]
WFKnight	0:9b3d4731edbb	2849	},
WFKnight	0:9b3d4731edbb	2850	"VK_RZ_A1H": {
WFKnight	0:9b3d4731edbb	2851	"inherits": ["RZ_A1XX"],
WFKnight	0:9b3d4731edbb	2852	"extra_labels_add": ["RZA1H", "VKRZA1H", "RZ_A1_EMAC"],
WFKnight	0:9b3d4731edbb	2853	"device_has_add": ["EMAC"],
WFKnight	0:9b3d4731edbb	2854	"release_versions": ["2", "5"]
WFKnight	0:9b3d4731edbb	2855	},
WFKnight	0:9b3d4731edbb	2856	"GR_LYCHEE": {
WFKnight	0:9b3d4731edbb	2857	"inherits": ["RZ_A1XX"],
WFKnight	0:9b3d4731edbb	2858	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	2859	"extra_labels_add": ["RZA1UL", "MBRZA1LU"],
WFKnight	0:9b3d4731edbb	2860	"device_has_add": ["TRNG"],
WFKnight	0:9b3d4731edbb	2861	"device_has_remove": ["ETHERNET"],
WFKnight	0:9b3d4731edbb	2862	"features_remove": ["LWIP"],
WFKnight	0:9b3d4731edbb	2863	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	2864	"overrides": {
WFKnight	0:9b3d4731edbb	2865	"network-default-interface-type": null
WFKnight	0:9b3d4731edbb	2866	}
WFKnight	0:9b3d4731edbb	2867	},
WFKnight	0:9b3d4731edbb	2868	"MAXWSNENV": {
WFKnight	0:9b3d4731edbb	2869	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	2870	"core": "Cortex-M3",
WFKnight	0:9b3d4731edbb	2871	"macros": ["__SYSTEM_HFX=24000000"],
WFKnight	0:9b3d4731edbb	2872	"extra_labels": ["Maxim", "MAX32610"],
WFKnight	0:9b3d4731edbb	2873	"supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
WFKnight	0:9b3d4731edbb	2874	"device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"],
WFKnight	0:9b3d4731edbb	2875	"features": ["BLE"],
WFKnight	0:9b3d4731edbb	2876	"release_versions": []
WFKnight	0:9b3d4731edbb	2877	},
WFKnight	0:9b3d4731edbb	2878	"MAX32600MBED": {
WFKnight	0:9b3d4731edbb	2879	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	2880	"core": "Cortex-M3",
WFKnight	0:9b3d4731edbb	2881	"macros": ["__SYSTEM_HFX=24000000"],
WFKnight	0:9b3d4731edbb	2882	"extra_labels": ["Maxim", "MAX32600"],
WFKnight	0:9b3d4731edbb	2883	"supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
WFKnight	0:9b3d4731edbb	2884	"device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"],
WFKnight	0:9b3d4731edbb	2885	"release_versions": ["2", "5"]
WFKnight	0:9b3d4731edbb	2886	},
WFKnight	0:9b3d4731edbb	2887	"MAX32620HSP": {
WFKnight	0:9b3d4731edbb	2888	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	2889	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	2890	"extra_labels": ["Maxim", "MAX32620"],
WFKnight	0:9b3d4731edbb	2891	"supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
WFKnight	0:9b3d4731edbb	2892	"device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "STDIO_MESSAGES"],
WFKnight	0:9b3d4731edbb	2893	"features": ["BLE"],
WFKnight	0:9b3d4731edbb	2894	"release_versions": []
WFKnight	0:9b3d4731edbb	2895	},
WFKnight	0:9b3d4731edbb	2896	"MAX32620FTHR": {
WFKnight	0:9b3d4731edbb	2897	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	2898	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	2899	"macros": ["__SYSTEM_HFX=96000000","TARGET=MAX32620","TARGET_REV=0x4332","OPEN_DRAIN_LEDS"],
WFKnight	0:9b3d4731edbb	2900	"extra_labels": ["Maxim", "MAX32620C"],
WFKnight	0:9b3d4731edbb	2901	"supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
WFKnight	0:9b3d4731edbb	2902	"device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "LPTICKER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES", "USTICKER"],
WFKnight	0:9b3d4731edbb	2903	"release_versions": ["2", "5"]
WFKnight	0:9b3d4731edbb	2904	},
WFKnight	0:9b3d4731edbb	2905	"MAX32625_BASE": {
WFKnight	0:9b3d4731edbb	2906	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	2907	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	2908	"macros": ["TARGET=MAX32625","TARGET_REV=0x4132", "OPEN_DRAIN_LEDS"],
WFKnight	0:9b3d4731edbb	2909	"extra_labels": ["Maxim", "MAX32625"],
WFKnight	0:9b3d4731edbb	2910	"supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
WFKnight	0:9b3d4731edbb	2911	"device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "LPTICKER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES", "USTICKER"],
WFKnight	0:9b3d4731edbb	2912	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	2913	"public": false
WFKnight	0:9b3d4731edbb	2914	},
WFKnight	0:9b3d4731edbb	2915	"MAX32625_BOOT": {
WFKnight	0:9b3d4731edbb	2916	"inherits": ["MAX32625_BASE"],
WFKnight	0:9b3d4731edbb	2917	"extra_labels_add": ["MAX32625_BOOT"],
WFKnight	0:9b3d4731edbb	2918	"public": false
WFKnight	0:9b3d4731edbb	2919	},
WFKnight	0:9b3d4731edbb	2920	"MAX32625_NO_BOOT": {
WFKnight	0:9b3d4731edbb	2921	"inherits": ["MAX32625_BASE"],
WFKnight	0:9b3d4731edbb	2922	"extra_labels_add": ["MAX32625_NO_BOOT"],
WFKnight	0:9b3d4731edbb	2923	"public": false
WFKnight	0:9b3d4731edbb	2924	},
WFKnight	0:9b3d4731edbb	2925	"MAX32625MBED": {
WFKnight	0:9b3d4731edbb	2926	"inherits": ["MAX32625_NO_BOOT"]
WFKnight	0:9b3d4731edbb	2927	},
WFKnight	0:9b3d4731edbb	2928	"MAX32625PICO": {
WFKnight	0:9b3d4731edbb	2929	"inherits": ["MAX32625_BOOT"],
WFKnight	0:9b3d4731edbb	2930	"extra_labels_add": ["MAX32625PICO_BASE"]
WFKnight	0:9b3d4731edbb	2931	},
WFKnight	0:9b3d4731edbb	2932	"MAX32625PICO_NO_BOOT": {
WFKnight	0:9b3d4731edbb	2933	"inherits": ["MAX32625_NO_BOOT"],
WFKnight	0:9b3d4731edbb	2934	"extra_labels_add": ["MAX32625PICO_BASE"]
WFKnight	0:9b3d4731edbb	2935	},
WFKnight	0:9b3d4731edbb	2936	"MAX32625NEXPAQ": {
WFKnight	0:9b3d4731edbb	2937	"inherits": ["MAX32625_BASE"],
WFKnight	0:9b3d4731edbb	2938	"extra_labels_add": ["MAX32625NEXPAQ"]
WFKnight	0:9b3d4731edbb	2939	},
WFKnight	0:9b3d4731edbb	2940	"MAX32630FTHR": {
WFKnight	0:9b3d4731edbb	2941	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	2942	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	2943	"macros": ["__SYSTEM_HFX=96000000", "TARGET=MAX32630", "TARGET_REV=0x4132", "BLE_HCI_UART", "OPEN_DRAIN_LEDS"],
WFKnight	0:9b3d4731edbb	2944	"extra_labels": ["Maxim", "MAX32630"],
WFKnight	0:9b3d4731edbb	2945	"supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
WFKnight	0:9b3d4731edbb	2946	"device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "LPTICKER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_FC", "SPI", "STDIO_MESSAGES", "USTICKER"],
WFKnight	0:9b3d4731edbb	2947	"features": ["BLE"],
WFKnight	0:9b3d4731edbb	2948	"release_versions": ["2", "5"]
WFKnight	0:9b3d4731edbb	2949	},
WFKnight	0:9b3d4731edbb	2950	"EFM32": {
WFKnight	0:9b3d4731edbb	2951	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	2952	"extra_labels": ["Silicon_Labs", "EFM32"],
WFKnight	0:9b3d4731edbb	2953	"macros": ["MBEDTLS_CONFIG_HW_SUPPORT", "MBED_TICKLESS", "EM_MSC_RUN_FROM_FLASH"],
WFKnight	0:9b3d4731edbb	2954	"public": false
WFKnight	0:9b3d4731edbb	2955	},
WFKnight	0:9b3d4731edbb	2956	"EFM32GG990F1024": {
WFKnight	0:9b3d4731edbb	2957	"inherits": ["EFM32"],
WFKnight	0:9b3d4731edbb	2958	"extra_labels_add": ["EFM32GG", "1024K", "SL_AES"],
WFKnight	0:9b3d4731edbb	2959	"core": "Cortex-M3",
WFKnight	0:9b3d4731edbb	2960	"macros_add": ["EFM32GG990F1024", "TRANSACTION_QUEUE_SIZE_SPI=4"],
WFKnight	0:9b3d4731edbb	2961	"supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
WFKnight	0:9b3d4731edbb	2962	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	2963	"device_name": "EFM32GG990F1024",
WFKnight	0:9b3d4731edbb	2964	"public": false,
WFKnight	0:9b3d4731edbb	2965	"bootloader_supported": true
WFKnight	0:9b3d4731edbb	2966	},
WFKnight	0:9b3d4731edbb	2967	"EFM32GG_STK3700": {
WFKnight	0:9b3d4731edbb	2968	"inherits": ["EFM32GG990F1024"],
WFKnight	0:9b3d4731edbb	2969	"progen": {"target": "efm32gg-stk"},
WFKnight	0:9b3d4731edbb	2970	"device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LPTICKER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "USTICKER", "FLASH", "ITM"],
WFKnight	0:9b3d4731edbb	2971	"forced_reset_timeout": 2,
WFKnight	0:9b3d4731edbb	2972	"config": {
WFKnight	0:9b3d4731edbb	2973	"hf_clock_src": {
WFKnight	0:9b3d4731edbb	2974	"help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
WFKnight	0:9b3d4731edbb	2975	"value": "HFXO",
WFKnight	0:9b3d4731edbb	2976	"macro_name": "CORE_CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	2977	},
WFKnight	0:9b3d4731edbb	2978	"hfxo_clock_freq": {
WFKnight	0:9b3d4731edbb	2979	"help": "Value: External crystal frequency in hertz",
WFKnight	0:9b3d4731edbb	2980	"value": "48000000",
WFKnight	0:9b3d4731edbb	2981	"macro_name": "HFXO_FREQUENCY"
WFKnight	0:9b3d4731edbb	2982	},
WFKnight	0:9b3d4731edbb	2983	"lf_clock_src": {
WFKnight	0:9b3d4731edbb	2984	"help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
WFKnight	0:9b3d4731edbb	2985	"value": "LFXO",
WFKnight	0:9b3d4731edbb	2986	"macro_name": "LOW_ENERGY_CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	2987	},
WFKnight	0:9b3d4731edbb	2988	"lfxo_clock_freq": {
WFKnight	0:9b3d4731edbb	2989	"help": "Value: External crystal frequency in hertz",
WFKnight	0:9b3d4731edbb	2990	"value": "32768",
WFKnight	0:9b3d4731edbb	2991	"macro_name": "LFXO_FREQUENCY"
WFKnight	0:9b3d4731edbb	2992	},
WFKnight	0:9b3d4731edbb	2993	"hfrco_clock_freq": {
WFKnight	0:9b3d4731edbb	2994	"help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
WFKnight	0:9b3d4731edbb	2995	"value": "21000000",
WFKnight	0:9b3d4731edbb	2996	"macro_name": "HFRCO_FREQUENCY"
WFKnight	0:9b3d4731edbb	2997	},
WFKnight	0:9b3d4731edbb	2998	"hfrco_band_select": {
WFKnight	0:9b3d4731edbb	2999	"help": "Value: One of _CMU_HFRCOCTRL_BAND_28MHZ, _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!",
WFKnight	0:9b3d4731edbb	3000	"value": "_CMU_HFRCOCTRL_BAND_21MHZ",
WFKnight	0:9b3d4731edbb	3001	"macro_name": "HFRCO_FREQUENCY_ENUM"
WFKnight	0:9b3d4731edbb	3002	},
WFKnight	0:9b3d4731edbb	3003	"board_controller_enable": {
WFKnight	0:9b3d4731edbb	3004	"help": "Pin to pull high for enabling the USB serial port",
WFKnight	0:9b3d4731edbb	3005	"value": "PF7",
WFKnight	0:9b3d4731edbb	3006	"macro_name": "EFM_BC_EN"
WFKnight	0:9b3d4731edbb	3007	}
WFKnight	0:9b3d4731edbb	3008	}
WFKnight	0:9b3d4731edbb	3009	},
WFKnight	0:9b3d4731edbb	3010	"EFM32LG990F256": {
WFKnight	0:9b3d4731edbb	3011	"inherits": ["EFM32"],
WFKnight	0:9b3d4731edbb	3012	"extra_labels_add": ["EFM32LG", "256K", "SL_AES"],
WFKnight	0:9b3d4731edbb	3013	"core": "Cortex-M3",
WFKnight	0:9b3d4731edbb	3014	"macros_add": ["EFM32LG990F256", "TRANSACTION_QUEUE_SIZE_SPI=4"],
WFKnight	0:9b3d4731edbb	3015	"supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
WFKnight	0:9b3d4731edbb	3016	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	3017	"device_name": "EFM32LG990F256",
WFKnight	0:9b3d4731edbb	3018	"public": false,
WFKnight	0:9b3d4731edbb	3019	"bootloader_supported": true
WFKnight	0:9b3d4731edbb	3020	},
WFKnight	0:9b3d4731edbb	3021	"EFM32LG_STK3600": {
WFKnight	0:9b3d4731edbb	3022	"inherits": ["EFM32LG990F256"],
WFKnight	0:9b3d4731edbb	3023	"device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LPTICKER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "USTICKER", "FLASH"],
WFKnight	0:9b3d4731edbb	3024	"forced_reset_timeout": 2,
WFKnight	0:9b3d4731edbb	3025	"device_name": "EFM32LG990F256",
WFKnight	0:9b3d4731edbb	3026	"config": {
WFKnight	0:9b3d4731edbb	3027	"hf_clock_src": {
WFKnight	0:9b3d4731edbb	3028	"help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
WFKnight	0:9b3d4731edbb	3029	"value": "HFXO",
WFKnight	0:9b3d4731edbb	3030	"macro_name": "CORE_CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	3031	},
WFKnight	0:9b3d4731edbb	3032	"hfxo_clock_freq": {
WFKnight	0:9b3d4731edbb	3033	"help": "Value: External crystal frequency in hertz",
WFKnight	0:9b3d4731edbb	3034	"value": "48000000",
WFKnight	0:9b3d4731edbb	3035	"macro_name": "HFXO_FREQUENCY"
WFKnight	0:9b3d4731edbb	3036	},
WFKnight	0:9b3d4731edbb	3037	"lf_clock_src": {
WFKnight	0:9b3d4731edbb	3038	"help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
WFKnight	0:9b3d4731edbb	3039	"value": "LFXO",
WFKnight	0:9b3d4731edbb	3040	"macro_name": "LOW_ENERGY_CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	3041	},
WFKnight	0:9b3d4731edbb	3042	"lfxo_clock_freq": {
WFKnight	0:9b3d4731edbb	3043	"help": "Value: External crystal frequency in hertz",
WFKnight	0:9b3d4731edbb	3044	"value": "32768",
WFKnight	0:9b3d4731edbb	3045	"macro_name": "LFXO_FREQUENCY"
WFKnight	0:9b3d4731edbb	3046	},
WFKnight	0:9b3d4731edbb	3047	"hfrco_clock_freq": {
WFKnight	0:9b3d4731edbb	3048	"help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
WFKnight	0:9b3d4731edbb	3049	"value": "21000000",
WFKnight	0:9b3d4731edbb	3050	"macro_name": "HFRCO_FREQUENCY"
WFKnight	0:9b3d4731edbb	3051	},
WFKnight	0:9b3d4731edbb	3052	"hfrco_band_select": {
WFKnight	0:9b3d4731edbb	3053	"help": "Value: One of _CMU_HFRCOCTRL_BAND_28MHZ, _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!",
WFKnight	0:9b3d4731edbb	3054	"value": "_CMU_HFRCOCTRL_BAND_21MHZ",
WFKnight	0:9b3d4731edbb	3055	"macro_name": "HFRCO_FREQUENCY_ENUM"
WFKnight	0:9b3d4731edbb	3056	},
WFKnight	0:9b3d4731edbb	3057	"board_controller_enable": {
WFKnight	0:9b3d4731edbb	3058	"help": "Pin to pull high for enabling the USB serial port",
WFKnight	0:9b3d4731edbb	3059	"value": "PF7",
WFKnight	0:9b3d4731edbb	3060	"macro_name": "EFM_BC_EN"
WFKnight	0:9b3d4731edbb	3061	}
WFKnight	0:9b3d4731edbb	3062	}
WFKnight	0:9b3d4731edbb	3063	},
WFKnight	0:9b3d4731edbb	3064	"EFM32WG990F256": {
WFKnight	0:9b3d4731edbb	3065	"inherits": ["EFM32"],
WFKnight	0:9b3d4731edbb	3066	"extra_labels_add": ["EFM32WG", "256K", "SL_AES"],
WFKnight	0:9b3d4731edbb	3067	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	3068	"macros_add": ["EFM32WG990F256", "TRANSACTION_QUEUE_SIZE_SPI=4"],
WFKnight	0:9b3d4731edbb	3069	"supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
WFKnight	0:9b3d4731edbb	3070	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	3071	"device_name": "EFM32WG990F256",
WFKnight	0:9b3d4731edbb	3072	"public": false,
WFKnight	0:9b3d4731edbb	3073	"bootloader_supported": true
WFKnight	0:9b3d4731edbb	3074	},
WFKnight	0:9b3d4731edbb	3075	"EFM32WG_STK3800": {
WFKnight	0:9b3d4731edbb	3076	"inherits": ["EFM32WG990F256"],
WFKnight	0:9b3d4731edbb	3077	"progen": {"target": "efm32wg-stk"},
WFKnight	0:9b3d4731edbb	3078	"device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LPTICKER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "USTICKER", "FLASH"],
WFKnight	0:9b3d4731edbb	3079	"forced_reset_timeout": 2,
WFKnight	0:9b3d4731edbb	3080	"config": {
WFKnight	0:9b3d4731edbb	3081	"hf_clock_src": {
WFKnight	0:9b3d4731edbb	3082	"help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
WFKnight	0:9b3d4731edbb	3083	"value": "HFXO",
WFKnight	0:9b3d4731edbb	3084	"macro_name": "CORE_CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	3085	},
WFKnight	0:9b3d4731edbb	3086	"hfxo_clock_freq": {
WFKnight	0:9b3d4731edbb	3087	"help": "Value: External crystal frequency in hertz",
WFKnight	0:9b3d4731edbb	3088	"value": "48000000",
WFKnight	0:9b3d4731edbb	3089	"macro_name": "HFXO_FREQUENCY"
WFKnight	0:9b3d4731edbb	3090	},
WFKnight	0:9b3d4731edbb	3091	"lf_clock_src": {
WFKnight	0:9b3d4731edbb	3092	"help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
WFKnight	0:9b3d4731edbb	3093	"value": "LFXO",
WFKnight	0:9b3d4731edbb	3094	"macro_name": "LOW_ENERGY_CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	3095	},
WFKnight	0:9b3d4731edbb	3096	"lfxo_clock_freq": {
WFKnight	0:9b3d4731edbb	3097	"help": "Value: External crystal frequency in hertz",
WFKnight	0:9b3d4731edbb	3098	"value": "32768",
WFKnight	0:9b3d4731edbb	3099	"macro_name": "LFXO_FREQUENCY"
WFKnight	0:9b3d4731edbb	3100	},
WFKnight	0:9b3d4731edbb	3101	"hfrco_clock_freq": {
WFKnight	0:9b3d4731edbb	3102	"help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
WFKnight	0:9b3d4731edbb	3103	"value": "21000000",
WFKnight	0:9b3d4731edbb	3104	"macro_name": "HFRCO_FREQUENCY"
WFKnight	0:9b3d4731edbb	3105	},
WFKnight	0:9b3d4731edbb	3106	"hfrco_band_select": {
WFKnight	0:9b3d4731edbb	3107	"help": "Value: One of _CMU_HFRCOCTRL_BAND_28MHZ, _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!",
WFKnight	0:9b3d4731edbb	3108	"value": "_CMU_HFRCOCTRL_BAND_21MHZ",
WFKnight	0:9b3d4731edbb	3109	"macro_name": "HFRCO_FREQUENCY_ENUM"
WFKnight	0:9b3d4731edbb	3110	},
WFKnight	0:9b3d4731edbb	3111	"board_controller_enable": {
WFKnight	0:9b3d4731edbb	3112	"help": "Pin to pull high for enabling the USB serial port",
WFKnight	0:9b3d4731edbb	3113	"value": "PF7",
WFKnight	0:9b3d4731edbb	3114	"macro_name": "EFM_BC_EN"
WFKnight	0:9b3d4731edbb	3115	}
WFKnight	0:9b3d4731edbb	3116	}
WFKnight	0:9b3d4731edbb	3117	},
WFKnight	0:9b3d4731edbb	3118	"EFM32ZG222F32": {
WFKnight	0:9b3d4731edbb	3119	"inherits": ["EFM32"],
WFKnight	0:9b3d4731edbb	3120	"extra_labels_add": ["EFM32ZG", "32K", "SL_AES"],
WFKnight	0:9b3d4731edbb	3121	"core": "Cortex-M0+",
WFKnight	0:9b3d4731edbb	3122	"default_toolchain": "uARM",
WFKnight	0:9b3d4731edbb	3123	"macros_add": ["EFM32ZG222F32", "TRANSACTION_QUEUE_SIZE_SPI=0"],
WFKnight	0:9b3d4731edbb	3124	"supported_toolchains": ["GCC_ARM", "uARM", "IAR"],
WFKnight	0:9b3d4731edbb	3125	"default_lib": "small",
WFKnight	0:9b3d4731edbb	3126	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	3127	"device_name": "EFM32ZG222F32",
WFKnight	0:9b3d4731edbb	3128	"public": false
WFKnight	0:9b3d4731edbb	3129	},
WFKnight	0:9b3d4731edbb	3130	"EFM32ZG_STK3200": {
WFKnight	0:9b3d4731edbb	3131	"inherits": ["EFM32ZG222F32"],
WFKnight	0:9b3d4731edbb	3132	"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LPTICKER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "USTICKER"],
WFKnight	0:9b3d4731edbb	3133	"forced_reset_timeout": 2,
WFKnight	0:9b3d4731edbb	3134	"config": {
WFKnight	0:9b3d4731edbb	3135	"hf_clock_src": {
WFKnight	0:9b3d4731edbb	3136	"help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
WFKnight	0:9b3d4731edbb	3137	"value": "HFXO",
WFKnight	0:9b3d4731edbb	3138	"macro_name": "CORE_CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	3139	},
WFKnight	0:9b3d4731edbb	3140	"hfxo_clock_freq": {
WFKnight	0:9b3d4731edbb	3141	"help": "Value: External crystal frequency in hertz",
WFKnight	0:9b3d4731edbb	3142	"value": "24000000",
WFKnight	0:9b3d4731edbb	3143	"macro_name": "HFXO_FREQUENCY"
WFKnight	0:9b3d4731edbb	3144	},
WFKnight	0:9b3d4731edbb	3145	"lf_clock_src": {
WFKnight	0:9b3d4731edbb	3146	"help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
WFKnight	0:9b3d4731edbb	3147	"value": "LFXO",
WFKnight	0:9b3d4731edbb	3148	"macro_name": "LOW_ENERGY_CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	3149	},
WFKnight	0:9b3d4731edbb	3150	"lfxo_clock_freq": {
WFKnight	0:9b3d4731edbb	3151	"help": "Value: External crystal frequency in hertz",
WFKnight	0:9b3d4731edbb	3152	"value": "32768",
WFKnight	0:9b3d4731edbb	3153	"macro_name": "LFXO_FREQUENCY"
WFKnight	0:9b3d4731edbb	3154	},
WFKnight	0:9b3d4731edbb	3155	"hfrco_clock_freq": {
WFKnight	0:9b3d4731edbb	3156	"help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
WFKnight	0:9b3d4731edbb	3157	"value": "21000000",
WFKnight	0:9b3d4731edbb	3158	"macro_name": "HFRCO_FREQUENCY"
WFKnight	0:9b3d4731edbb	3159	},
WFKnight	0:9b3d4731edbb	3160	"hfrco_band_select": {
WFKnight	0:9b3d4731edbb	3161	"help": "Value: One of _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!",
WFKnight	0:9b3d4731edbb	3162	"value": "_CMU_HFRCOCTRL_BAND_21MHZ",
WFKnight	0:9b3d4731edbb	3163	"macro_name": "HFRCO_FREQUENCY_ENUM"
WFKnight	0:9b3d4731edbb	3164	},
WFKnight	0:9b3d4731edbb	3165	"board_controller_enable": {
WFKnight	0:9b3d4731edbb	3166	"help": "Pin to pull high for enabling the USB serial port",
WFKnight	0:9b3d4731edbb	3167	"value": "PA9",
WFKnight	0:9b3d4731edbb	3168	"macro_name": "EFM_BC_EN"
WFKnight	0:9b3d4731edbb	3169	}
WFKnight	0:9b3d4731edbb	3170	}
WFKnight	0:9b3d4731edbb	3171	},
WFKnight	0:9b3d4731edbb	3172	"EFM32HG322F64": {
WFKnight	0:9b3d4731edbb	3173	"inherits": ["EFM32"],
WFKnight	0:9b3d4731edbb	3174	"extra_labels_add": ["EFM32HG", "64K", "SL_AES"],
WFKnight	0:9b3d4731edbb	3175	"core": "Cortex-M0+",
WFKnight	0:9b3d4731edbb	3176	"default_toolchain": "uARM",
WFKnight	0:9b3d4731edbb	3177	"macros_add": ["EFM32HG322F64", "TRANSACTION_QUEUE_SIZE_SPI=0"],
WFKnight	0:9b3d4731edbb	3178	"supported_toolchains": ["GCC_ARM", "uARM", "IAR"],
WFKnight	0:9b3d4731edbb	3179	"default_lib": "small",
WFKnight	0:9b3d4731edbb	3180	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	3181	"device_name": "EFM32HG322F64",
WFKnight	0:9b3d4731edbb	3182	"public": false
WFKnight	0:9b3d4731edbb	3183	},
WFKnight	0:9b3d4731edbb	3184	"EFM32HG_STK3400": {
WFKnight	0:9b3d4731edbb	3185	"inherits": ["EFM32HG322F64"],
WFKnight	0:9b3d4731edbb	3186	"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LPTICKER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "USTICKER"],
WFKnight	0:9b3d4731edbb	3187	"forced_reset_timeout": 2,
WFKnight	0:9b3d4731edbb	3188	"config": {
WFKnight	0:9b3d4731edbb	3189	"hf_clock_src": {
WFKnight	0:9b3d4731edbb	3190	"help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
WFKnight	0:9b3d4731edbb	3191	"value": "HFXO",
WFKnight	0:9b3d4731edbb	3192	"macro_name": "CORE_CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	3193	},
WFKnight	0:9b3d4731edbb	3194	"hfxo_clock_freq": {
WFKnight	0:9b3d4731edbb	3195	"help": "Value: External crystal frequency in hertz",
WFKnight	0:9b3d4731edbb	3196	"value": "24000000",
WFKnight	0:9b3d4731edbb	3197	"macro_name": "HFXO_FREQUENCY"
WFKnight	0:9b3d4731edbb	3198	},
WFKnight	0:9b3d4731edbb	3199	"lf_clock_src": {
WFKnight	0:9b3d4731edbb	3200	"help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
WFKnight	0:9b3d4731edbb	3201	"value": "LFXO",
WFKnight	0:9b3d4731edbb	3202	"macro_name": "LOW_ENERGY_CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	3203	},
WFKnight	0:9b3d4731edbb	3204	"lfxo_clock_freq": {
WFKnight	0:9b3d4731edbb	3205	"help": "Value: External crystal frequency in hertz",
WFKnight	0:9b3d4731edbb	3206	"value": "32768",
WFKnight	0:9b3d4731edbb	3207	"macro_name": "LFXO_FREQUENCY"
WFKnight	0:9b3d4731edbb	3208	},
WFKnight	0:9b3d4731edbb	3209	"hfrco_clock_freq": {
WFKnight	0:9b3d4731edbb	3210	"help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
WFKnight	0:9b3d4731edbb	3211	"value": "21000000",
WFKnight	0:9b3d4731edbb	3212	"macro_name": "HFRCO_FREQUENCY"
WFKnight	0:9b3d4731edbb	3213	},
WFKnight	0:9b3d4731edbb	3214	"hfrco_band_select": {
WFKnight	0:9b3d4731edbb	3215	"help": "Value: One of _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!",
WFKnight	0:9b3d4731edbb	3216	"value": "_CMU_HFRCOCTRL_BAND_21MHZ",
WFKnight	0:9b3d4731edbb	3217	"macro_name": "HFRCO_FREQUENCY_ENUM"
WFKnight	0:9b3d4731edbb	3218	},
WFKnight	0:9b3d4731edbb	3219	"board_controller_enable": {
WFKnight	0:9b3d4731edbb	3220	"help": "Pin to pull high for enabling the USB serial port",
WFKnight	0:9b3d4731edbb	3221	"value": "PA9",
WFKnight	0:9b3d4731edbb	3222	"macro_name": "EFM_BC_EN"
WFKnight	0:9b3d4731edbb	3223	}
WFKnight	0:9b3d4731edbb	3224	}
WFKnight	0:9b3d4731edbb	3225	},
WFKnight	0:9b3d4731edbb	3226	"EFM32PG1B100F256GM32": {
WFKnight	0:9b3d4731edbb	3227	"inherits": ["EFM32"],
WFKnight	0:9b3d4731edbb	3228	"extra_labels_add": ["EFM32PG", "256K", "SL_CRYPTO"],
WFKnight	0:9b3d4731edbb	3229	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	3230	"macros_add": ["EFM32PG1B100F256GM32", "TRANSACTION_QUEUE_SIZE_SPI=4"],
WFKnight	0:9b3d4731edbb	3231	"supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
WFKnight	0:9b3d4731edbb	3232	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	3233	"device_name": "EFM32PG1B100F256GM32",
WFKnight	0:9b3d4731edbb	3234	"public": false,
WFKnight	0:9b3d4731edbb	3235	"bootloader_supported": true
WFKnight	0:9b3d4731edbb	3236	},
WFKnight	0:9b3d4731edbb	3237	"EFM32PG_STK3401": {
WFKnight	0:9b3d4731edbb	3238	"inherits": ["EFM32PG1B100F256GM32"],
WFKnight	0:9b3d4731edbb	3239	"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LPTICKER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "USTICKER", "FLASH"],
WFKnight	0:9b3d4731edbb	3240	"forced_reset_timeout": 2,
WFKnight	0:9b3d4731edbb	3241	"config": {
WFKnight	0:9b3d4731edbb	3242	"hf_clock_src": {
WFKnight	0:9b3d4731edbb	3243	"help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
WFKnight	0:9b3d4731edbb	3244	"value": "HFXO",
WFKnight	0:9b3d4731edbb	3245	"macro_name": "CORE_CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	3246	},
WFKnight	0:9b3d4731edbb	3247	"hfxo_clock_freq": {
WFKnight	0:9b3d4731edbb	3248	"help": "Value: External crystal frequency in hertz",
WFKnight	0:9b3d4731edbb	3249	"value": "40000000",
WFKnight	0:9b3d4731edbb	3250	"macro_name": "HFXO_FREQUENCY"
WFKnight	0:9b3d4731edbb	3251	},
WFKnight	0:9b3d4731edbb	3252	"lf_clock_src": {
WFKnight	0:9b3d4731edbb	3253	"help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
WFKnight	0:9b3d4731edbb	3254	"value": "LFXO",
WFKnight	0:9b3d4731edbb	3255	"macro_name": "LOW_ENERGY_CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	3256	},
WFKnight	0:9b3d4731edbb	3257	"lfxo_clock_freq": {
WFKnight	0:9b3d4731edbb	3258	"help": "Value: External crystal frequency in hertz",
WFKnight	0:9b3d4731edbb	3259	"value": "32768",
WFKnight	0:9b3d4731edbb	3260	"macro_name": "LFXO_FREQUENCY"
WFKnight	0:9b3d4731edbb	3261	},
WFKnight	0:9b3d4731edbb	3262	"hfrco_clock_freq": {
WFKnight	0:9b3d4731edbb	3263	"help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
WFKnight	0:9b3d4731edbb	3264	"value": "32000000",
WFKnight	0:9b3d4731edbb	3265	"macro_name": "HFRCO_FREQUENCY"
WFKnight	0:9b3d4731edbb	3266	},
WFKnight	0:9b3d4731edbb	3267	"hfrco_band_select": {
WFKnight	0:9b3d4731edbb	3268	"help": "Value: One of cmuHFRCOFreq_1M0Hz, cmuHFRCOFreq_2M0Hz, cmuHFRCOFreq_4M0Hz, cmuHFRCOFreq_7M0Hz, cmuHFRCOFreq_13M0Hz, cmuHFRCOFreq_16M0Hz, cmuHFRCOFreq_19M0Hz, cmuHFRCOFreq_26M0Hz, cmuHFRCOFreq_32M0Hz, cmuHFRCOFreq_38M0Hz. Be sure to set hfrco_clock_freq accordingly!",
WFKnight	0:9b3d4731edbb	3269	"value": "cmuHFRCOFreq_32M0Hz",
WFKnight	0:9b3d4731edbb	3270	"macro_name": "HFRCO_FREQUENCY_ENUM"
WFKnight	0:9b3d4731edbb	3271	},
WFKnight	0:9b3d4731edbb	3272	"board_controller_enable": {
WFKnight	0:9b3d4731edbb	3273	"help": "Pin to pull high for enabling the USB serial port",
WFKnight	0:9b3d4731edbb	3274	"value": "PA5",
WFKnight	0:9b3d4731edbb	3275	"macro_name": "EFM_BC_EN"
WFKnight	0:9b3d4731edbb	3276	}
WFKnight	0:9b3d4731edbb	3277	}
WFKnight	0:9b3d4731edbb	3278	},
WFKnight	0:9b3d4731edbb	3279	"EFR32MG1P132F256GM48": {
WFKnight	0:9b3d4731edbb	3280	"inherits": ["EFM32"],
WFKnight	0:9b3d4731edbb	3281	"extra_labels_add": ["EFR32MG1", "EFR32_1", "256K", "SL_RAIL", "SL_CRYPTO"],
WFKnight	0:9b3d4731edbb	3282	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	3283	"macros_add": ["EFR32MG1P132F256GM48", "TRANSACTION_QUEUE_SIZE_SPI=4"],
WFKnight	0:9b3d4731edbb	3284	"supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
WFKnight	0:9b3d4731edbb	3285	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	3286	"device_name": "EFR32MG1P132F256GM48",
WFKnight	0:9b3d4731edbb	3287	"public": false,
WFKnight	0:9b3d4731edbb	3288	"bootloader_supported": true
WFKnight	0:9b3d4731edbb	3289	},
WFKnight	0:9b3d4731edbb	3290	"EFR32MG1P233F256GM48": {
WFKnight	0:9b3d4731edbb	3291	"inherits": ["EFM32"],
WFKnight	0:9b3d4731edbb	3292	"extra_labels_add": ["EFR32MG1", "EFR32_1", "256K", "SL_RAIL", "SL_CRYPTO"],
WFKnight	0:9b3d4731edbb	3293	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	3294	"macros_add": ["EFR32MG1P233F256GM48", "TRANSACTION_QUEUE_SIZE_SPI=4"],
WFKnight	0:9b3d4731edbb	3295	"supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
WFKnight	0:9b3d4731edbb	3296	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	3297	"public": false,
WFKnight	0:9b3d4731edbb	3298	"bootloader_supported": true
WFKnight	0:9b3d4731edbb	3299	},
WFKnight	0:9b3d4731edbb	3300	"EFR32MG1_BRD4150": {
WFKnight	0:9b3d4731edbb	3301	"inherits": ["EFR32MG1P132F256GM48"],
WFKnight	0:9b3d4731edbb	3302	"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LPTICKER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "USTICKER", "FLASH"],
WFKnight	0:9b3d4731edbb	3303	"forced_reset_timeout": 2,
WFKnight	0:9b3d4731edbb	3304	"config": {
WFKnight	0:9b3d4731edbb	3305	"hf_clock_src": {
WFKnight	0:9b3d4731edbb	3306	"help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
WFKnight	0:9b3d4731edbb	3307	"value": "HFXO",
WFKnight	0:9b3d4731edbb	3308	"macro_name": "CORE_CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	3309	},
WFKnight	0:9b3d4731edbb	3310	"hfxo_clock_freq": {
WFKnight	0:9b3d4731edbb	3311	"help": "Value: External crystal frequency in hertz",
WFKnight	0:9b3d4731edbb	3312	"value": "38400000",
WFKnight	0:9b3d4731edbb	3313	"macro_name": "HFXO_FREQUENCY"
WFKnight	0:9b3d4731edbb	3314	},
WFKnight	0:9b3d4731edbb	3315	"lf_clock_src": {
WFKnight	0:9b3d4731edbb	3316	"help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
WFKnight	0:9b3d4731edbb	3317	"value": "LFXO",
WFKnight	0:9b3d4731edbb	3318	"macro_name": "LOW_ENERGY_CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	3319	},
WFKnight	0:9b3d4731edbb	3320	"lfxo_clock_freq": {
WFKnight	0:9b3d4731edbb	3321	"help": "Value: External crystal frequency in hertz",
WFKnight	0:9b3d4731edbb	3322	"value": "32768",
WFKnight	0:9b3d4731edbb	3323	"macro_name": "LFXO_FREQUENCY"
WFKnight	0:9b3d4731edbb	3324	},
WFKnight	0:9b3d4731edbb	3325	"hfrco_clock_freq": {
WFKnight	0:9b3d4731edbb	3326	"help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
WFKnight	0:9b3d4731edbb	3327	"value": "32000000",
WFKnight	0:9b3d4731edbb	3328	"macro_name": "HFRCO_FREQUENCY"
WFKnight	0:9b3d4731edbb	3329	},
WFKnight	0:9b3d4731edbb	3330	"hfrco_band_select": {
WFKnight	0:9b3d4731edbb	3331	"help": "Value: One of cmuHFRCOFreq_1M0Hz, cmuHFRCOFreq_2M0Hz, cmuHFRCOFreq_4M0Hz, cmuHFRCOFreq_7M0Hz, cmuHFRCOFreq_13M0Hz, cmuHFRCOFreq_16M0Hz, cmuHFRCOFreq_19M0Hz, cmuHFRCOFreq_26M0Hz, cmuHFRCOFreq_32M0Hz, cmuHFRCOFreq_38M0Hz. Be sure to set hfrco_clock_freq accordingly!",
WFKnight	0:9b3d4731edbb	3332	"value": "cmuHFRCOFreq_32M0Hz",
WFKnight	0:9b3d4731edbb	3333	"macro_name": "HFRCO_FREQUENCY_ENUM"
WFKnight	0:9b3d4731edbb	3334	},
WFKnight	0:9b3d4731edbb	3335	"board_controller_enable": {
WFKnight	0:9b3d4731edbb	3336	"help": "Pin to pull high for enabling the USB serial port",
WFKnight	0:9b3d4731edbb	3337	"value": "PA5",
WFKnight	0:9b3d4731edbb	3338	"macro_name": "EFM_BC_EN"
WFKnight	0:9b3d4731edbb	3339	}
WFKnight	0:9b3d4731edbb	3340	},
WFKnight	0:9b3d4731edbb	3341	"public": false
WFKnight	0:9b3d4731edbb	3342	},
WFKnight	0:9b3d4731edbb	3343	"TB_SENSE_1": {
WFKnight	0:9b3d4731edbb	3344	"inherits": ["EFR32MG1P233F256GM48"],
WFKnight	0:9b3d4731edbb	3345	"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LPTICKER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "USTICKER", "FLASH"],
WFKnight	0:9b3d4731edbb	3346	"forced_reset_timeout": 5,
WFKnight	0:9b3d4731edbb	3347	"config": {
WFKnight	0:9b3d4731edbb	3348	"hf_clock_src": {
WFKnight	0:9b3d4731edbb	3349	"help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
WFKnight	0:9b3d4731edbb	3350	"value": "HFXO",
WFKnight	0:9b3d4731edbb	3351	"macro_name": "CORE_CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	3352	},
WFKnight	0:9b3d4731edbb	3353	"hfxo_clock_freq": {
WFKnight	0:9b3d4731edbb	3354	"help": "Value: External crystal frequency in hertz",
WFKnight	0:9b3d4731edbb	3355	"value": "38400000",
WFKnight	0:9b3d4731edbb	3356	"macro_name": "HFXO_FREQUENCY"
WFKnight	0:9b3d4731edbb	3357	},
WFKnight	0:9b3d4731edbb	3358	"lf_clock_src": {
WFKnight	0:9b3d4731edbb	3359	"help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
WFKnight	0:9b3d4731edbb	3360	"value": "LFXO",
WFKnight	0:9b3d4731edbb	3361	"macro_name": "LOW_ENERGY_CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	3362	},
WFKnight	0:9b3d4731edbb	3363	"lfxo_clock_freq": {
WFKnight	0:9b3d4731edbb	3364	"help": "Value: External crystal frequency in hertz",
WFKnight	0:9b3d4731edbb	3365	"value": "32768",
WFKnight	0:9b3d4731edbb	3366	"macro_name": "LFXO_FREQUENCY"
WFKnight	0:9b3d4731edbb	3367	},
WFKnight	0:9b3d4731edbb	3368	"hfrco_clock_freq": {
WFKnight	0:9b3d4731edbb	3369	"help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
WFKnight	0:9b3d4731edbb	3370	"value": "32000000",
WFKnight	0:9b3d4731edbb	3371	"macro_name": "HFRCO_FREQUENCY"
WFKnight	0:9b3d4731edbb	3372	},
WFKnight	0:9b3d4731edbb	3373	"hfrco_band_select": {
WFKnight	0:9b3d4731edbb	3374	"help": "Value: One of cmuHFRCOFreq_1M0Hz, cmuHFRCOFreq_2M0Hz, cmuHFRCOFreq_4M0Hz, cmuHFRCOFreq_7M0Hz, cmuHFRCOFreq_13M0Hz, cmuHFRCOFreq_16M0Hz, cmuHFRCOFreq_19M0Hz, cmuHFRCOFreq_26M0Hz, cmuHFRCOFreq_32M0Hz, cmuHFRCOFreq_38M0Hz. Be sure to set hfrco_clock_freq accordingly!",
WFKnight	0:9b3d4731edbb	3375	"value": "cmuHFRCOFreq_32M0Hz",
WFKnight	0:9b3d4731edbb	3376	"macro_name": "HFRCO_FREQUENCY_ENUM"
WFKnight	0:9b3d4731edbb	3377	}
WFKnight	0:9b3d4731edbb	3378	}
WFKnight	0:9b3d4731edbb	3379	},
WFKnight	0:9b3d4731edbb	3380	"EFM32PG12B500F1024GL125": {
WFKnight	0:9b3d4731edbb	3381	"inherits": ["EFM32"],
WFKnight	0:9b3d4731edbb	3382	"extra_labels_add": ["EFM32PG12", "1024K", "SL_CRYPTO"],
WFKnight	0:9b3d4731edbb	3383	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	3384	"macros_add": ["EFM32PG12B500F1024GL125", "TRANSACTION_QUEUE_SIZE_SPI=4"],
WFKnight	0:9b3d4731edbb	3385	"supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
WFKnight	0:9b3d4731edbb	3386	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	3387	"device_name": "EFM32PG12B500F1024GL125",
WFKnight	0:9b3d4731edbb	3388	"public": false,
WFKnight	0:9b3d4731edbb	3389	"bootloader_supported": true
WFKnight	0:9b3d4731edbb	3390	},
WFKnight	0:9b3d4731edbb	3391	"EFM32PG12_STK3402": {
WFKnight	0:9b3d4731edbb	3392	"inherits": ["EFM32PG12B500F1024GL125"],
WFKnight	0:9b3d4731edbb	3393	"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LPTICKER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "USTICKER", "TRNG", "FLASH"],
WFKnight	0:9b3d4731edbb	3394	"forced_reset_timeout": 2,
WFKnight	0:9b3d4731edbb	3395	"config": {
WFKnight	0:9b3d4731edbb	3396	"hf_clock_src": {
WFKnight	0:9b3d4731edbb	3397	"help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
WFKnight	0:9b3d4731edbb	3398	"value": "HFXO",
WFKnight	0:9b3d4731edbb	3399	"macro_name": "CORE_CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	3400	},
WFKnight	0:9b3d4731edbb	3401	"hfxo_clock_freq": {
WFKnight	0:9b3d4731edbb	3402	"help": "Value: External crystal frequency in hertz",
WFKnight	0:9b3d4731edbb	3403	"value": "40000000",
WFKnight	0:9b3d4731edbb	3404	"macro_name": "HFXO_FREQUENCY"
WFKnight	0:9b3d4731edbb	3405	},
WFKnight	0:9b3d4731edbb	3406	"lf_clock_src": {
WFKnight	0:9b3d4731edbb	3407	"help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
WFKnight	0:9b3d4731edbb	3408	"value": "LFXO",
WFKnight	0:9b3d4731edbb	3409	"macro_name": "LOW_ENERGY_CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	3410	},
WFKnight	0:9b3d4731edbb	3411	"lfxo_clock_freq": {
WFKnight	0:9b3d4731edbb	3412	"help": "Value: External crystal frequency in hertz",
WFKnight	0:9b3d4731edbb	3413	"value": "32768",
WFKnight	0:9b3d4731edbb	3414	"macro_name": "LFXO_FREQUENCY"
WFKnight	0:9b3d4731edbb	3415	},
WFKnight	0:9b3d4731edbb	3416	"hfrco_clock_freq": {
WFKnight	0:9b3d4731edbb	3417	"help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
WFKnight	0:9b3d4731edbb	3418	"value": "32000000",
WFKnight	0:9b3d4731edbb	3419	"macro_name": "HFRCO_FREQUENCY"
WFKnight	0:9b3d4731edbb	3420	},
WFKnight	0:9b3d4731edbb	3421	"hfrco_band_select": {
WFKnight	0:9b3d4731edbb	3422	"help": "Value: One of cmuHFRCOFreq_1M0Hz, cmuHFRCOFreq_2M0Hz, cmuHFRCOFreq_4M0Hz, cmuHFRCOFreq_7M0Hz, cmuHFRCOFreq_13M0Hz, cmuHFRCOFreq_16M0Hz, cmuHFRCOFreq_19M0Hz, cmuHFRCOFreq_26M0Hz, cmuHFRCOFreq_32M0Hz, cmuHFRCOFreq_38M0Hz. Be sure to set hfrco_clock_freq accordingly!",
WFKnight	0:9b3d4731edbb	3423	"value": "cmuHFRCOFreq_32M0Hz",
WFKnight	0:9b3d4731edbb	3424	"macro_name": "HFRCO_FREQUENCY_ENUM"
WFKnight	0:9b3d4731edbb	3425	},
WFKnight	0:9b3d4731edbb	3426	"board_controller_enable": {
WFKnight	0:9b3d4731edbb	3427	"help": "Pin to pull high for enabling the USB serial port",
WFKnight	0:9b3d4731edbb	3428	"value": "PA5",
WFKnight	0:9b3d4731edbb	3429	"macro_name": "EFM_BC_EN"
WFKnight	0:9b3d4731edbb	3430	}
WFKnight	0:9b3d4731edbb	3431	}
WFKnight	0:9b3d4731edbb	3432	},
WFKnight	0:9b3d4731edbb	3433	"EFR32MG12P332F1024GL125": {
WFKnight	0:9b3d4731edbb	3434	"inherits": ["EFM32"],
WFKnight	0:9b3d4731edbb	3435	"extra_labels_add": ["EFR32MG12", "EFR32_12", "1024K", "SL_RAIL", "SL_CRYPTO"],
WFKnight	0:9b3d4731edbb	3436	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	3437	"macros_add": ["EFR32MG12P332F1024GL125", "TRANSACTION_QUEUE_SIZE_SPI=4"],
WFKnight	0:9b3d4731edbb	3438	"supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
WFKnight	0:9b3d4731edbb	3439	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	3440	"device_name": "EFR32MG12P332F1024GL125",
WFKnight	0:9b3d4731edbb	3441	"public": false,
WFKnight	0:9b3d4731edbb	3442	"bootloader_supported": true
WFKnight	0:9b3d4731edbb	3443	},
WFKnight	0:9b3d4731edbb	3444	"TB_SENSE_12": {
WFKnight	0:9b3d4731edbb	3445	"inherits": ["EFR32MG12P332F1024GL125"],
WFKnight	0:9b3d4731edbb	3446	"device_name": "EFR32MG12P332F1024GL125",
WFKnight	0:9b3d4731edbb	3447	"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LPTICKER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "USTICKER", "TRNG", "FLASH"],
WFKnight	0:9b3d4731edbb	3448	"forced_reset_timeout": 5,
WFKnight	0:9b3d4731edbb	3449	"config": {
WFKnight	0:9b3d4731edbb	3450	"hf_clock_src": {
WFKnight	0:9b3d4731edbb	3451	"help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
WFKnight	0:9b3d4731edbb	3452	"value": "HFXO",
WFKnight	0:9b3d4731edbb	3453	"macro_name": "CORE_CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	3454	},
WFKnight	0:9b3d4731edbb	3455	"hfxo_clock_freq": {
WFKnight	0:9b3d4731edbb	3456	"help": "Value: External crystal frequency in hertz",
WFKnight	0:9b3d4731edbb	3457	"value": "38400000",
WFKnight	0:9b3d4731edbb	3458	"macro_name": "HFXO_FREQUENCY"
WFKnight	0:9b3d4731edbb	3459	},
WFKnight	0:9b3d4731edbb	3460	"lf_clock_src": {
WFKnight	0:9b3d4731edbb	3461	"help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
WFKnight	0:9b3d4731edbb	3462	"value": "LFXO",
WFKnight	0:9b3d4731edbb	3463	"macro_name": "LOW_ENERGY_CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	3464	},
WFKnight	0:9b3d4731edbb	3465	"lfxo_clock_freq": {
WFKnight	0:9b3d4731edbb	3466	"help": "Value: External crystal frequency in hertz",
WFKnight	0:9b3d4731edbb	3467	"value": "32768",
WFKnight	0:9b3d4731edbb	3468	"macro_name": "LFXO_FREQUENCY"
WFKnight	0:9b3d4731edbb	3469	},
WFKnight	0:9b3d4731edbb	3470	"hfrco_clock_freq": {
WFKnight	0:9b3d4731edbb	3471	"help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
WFKnight	0:9b3d4731edbb	3472	"value": "32000000",
WFKnight	0:9b3d4731edbb	3473	"macro_name": "HFRCO_FREQUENCY"
WFKnight	0:9b3d4731edbb	3474	},
WFKnight	0:9b3d4731edbb	3475	"hfrco_band_select": {
WFKnight	0:9b3d4731edbb	3476	"help": "Value: One of cmuHFRCOFreq_1M0Hz, cmuHFRCOFreq_2M0Hz, cmuHFRCOFreq_4M0Hz, cmuHFRCOFreq_7M0Hz, cmuHFRCOFreq_13M0Hz, cmuHFRCOFreq_16M0Hz, cmuHFRCOFreq_19M0Hz, cmuHFRCOFreq_26M0Hz, cmuHFRCOFreq_32M0Hz, cmuHFRCOFreq_38M0Hz. Be sure to set hfrco_clock_freq accordingly!",
WFKnight	0:9b3d4731edbb	3477	"value": "cmuHFRCOFreq_32M0Hz",
WFKnight	0:9b3d4731edbb	3478	"macro_name": "HFRCO_FREQUENCY_ENUM"
WFKnight	0:9b3d4731edbb	3479	}
WFKnight	0:9b3d4731edbb	3480	}
WFKnight	0:9b3d4731edbb	3481	},
WFKnight	0:9b3d4731edbb	3482	"WIZWIKI_W7500": {
WFKnight	0:9b3d4731edbb	3483	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	3484	"core": "Cortex-M0",
WFKnight	0:9b3d4731edbb	3485	"extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500"],
WFKnight	0:9b3d4731edbb	3486	"macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
WFKnight	0:9b3d4731edbb	3487	"supported_toolchains": ["uARM", "ARM", "GCC_ARM", "IAR"],
WFKnight	0:9b3d4731edbb	3488	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	3489	"device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
WFKnight	0:9b3d4731edbb	3490	"release_versions": ["2", "5"]
WFKnight	0:9b3d4731edbb	3491	},
WFKnight	0:9b3d4731edbb	3492	"WIZWIKI_W7500P": {
WFKnight	0:9b3d4731edbb	3493	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	3494	"core": "Cortex-M0",
WFKnight	0:9b3d4731edbb	3495	"extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500P"],
WFKnight	0:9b3d4731edbb	3496	"macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
WFKnight	0:9b3d4731edbb	3497	"supported_toolchains": ["uARM", "ARM", "GCC_ARM", "IAR"],
WFKnight	0:9b3d4731edbb	3498	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	3499	"device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
WFKnight	0:9b3d4731edbb	3500	"release_versions": ["2", "5"]
WFKnight	0:9b3d4731edbb	3501	},
WFKnight	0:9b3d4731edbb	3502	"WIZWIKI_W7500ECO": {
WFKnight	0:9b3d4731edbb	3503	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	3504	"core": "Cortex-M0",
WFKnight	0:9b3d4731edbb	3505	"extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500ECO"],
WFKnight	0:9b3d4731edbb	3506	"macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
WFKnight	0:9b3d4731edbb	3507	"supported_toolchains": ["uARM", "ARM", "GCC_ARM", "IAR"],
WFKnight	0:9b3d4731edbb	3508	"device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
WFKnight	0:9b3d4731edbb	3509	"release_versions": ["2", "5"]
WFKnight	0:9b3d4731edbb	3510	},
WFKnight	0:9b3d4731edbb	3511	"SAMR21G18A": {
WFKnight	0:9b3d4731edbb	3512	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	3513	"core": "Cortex-M0+",
WFKnight	0:9b3d4731edbb	3514	"macros": ["__SAMR21G18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
WFKnight	0:9b3d4731edbb	3515	"extra_labels": ["Atmel", "SAM_CortexM0P", "SAMR21"],
WFKnight	0:9b3d4731edbb	3516	"supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
WFKnight	0:9b3d4731edbb	3517	"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
WFKnight	0:9b3d4731edbb	3518	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	3519	"device_name": "ATSAMR21G18A"
WFKnight	0:9b3d4731edbb	3520	},
WFKnight	0:9b3d4731edbb	3521	"SAMD21J18A": {
WFKnight	0:9b3d4731edbb	3522	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	3523	"core": "Cortex-M0+",
WFKnight	0:9b3d4731edbb	3524	"macros": ["__SAMD21J18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
WFKnight	0:9b3d4731edbb	3525	"extra_labels": ["Atmel", "SAM_CortexM0P", "SAMD21"],
WFKnight	0:9b3d4731edbb	3526	"supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
WFKnight	0:9b3d4731edbb	3527	"device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
WFKnight	0:9b3d4731edbb	3528	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	3529	"device_name": "ATSAMD21J18A"
WFKnight	0:9b3d4731edbb	3530	},
WFKnight	0:9b3d4731edbb	3531	"SAMD21G18A": {
WFKnight	0:9b3d4731edbb	3532	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	3533	"core": "Cortex-M0+",
WFKnight	0:9b3d4731edbb	3534	"macros": ["__SAMD21G18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
WFKnight	0:9b3d4731edbb	3535	"extra_labels": ["Atmel", "SAM_CortexM0P", "SAMD21"],
WFKnight	0:9b3d4731edbb	3536	"supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
WFKnight	0:9b3d4731edbb	3537	"device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
WFKnight	0:9b3d4731edbb	3538	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	3539	"device_name": "ATSAMD21G18A"
WFKnight	0:9b3d4731edbb	3540	},
WFKnight	0:9b3d4731edbb	3541	"SAML21J18A": {
WFKnight	0:9b3d4731edbb	3542	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	3543	"core": "Cortex-M0+",
WFKnight	0:9b3d4731edbb	3544	"macros": ["__SAML21J18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
WFKnight	0:9b3d4731edbb	3545	"extra_labels": ["Atmel", "SAM_CortexM0P", "SAML21"],
WFKnight	0:9b3d4731edbb	3546	"supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
WFKnight	0:9b3d4731edbb	3547	"device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
WFKnight	0:9b3d4731edbb	3548	"device_name": "ATSAML21J18A"
WFKnight	0:9b3d4731edbb	3549	},
WFKnight	0:9b3d4731edbb	3550	"SAMG55J19": {
WFKnight	0:9b3d4731edbb	3551	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	3552	"core": "Cortex-M4",
WFKnight	0:9b3d4731edbb	3553	"extra_labels": ["Atmel", "SAM_CortexM4", "SAMG55"],
WFKnight	0:9b3d4731edbb	3554	"macros": ["__SAMG55J19__", "BOARD=75", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
WFKnight	0:9b3d4731edbb	3555	"supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
WFKnight	0:9b3d4731edbb	3556	"default_toolchain": "ARM",
WFKnight	0:9b3d4731edbb	3557	"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
WFKnight	0:9b3d4731edbb	3558	"default_lib": "std",
WFKnight	0:9b3d4731edbb	3559	"device_name": "ATSAMG55J19"
WFKnight	0:9b3d4731edbb	3560	},
WFKnight	0:9b3d4731edbb	3561	"MCU_NRF51_UNIFIED": {
WFKnight	0:9b3d4731edbb	3562	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	3563	"core": "Cortex-M0",
WFKnight	0:9b3d4731edbb	3564	"OVERRIDE_BOOTLOADER_FILENAME": "nrf51822_bootloader.hex",
WFKnight	0:9b3d4731edbb	3565	"macros": [
WFKnight	0:9b3d4731edbb	3566	"NRF51",
WFKnight	0:9b3d4731edbb	3567	"TARGET_NRF51822",
WFKnight	0:9b3d4731edbb	3568	"BLE_STACK_SUPPORT_REQD",
WFKnight	0:9b3d4731edbb	3569	"SOFTDEVICE_PRESENT",
WFKnight	0:9b3d4731edbb	3570	"S130",
WFKnight	0:9b3d4731edbb	3571	"TARGET_MCU_NRF51822",
WFKnight	0:9b3d4731edbb	3572	"CMSIS_VECTAB_VIRTUAL",
WFKnight	0:9b3d4731edbb	3573	"CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"",
WFKnight	0:9b3d4731edbb	3574	"NO_SYSTICK",
WFKnight	0:9b3d4731edbb	3575	"MBED_TICKLESS"
WFKnight	0:9b3d4731edbb	3576	],
WFKnight	0:9b3d4731edbb	3577	"MERGE_BOOTLOADER": false,
WFKnight	0:9b3d4731edbb	3578	"extra_labels": [
WFKnight	0:9b3d4731edbb	3579	"NORDIC",
WFKnight	0:9b3d4731edbb	3580	"MCU_NRF51",
WFKnight	0:9b3d4731edbb	3581	"MCU_NRF51822_UNIFIED",
WFKnight	0:9b3d4731edbb	3582	"NRF5x",
WFKnight	0:9b3d4731edbb	3583	"NRF51",
WFKnight	0:9b3d4731edbb	3584	"SDK_11"
WFKnight	0:9b3d4731edbb	3585	],
WFKnight	0:9b3d4731edbb	3586	"OUTPUT_EXT": "hex",
WFKnight	0:9b3d4731edbb	3587	"is_disk_virtual": true,
WFKnight	0:9b3d4731edbb	3588	"supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
WFKnight	0:9b3d4731edbb	3589	"public": false,
WFKnight	0:9b3d4731edbb	3590	"MERGE_SOFT_DEVICE": true,
WFKnight	0:9b3d4731edbb	3591	"EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
WFKnight	0:9b3d4731edbb	3592	{
WFKnight	0:9b3d4731edbb	3593	"boot": "",
WFKnight	0:9b3d4731edbb	3594	"name": "s130_nrf51_2.0.0_softdevice.hex",
WFKnight	0:9b3d4731edbb	3595	"offset": 110592
WFKnight	0:9b3d4731edbb	3596	}
WFKnight	0:9b3d4731edbb	3597	],
WFKnight	0:9b3d4731edbb	3598	"detect_code": ["1070"],
WFKnight	0:9b3d4731edbb	3599	"post_binary_hook": {
WFKnight	0:9b3d4731edbb	3600	"function": "MCU_NRF51Code.binary_hook",
WFKnight	0:9b3d4731edbb	3601	"toolchains": ["ARM_STD", "GCC_ARM", "IAR"]
WFKnight	0:9b3d4731edbb	3602	},
WFKnight	0:9b3d4731edbb	3603	"program_cycle_s": 6,
WFKnight	0:9b3d4731edbb	3604	"features": ["BLE"],
WFKnight	0:9b3d4731edbb	3605	"config": {
WFKnight	0:9b3d4731edbb	3606	"lf_clock_src": {
WFKnight	0:9b3d4731edbb	3607	"value": "NRF_LF_SRC_XTAL",
WFKnight	0:9b3d4731edbb	3608	"macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_SRC"
WFKnight	0:9b3d4731edbb	3609	},
WFKnight	0:9b3d4731edbb	3610	"uart_hwfc": {
WFKnight	0:9b3d4731edbb	3611	"help": "Value: 1 for enable, 0 for disable",
WFKnight	0:9b3d4731edbb	3612	"value": 1,
WFKnight	0:9b3d4731edbb	3613	"macro_name": "MBED_CONF_NORDIC_UART_HWFC"
WFKnight	0:9b3d4731edbb	3614	}
WFKnight	0:9b3d4731edbb	3615	},
WFKnight	0:9b3d4731edbb	3616	"device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"]
WFKnight	0:9b3d4731edbb	3617	},
WFKnight	0:9b3d4731edbb	3618	"MCU_NRF51_16K_UNIFIED_S130": {
WFKnight	0:9b3d4731edbb	3619	"inherits": ["MCU_NRF51_UNIFIED"],
WFKnight	0:9b3d4731edbb	3620	"extra_labels_add": ["MCU_NORDIC_16K", "MCU_NRF51_16K_S130", "MCU_NRF51_16K"],
WFKnight	0:9b3d4731edbb	3621	"macros_add": ["TARGET_MCU_NORDIC_16K", "TARGET_MCU_NRF51_16K_S130", "TARGET_MCU_NRF51_16K"],
WFKnight	0:9b3d4731edbb	3622	"public": false
WFKnight	0:9b3d4731edbb	3623	},
WFKnight	0:9b3d4731edbb	3624	"Raytac_MDBT40": {
WFKnight	0:9b3d4731edbb	3625	"inherits": ["MCU_NRF51_16K_UNIFIED_S130"],
WFKnight	0:9b3d4731edbb	3626	"macros_add": ["TARGET_NRF_LFCLK_RC"],
WFKnight	0:9b3d4731edbb	3627	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	3628	"device_has": ["ANALOGIN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
WFKnight	0:9b3d4731edbb	3629	"device_name": "nRF51822_xxAA"
WFKnight	0:9b3d4731edbb	3630	},
WFKnight	0:9b3d4731edbb	3631	"MCU_NRF51_32K_UNIFIED": {
WFKnight	0:9b3d4731edbb	3632	"inherits": ["MCU_NRF51_UNIFIED"],
WFKnight	0:9b3d4731edbb	3633	"extra_labels_add": ["MCU_NORDIC_32K", "MCU_NRF51_32K"],
WFKnight	0:9b3d4731edbb	3634	"macros_add": ["TARGET_MCU_NORDIC_32K", "TARGET_MCU_NRF51_32K"],
WFKnight	0:9b3d4731edbb	3635	"public": false
WFKnight	0:9b3d4731edbb	3636	},
WFKnight	0:9b3d4731edbb	3637	"NRF51_DK": {
WFKnight	0:9b3d4731edbb	3638	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	3639	"inherits": ["MCU_NRF51_32K_UNIFIED"],
WFKnight	0:9b3d4731edbb	3640	"device_has": ["USTICKER", "LPTICKER", "ANALOGIN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
WFKnight	0:9b3d4731edbb	3641	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	3642	"device_name": "nRF51822_xxAA"
WFKnight	0:9b3d4731edbb	3643	},
WFKnight	0:9b3d4731edbb	3644	"NRF51_DONGLE": {
WFKnight	0:9b3d4731edbb	3645	"inherits": ["MCU_NRF51_32K_UNIFIED"],
WFKnight	0:9b3d4731edbb	3646	"progen": {"target": "nrf51-dongle"},
WFKnight	0:9b3d4731edbb	3647	"device_has": ["USTICKER", "LPTICKER", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
WFKnight	0:9b3d4731edbb	3648	"release_versions": ["2", "5"]
WFKnight	0:9b3d4731edbb	3649	},
WFKnight	0:9b3d4731edbb	3650	"OSHCHIP": {
WFKnight	0:9b3d4731edbb	3651	"inherits": ["MCU_NRF51_32K_UNIFIED"],
WFKnight	0:9b3d4731edbb	3652	"overrides": {"lf_clock_src": "NRF_LF_SRC_RC"},
WFKnight	0:9b3d4731edbb	3653	"device_has": ["USTICKER", "LPTICKER", "ANALOGIN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
WFKnight	0:9b3d4731edbb	3654	"device_name": "nRF51822_xxAC"
WFKnight	0:9b3d4731edbb	3655	},
WFKnight	0:9b3d4731edbb	3656	"MCU_NRF52832": {
WFKnight	0:9b3d4731edbb	3657	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	3658	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	3659	"macros": [
WFKnight	0:9b3d4731edbb	3660	"BOARD_PCA10040",
WFKnight	0:9b3d4731edbb	3661	"NRF52",
WFKnight	0:9b3d4731edbb	3662	"TARGET_NRF52832",
WFKnight	0:9b3d4731edbb	3663	"CMSIS_VECTAB_VIRTUAL",
WFKnight	0:9b3d4731edbb	3664	"CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"",
WFKnight	0:9b3d4731edbb	3665	"MBED_TICKLESS"
WFKnight	0:9b3d4731edbb	3666	],
WFKnight	0:9b3d4731edbb	3667	"device_has": [
WFKnight	0:9b3d4731edbb	3668	"ANALOGIN",
WFKnight	0:9b3d4731edbb	3669	"FLASH",
WFKnight	0:9b3d4731edbb	3670	"I2C",
WFKnight	0:9b3d4731edbb	3671	"I2C_ASYNCH",
WFKnight	0:9b3d4731edbb	3672	"INTERRUPTIN",
WFKnight	0:9b3d4731edbb	3673	"ITM",
WFKnight	0:9b3d4731edbb	3674	"LPTICKER",
WFKnight	0:9b3d4731edbb	3675	"PORTIN",
WFKnight	0:9b3d4731edbb	3676	"PORTINOUT",
WFKnight	0:9b3d4731edbb	3677	"PORTOUT",
WFKnight	0:9b3d4731edbb	3678	"PWMOUT",
WFKnight	0:9b3d4731edbb	3679	"SERIAL",
WFKnight	0:9b3d4731edbb	3680	"SERIAL_ASYNCH",
WFKnight	0:9b3d4731edbb	3681	"SERIAL_FC",
WFKnight	0:9b3d4731edbb	3682	"SPI",
WFKnight	0:9b3d4731edbb	3683	"SPI_ASYNCH",
WFKnight	0:9b3d4731edbb	3684	"STCLK_OFF_DURING_SLEEP",
WFKnight	0:9b3d4731edbb	3685	"TRNG",
WFKnight	0:9b3d4731edbb	3686	"USTICKER",
WFKnight	0:9b3d4731edbb	3687	"SLEEP"
WFKnight	0:9b3d4731edbb	3688	],
WFKnight	0:9b3d4731edbb	3689	"extra_labels": [
WFKnight	0:9b3d4731edbb	3690	"NORDIC",
WFKnight	0:9b3d4731edbb	3691	"NRF5x",
WFKnight	0:9b3d4731edbb	3692	"NRF52",
WFKnight	0:9b3d4731edbb	3693	"SDK_14_2",
WFKnight	0:9b3d4731edbb	3694	"SOFTDEVICE_COMMON",
WFKnight	0:9b3d4731edbb	3695	"SOFTDEVICE_S132_FULL"
WFKnight	0:9b3d4731edbb	3696	],
WFKnight	0:9b3d4731edbb	3697	"config": {
WFKnight	0:9b3d4731edbb	3698	"lf_clock_src": {
WFKnight	0:9b3d4731edbb	3699	"macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_SRC",
WFKnight	0:9b3d4731edbb	3700	"help": "Select Low Frequency clock source. Options: NRF_LF_SRC_XTAL, NRF_LF_SRC_SYNTH, and NRF_LF_SRC_RC",
WFKnight	0:9b3d4731edbb	3701	"value": "NRF_LF_SRC_XTAL"
WFKnight	0:9b3d4731edbb	3702	},
WFKnight	0:9b3d4731edbb	3703	"lf_clock_rc_calib_timer_interval": {
WFKnight	0:9b3d4731edbb	3704	"macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_CALIB_TIMER_INTERVAL",
WFKnight	0:9b3d4731edbb	3705	"value": 16
WFKnight	0:9b3d4731edbb	3706	},
WFKnight	0:9b3d4731edbb	3707	"lf_clock_rc_calib_mode_config": {
WFKnight	0:9b3d4731edbb	3708	"macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_CALIB_MODE_CONFIG",
WFKnight	0:9b3d4731edbb	3709	"value": 0
WFKnight	0:9b3d4731edbb	3710	}
WFKnight	0:9b3d4731edbb	3711	},
WFKnight	0:9b3d4731edbb	3712	"OUTPUT_EXT": "hex",
WFKnight	0:9b3d4731edbb	3713	"is_disk_virtual": true,
WFKnight	0:9b3d4731edbb	3714	"supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
WFKnight	0:9b3d4731edbb	3715	"public": false,
WFKnight	0:9b3d4731edbb	3716	"detect_code": ["1101"],
WFKnight	0:9b3d4731edbb	3717	"program_cycle_s": 6,
WFKnight	0:9b3d4731edbb	3718	"bootloader_supported": true
WFKnight	0:9b3d4731edbb	3719	},
WFKnight	0:9b3d4731edbb	3720	"NRF52_DK": {
WFKnight	0:9b3d4731edbb	3721	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	3722	"inherits": ["MCU_NRF52832"],
WFKnight	0:9b3d4731edbb	3723	"release_versions": ["5"],
WFKnight	0:9b3d4731edbb	3724	"device_name": "nRF52832_xxAA"
WFKnight	0:9b3d4731edbb	3725	},
WFKnight	0:9b3d4731edbb	3726	"UBLOX_EVA_NINA": {
WFKnight	0:9b3d4731edbb	3727	"inherits": ["MCU_NRF52832"],
WFKnight	0:9b3d4731edbb	3728	"release_versions": ["5"],
WFKnight	0:9b3d4731edbb	3729	"device_name": "nRF52832_xxAA"
WFKnight	0:9b3d4731edbb	3730	},
WFKnight	0:9b3d4731edbb	3731	"UBLOX_EVK_NINA_B1": {
WFKnight	0:9b3d4731edbb	3732	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	3733	"inherits": ["MCU_NRF52832"],
WFKnight	0:9b3d4731edbb	3734	"release_versions": ["5"],
WFKnight	0:9b3d4731edbb	3735	"device_name": "nRF52832_xxAA"
WFKnight	0:9b3d4731edbb	3736	},
WFKnight	0:9b3d4731edbb	3737	"MTB_UBLOX_NINA_B1": {
WFKnight	0:9b3d4731edbb	3738	"inherits": ["MCU_NRF52832"],
WFKnight	0:9b3d4731edbb	3739	"release_versions": ["5"],
WFKnight	0:9b3d4731edbb	3740	"device_name": "nRF52832_xxAA"
WFKnight	0:9b3d4731edbb	3741	},
WFKnight	0:9b3d4731edbb	3742	"MTB_LAIRD_BL652": {
WFKnight	0:9b3d4731edbb	3743	"inherits": ["MCU_NRF52832"],
WFKnight	0:9b3d4731edbb	3744	"release_versions": ["5"],
WFKnight	0:9b3d4731edbb	3745	"device_name": "nRF52832_xxAA"
WFKnight	0:9b3d4731edbb	3746	},
WFKnight	0:9b3d4731edbb	3747	"DELTA_DFBM_NQ620": {
WFKnight	0:9b3d4731edbb	3748	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	3749	"inherits": ["MCU_NRF52832"],
WFKnight	0:9b3d4731edbb	3750	"release_versions": ["5"],
WFKnight	0:9b3d4731edbb	3751	"device_name": "nRF52832_xxAA"
WFKnight	0:9b3d4731edbb	3752	},
WFKnight	0:9b3d4731edbb	3753	"MCU_NRF52840": {
WFKnight	0:9b3d4731edbb	3754	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	3755	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	3756	"macros": [
WFKnight	0:9b3d4731edbb	3757	"BOARD_PCA10056",
WFKnight	0:9b3d4731edbb	3758	"NRF52840_XXAA",
WFKnight	0:9b3d4731edbb	3759	"TARGET_NRF52840",
WFKnight	0:9b3d4731edbb	3760	"CMSIS_VECTAB_VIRTUAL",
WFKnight	0:9b3d4731edbb	3761	"CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"",
WFKnight	0:9b3d4731edbb	3762	"MBED_TICKLESS",
WFKnight	0:9b3d4731edbb	3763	"MBEDTLS_CONFIG_HW_SUPPORT"
WFKnight	0:9b3d4731edbb	3764	],
WFKnight	0:9b3d4731edbb	3765	"features": ["CRYPTOCELL310"],
WFKnight	0:9b3d4731edbb	3766	"device_has": [
WFKnight	0:9b3d4731edbb	3767	"ANALOGIN",
WFKnight	0:9b3d4731edbb	3768	"FLASH",
WFKnight	0:9b3d4731edbb	3769	"I2C",
WFKnight	0:9b3d4731edbb	3770	"I2C_ASYNCH",
WFKnight	0:9b3d4731edbb	3771	"INTERRUPTIN",
WFKnight	0:9b3d4731edbb	3772	"ITM",
WFKnight	0:9b3d4731edbb	3773	"LPTICKER",
WFKnight	0:9b3d4731edbb	3774	"PORTIN",
WFKnight	0:9b3d4731edbb	3775	"PORTINOUT",
WFKnight	0:9b3d4731edbb	3776	"PORTOUT",
WFKnight	0:9b3d4731edbb	3777	"PWMOUT",
WFKnight	0:9b3d4731edbb	3778	"RTC",
WFKnight	0:9b3d4731edbb	3779	"SERIAL",
WFKnight	0:9b3d4731edbb	3780	"SERIAL_ASYNCH",
WFKnight	0:9b3d4731edbb	3781	"SERIAL_FC",
WFKnight	0:9b3d4731edbb	3782	"SLEEP",
WFKnight	0:9b3d4731edbb	3783	"SPI",
WFKnight	0:9b3d4731edbb	3784	"SPI_ASYNCH",
WFKnight	0:9b3d4731edbb	3785	"STCLK_OFF_DURING_SLEEP",
WFKnight	0:9b3d4731edbb	3786	"TRNG",
WFKnight	0:9b3d4731edbb	3787	"USTICKER"
WFKnight	0:9b3d4731edbb	3788	],
WFKnight	0:9b3d4731edbb	3789	"extra_labels": [
WFKnight	0:9b3d4731edbb	3790	"NORDIC",
WFKnight	0:9b3d4731edbb	3791	"NRF5x",
WFKnight	0:9b3d4731edbb	3792	"NRF52",
WFKnight	0:9b3d4731edbb	3793	"SDK_14_2",
WFKnight	0:9b3d4731edbb	3794	"SOFTDEVICE_COMMON",
WFKnight	0:9b3d4731edbb	3795	"SOFTDEVICE_S140_FULL"
WFKnight	0:9b3d4731edbb	3796	],
WFKnight	0:9b3d4731edbb	3797	"config": {
WFKnight	0:9b3d4731edbb	3798	"lf_clock_src": {
WFKnight	0:9b3d4731edbb	3799	"macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_SRC",
WFKnight	0:9b3d4731edbb	3800	"help": "Select Low Frequency clock source. Options: NRF_LF_SRC_XTAL, NRF_LF_SRC_SYNTH, and NRF_LF_SRC_RC",
WFKnight	0:9b3d4731edbb	3801	"value": "NRF_LF_SRC_XTAL"
WFKnight	0:9b3d4731edbb	3802	},
WFKnight	0:9b3d4731edbb	3803	"lf_clock_rc_calib_timer_interval": {
WFKnight	0:9b3d4731edbb	3804	"macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_CALIB_TIMER_INTERVAL",
WFKnight	0:9b3d4731edbb	3805	"value": 16
WFKnight	0:9b3d4731edbb	3806	},
WFKnight	0:9b3d4731edbb	3807	"lf_clock_rc_calib_mode_config": {
WFKnight	0:9b3d4731edbb	3808	"macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_CALIB_MODE_CONFIG",
WFKnight	0:9b3d4731edbb	3809	"value": 0
WFKnight	0:9b3d4731edbb	3810	}
WFKnight	0:9b3d4731edbb	3811	},
WFKnight	0:9b3d4731edbb	3812	"OUTPUT_EXT": "hex",
WFKnight	0:9b3d4731edbb	3813	"is_disk_virtual": true,
WFKnight	0:9b3d4731edbb	3814	"supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
WFKnight	0:9b3d4731edbb	3815	"public": false,
WFKnight	0:9b3d4731edbb	3816	"detect_code": ["1101"],
WFKnight	0:9b3d4731edbb	3817	"program_cycle_s": 6,
WFKnight	0:9b3d4731edbb	3818	"bootloader_supported": true
WFKnight	0:9b3d4731edbb	3819	},
WFKnight	0:9b3d4731edbb	3820	"NRF52840_DK": {
WFKnight	0:9b3d4731edbb	3821	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	3822	"inherits": ["MCU_NRF52840"],
WFKnight	0:9b3d4731edbb	3823	"release_versions": ["5"],
WFKnight	0:9b3d4731edbb	3824	"device_name": "nRF52840_xxAA"
WFKnight	0:9b3d4731edbb	3825	},
WFKnight	0:9b3d4731edbb	3826	"BLUEPILL_F103C8": {
WFKnight	0:9b3d4731edbb	3827	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	3828	"core": "Cortex-M3",
WFKnight	0:9b3d4731edbb	3829	"default_toolchain": "GCC_ARM",
WFKnight	0:9b3d4731edbb	3830	"extra_labels_add": ["STM32F1", "STM32F103C8"],
WFKnight	0:9b3d4731edbb	3831	"supported_toolchains": ["GCC_ARM"],
WFKnight	0:9b3d4731edbb	3832	"device_has_add": [],
WFKnight	0:9b3d4731edbb	3833	"device_has_remove": ["STDIO_MESSAGES", "LPTICKER"]
WFKnight	0:9b3d4731edbb	3834	},
WFKnight	0:9b3d4731edbb	3835	"NUMAKER_PFM_NUC472": {
WFKnight	0:9b3d4731edbb	3836	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	3837	"default_toolchain": "ARM",
WFKnight	0:9b3d4731edbb	3838	"extra_labels": ["NUVOTON", "NUC472", "NU_XRAM_SUPPORTED", "FLASH_CMSIS_ALGO", "NUVOTON_EMAC"],
WFKnight	0:9b3d4731edbb	3839	"is_disk_virtual": true,
WFKnight	0:9b3d4731edbb	3840	"supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
WFKnight	0:9b3d4731edbb	3841	"config": {
WFKnight	0:9b3d4731edbb	3842	"gpio-irq-debounce-enable": {
WFKnight	0:9b3d4731edbb	3843	"help": "Enable GPIO IRQ debounce",
WFKnight	0:9b3d4731edbb	3844	"value": 0
WFKnight	0:9b3d4731edbb	3845	},
WFKnight	0:9b3d4731edbb	3846	"gpio-irq-debounce-enable-list": {
WFKnight	0:9b3d4731edbb	3847	"help": "Comma separated pin list to enable GPIO IRQ debounce",
WFKnight	0:9b3d4731edbb	3848	"value": "NC"
WFKnight	0:9b3d4731edbb	3849	},
WFKnight	0:9b3d4731edbb	3850	"gpio-irq-debounce-clock-source": {
WFKnight	0:9b3d4731edbb	3851	"help": "Select GPIO IRQ debounce clock source: GPIO_DBCTL_DBCLKSRC_HCLK or GPIO_DBCTL_DBCLKSRC_IRC10K",
WFKnight	0:9b3d4731edbb	3852	"value": "GPIO_DBCTL_DBCLKSRC_IRC10K"
WFKnight	0:9b3d4731edbb	3853	},
WFKnight	0:9b3d4731edbb	3854	"gpio-irq-debounce-sample-rate": {
WFKnight	0:9b3d4731edbb	3855	"help": "Select GPIO IRQ debounce sample rate: GPIO_DBCTL_DBCLKSEL_1, GPIO_DBCTL_DBCLKSEL_2, GPIO_DBCTL_DBCLKSEL_4, ..., or GPIO_DBCTL_DBCLKSEL_32768",
WFKnight	0:9b3d4731edbb	3856	"value": "GPIO_DBCTL_DBCLKSEL_16"
WFKnight	0:9b3d4731edbb	3857	}
WFKnight	0:9b3d4731edbb	3858	},
WFKnight	0:9b3d4731edbb	3859	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	3860	"macros_add": ["MBEDTLS_CONFIG_HW_SUPPORT"],
WFKnight	0:9b3d4731edbb	3861	"device_has": ["RTC", "ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "STDIO_MESSAGES", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "TRNG", "CAN", "FLASH", "EMAC"],
WFKnight	0:9b3d4731edbb	3862	"features": ["LWIP"],
WFKnight	0:9b3d4731edbb	3863	"release_versions": ["5"],
WFKnight	0:9b3d4731edbb	3864	"device_name": "NUC472HI8AE",
WFKnight	0:9b3d4731edbb	3865	"bootloader_supported": true,
WFKnight	0:9b3d4731edbb	3866	"overrides": {
WFKnight	0:9b3d4731edbb	3867	"network-default-interface-type": "ETHERNET"
WFKnight	0:9b3d4731edbb	3868	}
WFKnight	0:9b3d4731edbb	3869	},
WFKnight	0:9b3d4731edbb	3870	"NCS36510": {
WFKnight	0:9b3d4731edbb	3871	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	3872	"core": "Cortex-M3",
WFKnight	0:9b3d4731edbb	3873	"extra_labels": ["ONSEMI"],
WFKnight	0:9b3d4731edbb	3874	"config": {
WFKnight	0:9b3d4731edbb	3875	"mac-addr-low": {
WFKnight	0:9b3d4731edbb	3876	"help": "Lower 32 bits of the MAC extended address. All FFs indicates that factory programmed MAC address shall be used. In order to override the factory programmed MAC address this value needs to be changed from 0xFFFFFFFF to any chosen value.",
WFKnight	0:9b3d4731edbb	3877	"value": "0xFFFFFFFF"
WFKnight	0:9b3d4731edbb	3878	},
WFKnight	0:9b3d4731edbb	3879	"mac-addr-high": {
WFKnight	0:9b3d4731edbb	3880	"help": "Higher 32 bits of the MAC extended address. All FFs indicates that factory programmed MAC address shall be used. In order to override the factory programmed MAC address this value needs to be changed from 0xFFFFFFFF to any chosen value.",
WFKnight	0:9b3d4731edbb	3881	"value": "0xFFFFFFFF"
WFKnight	0:9b3d4731edbb	3882	},
WFKnight	0:9b3d4731edbb	3883	"32KHz-clk-trim": {
WFKnight	0:9b3d4731edbb	3884	"help": "32KHz clock trim",
WFKnight	0:9b3d4731edbb	3885	"value": "0x39"
WFKnight	0:9b3d4731edbb	3886	},
WFKnight	0:9b3d4731edbb	3887	"32MHz-clk-trim": {
WFKnight	0:9b3d4731edbb	3888	"help": "32MHz clock trim",
WFKnight	0:9b3d4731edbb	3889	"value": "0x17"
WFKnight	0:9b3d4731edbb	3890	},
WFKnight	0:9b3d4731edbb	3891	"rssi-trim": {
WFKnight	0:9b3d4731edbb	3892	"help": "RSSI trim",
WFKnight	0:9b3d4731edbb	3893	"value": "0x3D"
WFKnight	0:9b3d4731edbb	3894	},
WFKnight	0:9b3d4731edbb	3895	"txtune-trim": {
WFKnight	0:9b3d4731edbb	3896	"help": "TX tune trim",
WFKnight	0:9b3d4731edbb	3897	"value": "0xFFFFFFFF"
WFKnight	0:9b3d4731edbb	3898	}
WFKnight	0:9b3d4731edbb	3899	},
WFKnight	0:9b3d4731edbb	3900	"OUTPUT_EXT": "hex",
WFKnight	0:9b3d4731edbb	3901	"post_binary_hook": {"function": "NCS36510TargetCode.ncs36510_addfib"},
WFKnight	0:9b3d4731edbb	3902	"macros": ["CM3", "CPU_NCS36510", "TARGET_NCS36510", "LOAD_ADDRESS=0x3000"],
WFKnight	0:9b3d4731edbb	3903	"supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
WFKnight	0:9b3d4731edbb	3904	"device_has": ["ANALOGIN", "SERIAL", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "TRNG", "SPISLAVE"],
WFKnight	0:9b3d4731edbb	3905	"release_versions": ["2", "5"]
WFKnight	0:9b3d4731edbb	3906	},
WFKnight	0:9b3d4731edbb	3907	"NUMAKER_PFM_M453": {
WFKnight	0:9b3d4731edbb	3908	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	3909	"default_toolchain": "ARM",
WFKnight	0:9b3d4731edbb	3910	"extra_labels": ["NUVOTON", "M451", "NUMAKER_PFM_M453", "FLASH_CMSIS_ALGO"],
WFKnight	0:9b3d4731edbb	3911	"is_disk_virtual": true,
WFKnight	0:9b3d4731edbb	3912	"supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
WFKnight	0:9b3d4731edbb	3913	"config": {
WFKnight	0:9b3d4731edbb	3914	"gpio-irq-debounce-enable": {
WFKnight	0:9b3d4731edbb	3915	"help": "Enable GPIO IRQ debounce",
WFKnight	0:9b3d4731edbb	3916	"value": 0
WFKnight	0:9b3d4731edbb	3917	},
WFKnight	0:9b3d4731edbb	3918	"gpio-irq-debounce-enable-list": {
WFKnight	0:9b3d4731edbb	3919	"help": "Comma separated pin list to enable GPIO IRQ debounce",
WFKnight	0:9b3d4731edbb	3920	"value": "NC"
WFKnight	0:9b3d4731edbb	3921	},
WFKnight	0:9b3d4731edbb	3922	"gpio-irq-debounce-clock-source": {
WFKnight	0:9b3d4731edbb	3923	"help": "Select GPIO IRQ debounce clock source: GPIO_DBCTL_DBCLKSRC_HCLK or GPIO_DBCTL_DBCLKSRC_LIRC",
WFKnight	0:9b3d4731edbb	3924	"value": "GPIO_DBCTL_DBCLKSRC_LIRC"
WFKnight	0:9b3d4731edbb	3925	},
WFKnight	0:9b3d4731edbb	3926	"gpio-irq-debounce-sample-rate": {
WFKnight	0:9b3d4731edbb	3927	"help": "Select GPIO IRQ debounce sample rate: GPIO_DBCTL_DBCLKSEL_1, GPIO_DBCTL_DBCLKSEL_2, GPIO_DBCTL_DBCLKSEL_4, ..., or GPIO_DBCTL_DBCLKSEL_32768",
WFKnight	0:9b3d4731edbb	3928	"value": "GPIO_DBCTL_DBCLKSEL_16"
WFKnight	0:9b3d4731edbb	3929	}
WFKnight	0:9b3d4731edbb	3930	},
WFKnight	0:9b3d4731edbb	3931	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	3932	"progen": {"target": "numaker-pfm-m453"},
WFKnight	0:9b3d4731edbb	3933	"device_has": ["RTC", "ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "STDIO_MESSAGES", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "CAN", "FLASH"],
WFKnight	0:9b3d4731edbb	3934	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	3935	"device_name": "M453VG6AE",
WFKnight	0:9b3d4731edbb	3936	"bootloader_supported": true
WFKnight	0:9b3d4731edbb	3937	},
WFKnight	0:9b3d4731edbb	3938	"NUMAKER_PFM_NANO130": {
WFKnight	0:9b3d4731edbb	3939	"core": "Cortex-M0",
WFKnight	0:9b3d4731edbb	3940	"default_toolchain": "ARM",
WFKnight	0:9b3d4731edbb	3941	"extra_labels": ["NUVOTON", "NANO100", "NANO130KE3BN"],
WFKnight	0:9b3d4731edbb	3942	"is_disk_virtual": true,
WFKnight	0:9b3d4731edbb	3943	"supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
WFKnight	0:9b3d4731edbb	3944	"config": {
WFKnight	0:9b3d4731edbb	3945	"gpio-irq-debounce-enable": {
WFKnight	0:9b3d4731edbb	3946	"help": "Enable GPIO IRQ debounce",
WFKnight	0:9b3d4731edbb	3947	"value": 0
WFKnight	0:9b3d4731edbb	3948	},
WFKnight	0:9b3d4731edbb	3949	"gpio-irq-debounce-enable-list": {
WFKnight	0:9b3d4731edbb	3950	"help": "Comma separated pin list to enable GPIO IRQ debounce",
WFKnight	0:9b3d4731edbb	3951	"value": "NC"
WFKnight	0:9b3d4731edbb	3952	},
WFKnight	0:9b3d4731edbb	3953	"gpio-irq-debounce-clock-source": {
WFKnight	0:9b3d4731edbb	3954	"help": "Select GPIO IRQ debounce clock source: GPIO_DBCLKSRC_HCLK or GPIO_DBCLKSRC_IRC10K",
WFKnight	0:9b3d4731edbb	3955	"value": "GPIO_DBCLKSRC_IRC10K"
WFKnight	0:9b3d4731edbb	3956	},
WFKnight	0:9b3d4731edbb	3957	"gpio-irq-debounce-sample-rate": {
WFKnight	0:9b3d4731edbb	3958	"help": "Select GPIO IRQ debounce sample rate: GPIO_DBCLKSEL_1, GPIO_DBCLKSEL_2, GPIO_DBCLKSEL_4, ..., or GPIO_DBCLKSEL_32768",
WFKnight	0:9b3d4731edbb	3959	"value": "GPIO_DBCLKSEL_16"
WFKnight	0:9b3d4731edbb	3960	}
WFKnight	0:9b3d4731edbb	3961	},
WFKnight	0:9b3d4731edbb	3962	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	3963	"macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"","MBED_FAULT_HANDLER_DISABLED"],
WFKnight	0:9b3d4731edbb	3964	"device_has": ["RTC", "ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "STDIO_MESSAGES", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
WFKnight	0:9b3d4731edbb	3965	"release_versions": ["5"],
WFKnight	0:9b3d4731edbb	3966	"device_name": "NANO130KE3BN"
WFKnight	0:9b3d4731edbb	3967	},
WFKnight	0:9b3d4731edbb	3968	"HI2110": {
WFKnight	0:9b3d4731edbb	3969	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	3970	"core": "Cortex-M0",
WFKnight	0:9b3d4731edbb	3971	"default_toolchain": "GCC_ARM",
WFKnight	0:9b3d4731edbb	3972	"supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
WFKnight	0:9b3d4731edbb	3973	"extra_labels": ["ublox"],
WFKnight	0:9b3d4731edbb	3974	"macros": ["TARGET_PROCESSOR_FAMILY_BOUDICA", "BOUDICA_SARA", "NDEBUG=1", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
WFKnight	0:9b3d4731edbb	3975	"public": false,
WFKnight	0:9b3d4731edbb	3976	"target_overrides": {
WFKnight	0:9b3d4731edbb	3977	"*": {
WFKnight	0:9b3d4731edbb	3978	"core.stdio-flush-at-exit": false
WFKnight	0:9b3d4731edbb	3979	}
WFKnight	0:9b3d4731edbb	3980	},
WFKnight	0:9b3d4731edbb	3981	"device_has": ["INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SLEEP", "STDIO_MESSAGES"],
WFKnight	0:9b3d4731edbb	3982	"default_lib": "std",
WFKnight	0:9b3d4731edbb	3983	"release_versions": []
WFKnight	0:9b3d4731edbb	3984	},
WFKnight	0:9b3d4731edbb	3985	"SARA_NBIOT": {
WFKnight	0:9b3d4731edbb	3986	"inherits": ["HI2110"],
WFKnight	0:9b3d4731edbb	3987	"extra_labels": ["ublox", "HI2110"],
WFKnight	0:9b3d4731edbb	3988	"public": false
WFKnight	0:9b3d4731edbb	3989	},
WFKnight	0:9b3d4731edbb	3990	"SARA_NBIOT_EVK": {
WFKnight	0:9b3d4731edbb	3991	"inherits": ["SARA_NBIOT"],
WFKnight	0:9b3d4731edbb	3992	"extra_labels": ["ublox", "HI2110", "SARA_NBIOT"]
WFKnight	0:9b3d4731edbb	3993	},
WFKnight	0:9b3d4731edbb	3994	"REALTEK_RTL8195AM": {
WFKnight	0:9b3d4731edbb	3995	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	3996	"core": "Cortex-M3",
WFKnight	0:9b3d4731edbb	3997	"default_toolchain": "GCC_ARM",
WFKnight	0:9b3d4731edbb	3998	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	3999	"detect_code": ["4600"],
WFKnight	0:9b3d4731edbb	4000	"extra_labels": ["Realtek", "AMEBA", "RTL8195A", "RTW_EMAC"],
WFKnight	0:9b3d4731edbb	4001	"macros": ["__RTL8195A__","CONFIG_PLATFORM_8195A","CONFIG_MBED_ENABLED","PLATFORM_CMSIS_RTOS","MBED_FAULT_HANDLER_DISABLED"],
WFKnight	0:9b3d4731edbb	4002	"supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
WFKnight	0:9b3d4731edbb	4003	"device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SPI", "TRNG", "FLASH", "EMAC"],
WFKnight	0:9b3d4731edbb	4004	"features": ["LWIP"],
WFKnight	0:9b3d4731edbb	4005	"post_binary_hook": {
WFKnight	0:9b3d4731edbb	4006	"function": "RTL8195ACode.binary_hook",
WFKnight	0:9b3d4731edbb	4007	"toolchains": ["ARM_STD", "GCC_ARM", "IAR"]
WFKnight	0:9b3d4731edbb	4008	},
WFKnight	0:9b3d4731edbb	4009	"release_versions": ["5"],
WFKnight	0:9b3d4731edbb	4010	"overrides": {
WFKnight	0:9b3d4731edbb	4011	"network-default-interface-type": "WIFI"
WFKnight	0:9b3d4731edbb	4012	}
WFKnight	0:9b3d4731edbb	4013	},
WFKnight	0:9b3d4731edbb	4014	"VBLUNO51_LEGACY": {
WFKnight	0:9b3d4731edbb	4015	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	4016	"inherits": ["MCU_NRF51_32K"],
WFKnight	0:9b3d4731edbb	4017	"detect_code": ["C006"],
WFKnight	0:9b3d4731edbb	4018	"overrides": {"uart_hwfc": 0},
WFKnight	0:9b3d4731edbb	4019	"extra_labels_add": ["VBLUNO51"]
WFKnight	0:9b3d4731edbb	4020	},
WFKnight	0:9b3d4731edbb	4021	"VBLUNO51_BOOT": {
WFKnight	0:9b3d4731edbb	4022	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	4023	"inherits": ["MCU_NRF51_32K_BOOT"],
WFKnight	0:9b3d4731edbb	4024	"detect_code": ["C006"],
WFKnight	0:9b3d4731edbb	4025	"overrides": {"uart_hwfc": 0},
WFKnight	0:9b3d4731edbb	4026	"extra_labels_add": ["VBLUNO51"],
WFKnight	0:9b3d4731edbb	4027	"macros_add": ["TARGET_VBLUNO51"]
WFKnight	0:9b3d4731edbb	4028	},
WFKnight	0:9b3d4731edbb	4029	"VBLUNO51_OTA": {
WFKnight	0:9b3d4731edbb	4030	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	4031	"inherits": ["MCU_NRF51_32K_OTA"],
WFKnight	0:9b3d4731edbb	4032	"detect_code": ["C006"],
WFKnight	0:9b3d4731edbb	4033	"overrides": {"uart_hwfc": 0},
WFKnight	0:9b3d4731edbb	4034	"extra_labels_add": ["VBLUNO51"],
WFKnight	0:9b3d4731edbb	4035	"macros_add": ["TARGET_VBLUNO51"]
WFKnight	0:9b3d4731edbb	4036	},
WFKnight	0:9b3d4731edbb	4037	"VBLUNO51": {
WFKnight	0:9b3d4731edbb	4038	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	4039	"inherits": ["MCU_NRF51_32K_UNIFIED"],
WFKnight	0:9b3d4731edbb	4040	"detect_code": ["C006"],
WFKnight	0:9b3d4731edbb	4041	"overrides": {"uart_hwfc": 0},
WFKnight	0:9b3d4731edbb	4042	"device_has": ["USTICKER", "LPTICKER", "ANALOGIN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
WFKnight	0:9b3d4731edbb	4043	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	4044	"device_name": "nRF51822_xxAC"
WFKnight	0:9b3d4731edbb	4045	},
WFKnight	0:9b3d4731edbb	4046	"DISCO_L496AG": {
WFKnight	0:9b3d4731edbb	4047	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	4048	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	4049	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	4050	"extra_labels_add": ["STM32L4", "STM32L496AG", "STM32L496xG"],
WFKnight	0:9b3d4731edbb	4051	"config": {
WFKnight	0:9b3d4731edbb	4052	"clock_source": {
WFKnight	0:9b3d4731edbb	4053	"help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) \| USE_PLL_HSE_XTAL (need HW patch) \| USE_PLL_HSI \| USE_PLL_MSI",
WFKnight	0:9b3d4731edbb	4054	"value": "USE_PLL_MSI",
WFKnight	0:9b3d4731edbb	4055	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	4056	},
WFKnight	0:9b3d4731edbb	4057	"lpticker_lptim": {
WFKnight	0:9b3d4731edbb	4058	"help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
WFKnight	0:9b3d4731edbb	4059	"value": 1
WFKnight	0:9b3d4731edbb	4060	}
WFKnight	0:9b3d4731edbb	4061	},
WFKnight	0:9b3d4731edbb	4062	"detect_code": ["0822"],
WFKnight	0:9b3d4731edbb	4063	"device_has_add": ["ANALOGOUT", "CAN", "CRC", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
WFKnight	0:9b3d4731edbb	4064	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	4065	"device_name": "STM32L496AG"
WFKnight	0:9b3d4731edbb	4066	},
WFKnight	0:9b3d4731edbb	4067	"NUCLEO_L496ZG": {
WFKnight	0:9b3d4731edbb	4068	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	4069	"supported_form_factors": ["ARDUINO", "MORPHO"],
WFKnight	0:9b3d4731edbb	4070	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	4071	"extra_labels_add": ["STM32L4", "STM32L496ZG", "STM32L496xG"],
WFKnight	0:9b3d4731edbb	4072	"config": {
WFKnight	0:9b3d4731edbb	4073	"clock_source": {
WFKnight	0:9b3d4731edbb	4074	"help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) \| USE_PLL_HSE_XTAL (need HW patch) \| USE_PLL_HSI \| USE_PLL_MSI",
WFKnight	0:9b3d4731edbb	4075	"value": "USE_PLL_MSI",
WFKnight	0:9b3d4731edbb	4076	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	4077	},
WFKnight	0:9b3d4731edbb	4078	"lpticker_lptim": {
WFKnight	0:9b3d4731edbb	4079	"help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
WFKnight	0:9b3d4731edbb	4080	"value": 1
WFKnight	0:9b3d4731edbb	4081	}
WFKnight	0:9b3d4731edbb	4082	},
WFKnight	0:9b3d4731edbb	4083	"detect_code": ["0823"],
WFKnight	0:9b3d4731edbb	4084	"device_has_add": ["ANALOGOUT", "CAN", "CRC", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
WFKnight	0:9b3d4731edbb	4085	"release_versions": ["2", "5"],
WFKnight	0:9b3d4731edbb	4086	"device_name": "STM32L496ZG"
WFKnight	0:9b3d4731edbb	4087	},
WFKnight	0:9b3d4731edbb	4088	"NUCLEO_L496ZG_P": {
WFKnight	0:9b3d4731edbb	4089	"inherits": ["NUCLEO_L496ZG"],
WFKnight	0:9b3d4731edbb	4090	"detect_code": ["0828"]
WFKnight	0:9b3d4731edbb	4091	},
WFKnight	0:9b3d4731edbb	4092	"VBLUNO52": {
WFKnight	0:9b3d4731edbb	4093	"supported_form_factors": ["ARDUINO"],
WFKnight	0:9b3d4731edbb	4094	"inherits": ["MCU_NRF52832"],
WFKnight	0:9b3d4731edbb	4095	"release_versions": ["5"],
WFKnight	0:9b3d4731edbb	4096	"device_name": "nRF52832_xxAA"
WFKnight	0:9b3d4731edbb	4097	},
WFKnight	0:9b3d4731edbb	4098	"NUMAKER_PFM_M487": {
WFKnight	0:9b3d4731edbb	4099	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	4100	"default_toolchain": "ARM",
WFKnight	0:9b3d4731edbb	4101	"extra_labels": ["NUVOTON", "M480", "FLASH_CMSIS_ALGO","NUVOTON_EMAC"],
WFKnight	0:9b3d4731edbb	4102	"is_disk_virtual": true,
WFKnight	0:9b3d4731edbb	4103	"supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
WFKnight	0:9b3d4731edbb	4104	"config": {
WFKnight	0:9b3d4731edbb	4105	"gpio-irq-debounce-enable": {
WFKnight	0:9b3d4731edbb	4106	"help": "Enable GPIO IRQ debounce",
WFKnight	0:9b3d4731edbb	4107	"value": 0
WFKnight	0:9b3d4731edbb	4108	},
WFKnight	0:9b3d4731edbb	4109	"gpio-irq-debounce-enable-list": {
WFKnight	0:9b3d4731edbb	4110	"help": "Comma separated pin list to enable GPIO IRQ debounce",
WFKnight	0:9b3d4731edbb	4111	"value": "NC"
WFKnight	0:9b3d4731edbb	4112	},
WFKnight	0:9b3d4731edbb	4113	"gpio-irq-debounce-clock-source": {
WFKnight	0:9b3d4731edbb	4114	"help": "Select GPIO IRQ debounce clock source: GPIO_DBCTL_DBCLKSRC_HCLK or GPIO_DBCTL_DBCLKSRC_LIRC",
WFKnight	0:9b3d4731edbb	4115	"value": "GPIO_DBCTL_DBCLKSRC_LIRC"
WFKnight	0:9b3d4731edbb	4116	},
WFKnight	0:9b3d4731edbb	4117	"gpio-irq-debounce-sample-rate": {
WFKnight	0:9b3d4731edbb	4118	"help": "Select GPIO IRQ debounce sample rate: GPIO_DBCTL_DBCLKSEL_1, GPIO_DBCTL_DBCLKSEL_2, GPIO_DBCTL_DBCLKSEL_4, ..., or GPIO_DBCTL_DBCLKSEL_32768",
WFKnight	0:9b3d4731edbb	4119	"value": "GPIO_DBCTL_DBCLKSEL_16"
WFKnight	0:9b3d4731edbb	4120	},
WFKnight	0:9b3d4731edbb	4121	"usb-device-hsusbd": {
WFKnight	0:9b3d4731edbb	4122	"help": "Select high-speed USB device or not",
WFKnight	0:9b3d4731edbb	4123	"value": 1
WFKnight	0:9b3d4731edbb	4124	},
WFKnight	0:9b3d4731edbb	4125	"ctrl01-enable": {
WFKnight	0:9b3d4731edbb	4126	"help": "Enable control_01",
WFKnight	0:9b3d4731edbb	4127	"value": 0
WFKnight	0:9b3d4731edbb	4128	}
WFKnight	0:9b3d4731edbb	4129	},
WFKnight	0:9b3d4731edbb	4130	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	4131	"macros_add": ["MBEDTLS_CONFIG_HW_SUPPORT"],
WFKnight	0:9b3d4731edbb	4132	"device_has": ["RTC", "ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "STDIO_MESSAGES", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "TRNG", "FLASH", "CAN", "EMAC"],
WFKnight	0:9b3d4731edbb	4133	"features": ["LWIP"],
WFKnight	0:9b3d4731edbb	4134	"release_versions": ["5"],
WFKnight	0:9b3d4731edbb	4135	"device_name": "M487JIDAE",
WFKnight	0:9b3d4731edbb	4136	"bootloader_supported": true,
WFKnight	0:9b3d4731edbb	4137	"overrides": {
WFKnight	0:9b3d4731edbb	4138	"network-default-interface-type": "ETHERNET"
WFKnight	0:9b3d4731edbb	4139	}
WFKnight	0:9b3d4731edbb	4140	},
WFKnight	0:9b3d4731edbb	4141	"TMPM066": {
WFKnight	0:9b3d4731edbb	4142	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	4143	"core": "Cortex-M0",
WFKnight	0:9b3d4731edbb	4144	"is_disk_virtual": true,
WFKnight	0:9b3d4731edbb	4145	"extra_labels": ["TOSHIBA"],
WFKnight	0:9b3d4731edbb	4146	"macros": ["__TMPM066__", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
WFKnight	0:9b3d4731edbb	4147	"supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
WFKnight	0:9b3d4731edbb	4148	"device_has": ["ANALOGIN", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SLEEP", "I2C", "I2CSLAVE", "STDIO_MESSAGES", "PWMOUT"],
WFKnight	0:9b3d4731edbb	4149	"device_name": "TMPM066FWUG",
WFKnight	0:9b3d4731edbb	4150	"detect_code": ["7011"],
WFKnight	0:9b3d4731edbb	4151	"release_versions": ["5"]
WFKnight	0:9b3d4731edbb	4152	},
WFKnight	0:9b3d4731edbb	4153	"SAKURAIO_EVB_01": {
WFKnight	0:9b3d4731edbb	4154	"inherits": ["FAMILY_STM32"],
WFKnight	0:9b3d4731edbb	4155	"supported_form_factors": [],
WFKnight	0:9b3d4731edbb	4156	"core": "Cortex-M4F",
WFKnight	0:9b3d4731edbb	4157	"extra_labels_add": ["STM32F4", "STM32F411xE", "STM32F411RE"],
WFKnight	0:9b3d4731edbb	4158	"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
WFKnight	0:9b3d4731edbb	4159	"config": {
WFKnight	0:9b3d4731edbb	4160	"clock_source": {
WFKnight	0:9b3d4731edbb	4161	"help": "Mask value : USE_PLL_HSE_EXTC \| USE_PLL_HSE_XTAL (need HW patch) \| USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	4162	"value": "USE_PLL_HSI",
WFKnight	0:9b3d4731edbb	4163	"macro_name": "CLOCK_SOURCE"
WFKnight	0:9b3d4731edbb	4164	}
WFKnight	0:9b3d4731edbb	4165	},
WFKnight	0:9b3d4731edbb	4166	"device_has_add": ["SERIAL_ASYNCH", "SERIAL_FC", "FLASH"],
WFKnight	0:9b3d4731edbb	4167	"release_versions": ["2"],
WFKnight	0:9b3d4731edbb	4168	"device_name": "STM32F411RE"
WFKnight	0:9b3d4731edbb	4169	},
WFKnight	0:9b3d4731edbb	4170	"TMPM46B": {
WFKnight	0:9b3d4731edbb	4171	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	4172	"core": "Cortex-M4",
WFKnight	0:9b3d4731edbb	4173	"is_disk_virtual": true,
WFKnight	0:9b3d4731edbb	4174	"extra_labels": ["TOSHIBA"],
WFKnight	0:9b3d4731edbb	4175	"macros": ["__TMPM46B__"],
WFKnight	0:9b3d4731edbb	4176	"supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
WFKnight	0:9b3d4731edbb	4177	"device_has": ["ANALOGIN", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_FC", "SPI", "I2C", "STDIO_MESSAGES", "TRNG", "FLASH", "SLEEP"],
WFKnight	0:9b3d4731edbb	4178	"device_name": "TMPM46BF10FG",
WFKnight	0:9b3d4731edbb	4179	"detect_code": ["7013"],
WFKnight	0:9b3d4731edbb	4180	"release_versions": ["5"],
WFKnight	0:9b3d4731edbb	4181	"bootloader_supported": true
WFKnight	0:9b3d4731edbb	4182	},
WFKnight	0:9b3d4731edbb	4183	"ARM_FM": {
WFKnight	0:9b3d4731edbb	4184	"inherits": ["Target"],
WFKnight	0:9b3d4731edbb	4185	"public": false,
WFKnight	0:9b3d4731edbb	4186	"extra_labels": ["ARM_FM"]
WFKnight	0:9b3d4731edbb	4187	},
WFKnight	0:9b3d4731edbb	4188	"FVP_MPS2": {
WFKnight	0:9b3d4731edbb	4189	"inherits": ["ARM_FM"],
WFKnight	0:9b3d4731edbb	4190	"public": false,
WFKnight	0:9b3d4731edbb	4191	"supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
WFKnight	0:9b3d4731edbb	4192	"OUTPUT_EXT": "elf",
WFKnight	0:9b3d4731edbb	4193	"device_has": ["AACI", "ANALOGIN", "CLCD", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC", "USTICKER"],
WFKnight	0:9b3d4731edbb	4194	"release_versions": ["5"]
WFKnight	0:9b3d4731edbb	4195	},
WFKnight	0:9b3d4731edbb	4196	"FVP_MPS2_M0": {
WFKnight	0:9b3d4731edbb	4197	"inherits": ["FVP_MPS2"],
WFKnight	0:9b3d4731edbb	4198	"core": "Cortex-M0",
WFKnight	0:9b3d4731edbb	4199	"macros": ["CMSDK_CM0","CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""]
WFKnight	0:9b3d4731edbb	4200	},
WFKnight	0:9b3d4731edbb	4201	"FVP_MPS2_M0P": {
WFKnight	0:9b3d4731edbb	4202	"inherits": ["FVP_MPS2"],
WFKnight	0:9b3d4731edbb	4203	"core": "Cortex-M0+",
WFKnight	0:9b3d4731edbb	4204	"macros": ["CMSDK_CM0plus"]
WFKnight	0:9b3d4731edbb	4205	},
WFKnight	0:9b3d4731edbb	4206	"FVP_MPS2_M3": {
WFKnight	0:9b3d4731edbb	4207	"inherits": ["FVP_MPS2"],
WFKnight	0:9b3d4731edbb	4208	"core": "Cortex-M3",
WFKnight	0:9b3d4731edbb	4209	"macros": ["CMSDK_CM3"]
WFKnight	0:9b3d4731edbb	4210	},
WFKnight	0:9b3d4731edbb	4211	"FVP_MPS2_M4": {
WFKnight	0:9b3d4731edbb	4212	"inherits": ["FVP_MPS2"],
WFKnight	0:9b3d4731edbb	4213	"core": "Cortex-M4",
WFKnight	0:9b3d4731edbb	4214	"macros": ["CMSDK_CM4"]
WFKnight	0:9b3d4731edbb	4215	},
WFKnight	0:9b3d4731edbb	4216	"FVP_MPS2_M7": {
WFKnight	0:9b3d4731edbb	4217	"inherits": ["FVP_MPS2"],
WFKnight	0:9b3d4731edbb	4218	"core": "Cortex-M7",
WFKnight	0:9b3d4731edbb	4219	"macros": ["CMSDK_CM7"]
WFKnight	0:9b3d4731edbb	4220	}
WFKnight	0:9b3d4731edbb	4221	}

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Type:	Program
Mbed OS support:	Mbed OS
Created:	21 Jun 2018
Imports:	1
Forks:	0
Commits:	1
Dependents:	0
Dependencies:	0
Followers:	1

mbed-os/targets/targets.json@0:9b3d4731edbb, 2018-06-21 (annotated)

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