Knight KE
游戏王对战板，目前code还是空的
mbed-os/targets/TARGET_STM/i2c_api.c@0:9b3d4731edbb, 2018-06-21 (annotated)
- Committer:
- WFKnight
- Date:
- Thu Jun 21 13:51:43 2018 +0000
- Revision:
- 0:9b3d4731edbb
UART, RTOS, LED
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| WFKnight | 0:9b3d4731edbb | 1 | /* mbed Microcontroller Library |
| WFKnight | 0:9b3d4731edbb | 2 | ******************************************************************************* |
| WFKnight | 0:9b3d4731edbb | 3 | * Copyright (c) 2015, STMicroelectronics |
| WFKnight | 0:9b3d4731edbb | 4 | * All rights reserved. |
| WFKnight | 0:9b3d4731edbb | 5 | * |
| WFKnight | 0:9b3d4731edbb | 6 | * Redistribution and use in source and binary forms, with or without |
| WFKnight | 0:9b3d4731edbb | 7 | * modification, are permitted provided that the following conditions are met: |
| WFKnight | 0:9b3d4731edbb | 8 | * |
| WFKnight | 0:9b3d4731edbb | 9 | * 1. Redistributions of source code must retain the above copyright notice, |
| WFKnight | 0:9b3d4731edbb | 10 | * this list of conditions and the following disclaimer. |
| WFKnight | 0:9b3d4731edbb | 11 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| WFKnight | 0:9b3d4731edbb | 12 | * this list of conditions and the following disclaimer in the documentation |
| WFKnight | 0:9b3d4731edbb | 13 | * and/or other materials provided with the distribution. |
| WFKnight | 0:9b3d4731edbb | 14 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| WFKnight | 0:9b3d4731edbb | 15 | * may be used to endorse or promote products derived from this software |
| WFKnight | 0:9b3d4731edbb | 16 | * without specific prior written permission. |
| WFKnight | 0:9b3d4731edbb | 17 | * |
| WFKnight | 0:9b3d4731edbb | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| WFKnight | 0:9b3d4731edbb | 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| WFKnight | 0:9b3d4731edbb | 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| WFKnight | 0:9b3d4731edbb | 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| WFKnight | 0:9b3d4731edbb | 22 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| WFKnight | 0:9b3d4731edbb | 23 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| WFKnight | 0:9b3d4731edbb | 24 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| WFKnight | 0:9b3d4731edbb | 25 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| WFKnight | 0:9b3d4731edbb | 26 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| WFKnight | 0:9b3d4731edbb | 27 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| WFKnight | 0:9b3d4731edbb | 28 | ******************************************************************************* |
| WFKnight | 0:9b3d4731edbb | 29 | */ |
| WFKnight | 0:9b3d4731edbb | 30 | |
| WFKnight | 0:9b3d4731edbb | 31 | |
| WFKnight | 0:9b3d4731edbb | 32 | #include "mbed_assert.h" |
| WFKnight | 0:9b3d4731edbb | 33 | #include "i2c_api.h" |
| WFKnight | 0:9b3d4731edbb | 34 | #include "platform/mbed_wait_api.h" |
| WFKnight | 0:9b3d4731edbb | 35 | |
| WFKnight | 0:9b3d4731edbb | 36 | #if DEVICE_I2C |
| WFKnight | 0:9b3d4731edbb | 37 | |
| WFKnight | 0:9b3d4731edbb | 38 | #include "cmsis.h" |
| WFKnight | 0:9b3d4731edbb | 39 | #include "pinmap.h" |
| WFKnight | 0:9b3d4731edbb | 40 | #include "PeripheralPins.h" |
| WFKnight | 0:9b3d4731edbb | 41 | #include "i2c_device.h" // family specific defines |
| WFKnight | 0:9b3d4731edbb | 42 | |
| WFKnight | 0:9b3d4731edbb | 43 | #ifndef DEBUG_STDIO |
| WFKnight | 0:9b3d4731edbb | 44 | # define DEBUG_STDIO 0 |
| WFKnight | 0:9b3d4731edbb | 45 | #endif |
| WFKnight | 0:9b3d4731edbb | 46 | |
| WFKnight | 0:9b3d4731edbb | 47 | #if DEBUG_STDIO |
| WFKnight | 0:9b3d4731edbb | 48 | # include <stdio.h> |
| WFKnight | 0:9b3d4731edbb | 49 | # define DEBUG_PRINTF(...) do { printf(__VA_ARGS__); } while(0) |
| WFKnight | 0:9b3d4731edbb | 50 | #else |
| WFKnight | 0:9b3d4731edbb | 51 | # define DEBUG_PRINTF(...) {} |
| WFKnight | 0:9b3d4731edbb | 52 | #endif |
| WFKnight | 0:9b3d4731edbb | 53 | |
| WFKnight | 0:9b3d4731edbb | 54 | #if DEVICE_I2C_ASYNCH |
| WFKnight | 0:9b3d4731edbb | 55 | #define I2C_S(obj) (struct i2c_s *) (&((obj)->i2c)) |
| WFKnight | 0:9b3d4731edbb | 56 | #else |
| WFKnight | 0:9b3d4731edbb | 57 | #define I2C_S(obj) (struct i2c_s *) (obj) |
| WFKnight | 0:9b3d4731edbb | 58 | #endif |
| WFKnight | 0:9b3d4731edbb | 59 | |
| WFKnight | 0:9b3d4731edbb | 60 | /* Family specific description for I2C */ |
| WFKnight | 0:9b3d4731edbb | 61 | #define I2C_NUM (5) |
| WFKnight | 0:9b3d4731edbb | 62 | static I2C_HandleTypeDef* i2c_handles[I2C_NUM]; |
| WFKnight | 0:9b3d4731edbb | 63 | |
| WFKnight | 0:9b3d4731edbb | 64 | /* Timeout values are based on core clock and I2C clock. |
| WFKnight | 0:9b3d4731edbb | 65 | The BYTE_TIMEOUT is computed as twice the number of cycles it would |
| WFKnight | 0:9b3d4731edbb | 66 | take to send 10 bits over I2C. Most Flags should take less than that. |
| WFKnight | 0:9b3d4731edbb | 67 | This is for immediate FLAG or ACK check. |
| WFKnight | 0:9b3d4731edbb | 68 | */ |
| WFKnight | 0:9b3d4731edbb | 69 | #define BYTE_TIMEOUT ((SystemCoreClock / obj_s->hz) * 2 * 10) |
| WFKnight | 0:9b3d4731edbb | 70 | /* Timeout values based on I2C clock. |
| WFKnight | 0:9b3d4731edbb | 71 | The BYTE_TIMEOUT_US is computed as 3x the time in us it would |
| WFKnight | 0:9b3d4731edbb | 72 | take to send 10 bits over I2C. Most Flags should take less than that. |
| WFKnight | 0:9b3d4731edbb | 73 | This is for complete transfers check. |
| WFKnight | 0:9b3d4731edbb | 74 | */ |
| WFKnight | 0:9b3d4731edbb | 75 | #define BYTE_TIMEOUT_US ((SystemCoreClock / obj_s->hz) * 3 * 10) |
| WFKnight | 0:9b3d4731edbb | 76 | /* Timeout values for flags and events waiting loops. These timeouts are |
| WFKnight | 0:9b3d4731edbb | 77 | not based on accurate values, they just guarantee that the application will |
| WFKnight | 0:9b3d4731edbb | 78 | not remain stuck if the I2C communication is corrupted. |
| WFKnight | 0:9b3d4731edbb | 79 | */ |
| WFKnight | 0:9b3d4731edbb | 80 | #define FLAG_TIMEOUT ((int)0x1000) |
| WFKnight | 0:9b3d4731edbb | 81 | |
| WFKnight | 0:9b3d4731edbb | 82 | /* GENERIC INIT and HELPERS FUNCTIONS */ |
| WFKnight | 0:9b3d4731edbb | 83 | |
| WFKnight | 0:9b3d4731edbb | 84 | #if defined(I2C1_BASE) |
| WFKnight | 0:9b3d4731edbb | 85 | static void i2c1_irq(void) |
| WFKnight | 0:9b3d4731edbb | 86 | { |
| WFKnight | 0:9b3d4731edbb | 87 | I2C_HandleTypeDef * handle = i2c_handles[0]; |
| WFKnight | 0:9b3d4731edbb | 88 | HAL_I2C_EV_IRQHandler(handle); |
| WFKnight | 0:9b3d4731edbb | 89 | HAL_I2C_ER_IRQHandler(handle); |
| WFKnight | 0:9b3d4731edbb | 90 | } |
| WFKnight | 0:9b3d4731edbb | 91 | #endif |
| WFKnight | 0:9b3d4731edbb | 92 | #if defined(I2C2_BASE) |
| WFKnight | 0:9b3d4731edbb | 93 | static void i2c2_irq(void) |
| WFKnight | 0:9b3d4731edbb | 94 | { |
| WFKnight | 0:9b3d4731edbb | 95 | I2C_HandleTypeDef * handle = i2c_handles[1]; |
| WFKnight | 0:9b3d4731edbb | 96 | HAL_I2C_EV_IRQHandler(handle); |
| WFKnight | 0:9b3d4731edbb | 97 | HAL_I2C_ER_IRQHandler(handle); |
| WFKnight | 0:9b3d4731edbb | 98 | } |
| WFKnight | 0:9b3d4731edbb | 99 | #endif |
| WFKnight | 0:9b3d4731edbb | 100 | #if defined(I2C3_BASE) |
| WFKnight | 0:9b3d4731edbb | 101 | static void i2c3_irq(void) |
| WFKnight | 0:9b3d4731edbb | 102 | { |
| WFKnight | 0:9b3d4731edbb | 103 | I2C_HandleTypeDef * handle = i2c_handles[2]; |
| WFKnight | 0:9b3d4731edbb | 104 | HAL_I2C_EV_IRQHandler(handle); |
| WFKnight | 0:9b3d4731edbb | 105 | HAL_I2C_ER_IRQHandler(handle); |
| WFKnight | 0:9b3d4731edbb | 106 | } |
| WFKnight | 0:9b3d4731edbb | 107 | #endif |
| WFKnight | 0:9b3d4731edbb | 108 | #if defined(I2C4_BASE) |
| WFKnight | 0:9b3d4731edbb | 109 | static void i2c4_irq(void) |
| WFKnight | 0:9b3d4731edbb | 110 | { |
| WFKnight | 0:9b3d4731edbb | 111 | I2C_HandleTypeDef * handle = i2c_handles[3]; |
| WFKnight | 0:9b3d4731edbb | 112 | HAL_I2C_EV_IRQHandler(handle); |
| WFKnight | 0:9b3d4731edbb | 113 | HAL_I2C_ER_IRQHandler(handle); |
| WFKnight | 0:9b3d4731edbb | 114 | } |
| WFKnight | 0:9b3d4731edbb | 115 | #endif |
| WFKnight | 0:9b3d4731edbb | 116 | #if defined(FMPI2C1_BASE) |
| WFKnight | 0:9b3d4731edbb | 117 | static void i2c5_irq(void) |
| WFKnight | 0:9b3d4731edbb | 118 | { |
| WFKnight | 0:9b3d4731edbb | 119 | I2C_HandleTypeDef * handle = i2c_handles[4]; |
| WFKnight | 0:9b3d4731edbb | 120 | HAL_I2C_EV_IRQHandler(handle); |
| WFKnight | 0:9b3d4731edbb | 121 | HAL_I2C_ER_IRQHandler(handle); |
| WFKnight | 0:9b3d4731edbb | 122 | } |
| WFKnight | 0:9b3d4731edbb | 123 | #endif |
| WFKnight | 0:9b3d4731edbb | 124 | |
| WFKnight | 0:9b3d4731edbb | 125 | void i2c_ev_err_enable(i2c_t *obj, uint32_t handler) { |
| WFKnight | 0:9b3d4731edbb | 126 | struct i2c_s *obj_s = I2C_S(obj); |
| WFKnight | 0:9b3d4731edbb | 127 | IRQn_Type irq_event_n = obj_s->event_i2cIRQ; |
| WFKnight | 0:9b3d4731edbb | 128 | IRQn_Type irq_error_n = obj_s->error_i2cIRQ; |
| WFKnight | 0:9b3d4731edbb | 129 | /* default prio in master case is set to 2 */ |
| WFKnight | 0:9b3d4731edbb | 130 | uint32_t prio = 2; |
| WFKnight | 0:9b3d4731edbb | 131 | |
| WFKnight | 0:9b3d4731edbb | 132 | /* Set up ITs using IRQ and handler tables */ |
| WFKnight | 0:9b3d4731edbb | 133 | NVIC_SetVector(irq_event_n, handler); |
| WFKnight | 0:9b3d4731edbb | 134 | NVIC_SetVector(irq_error_n, handler); |
| WFKnight | 0:9b3d4731edbb | 135 | |
| WFKnight | 0:9b3d4731edbb | 136 | #if DEVICE_I2CSLAVE |
| WFKnight | 0:9b3d4731edbb | 137 | /* Set higher priority to slave device than master. |
| WFKnight | 0:9b3d4731edbb | 138 | * In case a device makes use of both master and slave, the |
| WFKnight | 0:9b3d4731edbb | 139 | * slave needs higher responsiveness. |
| WFKnight | 0:9b3d4731edbb | 140 | */ |
| WFKnight | 0:9b3d4731edbb | 141 | if (obj_s->slave) { |
| WFKnight | 0:9b3d4731edbb | 142 | prio = 1; |
| WFKnight | 0:9b3d4731edbb | 143 | } |
| WFKnight | 0:9b3d4731edbb | 144 | #endif |
| WFKnight | 0:9b3d4731edbb | 145 | |
| WFKnight | 0:9b3d4731edbb | 146 | NVIC_SetPriority(irq_event_n, prio); |
| WFKnight | 0:9b3d4731edbb | 147 | NVIC_SetPriority(irq_error_n, prio); |
| WFKnight | 0:9b3d4731edbb | 148 | NVIC_EnableIRQ(irq_event_n); |
| WFKnight | 0:9b3d4731edbb | 149 | NVIC_EnableIRQ(irq_error_n); |
| WFKnight | 0:9b3d4731edbb | 150 | } |
| WFKnight | 0:9b3d4731edbb | 151 | |
| WFKnight | 0:9b3d4731edbb | 152 | void i2c_ev_err_disable(i2c_t *obj) { |
| WFKnight | 0:9b3d4731edbb | 153 | struct i2c_s *obj_s = I2C_S(obj); |
| WFKnight | 0:9b3d4731edbb | 154 | IRQn_Type irq_event_n = obj_s->event_i2cIRQ; |
| WFKnight | 0:9b3d4731edbb | 155 | IRQn_Type irq_error_n = obj_s->error_i2cIRQ; |
| WFKnight | 0:9b3d4731edbb | 156 | |
| WFKnight | 0:9b3d4731edbb | 157 | HAL_NVIC_DisableIRQ(irq_event_n); |
| WFKnight | 0:9b3d4731edbb | 158 | HAL_NVIC_DisableIRQ(irq_error_n); |
| WFKnight | 0:9b3d4731edbb | 159 | } |
| WFKnight | 0:9b3d4731edbb | 160 | |
| WFKnight | 0:9b3d4731edbb | 161 | uint32_t i2c_get_irq_handler(i2c_t *obj) |
| WFKnight | 0:9b3d4731edbb | 162 | { |
| WFKnight | 0:9b3d4731edbb | 163 | struct i2c_s *obj_s = I2C_S(obj); |
| WFKnight | 0:9b3d4731edbb | 164 | I2C_HandleTypeDef *handle = &(obj_s->handle); |
| WFKnight | 0:9b3d4731edbb | 165 | uint32_t handler = 0; |
| WFKnight | 0:9b3d4731edbb | 166 | |
| WFKnight | 0:9b3d4731edbb | 167 | switch (obj_s->index) { |
| WFKnight | 0:9b3d4731edbb | 168 | #if defined(I2C1_BASE) |
| WFKnight | 0:9b3d4731edbb | 169 | case 0: |
| WFKnight | 0:9b3d4731edbb | 170 | handler = (uint32_t)&i2c1_irq; |
| WFKnight | 0:9b3d4731edbb | 171 | break; |
| WFKnight | 0:9b3d4731edbb | 172 | #endif |
| WFKnight | 0:9b3d4731edbb | 173 | #if defined(I2C2_BASE) |
| WFKnight | 0:9b3d4731edbb | 174 | case 1: |
| WFKnight | 0:9b3d4731edbb | 175 | handler = (uint32_t)&i2c2_irq; |
| WFKnight | 0:9b3d4731edbb | 176 | break; |
| WFKnight | 0:9b3d4731edbb | 177 | #endif |
| WFKnight | 0:9b3d4731edbb | 178 | #if defined(I2C3_BASE) |
| WFKnight | 0:9b3d4731edbb | 179 | case 2: |
| WFKnight | 0:9b3d4731edbb | 180 | handler = (uint32_t)&i2c3_irq; |
| WFKnight | 0:9b3d4731edbb | 181 | break; |
| WFKnight | 0:9b3d4731edbb | 182 | #endif |
| WFKnight | 0:9b3d4731edbb | 183 | #if defined(I2C4_BASE) |
| WFKnight | 0:9b3d4731edbb | 184 | case 3: |
| WFKnight | 0:9b3d4731edbb | 185 | handler = (uint32_t)&i2c4_irq; |
| WFKnight | 0:9b3d4731edbb | 186 | break; |
| WFKnight | 0:9b3d4731edbb | 187 | #endif |
| WFKnight | 0:9b3d4731edbb | 188 | #if defined(FMPI2C1_BASE) |
| WFKnight | 0:9b3d4731edbb | 189 | case 4: |
| WFKnight | 0:9b3d4731edbb | 190 | handler = (uint32_t)&i2c5_irq; |
| WFKnight | 0:9b3d4731edbb | 191 | break; |
| WFKnight | 0:9b3d4731edbb | 192 | #endif |
| WFKnight | 0:9b3d4731edbb | 193 | } |
| WFKnight | 0:9b3d4731edbb | 194 | |
| WFKnight | 0:9b3d4731edbb | 195 | i2c_handles[obj_s->index] = handle; |
| WFKnight | 0:9b3d4731edbb | 196 | return handler; |
| WFKnight | 0:9b3d4731edbb | 197 | } |
| WFKnight | 0:9b3d4731edbb | 198 | |
| WFKnight | 0:9b3d4731edbb | 199 | void i2c_hw_reset(i2c_t *obj) { |
| WFKnight | 0:9b3d4731edbb | 200 | int timeout; |
| WFKnight | 0:9b3d4731edbb | 201 | struct i2c_s *obj_s = I2C_S(obj); |
| WFKnight | 0:9b3d4731edbb | 202 | I2C_HandleTypeDef *handle = &(obj_s->handle); |
| WFKnight | 0:9b3d4731edbb | 203 | |
| WFKnight | 0:9b3d4731edbb | 204 | handle->Instance = (I2C_TypeDef *)(obj_s->i2c); |
| WFKnight | 0:9b3d4731edbb | 205 | |
| WFKnight | 0:9b3d4731edbb | 206 | // wait before reset |
| WFKnight | 0:9b3d4731edbb | 207 | timeout = BYTE_TIMEOUT; |
| WFKnight | 0:9b3d4731edbb | 208 | while ((__HAL_I2C_GET_FLAG(handle, I2C_FLAG_BUSY)) && (--timeout != 0)); |
| WFKnight | 0:9b3d4731edbb | 209 | #if defined I2C1_BASE |
| WFKnight | 0:9b3d4731edbb | 210 | if (obj_s->i2c == I2C_1) { |
| WFKnight | 0:9b3d4731edbb | 211 | __HAL_RCC_I2C1_FORCE_RESET(); |
| WFKnight | 0:9b3d4731edbb | 212 | __HAL_RCC_I2C1_RELEASE_RESET(); |
| WFKnight | 0:9b3d4731edbb | 213 | } |
| WFKnight | 0:9b3d4731edbb | 214 | #endif |
| WFKnight | 0:9b3d4731edbb | 215 | #if defined I2C2_BASE |
| WFKnight | 0:9b3d4731edbb | 216 | if (obj_s->i2c == I2C_2) { |
| WFKnight | 0:9b3d4731edbb | 217 | __HAL_RCC_I2C2_FORCE_RESET(); |
| WFKnight | 0:9b3d4731edbb | 218 | __HAL_RCC_I2C2_RELEASE_RESET(); |
| WFKnight | 0:9b3d4731edbb | 219 | } |
| WFKnight | 0:9b3d4731edbb | 220 | #endif |
| WFKnight | 0:9b3d4731edbb | 221 | #if defined I2C3_BASE |
| WFKnight | 0:9b3d4731edbb | 222 | if (obj_s->i2c == I2C_3) { |
| WFKnight | 0:9b3d4731edbb | 223 | __HAL_RCC_I2C3_FORCE_RESET(); |
| WFKnight | 0:9b3d4731edbb | 224 | __HAL_RCC_I2C3_RELEASE_RESET(); |
| WFKnight | 0:9b3d4731edbb | 225 | } |
| WFKnight | 0:9b3d4731edbb | 226 | #endif |
| WFKnight | 0:9b3d4731edbb | 227 | #if defined I2C4_BASE |
| WFKnight | 0:9b3d4731edbb | 228 | if (obj_s->i2c == I2C_4) { |
| WFKnight | 0:9b3d4731edbb | 229 | __HAL_RCC_I2C4_FORCE_RESET(); |
| WFKnight | 0:9b3d4731edbb | 230 | __HAL_RCC_I2C4_RELEASE_RESET(); |
| WFKnight | 0:9b3d4731edbb | 231 | } |
| WFKnight | 0:9b3d4731edbb | 232 | #endif |
| WFKnight | 0:9b3d4731edbb | 233 | #if defined FMPI2C1_BASE |
| WFKnight | 0:9b3d4731edbb | 234 | if (obj_s->i2c == FMPI2C_1) { |
| WFKnight | 0:9b3d4731edbb | 235 | __HAL_RCC_FMPI2C1_FORCE_RESET(); |
| WFKnight | 0:9b3d4731edbb | 236 | __HAL_RCC_FMPI2C1_RELEASE_RESET(); |
| WFKnight | 0:9b3d4731edbb | 237 | } |
| WFKnight | 0:9b3d4731edbb | 238 | #endif |
| WFKnight | 0:9b3d4731edbb | 239 | } |
| WFKnight | 0:9b3d4731edbb | 240 | |
| WFKnight | 0:9b3d4731edbb | 241 | void i2c_sw_reset(i2c_t *obj) |
| WFKnight | 0:9b3d4731edbb | 242 | { |
| WFKnight | 0:9b3d4731edbb | 243 | struct i2c_s *obj_s = I2C_S(obj); |
| WFKnight | 0:9b3d4731edbb | 244 | I2C_HandleTypeDef *handle = &(obj_s->handle); |
| WFKnight | 0:9b3d4731edbb | 245 | /* SW reset procedure: |
| WFKnight | 0:9b3d4731edbb | 246 | * PE must be kept low during at least 3 APB clock cycles |
| WFKnight | 0:9b3d4731edbb | 247 | * in order to perform the software reset. |
| WFKnight | 0:9b3d4731edbb | 248 | * This is ensured by writing the following software sequence: |
| WFKnight | 0:9b3d4731edbb | 249 | * - Write PE=0 |
| WFKnight | 0:9b3d4731edbb | 250 | * - Check PE=0 |
| WFKnight | 0:9b3d4731edbb | 251 | * - Write PE=1. |
| WFKnight | 0:9b3d4731edbb | 252 | */ |
| WFKnight | 0:9b3d4731edbb | 253 | handle->Instance->CR1 &= ~I2C_CR1_PE; |
| WFKnight | 0:9b3d4731edbb | 254 | while(handle->Instance->CR1 & I2C_CR1_PE); |
| WFKnight | 0:9b3d4731edbb | 255 | handle->Instance->CR1 |= I2C_CR1_PE; |
| WFKnight | 0:9b3d4731edbb | 256 | } |
| WFKnight | 0:9b3d4731edbb | 257 | |
| WFKnight | 0:9b3d4731edbb | 258 | void i2c_init(i2c_t *obj, PinName sda, PinName scl) { |
| WFKnight | 0:9b3d4731edbb | 259 | |
| WFKnight | 0:9b3d4731edbb | 260 | struct i2c_s *obj_s = I2C_S(obj); |
| WFKnight | 0:9b3d4731edbb | 261 | |
| WFKnight | 0:9b3d4731edbb | 262 | // Determine the I2C to use |
| WFKnight | 0:9b3d4731edbb | 263 | I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA); |
| WFKnight | 0:9b3d4731edbb | 264 | I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL); |
| WFKnight | 0:9b3d4731edbb | 265 | obj_s->sda = sda; |
| WFKnight | 0:9b3d4731edbb | 266 | obj_s->scl = scl; |
| WFKnight | 0:9b3d4731edbb | 267 | |
| WFKnight | 0:9b3d4731edbb | 268 | obj_s->i2c = (I2CName)pinmap_merge(i2c_sda, i2c_scl); |
| WFKnight | 0:9b3d4731edbb | 269 | MBED_ASSERT(obj_s->i2c != (I2CName)NC); |
| WFKnight | 0:9b3d4731edbb | 270 | |
| WFKnight | 0:9b3d4731edbb | 271 | #if defined I2C1_BASE |
| WFKnight | 0:9b3d4731edbb | 272 | // Enable I2C1 clock and pinout if not done |
| WFKnight | 0:9b3d4731edbb | 273 | if (obj_s->i2c == I2C_1) { |
| WFKnight | 0:9b3d4731edbb | 274 | obj_s->index = 0; |
| WFKnight | 0:9b3d4731edbb | 275 | __HAL_RCC_I2C1_CLK_ENABLE(); |
| WFKnight | 0:9b3d4731edbb | 276 | // Configure I2C pins |
| WFKnight | 0:9b3d4731edbb | 277 | obj_s->event_i2cIRQ = I2C1_EV_IRQn; |
| WFKnight | 0:9b3d4731edbb | 278 | obj_s->error_i2cIRQ = I2C1_ER_IRQn; |
| WFKnight | 0:9b3d4731edbb | 279 | } |
| WFKnight | 0:9b3d4731edbb | 280 | #endif |
| WFKnight | 0:9b3d4731edbb | 281 | #if defined I2C2_BASE |
| WFKnight | 0:9b3d4731edbb | 282 | // Enable I2C2 clock and pinout if not done |
| WFKnight | 0:9b3d4731edbb | 283 | if (obj_s->i2c == I2C_2) { |
| WFKnight | 0:9b3d4731edbb | 284 | obj_s->index = 1; |
| WFKnight | 0:9b3d4731edbb | 285 | __HAL_RCC_I2C2_CLK_ENABLE(); |
| WFKnight | 0:9b3d4731edbb | 286 | obj_s->event_i2cIRQ = I2C2_EV_IRQn; |
| WFKnight | 0:9b3d4731edbb | 287 | obj_s->error_i2cIRQ = I2C2_ER_IRQn; |
| WFKnight | 0:9b3d4731edbb | 288 | } |
| WFKnight | 0:9b3d4731edbb | 289 | #endif |
| WFKnight | 0:9b3d4731edbb | 290 | #if defined I2C3_BASE |
| WFKnight | 0:9b3d4731edbb | 291 | // Enable I2C3 clock and pinout if not done |
| WFKnight | 0:9b3d4731edbb | 292 | if (obj_s->i2c == I2C_3) { |
| WFKnight | 0:9b3d4731edbb | 293 | obj_s->index = 2; |
| WFKnight | 0:9b3d4731edbb | 294 | __HAL_RCC_I2C3_CLK_ENABLE(); |
| WFKnight | 0:9b3d4731edbb | 295 | obj_s->event_i2cIRQ = I2C3_EV_IRQn; |
| WFKnight | 0:9b3d4731edbb | 296 | obj_s->error_i2cIRQ = I2C3_ER_IRQn; |
| WFKnight | 0:9b3d4731edbb | 297 | } |
| WFKnight | 0:9b3d4731edbb | 298 | #endif |
| WFKnight | 0:9b3d4731edbb | 299 | #if defined I2C4_BASE |
| WFKnight | 0:9b3d4731edbb | 300 | // Enable I2C3 clock and pinout if not done |
| WFKnight | 0:9b3d4731edbb | 301 | if (obj_s->i2c == I2C_4) { |
| WFKnight | 0:9b3d4731edbb | 302 | obj_s->index = 3; |
| WFKnight | 0:9b3d4731edbb | 303 | __HAL_RCC_I2C4_CLK_ENABLE(); |
| WFKnight | 0:9b3d4731edbb | 304 | obj_s->event_i2cIRQ = I2C4_EV_IRQn; |
| WFKnight | 0:9b3d4731edbb | 305 | obj_s->error_i2cIRQ = I2C4_ER_IRQn; |
| WFKnight | 0:9b3d4731edbb | 306 | } |
| WFKnight | 0:9b3d4731edbb | 307 | #endif |
| WFKnight | 0:9b3d4731edbb | 308 | #if defined FMPI2C1_BASE |
| WFKnight | 0:9b3d4731edbb | 309 | // Enable I2C3 clock and pinout if not done |
| WFKnight | 0:9b3d4731edbb | 310 | if (obj_s->i2c == FMPI2C_1) { |
| WFKnight | 0:9b3d4731edbb | 311 | obj_s->index = 4; |
| WFKnight | 0:9b3d4731edbb | 312 | __HAL_RCC_FMPI2C1_CLK_ENABLE(); |
| WFKnight | 0:9b3d4731edbb | 313 | obj_s->event_i2cIRQ = FMPI2C1_EV_IRQn; |
| WFKnight | 0:9b3d4731edbb | 314 | obj_s->error_i2cIRQ = FMPI2C1_ER_IRQn; |
| WFKnight | 0:9b3d4731edbb | 315 | } |
| WFKnight | 0:9b3d4731edbb | 316 | #endif |
| WFKnight | 0:9b3d4731edbb | 317 | |
| WFKnight | 0:9b3d4731edbb | 318 | // Configure I2C pins |
| WFKnight | 0:9b3d4731edbb | 319 | pinmap_pinout(sda, PinMap_I2C_SDA); |
| WFKnight | 0:9b3d4731edbb | 320 | pinmap_pinout(scl, PinMap_I2C_SCL); |
| WFKnight | 0:9b3d4731edbb | 321 | pin_mode(sda, OpenDrainNoPull); |
| WFKnight | 0:9b3d4731edbb | 322 | pin_mode(scl, OpenDrainNoPull); |
| WFKnight | 0:9b3d4731edbb | 323 | |
| WFKnight | 0:9b3d4731edbb | 324 | // I2C configuration |
| WFKnight | 0:9b3d4731edbb | 325 | // Default hz value used for timeout computation |
| WFKnight | 0:9b3d4731edbb | 326 | if(!obj_s->hz) |
| WFKnight | 0:9b3d4731edbb | 327 | obj_s->hz = 100000; // 100 kHz per default |
| WFKnight | 0:9b3d4731edbb | 328 | |
| WFKnight | 0:9b3d4731edbb | 329 | // Reset to clear pending flags if any |
| WFKnight | 0:9b3d4731edbb | 330 | i2c_hw_reset(obj); |
| WFKnight | 0:9b3d4731edbb | 331 | i2c_frequency(obj, obj_s->hz ); |
| WFKnight | 0:9b3d4731edbb | 332 | |
| WFKnight | 0:9b3d4731edbb | 333 | #if DEVICE_I2CSLAVE |
| WFKnight | 0:9b3d4731edbb | 334 | // I2C master by default |
| WFKnight | 0:9b3d4731edbb | 335 | obj_s->slave = 0; |
| WFKnight | 0:9b3d4731edbb | 336 | obj_s->pending_slave_tx_master_rx = 0; |
| WFKnight | 0:9b3d4731edbb | 337 | obj_s->pending_slave_rx_maxter_tx = 0; |
| WFKnight | 0:9b3d4731edbb | 338 | #endif |
| WFKnight | 0:9b3d4731edbb | 339 | |
| WFKnight | 0:9b3d4731edbb | 340 | // I2C Xfer operation init |
| WFKnight | 0:9b3d4731edbb | 341 | obj_s->event = 0; |
| WFKnight | 0:9b3d4731edbb | 342 | obj_s->XferOperation = I2C_FIRST_AND_LAST_FRAME; |
| WFKnight | 0:9b3d4731edbb | 343 | #ifdef I2C_IP_VERSION_V2 |
| WFKnight | 0:9b3d4731edbb | 344 | obj_s->pending_start = 0; |
| WFKnight | 0:9b3d4731edbb | 345 | #endif |
| WFKnight | 0:9b3d4731edbb | 346 | } |
| WFKnight | 0:9b3d4731edbb | 347 | |
| WFKnight | 0:9b3d4731edbb | 348 | void i2c_frequency(i2c_t *obj, int hz) |
| WFKnight | 0:9b3d4731edbb | 349 | { |
| WFKnight | 0:9b3d4731edbb | 350 | int timeout; |
| WFKnight | 0:9b3d4731edbb | 351 | struct i2c_s *obj_s = I2C_S(obj); |
| WFKnight | 0:9b3d4731edbb | 352 | I2C_HandleTypeDef *handle = &(obj_s->handle); |
| WFKnight | 0:9b3d4731edbb | 353 | |
| WFKnight | 0:9b3d4731edbb | 354 | // wait before init |
| WFKnight | 0:9b3d4731edbb | 355 | timeout = BYTE_TIMEOUT; |
| WFKnight | 0:9b3d4731edbb | 356 | while ((__HAL_I2C_GET_FLAG(handle, I2C_FLAG_BUSY)) && (--timeout != 0)); |
| WFKnight | 0:9b3d4731edbb | 357 | |
| WFKnight | 0:9b3d4731edbb | 358 | #ifdef I2C_IP_VERSION_V1 |
| WFKnight | 0:9b3d4731edbb | 359 | handle->Init.ClockSpeed = hz; |
| WFKnight | 0:9b3d4731edbb | 360 | handle->Init.DutyCycle = I2C_DUTYCYCLE_2; |
| WFKnight | 0:9b3d4731edbb | 361 | #endif |
| WFKnight | 0:9b3d4731edbb | 362 | #ifdef I2C_IP_VERSION_V2 |
| WFKnight | 0:9b3d4731edbb | 363 | /* Only predefined timing for below frequencies are supported */ |
| WFKnight | 0:9b3d4731edbb | 364 | MBED_ASSERT((hz == 100000) || (hz == 400000) || (hz == 1000000)); |
| WFKnight | 0:9b3d4731edbb | 365 | handle->Init.Timing = get_i2c_timing(hz); |
| WFKnight | 0:9b3d4731edbb | 366 | |
| WFKnight | 0:9b3d4731edbb | 367 | // Enable the Fast Mode Plus capability |
| WFKnight | 0:9b3d4731edbb | 368 | if (hz == 1000000) { |
| WFKnight | 0:9b3d4731edbb | 369 | #if defined(I2C1_BASE) && defined(__HAL_SYSCFG_FASTMODEPLUS_ENABLE) && defined (I2C_FASTMODEPLUS_I2C1) |
| WFKnight | 0:9b3d4731edbb | 370 | if (obj_s->i2c == I2C_1) { |
| WFKnight | 0:9b3d4731edbb | 371 | HAL_I2CEx_EnableFastModePlus(I2C_FASTMODEPLUS_I2C1); |
| WFKnight | 0:9b3d4731edbb | 372 | } |
| WFKnight | 0:9b3d4731edbb | 373 | #endif |
| WFKnight | 0:9b3d4731edbb | 374 | #if defined(I2C2_BASE) && defined(__HAL_SYSCFG_FASTMODEPLUS_ENABLE) && defined (I2C_FASTMODEPLUS_I2C2) |
| WFKnight | 0:9b3d4731edbb | 375 | if (obj_s->i2c == I2C_2) { |
| WFKnight | 0:9b3d4731edbb | 376 | HAL_I2CEx_EnableFastModePlus(I2C_FASTMODEPLUS_I2C2); |
| WFKnight | 0:9b3d4731edbb | 377 | } |
| WFKnight | 0:9b3d4731edbb | 378 | #endif |
| WFKnight | 0:9b3d4731edbb | 379 | #if defined(I2C3_BASE) && defined(__HAL_SYSCFG_FASTMODEPLUS_ENABLE) && defined (I2C_FASTMODEPLUS_I2C3) |
| WFKnight | 0:9b3d4731edbb | 380 | if (obj_s->i2c == I2C_3) { |
| WFKnight | 0:9b3d4731edbb | 381 | HAL_I2CEx_EnableFastModePlus(I2C_FASTMODEPLUS_I2C3); |
| WFKnight | 0:9b3d4731edbb | 382 | } |
| WFKnight | 0:9b3d4731edbb | 383 | #endif |
| WFKnight | 0:9b3d4731edbb | 384 | #if defined(I2C4_BASE) && defined(__HAL_SYSCFG_FASTMODEPLUS_ENABLE) && defined (I2C_FASTMODEPLUS_I2C4) |
| WFKnight | 0:9b3d4731edbb | 385 | if (obj_s->i2c == I2C_4) { |
| WFKnight | 0:9b3d4731edbb | 386 | HAL_I2CEx_EnableFastModePlus(I2C_FASTMODEPLUS_I2C4); |
| WFKnight | 0:9b3d4731edbb | 387 | } |
| WFKnight | 0:9b3d4731edbb | 388 | #endif |
| WFKnight | 0:9b3d4731edbb | 389 | } |
| WFKnight | 0:9b3d4731edbb | 390 | #endif //I2C_IP_VERSION_V2 |
| WFKnight | 0:9b3d4731edbb | 391 | |
| WFKnight | 0:9b3d4731edbb | 392 | /*##-1- Configure the I2C clock source. The clock is derived from the SYSCLK #*/ |
| WFKnight | 0:9b3d4731edbb | 393 | #if defined(I2C1_BASE) && defined (__HAL_RCC_I2C1_CONFIG) |
| WFKnight | 0:9b3d4731edbb | 394 | if (obj_s->i2c == I2C_1) { |
| WFKnight | 0:9b3d4731edbb | 395 | __HAL_RCC_I2C1_CONFIG(I2CAPI_I2C1_CLKSRC); |
| WFKnight | 0:9b3d4731edbb | 396 | } |
| WFKnight | 0:9b3d4731edbb | 397 | #endif |
| WFKnight | 0:9b3d4731edbb | 398 | #if defined(I2C2_BASE) && defined(__HAL_RCC_I2C2_CONFIG) |
| WFKnight | 0:9b3d4731edbb | 399 | if (obj_s->i2c == I2C_2) { |
| WFKnight | 0:9b3d4731edbb | 400 | __HAL_RCC_I2C2_CONFIG(I2CAPI_I2C2_CLKSRC); |
| WFKnight | 0:9b3d4731edbb | 401 | } |
| WFKnight | 0:9b3d4731edbb | 402 | #endif |
| WFKnight | 0:9b3d4731edbb | 403 | #if defined(I2C3_BASE) && defined(__HAL_RCC_I2C3_CONFIG) |
| WFKnight | 0:9b3d4731edbb | 404 | if (obj_s->i2c == I2C_3) { |
| WFKnight | 0:9b3d4731edbb | 405 | __HAL_RCC_I2C3_CONFIG(I2CAPI_I2C3_CLKSRC); |
| WFKnight | 0:9b3d4731edbb | 406 | } |
| WFKnight | 0:9b3d4731edbb | 407 | #endif |
| WFKnight | 0:9b3d4731edbb | 408 | #if defined(I2C4_BASE) && defined(__HAL_RCC_I2C4_CONFIG) |
| WFKnight | 0:9b3d4731edbb | 409 | if (obj_s->i2c == I2C_4) { |
| WFKnight | 0:9b3d4731edbb | 410 | __HAL_RCC_I2C4_CONFIG(I2CAPI_I2C4_CLKSRC); |
| WFKnight | 0:9b3d4731edbb | 411 | } |
| WFKnight | 0:9b3d4731edbb | 412 | #endif |
| WFKnight | 0:9b3d4731edbb | 413 | |
| WFKnight | 0:9b3d4731edbb | 414 | #ifdef I2C_ANALOGFILTER_ENABLE |
| WFKnight | 0:9b3d4731edbb | 415 | /* Enable the Analog I2C Filter */ |
| WFKnight | 0:9b3d4731edbb | 416 | HAL_I2CEx_ConfigAnalogFilter(handle,I2C_ANALOGFILTER_ENABLE); |
| WFKnight | 0:9b3d4731edbb | 417 | #endif |
| WFKnight | 0:9b3d4731edbb | 418 | |
| WFKnight | 0:9b3d4731edbb | 419 | // I2C configuration |
| WFKnight | 0:9b3d4731edbb | 420 | handle->Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; |
| WFKnight | 0:9b3d4731edbb | 421 | handle->Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; |
| WFKnight | 0:9b3d4731edbb | 422 | handle->Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; |
| WFKnight | 0:9b3d4731edbb | 423 | handle->Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; |
| WFKnight | 0:9b3d4731edbb | 424 | handle->Init.OwnAddress1 = 0; |
| WFKnight | 0:9b3d4731edbb | 425 | handle->Init.OwnAddress2 = 0; |
| WFKnight | 0:9b3d4731edbb | 426 | HAL_I2C_Init(handle); |
| WFKnight | 0:9b3d4731edbb | 427 | |
| WFKnight | 0:9b3d4731edbb | 428 | /* store frequency for timeout computation */ |
| WFKnight | 0:9b3d4731edbb | 429 | obj_s->hz = hz; |
| WFKnight | 0:9b3d4731edbb | 430 | } |
| WFKnight | 0:9b3d4731edbb | 431 | |
| WFKnight | 0:9b3d4731edbb | 432 | i2c_t *get_i2c_obj(I2C_HandleTypeDef *hi2c){ |
| WFKnight | 0:9b3d4731edbb | 433 | /* Aim of the function is to get i2c_s pointer using hi2c pointer */ |
| WFKnight | 0:9b3d4731edbb | 434 | /* Highly inspired from magical linux kernel's "container_of" */ |
| WFKnight | 0:9b3d4731edbb | 435 | /* (which was not directly used since not compatible with IAR toolchain) */ |
| WFKnight | 0:9b3d4731edbb | 436 | struct i2c_s *obj_s; |
| WFKnight | 0:9b3d4731edbb | 437 | i2c_t *obj; |
| WFKnight | 0:9b3d4731edbb | 438 | |
| WFKnight | 0:9b3d4731edbb | 439 | obj_s = (struct i2c_s *)( (char *)hi2c - offsetof(struct i2c_s,handle)); |
| WFKnight | 0:9b3d4731edbb | 440 | obj = (i2c_t *)( (char *)obj_s - offsetof(i2c_t,i2c)); |
| WFKnight | 0:9b3d4731edbb | 441 | |
| WFKnight | 0:9b3d4731edbb | 442 | return (obj); |
| WFKnight | 0:9b3d4731edbb | 443 | } |
| WFKnight | 0:9b3d4731edbb | 444 | |
| WFKnight | 0:9b3d4731edbb | 445 | void i2c_reset(i2c_t *obj) { |
| WFKnight | 0:9b3d4731edbb | 446 | struct i2c_s *obj_s = I2C_S(obj); |
| WFKnight | 0:9b3d4731edbb | 447 | /* As recommended in i2c_api.h, mainly send stop */ |
| WFKnight | 0:9b3d4731edbb | 448 | i2c_stop(obj); |
| WFKnight | 0:9b3d4731edbb | 449 | /* then re-init */ |
| WFKnight | 0:9b3d4731edbb | 450 | i2c_init(obj, obj_s->sda, obj_s->scl); |
| WFKnight | 0:9b3d4731edbb | 451 | } |
| WFKnight | 0:9b3d4731edbb | 452 | |
| WFKnight | 0:9b3d4731edbb | 453 | /* |
| WFKnight | 0:9b3d4731edbb | 454 | * UNITARY APIS. |
| WFKnight | 0:9b3d4731edbb | 455 | * For very basic operations, direct registers access is needed |
| WFKnight | 0:9b3d4731edbb | 456 | * There are 2 different IPs version that need to be supported |
| WFKnight | 0:9b3d4731edbb | 457 | */ |
| WFKnight | 0:9b3d4731edbb | 458 | #ifdef I2C_IP_VERSION_V1 |
| WFKnight | 0:9b3d4731edbb | 459 | int i2c_start(i2c_t *obj) { |
| WFKnight | 0:9b3d4731edbb | 460 | |
| WFKnight | 0:9b3d4731edbb | 461 | int timeout; |
| WFKnight | 0:9b3d4731edbb | 462 | struct i2c_s *obj_s = I2C_S(obj); |
| WFKnight | 0:9b3d4731edbb | 463 | I2C_HandleTypeDef *handle = &(obj_s->handle); |
| WFKnight | 0:9b3d4731edbb | 464 | |
| WFKnight | 0:9b3d4731edbb | 465 | // Clear Acknowledge failure flag |
| WFKnight | 0:9b3d4731edbb | 466 | __HAL_I2C_CLEAR_FLAG(handle, I2C_FLAG_AF); |
| WFKnight | 0:9b3d4731edbb | 467 | |
| WFKnight | 0:9b3d4731edbb | 468 | // Wait the STOP condition has been previously correctly sent |
| WFKnight | 0:9b3d4731edbb | 469 | // This timeout can be avoid in some specific cases by simply clearing the STOP bit |
| WFKnight | 0:9b3d4731edbb | 470 | timeout = FLAG_TIMEOUT; |
| WFKnight | 0:9b3d4731edbb | 471 | while ((handle->Instance->CR1 & I2C_CR1_STOP) == I2C_CR1_STOP) { |
| WFKnight | 0:9b3d4731edbb | 472 | if ((timeout--) == 0) { |
| WFKnight | 0:9b3d4731edbb | 473 | return 1; |
| WFKnight | 0:9b3d4731edbb | 474 | } |
| WFKnight | 0:9b3d4731edbb | 475 | } |
| WFKnight | 0:9b3d4731edbb | 476 | |
| WFKnight | 0:9b3d4731edbb | 477 | // Generate the START condition |
| WFKnight | 0:9b3d4731edbb | 478 | handle->Instance->CR1 |= I2C_CR1_START; |
| WFKnight | 0:9b3d4731edbb | 479 | |
| WFKnight | 0:9b3d4731edbb | 480 | // Wait the START condition has been correctly sent |
| WFKnight | 0:9b3d4731edbb | 481 | timeout = FLAG_TIMEOUT; |
| WFKnight | 0:9b3d4731edbb | 482 | while (__HAL_I2C_GET_FLAG(handle, I2C_FLAG_SB) == RESET) { |
| WFKnight | 0:9b3d4731edbb | 483 | if ((timeout--) == 0) { |
| WFKnight | 0:9b3d4731edbb | 484 | return 1; |
| WFKnight | 0:9b3d4731edbb | 485 | } |
| WFKnight | 0:9b3d4731edbb | 486 | } |
| WFKnight | 0:9b3d4731edbb | 487 | |
| WFKnight | 0:9b3d4731edbb | 488 | return 0; |
| WFKnight | 0:9b3d4731edbb | 489 | } |
| WFKnight | 0:9b3d4731edbb | 490 | |
| WFKnight | 0:9b3d4731edbb | 491 | int i2c_stop(i2c_t *obj) { |
| WFKnight | 0:9b3d4731edbb | 492 | struct i2c_s *obj_s = I2C_S(obj); |
| WFKnight | 0:9b3d4731edbb | 493 | I2C_TypeDef *i2c = (I2C_TypeDef *)obj_s->i2c; |
| WFKnight | 0:9b3d4731edbb | 494 | |
| WFKnight | 0:9b3d4731edbb | 495 | // Generate the STOP condition |
| WFKnight | 0:9b3d4731edbb | 496 | i2c->CR1 |= I2C_CR1_STOP; |
| WFKnight | 0:9b3d4731edbb | 497 | |
| WFKnight | 0:9b3d4731edbb | 498 | /* In case of mixed usage of the APIs (unitary + SYNC) |
| WFKnight | 0:9b3d4731edbb | 499 | * re-init HAL state |
| WFKnight | 0:9b3d4731edbb | 500 | */ |
| WFKnight | 0:9b3d4731edbb | 501 | if(obj_s->XferOperation != I2C_FIRST_AND_LAST_FRAME) |
| WFKnight | 0:9b3d4731edbb | 502 | i2c_init(obj, obj_s->sda, obj_s->scl); |
| WFKnight | 0:9b3d4731edbb | 503 | |
| WFKnight | 0:9b3d4731edbb | 504 | return 0; |
| WFKnight | 0:9b3d4731edbb | 505 | } |
| WFKnight | 0:9b3d4731edbb | 506 | |
| WFKnight | 0:9b3d4731edbb | 507 | int i2c_byte_read(i2c_t *obj, int last) { |
| WFKnight | 0:9b3d4731edbb | 508 | |
| WFKnight | 0:9b3d4731edbb | 509 | int timeout; |
| WFKnight | 0:9b3d4731edbb | 510 | struct i2c_s *obj_s = I2C_S(obj); |
| WFKnight | 0:9b3d4731edbb | 511 | I2C_HandleTypeDef *handle = &(obj_s->handle); |
| WFKnight | 0:9b3d4731edbb | 512 | |
| WFKnight | 0:9b3d4731edbb | 513 | if (last) { |
| WFKnight | 0:9b3d4731edbb | 514 | // Don't acknowledge the last byte |
| WFKnight | 0:9b3d4731edbb | 515 | handle->Instance->CR1 &= ~I2C_CR1_ACK; |
| WFKnight | 0:9b3d4731edbb | 516 | } else { |
| WFKnight | 0:9b3d4731edbb | 517 | // Acknowledge the byte |
| WFKnight | 0:9b3d4731edbb | 518 | handle->Instance->CR1 |= I2C_CR1_ACK; |
| WFKnight | 0:9b3d4731edbb | 519 | } |
| WFKnight | 0:9b3d4731edbb | 520 | |
| WFKnight | 0:9b3d4731edbb | 521 | // Wait until the byte is received |
| WFKnight | 0:9b3d4731edbb | 522 | timeout = FLAG_TIMEOUT; |
| WFKnight | 0:9b3d4731edbb | 523 | while (__HAL_I2C_GET_FLAG(handle, I2C_FLAG_RXNE) == RESET) { |
| WFKnight | 0:9b3d4731edbb | 524 | if ((timeout--) == 0) { |
| WFKnight | 0:9b3d4731edbb | 525 | return -1; |
| WFKnight | 0:9b3d4731edbb | 526 | } |
| WFKnight | 0:9b3d4731edbb | 527 | } |
| WFKnight | 0:9b3d4731edbb | 528 | |
| WFKnight | 0:9b3d4731edbb | 529 | return (int)handle->Instance->DR; |
| WFKnight | 0:9b3d4731edbb | 530 | } |
| WFKnight | 0:9b3d4731edbb | 531 | |
| WFKnight | 0:9b3d4731edbb | 532 | int i2c_byte_write(i2c_t *obj, int data) { |
| WFKnight | 0:9b3d4731edbb | 533 | |
| WFKnight | 0:9b3d4731edbb | 534 | int timeout; |
| WFKnight | 0:9b3d4731edbb | 535 | struct i2c_s *obj_s = I2C_S(obj); |
| WFKnight | 0:9b3d4731edbb | 536 | I2C_HandleTypeDef *handle = &(obj_s->handle); |
| WFKnight | 0:9b3d4731edbb | 537 | |
| WFKnight | 0:9b3d4731edbb | 538 | handle->Instance->DR = (uint8_t)data; |
| WFKnight | 0:9b3d4731edbb | 539 | |
| WFKnight | 0:9b3d4731edbb | 540 | // Wait until the byte (might be the address) is transmitted |
| WFKnight | 0:9b3d4731edbb | 541 | timeout = FLAG_TIMEOUT; |
| WFKnight | 0:9b3d4731edbb | 542 | while ((__HAL_I2C_GET_FLAG(handle, I2C_FLAG_TXE) == RESET) && |
| WFKnight | 0:9b3d4731edbb | 543 | (__HAL_I2C_GET_FLAG(handle, I2C_FLAG_BTF) == RESET) && |
| WFKnight | 0:9b3d4731edbb | 544 | (__HAL_I2C_GET_FLAG(handle, I2C_FLAG_ADDR) == RESET)) { |
| WFKnight | 0:9b3d4731edbb | 545 | if ((timeout--) == 0) { |
| WFKnight | 0:9b3d4731edbb | 546 | return 2; |
| WFKnight | 0:9b3d4731edbb | 547 | } |
| WFKnight | 0:9b3d4731edbb | 548 | } |
| WFKnight | 0:9b3d4731edbb | 549 | |
| WFKnight | 0:9b3d4731edbb | 550 | if (__HAL_I2C_GET_FLAG(handle, I2C_FLAG_ADDR) != RESET) |
| WFKnight | 0:9b3d4731edbb | 551 | { |
| WFKnight | 0:9b3d4731edbb | 552 | __HAL_I2C_CLEAR_ADDRFLAG(handle); |
| WFKnight | 0:9b3d4731edbb | 553 | } |
| WFKnight | 0:9b3d4731edbb | 554 | |
| WFKnight | 0:9b3d4731edbb | 555 | return 1; |
| WFKnight | 0:9b3d4731edbb | 556 | } |
| WFKnight | 0:9b3d4731edbb | 557 | #endif //I2C_IP_VERSION_V1 |
| WFKnight | 0:9b3d4731edbb | 558 | #ifdef I2C_IP_VERSION_V2 |
| WFKnight | 0:9b3d4731edbb | 559 | |
| WFKnight | 0:9b3d4731edbb | 560 | int i2c_start(i2c_t *obj) { |
| WFKnight | 0:9b3d4731edbb | 561 | struct i2c_s *obj_s = I2C_S(obj); |
| WFKnight | 0:9b3d4731edbb | 562 | /* This I2C IP doesn't */ |
| WFKnight | 0:9b3d4731edbb | 563 | obj_s->pending_start = 1; |
| WFKnight | 0:9b3d4731edbb | 564 | return 0; |
| WFKnight | 0:9b3d4731edbb | 565 | } |
| WFKnight | 0:9b3d4731edbb | 566 | |
| WFKnight | 0:9b3d4731edbb | 567 | int i2c_stop(i2c_t *obj) { |
| WFKnight | 0:9b3d4731edbb | 568 | struct i2c_s *obj_s = I2C_S(obj); |
| WFKnight | 0:9b3d4731edbb | 569 | I2C_HandleTypeDef *handle = &(obj_s->handle); |
| WFKnight | 0:9b3d4731edbb | 570 | int timeout = FLAG_TIMEOUT; |
| WFKnight | 0:9b3d4731edbb | 571 | #if DEVICE_I2CSLAVE |
| WFKnight | 0:9b3d4731edbb | 572 | if (obj_s->slave) { |
| WFKnight | 0:9b3d4731edbb | 573 | /* re-init slave when stop is requested */ |
| WFKnight | 0:9b3d4731edbb | 574 | i2c_init(obj, obj_s->sda, obj_s->scl); |
| WFKnight | 0:9b3d4731edbb | 575 | return 0; |
| WFKnight | 0:9b3d4731edbb | 576 | } |
| WFKnight | 0:9b3d4731edbb | 577 | #endif |
| WFKnight | 0:9b3d4731edbb | 578 | // Disable reload mode |
| WFKnight | 0:9b3d4731edbb | 579 | handle->Instance->CR2 &= (uint32_t)~I2C_CR2_RELOAD; |
| WFKnight | 0:9b3d4731edbb | 580 | // Generate the STOP condition |
| WFKnight | 0:9b3d4731edbb | 581 | handle->Instance->CR2 |= I2C_CR2_STOP; |
| WFKnight | 0:9b3d4731edbb | 582 | |
| WFKnight | 0:9b3d4731edbb | 583 | timeout = FLAG_TIMEOUT; |
| WFKnight | 0:9b3d4731edbb | 584 | while (!__HAL_I2C_GET_FLAG(handle, I2C_FLAG_STOPF)) { |
| WFKnight | 0:9b3d4731edbb | 585 | if ((timeout--) == 0) { |
| WFKnight | 0:9b3d4731edbb | 586 | return I2C_ERROR_BUS_BUSY; |
| WFKnight | 0:9b3d4731edbb | 587 | } |
| WFKnight | 0:9b3d4731edbb | 588 | } |
| WFKnight | 0:9b3d4731edbb | 589 | |
| WFKnight | 0:9b3d4731edbb | 590 | /* Clear STOP Flag */ |
| WFKnight | 0:9b3d4731edbb | 591 | __HAL_I2C_CLEAR_FLAG(handle, I2C_FLAG_STOPF); |
| WFKnight | 0:9b3d4731edbb | 592 | |
| WFKnight | 0:9b3d4731edbb | 593 | /* Erase slave address, this wiil be used as a marker |
| WFKnight | 0:9b3d4731edbb | 594 | * to know when we need to prepare next start */ |
| WFKnight | 0:9b3d4731edbb | 595 | handle->Instance->CR2 &= ~I2C_CR2_SADD; |
| WFKnight | 0:9b3d4731edbb | 596 | |
| WFKnight | 0:9b3d4731edbb | 597 | /* |
| WFKnight | 0:9b3d4731edbb | 598 | * V2 IP is meant for automatic STOP, not user STOP |
| WFKnight | 0:9b3d4731edbb | 599 | * SW reset the IP state machine before next transaction |
| WFKnight | 0:9b3d4731edbb | 600 | */ |
| WFKnight | 0:9b3d4731edbb | 601 | i2c_sw_reset(obj); |
| WFKnight | 0:9b3d4731edbb | 602 | |
| WFKnight | 0:9b3d4731edbb | 603 | /* In case of mixed usage of the APIs (unitary + SYNC) |
| WFKnight | 0:9b3d4731edbb | 604 | * re-init HAL state */ |
| WFKnight | 0:9b3d4731edbb | 605 | if (obj_s->XferOperation != I2C_FIRST_AND_LAST_FRAME) { |
| WFKnight | 0:9b3d4731edbb | 606 | i2c_init(obj, obj_s->sda, obj_s->scl); |
| WFKnight | 0:9b3d4731edbb | 607 | } |
| WFKnight | 0:9b3d4731edbb | 608 | |
| WFKnight | 0:9b3d4731edbb | 609 | return 0; |
| WFKnight | 0:9b3d4731edbb | 610 | } |
| WFKnight | 0:9b3d4731edbb | 611 | |
| WFKnight | 0:9b3d4731edbb | 612 | int i2c_byte_read(i2c_t *obj, int last) { |
| WFKnight | 0:9b3d4731edbb | 613 | struct i2c_s *obj_s = I2C_S(obj); |
| WFKnight | 0:9b3d4731edbb | 614 | I2C_HandleTypeDef *handle = &(obj_s->handle); |
| WFKnight | 0:9b3d4731edbb | 615 | int timeout = FLAG_TIMEOUT; |
| WFKnight | 0:9b3d4731edbb | 616 | uint32_t tmpreg = handle->Instance->CR2; |
| WFKnight | 0:9b3d4731edbb | 617 | char data; |
| WFKnight | 0:9b3d4731edbb | 618 | #if DEVICE_I2CSLAVE |
| WFKnight | 0:9b3d4731edbb | 619 | if (obj_s->slave) { |
| WFKnight | 0:9b3d4731edbb | 620 | return i2c_slave_read(obj, &data, 1); |
| WFKnight | 0:9b3d4731edbb | 621 | } |
| WFKnight | 0:9b3d4731edbb | 622 | #endif |
| WFKnight | 0:9b3d4731edbb | 623 | /* Then send data when there's room in the TX fifo */ |
| WFKnight | 0:9b3d4731edbb | 624 | if ((tmpreg & I2C_CR2_RELOAD) != 0) { |
| WFKnight | 0:9b3d4731edbb | 625 | while (!__HAL_I2C_GET_FLAG(handle, I2C_FLAG_TCR)) { |
| WFKnight | 0:9b3d4731edbb | 626 | if ((timeout--) == 0) { |
| WFKnight | 0:9b3d4731edbb | 627 | DEBUG_PRINTF("timeout in byte_read\r\n"); |
| WFKnight | 0:9b3d4731edbb | 628 | return -1; |
| WFKnight | 0:9b3d4731edbb | 629 | } |
| WFKnight | 0:9b3d4731edbb | 630 | } |
| WFKnight | 0:9b3d4731edbb | 631 | } |
| WFKnight | 0:9b3d4731edbb | 632 | |
| WFKnight | 0:9b3d4731edbb | 633 | /* Enable reload mode as we don't know how many bytes will be sent */ |
| WFKnight | 0:9b3d4731edbb | 634 | /* and set transfer size to 1 */ |
| WFKnight | 0:9b3d4731edbb | 635 | tmpreg |= I2C_CR2_RELOAD | (I2C_CR2_NBYTES & (1 << 16)); |
| WFKnight | 0:9b3d4731edbb | 636 | /* Set the prepared configuration */ |
| WFKnight | 0:9b3d4731edbb | 637 | handle->Instance->CR2 = tmpreg; |
| WFKnight | 0:9b3d4731edbb | 638 | |
| WFKnight | 0:9b3d4731edbb | 639 | timeout = FLAG_TIMEOUT; |
| WFKnight | 0:9b3d4731edbb | 640 | while (!__HAL_I2C_GET_FLAG(handle, I2C_FLAG_RXNE)) { |
| WFKnight | 0:9b3d4731edbb | 641 | if ((timeout--) == 0) { |
| WFKnight | 0:9b3d4731edbb | 642 | return -1; |
| WFKnight | 0:9b3d4731edbb | 643 | } |
| WFKnight | 0:9b3d4731edbb | 644 | } |
| WFKnight | 0:9b3d4731edbb | 645 | |
| WFKnight | 0:9b3d4731edbb | 646 | /* Then Get Byte */ |
| WFKnight | 0:9b3d4731edbb | 647 | data = handle->Instance->RXDR; |
| WFKnight | 0:9b3d4731edbb | 648 | |
| WFKnight | 0:9b3d4731edbb | 649 | if (last) { |
| WFKnight | 0:9b3d4731edbb | 650 | /* Disable Address Acknowledge */ |
| WFKnight | 0:9b3d4731edbb | 651 | handle->Instance->CR2 |= I2C_CR2_NACK; |
| WFKnight | 0:9b3d4731edbb | 652 | } |
| WFKnight | 0:9b3d4731edbb | 653 | |
| WFKnight | 0:9b3d4731edbb | 654 | return data; |
| WFKnight | 0:9b3d4731edbb | 655 | } |
| WFKnight | 0:9b3d4731edbb | 656 | |
| WFKnight | 0:9b3d4731edbb | 657 | int i2c_byte_write(i2c_t *obj, int data) { |
| WFKnight | 0:9b3d4731edbb | 658 | struct i2c_s *obj_s = I2C_S(obj); |
| WFKnight | 0:9b3d4731edbb | 659 | I2C_HandleTypeDef *handle = &(obj_s->handle); |
| WFKnight | 0:9b3d4731edbb | 660 | int timeout = FLAG_TIMEOUT; |
| WFKnight | 0:9b3d4731edbb | 661 | uint32_t tmpreg = handle->Instance->CR2; |
| WFKnight | 0:9b3d4731edbb | 662 | #if DEVICE_I2CSLAVE |
| WFKnight | 0:9b3d4731edbb | 663 | if (obj_s->slave) { |
| WFKnight | 0:9b3d4731edbb | 664 | return i2c_slave_write(obj, (char *) &data, 1); |
| WFKnight | 0:9b3d4731edbb | 665 | } |
| WFKnight | 0:9b3d4731edbb | 666 | #endif |
| WFKnight | 0:9b3d4731edbb | 667 | if (obj_s->pending_start) { |
| WFKnight | 0:9b3d4731edbb | 668 | obj_s->pending_start = 0; |
| WFKnight | 0:9b3d4731edbb | 669 | //* First byte after the start is the address */ |
| WFKnight | 0:9b3d4731edbb | 670 | tmpreg |= (uint32_t)((uint32_t)data & I2C_CR2_SADD); |
| WFKnight | 0:9b3d4731edbb | 671 | if (data & 0x01) { |
| WFKnight | 0:9b3d4731edbb | 672 | tmpreg |= I2C_CR2_START | I2C_CR2_RD_WRN; |
| WFKnight | 0:9b3d4731edbb | 673 | } else { |
| WFKnight | 0:9b3d4731edbb | 674 | tmpreg |= I2C_CR2_START; |
| WFKnight | 0:9b3d4731edbb | 675 | tmpreg &= ~I2C_CR2_RD_WRN; |
| WFKnight | 0:9b3d4731edbb | 676 | } |
| WFKnight | 0:9b3d4731edbb | 677 | /* Disable reload first to use it later */ |
| WFKnight | 0:9b3d4731edbb | 678 | tmpreg &= ~I2C_CR2_RELOAD; |
| WFKnight | 0:9b3d4731edbb | 679 | /* Disable Autoend */ |
| WFKnight | 0:9b3d4731edbb | 680 | tmpreg &= ~I2C_CR2_AUTOEND; |
| WFKnight | 0:9b3d4731edbb | 681 | /* Do not set any transfer size for now */ |
| WFKnight | 0:9b3d4731edbb | 682 | tmpreg |= (I2C_CR2_NBYTES & (1 << 16)); |
| WFKnight | 0:9b3d4731edbb | 683 | /* Set the prepared configuration */ |
| WFKnight | 0:9b3d4731edbb | 684 | handle->Instance->CR2 = tmpreg; |
| WFKnight | 0:9b3d4731edbb | 685 | } else { |
| WFKnight | 0:9b3d4731edbb | 686 | /* Set the prepared configuration */ |
| WFKnight | 0:9b3d4731edbb | 687 | tmpreg = handle->Instance->CR2; |
| WFKnight | 0:9b3d4731edbb | 688 | |
| WFKnight | 0:9b3d4731edbb | 689 | /* Then send data when there's room in the TX fifo */ |
| WFKnight | 0:9b3d4731edbb | 690 | if ((tmpreg & I2C_CR2_RELOAD) != 0) { |
| WFKnight | 0:9b3d4731edbb | 691 | while (!__HAL_I2C_GET_FLAG(handle, I2C_FLAG_TCR)) { |
| WFKnight | 0:9b3d4731edbb | 692 | if ((timeout--) == 0) { |
| WFKnight | 0:9b3d4731edbb | 693 | DEBUG_PRINTF("timeout in byte_write\r\n"); |
| WFKnight | 0:9b3d4731edbb | 694 | return 2; |
| WFKnight | 0:9b3d4731edbb | 695 | } |
| WFKnight | 0:9b3d4731edbb | 696 | } |
| WFKnight | 0:9b3d4731edbb | 697 | } |
| WFKnight | 0:9b3d4731edbb | 698 | /* Enable reload mode as we don't know how many bytes will eb sent */ |
| WFKnight | 0:9b3d4731edbb | 699 | tmpreg |= I2C_CR2_RELOAD; |
| WFKnight | 0:9b3d4731edbb | 700 | /* Set transfer size to 1 */ |
| WFKnight | 0:9b3d4731edbb | 701 | tmpreg |= (I2C_CR2_NBYTES & (1 << 16)); |
| WFKnight | 0:9b3d4731edbb | 702 | /* Set the prepared configuration */ |
| WFKnight | 0:9b3d4731edbb | 703 | handle->Instance->CR2 = tmpreg; |
| WFKnight | 0:9b3d4731edbb | 704 | /* Prepare next write */ |
| WFKnight | 0:9b3d4731edbb | 705 | timeout = FLAG_TIMEOUT; |
| WFKnight | 0:9b3d4731edbb | 706 | while (!__HAL_I2C_GET_FLAG(handle, I2C_FLAG_TXE)) { |
| WFKnight | 0:9b3d4731edbb | 707 | if ((timeout--) == 0) { |
| WFKnight | 0:9b3d4731edbb | 708 | return 2; |
| WFKnight | 0:9b3d4731edbb | 709 | } |
| WFKnight | 0:9b3d4731edbb | 710 | } |
| WFKnight | 0:9b3d4731edbb | 711 | /* Write byte */ |
| WFKnight | 0:9b3d4731edbb | 712 | handle->Instance->TXDR = data; |
| WFKnight | 0:9b3d4731edbb | 713 | } |
| WFKnight | 0:9b3d4731edbb | 714 | |
| WFKnight | 0:9b3d4731edbb | 715 | return 1; |
| WFKnight | 0:9b3d4731edbb | 716 | } |
| WFKnight | 0:9b3d4731edbb | 717 | #endif //I2C_IP_VERSION_V2 |
| WFKnight | 0:9b3d4731edbb | 718 | |
| WFKnight | 0:9b3d4731edbb | 719 | /* |
| WFKnight | 0:9b3d4731edbb | 720 | * SYNC APIS |
| WFKnight | 0:9b3d4731edbb | 721 | */ |
| WFKnight | 0:9b3d4731edbb | 722 | int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) { |
| WFKnight | 0:9b3d4731edbb | 723 | struct i2c_s *obj_s = I2C_S(obj); |
| WFKnight | 0:9b3d4731edbb | 724 | I2C_HandleTypeDef *handle = &(obj_s->handle); |
| WFKnight | 0:9b3d4731edbb | 725 | int count = I2C_ERROR_BUS_BUSY, ret = 0; |
| WFKnight | 0:9b3d4731edbb | 726 | uint32_t timeout = 0; |
| WFKnight | 0:9b3d4731edbb | 727 | |
| WFKnight | 0:9b3d4731edbb | 728 | // Trick to remove compiler warning "left and right operands are identical" in some cases |
| WFKnight | 0:9b3d4731edbb | 729 | uint32_t op1 = I2C_FIRST_AND_LAST_FRAME; |
| WFKnight | 0:9b3d4731edbb | 730 | uint32_t op2 = I2C_LAST_FRAME; |
| WFKnight | 0:9b3d4731edbb | 731 | if ((obj_s->XferOperation == op1) || (obj_s->XferOperation == op2)) { |
| WFKnight | 0:9b3d4731edbb | 732 | if (stop) |
| WFKnight | 0:9b3d4731edbb | 733 | obj_s->XferOperation = I2C_FIRST_AND_LAST_FRAME; |
| WFKnight | 0:9b3d4731edbb | 734 | else |
| WFKnight | 0:9b3d4731edbb | 735 | obj_s->XferOperation = I2C_FIRST_FRAME; |
| WFKnight | 0:9b3d4731edbb | 736 | } else if ((obj_s->XferOperation == I2C_FIRST_FRAME) || |
| WFKnight | 0:9b3d4731edbb | 737 | (obj_s->XferOperation == I2C_NEXT_FRAME)) { |
| WFKnight | 0:9b3d4731edbb | 738 | if (stop) |
| WFKnight | 0:9b3d4731edbb | 739 | obj_s->XferOperation = I2C_LAST_FRAME; |
| WFKnight | 0:9b3d4731edbb | 740 | else |
| WFKnight | 0:9b3d4731edbb | 741 | obj_s->XferOperation = I2C_NEXT_FRAME; |
| WFKnight | 0:9b3d4731edbb | 742 | } |
| WFKnight | 0:9b3d4731edbb | 743 | |
| WFKnight | 0:9b3d4731edbb | 744 | obj_s->event = 0; |
| WFKnight | 0:9b3d4731edbb | 745 | |
| WFKnight | 0:9b3d4731edbb | 746 | /* Activate default IRQ handlers for sync mode |
| WFKnight | 0:9b3d4731edbb | 747 | * which would be overwritten in async mode |
| WFKnight | 0:9b3d4731edbb | 748 | */ |
| WFKnight | 0:9b3d4731edbb | 749 | i2c_ev_err_enable(obj, i2c_get_irq_handler(obj)); |
| WFKnight | 0:9b3d4731edbb | 750 | |
| WFKnight | 0:9b3d4731edbb | 751 | ret = HAL_I2C_Master_Sequential_Receive_IT(handle, address, (uint8_t *) data, length, obj_s->XferOperation); |
| WFKnight | 0:9b3d4731edbb | 752 | |
| WFKnight | 0:9b3d4731edbb | 753 | if(ret == HAL_OK) { |
| WFKnight | 0:9b3d4731edbb | 754 | timeout = BYTE_TIMEOUT_US * (length + 1); |
| WFKnight | 0:9b3d4731edbb | 755 | /* transfer started : wait completion or timeout */ |
| WFKnight | 0:9b3d4731edbb | 756 | while(!(obj_s->event & I2C_EVENT_ALL) && (--timeout != 0)) { |
| WFKnight | 0:9b3d4731edbb | 757 | wait_us(1); |
| WFKnight | 0:9b3d4731edbb | 758 | } |
| WFKnight | 0:9b3d4731edbb | 759 | |
| WFKnight | 0:9b3d4731edbb | 760 | i2c_ev_err_disable(obj); |
| WFKnight | 0:9b3d4731edbb | 761 | |
| WFKnight | 0:9b3d4731edbb | 762 | if((timeout == 0) || (obj_s->event != I2C_EVENT_TRANSFER_COMPLETE)) { |
| WFKnight | 0:9b3d4731edbb | 763 | DEBUG_PRINTF(" TIMEOUT or error in i2c_read\r\n"); |
| WFKnight | 0:9b3d4731edbb | 764 | /* re-init IP to try and get back in a working state */ |
| WFKnight | 0:9b3d4731edbb | 765 | i2c_init(obj, obj_s->sda, obj_s->scl); |
| WFKnight | 0:9b3d4731edbb | 766 | } else { |
| WFKnight | 0:9b3d4731edbb | 767 | count = length; |
| WFKnight | 0:9b3d4731edbb | 768 | } |
| WFKnight | 0:9b3d4731edbb | 769 | } else { |
| WFKnight | 0:9b3d4731edbb | 770 | DEBUG_PRINTF("ERROR in i2c_read:%d\r\n", ret); |
| WFKnight | 0:9b3d4731edbb | 771 | } |
| WFKnight | 0:9b3d4731edbb | 772 | |
| WFKnight | 0:9b3d4731edbb | 773 | return count; |
| WFKnight | 0:9b3d4731edbb | 774 | } |
| WFKnight | 0:9b3d4731edbb | 775 | |
| WFKnight | 0:9b3d4731edbb | 776 | int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) { |
| WFKnight | 0:9b3d4731edbb | 777 | struct i2c_s *obj_s = I2C_S(obj); |
| WFKnight | 0:9b3d4731edbb | 778 | I2C_HandleTypeDef *handle = &(obj_s->handle); |
| WFKnight | 0:9b3d4731edbb | 779 | int count = I2C_ERROR_BUS_BUSY, ret = 0; |
| WFKnight | 0:9b3d4731edbb | 780 | uint32_t timeout = 0; |
| WFKnight | 0:9b3d4731edbb | 781 | |
| WFKnight | 0:9b3d4731edbb | 782 | // Trick to remove compiler warning "left and right operands are identical" in some cases |
| WFKnight | 0:9b3d4731edbb | 783 | uint32_t op1 = I2C_FIRST_AND_LAST_FRAME; |
| WFKnight | 0:9b3d4731edbb | 784 | uint32_t op2 = I2C_LAST_FRAME; |
| WFKnight | 0:9b3d4731edbb | 785 | if ((obj_s->XferOperation == op1) || (obj_s->XferOperation == op2)) { |
| WFKnight | 0:9b3d4731edbb | 786 | if (stop) |
| WFKnight | 0:9b3d4731edbb | 787 | obj_s->XferOperation = I2C_FIRST_AND_LAST_FRAME; |
| WFKnight | 0:9b3d4731edbb | 788 | else |
| WFKnight | 0:9b3d4731edbb | 789 | obj_s->XferOperation = I2C_FIRST_FRAME; |
| WFKnight | 0:9b3d4731edbb | 790 | } else if ((obj_s->XferOperation == I2C_FIRST_FRAME) || |
| WFKnight | 0:9b3d4731edbb | 791 | (obj_s->XferOperation == I2C_NEXT_FRAME)) { |
| WFKnight | 0:9b3d4731edbb | 792 | if (stop) |
| WFKnight | 0:9b3d4731edbb | 793 | obj_s->XferOperation = I2C_LAST_FRAME; |
| WFKnight | 0:9b3d4731edbb | 794 | else |
| WFKnight | 0:9b3d4731edbb | 795 | obj_s->XferOperation = I2C_NEXT_FRAME; |
| WFKnight | 0:9b3d4731edbb | 796 | } |
| WFKnight | 0:9b3d4731edbb | 797 | |
| WFKnight | 0:9b3d4731edbb | 798 | obj_s->event = 0; |
| WFKnight | 0:9b3d4731edbb | 799 | |
| WFKnight | 0:9b3d4731edbb | 800 | i2c_ev_err_enable(obj, i2c_get_irq_handler(obj)); |
| WFKnight | 0:9b3d4731edbb | 801 | |
| WFKnight | 0:9b3d4731edbb | 802 | ret = HAL_I2C_Master_Sequential_Transmit_IT(handle, address, (uint8_t *) data, length, obj_s->XferOperation); |
| WFKnight | 0:9b3d4731edbb | 803 | |
| WFKnight | 0:9b3d4731edbb | 804 | if(ret == HAL_OK) { |
| WFKnight | 0:9b3d4731edbb | 805 | timeout = BYTE_TIMEOUT_US * (length + 1); |
| WFKnight | 0:9b3d4731edbb | 806 | /* transfer started : wait completion or timeout */ |
| WFKnight | 0:9b3d4731edbb | 807 | while(!(obj_s->event & I2C_EVENT_ALL) && (--timeout != 0)) { |
| WFKnight | 0:9b3d4731edbb | 808 | wait_us(1); |
| WFKnight | 0:9b3d4731edbb | 809 | } |
| WFKnight | 0:9b3d4731edbb | 810 | |
| WFKnight | 0:9b3d4731edbb | 811 | i2c_ev_err_disable(obj); |
| WFKnight | 0:9b3d4731edbb | 812 | |
| WFKnight | 0:9b3d4731edbb | 813 | if((timeout == 0) || (obj_s->event != I2C_EVENT_TRANSFER_COMPLETE)) { |
| WFKnight | 0:9b3d4731edbb | 814 | DEBUG_PRINTF(" TIMEOUT or error in i2c_write\r\n"); |
| WFKnight | 0:9b3d4731edbb | 815 | /* re-init IP to try and get back in a working state */ |
| WFKnight | 0:9b3d4731edbb | 816 | i2c_init(obj, obj_s->sda, obj_s->scl); |
| WFKnight | 0:9b3d4731edbb | 817 | } else { |
| WFKnight | 0:9b3d4731edbb | 818 | count = length; |
| WFKnight | 0:9b3d4731edbb | 819 | } |
| WFKnight | 0:9b3d4731edbb | 820 | } else { |
| WFKnight | 0:9b3d4731edbb | 821 | DEBUG_PRINTF("ERROR in i2c_read\r\n"); |
| WFKnight | 0:9b3d4731edbb | 822 | } |
| WFKnight | 0:9b3d4731edbb | 823 | |
| WFKnight | 0:9b3d4731edbb | 824 | return count; |
| WFKnight | 0:9b3d4731edbb | 825 | } |
| WFKnight | 0:9b3d4731edbb | 826 | |
| WFKnight | 0:9b3d4731edbb | 827 | void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c){ |
| WFKnight | 0:9b3d4731edbb | 828 | /* Get object ptr based on handler ptr */ |
| WFKnight | 0:9b3d4731edbb | 829 | i2c_t *obj = get_i2c_obj(hi2c); |
| WFKnight | 0:9b3d4731edbb | 830 | struct i2c_s *obj_s = I2C_S(obj); |
| WFKnight | 0:9b3d4731edbb | 831 | |
| WFKnight | 0:9b3d4731edbb | 832 | #if DEVICE_I2C_ASYNCH |
| WFKnight | 0:9b3d4731edbb | 833 | /* Handle potential Tx/Rx use case */ |
| WFKnight | 0:9b3d4731edbb | 834 | if ((obj->tx_buff.length) && (obj->rx_buff.length)) { |
| WFKnight | 0:9b3d4731edbb | 835 | if (obj_s->stop) { |
| WFKnight | 0:9b3d4731edbb | 836 | obj_s->XferOperation = I2C_LAST_FRAME; |
| WFKnight | 0:9b3d4731edbb | 837 | } else { |
| WFKnight | 0:9b3d4731edbb | 838 | obj_s->XferOperation = I2C_NEXT_FRAME; |
| WFKnight | 0:9b3d4731edbb | 839 | } |
| WFKnight | 0:9b3d4731edbb | 840 | |
| WFKnight | 0:9b3d4731edbb | 841 | HAL_I2C_Master_Sequential_Receive_IT(hi2c, obj_s->address, (uint8_t*)obj->rx_buff.buffer , obj->rx_buff.length, obj_s->XferOperation); |
| WFKnight | 0:9b3d4731edbb | 842 | } |
| WFKnight | 0:9b3d4731edbb | 843 | else |
| WFKnight | 0:9b3d4731edbb | 844 | #endif |
| WFKnight | 0:9b3d4731edbb | 845 | { |
| WFKnight | 0:9b3d4731edbb | 846 | /* Set event flag */ |
| WFKnight | 0:9b3d4731edbb | 847 | obj_s->event = I2C_EVENT_TRANSFER_COMPLETE; |
| WFKnight | 0:9b3d4731edbb | 848 | } |
| WFKnight | 0:9b3d4731edbb | 849 | } |
| WFKnight | 0:9b3d4731edbb | 850 | |
| WFKnight | 0:9b3d4731edbb | 851 | void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c){ |
| WFKnight | 0:9b3d4731edbb | 852 | /* Get object ptr based on handler ptr */ |
| WFKnight | 0:9b3d4731edbb | 853 | i2c_t *obj = get_i2c_obj(hi2c); |
| WFKnight | 0:9b3d4731edbb | 854 | struct i2c_s *obj_s = I2C_S(obj); |
| WFKnight | 0:9b3d4731edbb | 855 | |
| WFKnight | 0:9b3d4731edbb | 856 | /* Set event flag */ |
| WFKnight | 0:9b3d4731edbb | 857 | obj_s->event = I2C_EVENT_TRANSFER_COMPLETE; |
| WFKnight | 0:9b3d4731edbb | 858 | } |
| WFKnight | 0:9b3d4731edbb | 859 | |
| WFKnight | 0:9b3d4731edbb | 860 | void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c){ |
| WFKnight | 0:9b3d4731edbb | 861 | /* Get object ptr based on handler ptr */ |
| WFKnight | 0:9b3d4731edbb | 862 | i2c_t *obj = get_i2c_obj(hi2c); |
| WFKnight | 0:9b3d4731edbb | 863 | struct i2c_s *obj_s = I2C_S(obj); |
| WFKnight | 0:9b3d4731edbb | 864 | #if DEVICE_I2CSLAVE |
| WFKnight | 0:9b3d4731edbb | 865 | I2C_HandleTypeDef *handle = &(obj_s->handle); |
| WFKnight | 0:9b3d4731edbb | 866 | uint32_t address = 0; |
| WFKnight | 0:9b3d4731edbb | 867 | /* Store address to handle it after reset */ |
| WFKnight | 0:9b3d4731edbb | 868 | if(obj_s->slave) |
| WFKnight | 0:9b3d4731edbb | 869 | address = handle->Init.OwnAddress1; |
| WFKnight | 0:9b3d4731edbb | 870 | #endif |
| WFKnight | 0:9b3d4731edbb | 871 | |
| WFKnight | 0:9b3d4731edbb | 872 | DEBUG_PRINTF("HAL_I2C_ErrorCallback:%d, index=%d\r\n", (int) hi2c->ErrorCode, obj_s->index); |
| WFKnight | 0:9b3d4731edbb | 873 | |
| WFKnight | 0:9b3d4731edbb | 874 | /* re-init IP to try and get back in a working state */ |
| WFKnight | 0:9b3d4731edbb | 875 | i2c_init(obj, obj_s->sda, obj_s->scl); |
| WFKnight | 0:9b3d4731edbb | 876 | |
| WFKnight | 0:9b3d4731edbb | 877 | #if DEVICE_I2CSLAVE |
| WFKnight | 0:9b3d4731edbb | 878 | /* restore slave address */ |
| WFKnight | 0:9b3d4731edbb | 879 | if (address != 0) { |
| WFKnight | 0:9b3d4731edbb | 880 | obj_s->slave = 1; |
| WFKnight | 0:9b3d4731edbb | 881 | i2c_slave_address(obj, 0, address, 0); |
| WFKnight | 0:9b3d4731edbb | 882 | } |
| WFKnight | 0:9b3d4731edbb | 883 | #endif |
| WFKnight | 0:9b3d4731edbb | 884 | |
| WFKnight | 0:9b3d4731edbb | 885 | /* Keep Set event flag */ |
| WFKnight | 0:9b3d4731edbb | 886 | obj_s->event = I2C_EVENT_ERROR; |
| WFKnight | 0:9b3d4731edbb | 887 | } |
| WFKnight | 0:9b3d4731edbb | 888 | |
| WFKnight | 0:9b3d4731edbb | 889 | #if DEVICE_I2CSLAVE |
| WFKnight | 0:9b3d4731edbb | 890 | /* SLAVE API FUNCTIONS */ |
| WFKnight | 0:9b3d4731edbb | 891 | void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask) { |
| WFKnight | 0:9b3d4731edbb | 892 | struct i2c_s *obj_s = I2C_S(obj); |
| WFKnight | 0:9b3d4731edbb | 893 | I2C_HandleTypeDef *handle = &(obj_s->handle); |
| WFKnight | 0:9b3d4731edbb | 894 | |
| WFKnight | 0:9b3d4731edbb | 895 | // I2C configuration |
| WFKnight | 0:9b3d4731edbb | 896 | handle->Init.OwnAddress1 = address; |
| WFKnight | 0:9b3d4731edbb | 897 | HAL_I2C_Init(handle); |
| WFKnight | 0:9b3d4731edbb | 898 | |
| WFKnight | 0:9b3d4731edbb | 899 | i2c_ev_err_enable(obj, i2c_get_irq_handler(obj)); |
| WFKnight | 0:9b3d4731edbb | 900 | |
| WFKnight | 0:9b3d4731edbb | 901 | HAL_I2C_EnableListen_IT(handle); |
| WFKnight | 0:9b3d4731edbb | 902 | } |
| WFKnight | 0:9b3d4731edbb | 903 | |
| WFKnight | 0:9b3d4731edbb | 904 | void i2c_slave_mode(i2c_t *obj, int enable_slave) { |
| WFKnight | 0:9b3d4731edbb | 905 | |
| WFKnight | 0:9b3d4731edbb | 906 | struct i2c_s *obj_s = I2C_S(obj); |
| WFKnight | 0:9b3d4731edbb | 907 | I2C_HandleTypeDef *handle = &(obj_s->handle); |
| WFKnight | 0:9b3d4731edbb | 908 | |
| WFKnight | 0:9b3d4731edbb | 909 | if (enable_slave) { |
| WFKnight | 0:9b3d4731edbb | 910 | obj_s->slave = 1; |
| WFKnight | 0:9b3d4731edbb | 911 | HAL_I2C_EnableListen_IT(handle); |
| WFKnight | 0:9b3d4731edbb | 912 | } else { |
| WFKnight | 0:9b3d4731edbb | 913 | obj_s->slave = 0; |
| WFKnight | 0:9b3d4731edbb | 914 | HAL_I2C_DisableListen_IT(handle); |
| WFKnight | 0:9b3d4731edbb | 915 | } |
| WFKnight | 0:9b3d4731edbb | 916 | } |
| WFKnight | 0:9b3d4731edbb | 917 | |
| WFKnight | 0:9b3d4731edbb | 918 | // See I2CSlave.h |
| WFKnight | 0:9b3d4731edbb | 919 | #define NoData 0 // the slave has not been addressed |
| WFKnight | 0:9b3d4731edbb | 920 | #define ReadAddressed 1 // the master has requested a read from this slave (slave = transmitter) |
| WFKnight | 0:9b3d4731edbb | 921 | #define WriteGeneral 2 // the master is writing to all slave |
| WFKnight | 0:9b3d4731edbb | 922 | #define WriteAddressed 3 // the master is writing to this slave (slave = receiver) |
| WFKnight | 0:9b3d4731edbb | 923 | |
| WFKnight | 0:9b3d4731edbb | 924 | |
| WFKnight | 0:9b3d4731edbb | 925 | void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode) { |
| WFKnight | 0:9b3d4731edbb | 926 | /* Get object ptr based on handler ptr */ |
| WFKnight | 0:9b3d4731edbb | 927 | i2c_t *obj = get_i2c_obj(hi2c); |
| WFKnight | 0:9b3d4731edbb | 928 | struct i2c_s *obj_s = I2C_S(obj); |
| WFKnight | 0:9b3d4731edbb | 929 | |
| WFKnight | 0:9b3d4731edbb | 930 | /* Transfer direction in HAL is from Master point of view */ |
| WFKnight | 0:9b3d4731edbb | 931 | if(TransferDirection == I2C_DIRECTION_RECEIVE) { |
| WFKnight | 0:9b3d4731edbb | 932 | obj_s->pending_slave_tx_master_rx = 1; |
| WFKnight | 0:9b3d4731edbb | 933 | } |
| WFKnight | 0:9b3d4731edbb | 934 | |
| WFKnight | 0:9b3d4731edbb | 935 | if(TransferDirection == I2C_DIRECTION_TRANSMIT) { |
| WFKnight | 0:9b3d4731edbb | 936 | obj_s->pending_slave_rx_maxter_tx = 1; |
| WFKnight | 0:9b3d4731edbb | 937 | } |
| WFKnight | 0:9b3d4731edbb | 938 | } |
| WFKnight | 0:9b3d4731edbb | 939 | |
| WFKnight | 0:9b3d4731edbb | 940 | void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *I2cHandle){ |
| WFKnight | 0:9b3d4731edbb | 941 | /* Get object ptr based on handler ptr */ |
| WFKnight | 0:9b3d4731edbb | 942 | i2c_t *obj = get_i2c_obj(I2cHandle); |
| WFKnight | 0:9b3d4731edbb | 943 | struct i2c_s *obj_s = I2C_S(obj); |
| WFKnight | 0:9b3d4731edbb | 944 | obj_s->pending_slave_tx_master_rx = 0; |
| WFKnight | 0:9b3d4731edbb | 945 | } |
| WFKnight | 0:9b3d4731edbb | 946 | |
| WFKnight | 0:9b3d4731edbb | 947 | void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *I2cHandle){ |
| WFKnight | 0:9b3d4731edbb | 948 | /* Get object ptr based on handler ptr */ |
| WFKnight | 0:9b3d4731edbb | 949 | i2c_t *obj = get_i2c_obj(I2cHandle); |
| WFKnight | 0:9b3d4731edbb | 950 | struct i2c_s *obj_s = I2C_S(obj); |
| WFKnight | 0:9b3d4731edbb | 951 | obj_s->pending_slave_rx_maxter_tx = 0; |
| WFKnight | 0:9b3d4731edbb | 952 | } |
| WFKnight | 0:9b3d4731edbb | 953 | |
| WFKnight | 0:9b3d4731edbb | 954 | void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c) |
| WFKnight | 0:9b3d4731edbb | 955 | { |
| WFKnight | 0:9b3d4731edbb | 956 | /* restart listening for master requests */ |
| WFKnight | 0:9b3d4731edbb | 957 | HAL_I2C_EnableListen_IT(hi2c); |
| WFKnight | 0:9b3d4731edbb | 958 | } |
| WFKnight | 0:9b3d4731edbb | 959 | |
| WFKnight | 0:9b3d4731edbb | 960 | int i2c_slave_receive(i2c_t *obj) { |
| WFKnight | 0:9b3d4731edbb | 961 | |
| WFKnight | 0:9b3d4731edbb | 962 | struct i2c_s *obj_s = I2C_S(obj); |
| WFKnight | 0:9b3d4731edbb | 963 | int retValue = NoData; |
| WFKnight | 0:9b3d4731edbb | 964 | |
| WFKnight | 0:9b3d4731edbb | 965 | if(obj_s->pending_slave_rx_maxter_tx) { |
| WFKnight | 0:9b3d4731edbb | 966 | retValue = WriteAddressed; |
| WFKnight | 0:9b3d4731edbb | 967 | } |
| WFKnight | 0:9b3d4731edbb | 968 | |
| WFKnight | 0:9b3d4731edbb | 969 | if(obj_s->pending_slave_tx_master_rx) { |
| WFKnight | 0:9b3d4731edbb | 970 | retValue = ReadAddressed; |
| WFKnight | 0:9b3d4731edbb | 971 | } |
| WFKnight | 0:9b3d4731edbb | 972 | |
| WFKnight | 0:9b3d4731edbb | 973 | return (retValue); |
| WFKnight | 0:9b3d4731edbb | 974 | } |
| WFKnight | 0:9b3d4731edbb | 975 | |
| WFKnight | 0:9b3d4731edbb | 976 | int i2c_slave_read(i2c_t *obj, char *data, int length) { |
| WFKnight | 0:9b3d4731edbb | 977 | struct i2c_s *obj_s = I2C_S(obj); |
| WFKnight | 0:9b3d4731edbb | 978 | I2C_HandleTypeDef *handle = &(obj_s->handle); |
| WFKnight | 0:9b3d4731edbb | 979 | int count = 0; |
| WFKnight | 0:9b3d4731edbb | 980 | int ret = 0; |
| WFKnight | 0:9b3d4731edbb | 981 | uint32_t timeout = 0; |
| WFKnight | 0:9b3d4731edbb | 982 | |
| WFKnight | 0:9b3d4731edbb | 983 | /* Always use I2C_NEXT_FRAME as slave will just adapt to master requests */ |
| WFKnight | 0:9b3d4731edbb | 984 | ret = HAL_I2C_Slave_Sequential_Receive_IT(handle, (uint8_t *) data, length, I2C_NEXT_FRAME); |
| WFKnight | 0:9b3d4731edbb | 985 | |
| WFKnight | 0:9b3d4731edbb | 986 | if(ret == HAL_OK) { |
| WFKnight | 0:9b3d4731edbb | 987 | timeout = BYTE_TIMEOUT_US * (length + 1); |
| WFKnight | 0:9b3d4731edbb | 988 | while(obj_s->pending_slave_rx_maxter_tx && (--timeout != 0)) { |
| WFKnight | 0:9b3d4731edbb | 989 | wait_us(1); |
| WFKnight | 0:9b3d4731edbb | 990 | } |
| WFKnight | 0:9b3d4731edbb | 991 | |
| WFKnight | 0:9b3d4731edbb | 992 | if(timeout != 0) { |
| WFKnight | 0:9b3d4731edbb | 993 | count = length; |
| WFKnight | 0:9b3d4731edbb | 994 | } else { |
| WFKnight | 0:9b3d4731edbb | 995 | DEBUG_PRINTF("TIMEOUT or error in i2c_slave_read\r\n"); |
| WFKnight | 0:9b3d4731edbb | 996 | } |
| WFKnight | 0:9b3d4731edbb | 997 | } |
| WFKnight | 0:9b3d4731edbb | 998 | return count; |
| WFKnight | 0:9b3d4731edbb | 999 | } |
| WFKnight | 0:9b3d4731edbb | 1000 | |
| WFKnight | 0:9b3d4731edbb | 1001 | int i2c_slave_write(i2c_t *obj, const char *data, int length) { |
| WFKnight | 0:9b3d4731edbb | 1002 | struct i2c_s *obj_s = I2C_S(obj); |
| WFKnight | 0:9b3d4731edbb | 1003 | I2C_HandleTypeDef *handle = &(obj_s->handle); |
| WFKnight | 0:9b3d4731edbb | 1004 | int count = 0; |
| WFKnight | 0:9b3d4731edbb | 1005 | int ret = 0; |
| WFKnight | 0:9b3d4731edbb | 1006 | uint32_t timeout = 0; |
| WFKnight | 0:9b3d4731edbb | 1007 | |
| WFKnight | 0:9b3d4731edbb | 1008 | /* Always use I2C_NEXT_FRAME as slave will just adapt to master requests */ |
| WFKnight | 0:9b3d4731edbb | 1009 | ret = HAL_I2C_Slave_Sequential_Transmit_IT(handle, (uint8_t *) data, length, I2C_NEXT_FRAME); |
| WFKnight | 0:9b3d4731edbb | 1010 | |
| WFKnight | 0:9b3d4731edbb | 1011 | if(ret == HAL_OK) { |
| WFKnight | 0:9b3d4731edbb | 1012 | timeout = BYTE_TIMEOUT_US * (length + 1); |
| WFKnight | 0:9b3d4731edbb | 1013 | while(obj_s->pending_slave_tx_master_rx && (--timeout != 0)) { |
| WFKnight | 0:9b3d4731edbb | 1014 | wait_us(1); |
| WFKnight | 0:9b3d4731edbb | 1015 | } |
| WFKnight | 0:9b3d4731edbb | 1016 | |
| WFKnight | 0:9b3d4731edbb | 1017 | if(timeout != 0) { |
| WFKnight | 0:9b3d4731edbb | 1018 | count = length; |
| WFKnight | 0:9b3d4731edbb | 1019 | } else { |
| WFKnight | 0:9b3d4731edbb | 1020 | DEBUG_PRINTF("TIMEOUT or error in i2c_slave_write\r\n"); |
| WFKnight | 0:9b3d4731edbb | 1021 | } |
| WFKnight | 0:9b3d4731edbb | 1022 | } |
| WFKnight | 0:9b3d4731edbb | 1023 | |
| WFKnight | 0:9b3d4731edbb | 1024 | return count; |
| WFKnight | 0:9b3d4731edbb | 1025 | } |
| WFKnight | 0:9b3d4731edbb | 1026 | #endif // DEVICE_I2CSLAVE |
| WFKnight | 0:9b3d4731edbb | 1027 | |
| WFKnight | 0:9b3d4731edbb | 1028 | #if DEVICE_I2C_ASYNCH |
| WFKnight | 0:9b3d4731edbb | 1029 | /* ASYNCH MASTER API FUNCTIONS */ |
| WFKnight | 0:9b3d4731edbb | 1030 | void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c){ |
| WFKnight | 0:9b3d4731edbb | 1031 | /* Get object ptr based on handler ptr */ |
| WFKnight | 0:9b3d4731edbb | 1032 | i2c_t *obj = get_i2c_obj(hi2c); |
| WFKnight | 0:9b3d4731edbb | 1033 | struct i2c_s *obj_s = I2C_S(obj); |
| WFKnight | 0:9b3d4731edbb | 1034 | I2C_HandleTypeDef *handle = &(obj_s->handle); |
| WFKnight | 0:9b3d4731edbb | 1035 | |
| WFKnight | 0:9b3d4731edbb | 1036 | /* Disable IT. Not always done before calling macro */ |
| WFKnight | 0:9b3d4731edbb | 1037 | __HAL_I2C_DISABLE_IT(handle, I2C_IT_ALL); |
| WFKnight | 0:9b3d4731edbb | 1038 | i2c_ev_err_disable(obj); |
| WFKnight | 0:9b3d4731edbb | 1039 | |
| WFKnight | 0:9b3d4731edbb | 1040 | /* Set event flag */ |
| WFKnight | 0:9b3d4731edbb | 1041 | obj_s->event = I2C_EVENT_ERROR; |
| WFKnight | 0:9b3d4731edbb | 1042 | } |
| WFKnight | 0:9b3d4731edbb | 1043 | |
| WFKnight | 0:9b3d4731edbb | 1044 | void i2c_transfer_asynch(i2c_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint32_t address, uint32_t stop, uint32_t handler, uint32_t event, DMAUsage hint) { |
| WFKnight | 0:9b3d4731edbb | 1045 | |
| WFKnight | 0:9b3d4731edbb | 1046 | // TODO: DMA usage is currently ignored by this way |
| WFKnight | 0:9b3d4731edbb | 1047 | (void) hint; |
| WFKnight | 0:9b3d4731edbb | 1048 | |
| WFKnight | 0:9b3d4731edbb | 1049 | struct i2c_s *obj_s = I2C_S(obj); |
| WFKnight | 0:9b3d4731edbb | 1050 | I2C_HandleTypeDef *handle = &(obj_s->handle); |
| WFKnight | 0:9b3d4731edbb | 1051 | |
| WFKnight | 0:9b3d4731edbb | 1052 | /* Update object */ |
| WFKnight | 0:9b3d4731edbb | 1053 | obj->tx_buff.buffer = (void *)tx; |
| WFKnight | 0:9b3d4731edbb | 1054 | obj->tx_buff.length = tx_length; |
| WFKnight | 0:9b3d4731edbb | 1055 | obj->tx_buff.pos = 0; |
| WFKnight | 0:9b3d4731edbb | 1056 | obj->tx_buff.width = 8; |
| WFKnight | 0:9b3d4731edbb | 1057 | |
| WFKnight | 0:9b3d4731edbb | 1058 | obj->rx_buff.buffer = (void *)rx; |
| WFKnight | 0:9b3d4731edbb | 1059 | obj->rx_buff.length = rx_length; |
| WFKnight | 0:9b3d4731edbb | 1060 | obj->rx_buff.pos = SIZE_MAX; |
| WFKnight | 0:9b3d4731edbb | 1061 | obj->rx_buff.width = 8; |
| WFKnight | 0:9b3d4731edbb | 1062 | |
| WFKnight | 0:9b3d4731edbb | 1063 | obj_s->available_events = event; |
| WFKnight | 0:9b3d4731edbb | 1064 | obj_s->event = 0; |
| WFKnight | 0:9b3d4731edbb | 1065 | obj_s->address = address; |
| WFKnight | 0:9b3d4731edbb | 1066 | obj_s->stop = stop; |
| WFKnight | 0:9b3d4731edbb | 1067 | |
| WFKnight | 0:9b3d4731edbb | 1068 | i2c_ev_err_enable(obj, handler); |
| WFKnight | 0:9b3d4731edbb | 1069 | |
| WFKnight | 0:9b3d4731edbb | 1070 | /* Set operation step depending if stop sending required or not */ |
| WFKnight | 0:9b3d4731edbb | 1071 | if ((tx_length && !rx_length) || (!tx_length && rx_length)) { |
| WFKnight | 0:9b3d4731edbb | 1072 | // Trick to remove compiler warning "left and right operands are identical" in some cases |
| WFKnight | 0:9b3d4731edbb | 1073 | uint32_t op1 = I2C_FIRST_AND_LAST_FRAME; |
| WFKnight | 0:9b3d4731edbb | 1074 | uint32_t op2 = I2C_LAST_FRAME; |
| WFKnight | 0:9b3d4731edbb | 1075 | if ((obj_s->XferOperation == op1) || (obj_s->XferOperation == op2)) { |
| WFKnight | 0:9b3d4731edbb | 1076 | if (stop) |
| WFKnight | 0:9b3d4731edbb | 1077 | obj_s->XferOperation = I2C_FIRST_AND_LAST_FRAME; |
| WFKnight | 0:9b3d4731edbb | 1078 | else |
| WFKnight | 0:9b3d4731edbb | 1079 | obj_s->XferOperation = I2C_FIRST_FRAME; |
| WFKnight | 0:9b3d4731edbb | 1080 | } else if ((obj_s->XferOperation == I2C_FIRST_FRAME) || |
| WFKnight | 0:9b3d4731edbb | 1081 | (obj_s->XferOperation == I2C_NEXT_FRAME)) { |
| WFKnight | 0:9b3d4731edbb | 1082 | if (stop) |
| WFKnight | 0:9b3d4731edbb | 1083 | obj_s->XferOperation = I2C_LAST_FRAME; |
| WFKnight | 0:9b3d4731edbb | 1084 | else |
| WFKnight | 0:9b3d4731edbb | 1085 | obj_s->XferOperation = I2C_NEXT_FRAME; |
| WFKnight | 0:9b3d4731edbb | 1086 | } |
| WFKnight | 0:9b3d4731edbb | 1087 | |
| WFKnight | 0:9b3d4731edbb | 1088 | if (tx_length > 0) { |
| WFKnight | 0:9b3d4731edbb | 1089 | HAL_I2C_Master_Sequential_Transmit_IT(handle, address, (uint8_t*)tx, tx_length, obj_s->XferOperation); |
| WFKnight | 0:9b3d4731edbb | 1090 | } |
| WFKnight | 0:9b3d4731edbb | 1091 | if (rx_length > 0) { |
| WFKnight | 0:9b3d4731edbb | 1092 | HAL_I2C_Master_Sequential_Receive_IT(handle, address, (uint8_t*)rx, rx_length, obj_s->XferOperation); |
| WFKnight | 0:9b3d4731edbb | 1093 | } |
| WFKnight | 0:9b3d4731edbb | 1094 | } |
| WFKnight | 0:9b3d4731edbb | 1095 | else if (tx_length && rx_length) { |
| WFKnight | 0:9b3d4731edbb | 1096 | /* Two steps operation, don't modify XferOperation, keep it for next step */ |
| WFKnight | 0:9b3d4731edbb | 1097 | // Trick to remove compiler warning "left and right operands are identical" in some cases |
| WFKnight | 0:9b3d4731edbb | 1098 | uint32_t op1 = I2C_FIRST_AND_LAST_FRAME; |
| WFKnight | 0:9b3d4731edbb | 1099 | uint32_t op2 = I2C_LAST_FRAME; |
| WFKnight | 0:9b3d4731edbb | 1100 | if ((obj_s->XferOperation == op1) || (obj_s->XferOperation == op2)) { |
| WFKnight | 0:9b3d4731edbb | 1101 | HAL_I2C_Master_Sequential_Transmit_IT(handle, address, (uint8_t*)tx, tx_length, I2C_FIRST_FRAME); |
| WFKnight | 0:9b3d4731edbb | 1102 | } else if ((obj_s->XferOperation == I2C_FIRST_FRAME) || |
| WFKnight | 0:9b3d4731edbb | 1103 | (obj_s->XferOperation == I2C_NEXT_FRAME)) { |
| WFKnight | 0:9b3d4731edbb | 1104 | HAL_I2C_Master_Sequential_Transmit_IT(handle, address, (uint8_t*)tx, tx_length, I2C_NEXT_FRAME); |
| WFKnight | 0:9b3d4731edbb | 1105 | } |
| WFKnight | 0:9b3d4731edbb | 1106 | } |
| WFKnight | 0:9b3d4731edbb | 1107 | } |
| WFKnight | 0:9b3d4731edbb | 1108 | |
| WFKnight | 0:9b3d4731edbb | 1109 | |
| WFKnight | 0:9b3d4731edbb | 1110 | uint32_t i2c_irq_handler_asynch(i2c_t *obj) { |
| WFKnight | 0:9b3d4731edbb | 1111 | |
| WFKnight | 0:9b3d4731edbb | 1112 | struct i2c_s *obj_s = I2C_S(obj); |
| WFKnight | 0:9b3d4731edbb | 1113 | I2C_HandleTypeDef *handle = &(obj_s->handle); |
| WFKnight | 0:9b3d4731edbb | 1114 | |
| WFKnight | 0:9b3d4731edbb | 1115 | HAL_I2C_EV_IRQHandler(handle); |
| WFKnight | 0:9b3d4731edbb | 1116 | HAL_I2C_ER_IRQHandler(handle); |
| WFKnight | 0:9b3d4731edbb | 1117 | |
| WFKnight | 0:9b3d4731edbb | 1118 | /* Return I2C event status */ |
| WFKnight | 0:9b3d4731edbb | 1119 | return (obj_s->event & obj_s->available_events); |
| WFKnight | 0:9b3d4731edbb | 1120 | } |
| WFKnight | 0:9b3d4731edbb | 1121 | |
| WFKnight | 0:9b3d4731edbb | 1122 | uint8_t i2c_active(i2c_t *obj) { |
| WFKnight | 0:9b3d4731edbb | 1123 | |
| WFKnight | 0:9b3d4731edbb | 1124 | struct i2c_s *obj_s = I2C_S(obj); |
| WFKnight | 0:9b3d4731edbb | 1125 | I2C_HandleTypeDef *handle = &(obj_s->handle); |
| WFKnight | 0:9b3d4731edbb | 1126 | |
| WFKnight | 0:9b3d4731edbb | 1127 | if (handle->State == HAL_I2C_STATE_READY) { |
| WFKnight | 0:9b3d4731edbb | 1128 | return 0; |
| WFKnight | 0:9b3d4731edbb | 1129 | } |
| WFKnight | 0:9b3d4731edbb | 1130 | else { |
| WFKnight | 0:9b3d4731edbb | 1131 | return 1; |
| WFKnight | 0:9b3d4731edbb | 1132 | } |
| WFKnight | 0:9b3d4731edbb | 1133 | } |
| WFKnight | 0:9b3d4731edbb | 1134 | |
| WFKnight | 0:9b3d4731edbb | 1135 | void i2c_abort_asynch(i2c_t *obj) { |
| WFKnight | 0:9b3d4731edbb | 1136 | |
| WFKnight | 0:9b3d4731edbb | 1137 | struct i2c_s *obj_s = I2C_S(obj); |
| WFKnight | 0:9b3d4731edbb | 1138 | I2C_HandleTypeDef *handle = &(obj_s->handle); |
| WFKnight | 0:9b3d4731edbb | 1139 | |
| WFKnight | 0:9b3d4731edbb | 1140 | /* Abort HAL requires DevAddress, but is not used. Use Dummy */ |
| WFKnight | 0:9b3d4731edbb | 1141 | uint16_t Dummy_DevAddress = 0x00; |
| WFKnight | 0:9b3d4731edbb | 1142 | |
| WFKnight | 0:9b3d4731edbb | 1143 | HAL_I2C_Master_Abort_IT(handle, Dummy_DevAddress); |
| WFKnight | 0:9b3d4731edbb | 1144 | } |
| WFKnight | 0:9b3d4731edbb | 1145 | |
| WFKnight | 0:9b3d4731edbb | 1146 | #endif // DEVICE_I2C_ASYNCH |
| WFKnight | 0:9b3d4731edbb | 1147 | |
| WFKnight | 0:9b3d4731edbb | 1148 | #endif // DEVICE_I2C |