Knight KE / Mbed OS Game_Master

游戏王对战板，目前code还是空的

mbed-os/targets/TARGET_STM/gpio_api.c@0:9b3d4731edbb, 2018-06-21 (annotated)

Committer:
WFKnight
Date:
Thu Jun 21 13:51:43 2018 +0000
Revision:
0:9b3d4731edbb
UART, RTOS, LED

Who changed what in which revision?

UserRevisionLine numberNew contents of line
WFKnight 0:9b3d4731edbb 1 /* mbed Microcontroller Library
WFKnight 0:9b3d4731edbb 2 *******************************************************************************
WFKnight 0:9b3d4731edbb 3 * Copyright (c) 2015, STMicroelectronics
WFKnight 0:9b3d4731edbb 4 * All rights reserved.
WFKnight 0:9b3d4731edbb 5 *
WFKnight 0:9b3d4731edbb 6 * Redistribution and use in source and binary forms, with or without
WFKnight 0:9b3d4731edbb 7 * modification, are permitted provided that the following conditions are met:
WFKnight 0:9b3d4731edbb 8 *
WFKnight 0:9b3d4731edbb 9 * 1. Redistributions of source code must retain the above copyright notice,
WFKnight 0:9b3d4731edbb 10 * this list of conditions and the following disclaimer.
WFKnight 0:9b3d4731edbb 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
WFKnight 0:9b3d4731edbb 12 * this list of conditions and the following disclaimer in the documentation
WFKnight 0:9b3d4731edbb 13 * and/or other materials provided with the distribution.
WFKnight 0:9b3d4731edbb 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
WFKnight 0:9b3d4731edbb 15 * may be used to endorse or promote products derived from this software
WFKnight 0:9b3d4731edbb 16 * without specific prior written permission.
WFKnight 0:9b3d4731edbb 17 *
WFKnight 0:9b3d4731edbb 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
WFKnight 0:9b3d4731edbb 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
WFKnight 0:9b3d4731edbb 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
WFKnight 0:9b3d4731edbb 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
WFKnight 0:9b3d4731edbb 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
WFKnight 0:9b3d4731edbb 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
WFKnight 0:9b3d4731edbb 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
WFKnight 0:9b3d4731edbb 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
WFKnight 0:9b3d4731edbb 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
WFKnight 0:9b3d4731edbb 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
WFKnight 0:9b3d4731edbb 28 *******************************************************************************
WFKnight 0:9b3d4731edbb 29 */
WFKnight 0:9b3d4731edbb 30 #include "mbed_assert.h"
WFKnight 0:9b3d4731edbb 31 #include "gpio_api.h"
WFKnight 0:9b3d4731edbb 32 #include "pinmap.h"
WFKnight 0:9b3d4731edbb 33 #include "mbed_error.h"
WFKnight 0:9b3d4731edbb 34 #include "pin_device.h"
WFKnight 0:9b3d4731edbb 35
WFKnight 0:9b3d4731edbb 36 extern const uint32_t ll_pin_defines[16];
WFKnight 0:9b3d4731edbb 37
WFKnight 0:9b3d4731edbb 38 // Enable GPIO clock and return GPIO base address
WFKnight 0:9b3d4731edbb 39 GPIO_TypeDef *Set_GPIO_Clock(uint32_t port_idx) {
WFKnight 0:9b3d4731edbb 40 uint32_t gpio_add = 0;
WFKnight 0:9b3d4731edbb 41 switch (port_idx) {
WFKnight 0:9b3d4731edbb 42 case PortA:
WFKnight 0:9b3d4731edbb 43 gpio_add = GPIOA_BASE;
WFKnight 0:9b3d4731edbb 44 __HAL_RCC_GPIOA_CLK_ENABLE();
WFKnight 0:9b3d4731edbb 45 break;
WFKnight 0:9b3d4731edbb 46 case PortB:
WFKnight 0:9b3d4731edbb 47 gpio_add = GPIOB_BASE;
WFKnight 0:9b3d4731edbb 48 __HAL_RCC_GPIOB_CLK_ENABLE();
WFKnight 0:9b3d4731edbb 49 break;
WFKnight 0:9b3d4731edbb 50 #if defined(GPIOC_BASE)
WFKnight 0:9b3d4731edbb 51 case PortC:
WFKnight 0:9b3d4731edbb 52 gpio_add = GPIOC_BASE;
WFKnight 0:9b3d4731edbb 53 __HAL_RCC_GPIOC_CLK_ENABLE();
WFKnight 0:9b3d4731edbb 54 break;
WFKnight 0:9b3d4731edbb 55 #endif
WFKnight 0:9b3d4731edbb 56 #if defined GPIOD_BASE
WFKnight 0:9b3d4731edbb 57 case PortD:
WFKnight 0:9b3d4731edbb 58 gpio_add = GPIOD_BASE;
WFKnight 0:9b3d4731edbb 59 __HAL_RCC_GPIOD_CLK_ENABLE();
WFKnight 0:9b3d4731edbb 60 break;
WFKnight 0:9b3d4731edbb 61 #endif
WFKnight 0:9b3d4731edbb 62 #if defined GPIOE_BASE
WFKnight 0:9b3d4731edbb 63 case PortE:
WFKnight 0:9b3d4731edbb 64 gpio_add = GPIOE_BASE;
WFKnight 0:9b3d4731edbb 65 __HAL_RCC_GPIOE_CLK_ENABLE();
WFKnight 0:9b3d4731edbb 66 break;
WFKnight 0:9b3d4731edbb 67 #endif
WFKnight 0:9b3d4731edbb 68 #if defined GPIOF_BASE
WFKnight 0:9b3d4731edbb 69 case PortF:
WFKnight 0:9b3d4731edbb 70 gpio_add = GPIOF_BASE;
WFKnight 0:9b3d4731edbb 71 __HAL_RCC_GPIOF_CLK_ENABLE();
WFKnight 0:9b3d4731edbb 72 break;
WFKnight 0:9b3d4731edbb 73 #endif
WFKnight 0:9b3d4731edbb 74 #if defined GPIOG_BASE
WFKnight 0:9b3d4731edbb 75 case PortG:
WFKnight 0:9b3d4731edbb 76 #if defined TARGET_STM32L4
WFKnight 0:9b3d4731edbb 77 __HAL_RCC_PWR_CLK_ENABLE();
WFKnight 0:9b3d4731edbb 78 HAL_PWREx_EnableVddIO2();
WFKnight 0:9b3d4731edbb 79 #endif
WFKnight 0:9b3d4731edbb 80 gpio_add = GPIOG_BASE;
WFKnight 0:9b3d4731edbb 81 __HAL_RCC_GPIOG_CLK_ENABLE();
WFKnight 0:9b3d4731edbb 82 break;
WFKnight 0:9b3d4731edbb 83 #endif
WFKnight 0:9b3d4731edbb 84 #if defined GPIOH_BASE
WFKnight 0:9b3d4731edbb 85 case PortH:
WFKnight 0:9b3d4731edbb 86 gpio_add = GPIOH_BASE;
WFKnight 0:9b3d4731edbb 87 __HAL_RCC_GPIOH_CLK_ENABLE();
WFKnight 0:9b3d4731edbb 88 break;
WFKnight 0:9b3d4731edbb 89 #endif
WFKnight 0:9b3d4731edbb 90 #if defined GPIOI_BASE
WFKnight 0:9b3d4731edbb 91 case PortI:
WFKnight 0:9b3d4731edbb 92 gpio_add = GPIOI_BASE;
WFKnight 0:9b3d4731edbb 93 __HAL_RCC_GPIOI_CLK_ENABLE();
WFKnight 0:9b3d4731edbb 94 break;
WFKnight 0:9b3d4731edbb 95 #endif
WFKnight 0:9b3d4731edbb 96 #if defined GPIOJ_BASE
WFKnight 0:9b3d4731edbb 97 case PortJ:
WFKnight 0:9b3d4731edbb 98 gpio_add = GPIOJ_BASE;
WFKnight 0:9b3d4731edbb 99 __HAL_RCC_GPIOJ_CLK_ENABLE();
WFKnight 0:9b3d4731edbb 100 break;
WFKnight 0:9b3d4731edbb 101 #endif
WFKnight 0:9b3d4731edbb 102 #if defined GPIOK_BASE
WFKnight 0:9b3d4731edbb 103 case PortK:
WFKnight 0:9b3d4731edbb 104 gpio_add = GPIOK_BASE;
WFKnight 0:9b3d4731edbb 105 __HAL_RCC_GPIOK_CLK_ENABLE();
WFKnight 0:9b3d4731edbb 106 break;
WFKnight 0:9b3d4731edbb 107 #endif
WFKnight 0:9b3d4731edbb 108 default:
WFKnight 0:9b3d4731edbb 109 error("Pinmap error: wrong port number.");
WFKnight 0:9b3d4731edbb 110 break;
WFKnight 0:9b3d4731edbb 111 }
WFKnight 0:9b3d4731edbb 112 return (GPIO_TypeDef *) gpio_add;
WFKnight 0:9b3d4731edbb 113 }
WFKnight 0:9b3d4731edbb 114
WFKnight 0:9b3d4731edbb 115 uint32_t gpio_set(PinName pin) {
WFKnight 0:9b3d4731edbb 116 MBED_ASSERT(pin != (PinName)NC);
WFKnight 0:9b3d4731edbb 117
WFKnight 0:9b3d4731edbb 118 pin_function(pin, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
WFKnight 0:9b3d4731edbb 119
WFKnight 0:9b3d4731edbb 120 return (uint32_t)(1 << ((uint32_t)pin & 0xF)); // Return the pin mask
WFKnight 0:9b3d4731edbb 121 }
WFKnight 0:9b3d4731edbb 122
WFKnight 0:9b3d4731edbb 123
WFKnight 0:9b3d4731edbb 124 void gpio_init(gpio_t *obj, PinName pin) {
WFKnight 0:9b3d4731edbb 125 obj->pin = pin;
WFKnight 0:9b3d4731edbb 126 if (pin == (PinName)NC) {
WFKnight 0:9b3d4731edbb 127 return;
WFKnight 0:9b3d4731edbb 128 }
WFKnight 0:9b3d4731edbb 129
WFKnight 0:9b3d4731edbb 130 uint32_t port_index = STM_PORT(pin);
WFKnight 0:9b3d4731edbb 131
WFKnight 0:9b3d4731edbb 132 // Enable GPIO clock
WFKnight 0:9b3d4731edbb 133 GPIO_TypeDef *gpio = Set_GPIO_Clock(port_index);
WFKnight 0:9b3d4731edbb 134
WFKnight 0:9b3d4731edbb 135 // Fill GPIO object structure for future use
WFKnight 0:9b3d4731edbb 136 obj->mask = gpio_set(pin);
WFKnight 0:9b3d4731edbb 137 obj->gpio = gpio;
WFKnight 0:9b3d4731edbb 138 obj->ll_pin = ll_pin_defines[STM_PIN(obj->pin)];
WFKnight 0:9b3d4731edbb 139 obj->reg_in = &gpio->IDR;
WFKnight 0:9b3d4731edbb 140 obj->reg_set = &gpio->BSRR;
WFKnight 0:9b3d4731edbb 141 #ifdef GPIO_IP_WITHOUT_BRR
WFKnight 0:9b3d4731edbb 142 obj->reg_clr = &gpio->BSRR;
WFKnight 0:9b3d4731edbb 143 #else
WFKnight 0:9b3d4731edbb 144 obj->reg_clr = &gpio->BRR;
WFKnight 0:9b3d4731edbb 145 #endif
WFKnight 0:9b3d4731edbb 146 }
WFKnight 0:9b3d4731edbb 147
WFKnight 0:9b3d4731edbb 148 void gpio_mode(gpio_t *obj, PinMode mode) {
WFKnight 0:9b3d4731edbb 149 pin_mode(obj->pin, mode);
WFKnight 0:9b3d4731edbb 150 }
WFKnight 0:9b3d4731edbb 151
WFKnight 0:9b3d4731edbb 152 inline void gpio_dir(gpio_t *obj, PinDirection direction) {
WFKnight 0:9b3d4731edbb 153 if (direction == PIN_INPUT) {
WFKnight 0:9b3d4731edbb 154 LL_GPIO_SetPinMode(obj->gpio, obj->ll_pin, LL_GPIO_MODE_INPUT);
WFKnight 0:9b3d4731edbb 155 } else {
WFKnight 0:9b3d4731edbb 156 LL_GPIO_SetPinMode(obj->gpio, obj->ll_pin, LL_GPIO_MODE_OUTPUT);
WFKnight 0:9b3d4731edbb 157 }
WFKnight 0:9b3d4731edbb 158 }
WFKnight 0:9b3d4731edbb 159