Knight KE / Mbed OS Game_Master

游戏王对战板，目前code还是空的

mbed-os/platform/mbed_application.c@0:9b3d4731edbb, 2018-06-21 (annotated)

Committer:
WFKnight
Date:
Thu Jun 21 13:51:43 2018 +0000
Revision:
0:9b3d4731edbb
UART, RTOS, LED

Who changed what in which revision?

UserRevisionLine numberNew contents of line
WFKnight 0:9b3d4731edbb 1 /* mbed Microcontroller Library
WFKnight 0:9b3d4731edbb 2 * Copyright (c) 2017-2017 ARM Limited
WFKnight 0:9b3d4731edbb 3 *
WFKnight 0:9b3d4731edbb 4 * Licensed under the Apache License, Version 2.0 (the "License");
WFKnight 0:9b3d4731edbb 5 * you may not use this file except in compliance with the License.
WFKnight 0:9b3d4731edbb 6 * You may obtain a copy of the License at
WFKnight 0:9b3d4731edbb 7 *
WFKnight 0:9b3d4731edbb 8 * http://www.apache.org/licenses/LICENSE-2.0
WFKnight 0:9b3d4731edbb 9 *
WFKnight 0:9b3d4731edbb 10 * Unless required by applicable law or agreed to in writing, software
WFKnight 0:9b3d4731edbb 11 * distributed under the License is distributed on an "AS IS" BASIS,
WFKnight 0:9b3d4731edbb 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
WFKnight 0:9b3d4731edbb 13 * See the License for the specific language governing permissions and
WFKnight 0:9b3d4731edbb 14 * limitations under the License.
WFKnight 0:9b3d4731edbb 15 */
WFKnight 0:9b3d4731edbb 16
WFKnight 0:9b3d4731edbb 17 #include <stdlib.h>
WFKnight 0:9b3d4731edbb 18 #include <stdarg.h>
WFKnight 0:9b3d4731edbb 19 #include "device.h"
WFKnight 0:9b3d4731edbb 20 #include "platform/mbed_application.h"
WFKnight 0:9b3d4731edbb 21
WFKnight 0:9b3d4731edbb 22 #if MBED_APPLICATION_SUPPORT
WFKnight 0:9b3d4731edbb 23
WFKnight 0:9b3d4731edbb 24 static void powerdown_nvic(void);
WFKnight 0:9b3d4731edbb 25 static void powerdown_scb(uint32_t vtor);
WFKnight 0:9b3d4731edbb 26 static void start_new_application(void *sp, void *pc);
WFKnight 0:9b3d4731edbb 27
WFKnight 0:9b3d4731edbb 28 void mbed_start_application(uintptr_t address)
WFKnight 0:9b3d4731edbb 29 {
WFKnight 0:9b3d4731edbb 30 void *sp;
WFKnight 0:9b3d4731edbb 31 void *pc;
WFKnight 0:9b3d4731edbb 32
WFKnight 0:9b3d4731edbb 33 // Interrupts are re-enabled in start_new_application
WFKnight 0:9b3d4731edbb 34 __disable_irq();
WFKnight 0:9b3d4731edbb 35
WFKnight 0:9b3d4731edbb 36 SysTick->CTRL = 0x00000000;
WFKnight 0:9b3d4731edbb 37 powerdown_nvic();
WFKnight 0:9b3d4731edbb 38 powerdown_scb(address);
WFKnight 0:9b3d4731edbb 39
WFKnight 0:9b3d4731edbb 40 sp = *((void**)address + 0);
WFKnight 0:9b3d4731edbb 41 pc = *((void**)address + 1);
WFKnight 0:9b3d4731edbb 42 start_new_application(sp, pc);
WFKnight 0:9b3d4731edbb 43 }
WFKnight 0:9b3d4731edbb 44
WFKnight 0:9b3d4731edbb 45 static void powerdown_nvic()
WFKnight 0:9b3d4731edbb 46 {
WFKnight 0:9b3d4731edbb 47 int isr_groups_32;
WFKnight 0:9b3d4731edbb 48 int i;
WFKnight 0:9b3d4731edbb 49 int j;
WFKnight 0:9b3d4731edbb 50
WFKnight 0:9b3d4731edbb 51 #if defined(__CORTEX_M23)
WFKnight 0:9b3d4731edbb 52 // M23 doesn't support ICTR and supports up to 240 external interrupts.
WFKnight 0:9b3d4731edbb 53 isr_groups_32 = 8;
WFKnight 0:9b3d4731edbb 54 #else
WFKnight 0:9b3d4731edbb 55 isr_groups_32 = ((SCnSCB->ICTR & SCnSCB_ICTR_INTLINESNUM_Msk) >> SCnSCB_ICTR_INTLINESNUM_Pos) + 1;
WFKnight 0:9b3d4731edbb 56 #endif
WFKnight 0:9b3d4731edbb 57 for (i = 0; i < isr_groups_32; i++) {
WFKnight 0:9b3d4731edbb 58 NVIC->ICER[i] = 0xFFFFFFFF;
WFKnight 0:9b3d4731edbb 59 NVIC->ICPR[i] = 0xFFFFFFFF;
WFKnight 0:9b3d4731edbb 60 for (j = 0; j < 8; j++) {
WFKnight 0:9b3d4731edbb 61 #if defined(__CORTEX_M23)
WFKnight 0:9b3d4731edbb 62 NVIC->IPR[i * 8 + j] = 0x00000000;
WFKnight 0:9b3d4731edbb 63 #else
WFKnight 0:9b3d4731edbb 64 NVIC->IP[i * 8 + j] = 0x00000000;
WFKnight 0:9b3d4731edbb 65 #endif
WFKnight 0:9b3d4731edbb 66 }
WFKnight 0:9b3d4731edbb 67 }
WFKnight 0:9b3d4731edbb 68 }
WFKnight 0:9b3d4731edbb 69
WFKnight 0:9b3d4731edbb 70 static void powerdown_scb(uint32_t vtor)
WFKnight 0:9b3d4731edbb 71 {
WFKnight 0:9b3d4731edbb 72 int i;
WFKnight 0:9b3d4731edbb 73
WFKnight 0:9b3d4731edbb 74 // SCB->CPUID - Read only CPU ID register
WFKnight 0:9b3d4731edbb 75 SCB->ICSR = SCB_ICSR_PENDSVCLR_Msk | SCB_ICSR_PENDSTCLR_Msk;
WFKnight 0:9b3d4731edbb 76 SCB->VTOR = vtor;
WFKnight 0:9b3d4731edbb 77 SCB->AIRCR = 0x05FA | 0x0000;
WFKnight 0:9b3d4731edbb 78 SCB->SCR = 0x00000000;
WFKnight 0:9b3d4731edbb 79 // SCB->CCR - Implementation defined value
WFKnight 0:9b3d4731edbb 80 #if defined(__CORTEX_M23)
WFKnight 0:9b3d4731edbb 81 for (i = 0; i < 2; i++) {
WFKnight 0:9b3d4731edbb 82 SCB->SHPR[i] = 0x00;
WFKnight 0:9b3d4731edbb 83 }
WFKnight 0:9b3d4731edbb 84 #else
WFKnight 0:9b3d4731edbb 85 for (i = 0; i < 12; i++) {
WFKnight 0:9b3d4731edbb 86 #if defined(__CORTEX_M7)
WFKnight 0:9b3d4731edbb 87 SCB->SHPR[i] = 0x00;
WFKnight 0:9b3d4731edbb 88 #else
WFKnight 0:9b3d4731edbb 89 SCB->SHP[i] = 0x00;
WFKnight 0:9b3d4731edbb 90 #endif
WFKnight 0:9b3d4731edbb 91 }
WFKnight 0:9b3d4731edbb 92 #endif
WFKnight 0:9b3d4731edbb 93 SCB->SHCSR = 0x00000000;
WFKnight 0:9b3d4731edbb 94 #if defined(__CORTEX_M23)
WFKnight 0:9b3d4731edbb 95 #else
WFKnight 0:9b3d4731edbb 96 SCB->CFSR = 0xFFFFFFFF;
WFKnight 0:9b3d4731edbb 97 SCB->HFSR = SCB_HFSR_DEBUGEVT_Msk | SCB_HFSR_FORCED_Msk | SCB_HFSR_VECTTBL_Msk;
WFKnight 0:9b3d4731edbb 98 SCB->DFSR = SCB_DFSR_EXTERNAL_Msk | SCB_DFSR_VCATCH_Msk |
WFKnight 0:9b3d4731edbb 99 SCB_DFSR_DWTTRAP_Msk | SCB_DFSR_BKPT_Msk | SCB_DFSR_HALTED_Msk;
WFKnight 0:9b3d4731edbb 100 #endif
WFKnight 0:9b3d4731edbb 101 // SCB->MMFAR - Implementation defined value
WFKnight 0:9b3d4731edbb 102 // SCB->BFAR - Implementation defined value
WFKnight 0:9b3d4731edbb 103 // SCB->AFSR - Implementation defined value
WFKnight 0:9b3d4731edbb 104 // SCB->PFR - Read only processor feature register
WFKnight 0:9b3d4731edbb 105 // SCB->DFR - Read only debug feature registers
WFKnight 0:9b3d4731edbb 106 // SCB->ADR - Read only auxiliary feature registers
WFKnight 0:9b3d4731edbb 107 // SCB->MMFR - Read only memory model feature registers
WFKnight 0:9b3d4731edbb 108 // SCB->ISAR - Read only instruction set attribute registers
WFKnight 0:9b3d4731edbb 109 // SCB->CPACR - Implementation defined value
WFKnight 0:9b3d4731edbb 110 }
WFKnight 0:9b3d4731edbb 111
WFKnight 0:9b3d4731edbb 112 #if defined (__CC_ARM)
WFKnight 0:9b3d4731edbb 113
WFKnight 0:9b3d4731edbb 114 __asm static void start_new_application(void *sp, void *pc)
WFKnight 0:9b3d4731edbb 115 {
WFKnight 0:9b3d4731edbb 116 MOV R2, #0
WFKnight 0:9b3d4731edbb 117 MSR CONTROL, R2 // Switch to main stack
WFKnight 0:9b3d4731edbb 118 MOV SP, R0
WFKnight 0:9b3d4731edbb 119 MSR PRIMASK, R2 // Enable interrupts
WFKnight 0:9b3d4731edbb 120 BX R1
WFKnight 0:9b3d4731edbb 121 }
WFKnight 0:9b3d4731edbb 122
WFKnight 0:9b3d4731edbb 123 #elif defined (__GNUC__) || defined (__ICCARM__)
WFKnight 0:9b3d4731edbb 124
WFKnight 0:9b3d4731edbb 125 void start_new_application(void *sp, void *pc)
WFKnight 0:9b3d4731edbb 126 {
WFKnight 0:9b3d4731edbb 127 __asm volatile (
WFKnight 0:9b3d4731edbb 128 "movw r2, #0 \n" // Fail to compile "mov r2, #0" with ARMC6. Replace with MOVW.
WFKnight 0:9b3d4731edbb 129 // We needn't "movt r2, #0" immediately following because MOVW
WFKnight 0:9b3d4731edbb 130 // will zero-extend the 16-bit immediate.
WFKnight 0:9b3d4731edbb 131 "msr control, r2 \n" // Switch to main stack
WFKnight 0:9b3d4731edbb 132 "mov sp, %0 \n"
WFKnight 0:9b3d4731edbb 133 "msr primask, r2 \n" // Enable interrupts
WFKnight 0:9b3d4731edbb 134 "bx %1 \n"
WFKnight 0:9b3d4731edbb 135 :
WFKnight 0:9b3d4731edbb 136 : "l" (sp), "l" (pc)
WFKnight 0:9b3d4731edbb 137 : "r2", "cc", "memory"
WFKnight 0:9b3d4731edbb 138 );
WFKnight 0:9b3d4731edbb 139 }
WFKnight 0:9b3d4731edbb 140
WFKnight 0:9b3d4731edbb 141 #else
WFKnight 0:9b3d4731edbb 142
WFKnight 0:9b3d4731edbb 143 #error "Unsupported toolchain"
WFKnight 0:9b3d4731edbb 144
WFKnight 0:9b3d4731edbb 145 #endif
WFKnight 0:9b3d4731edbb 146
WFKnight 0:9b3d4731edbb 147 #endif /* MBED_APPLICATION_SUPPORT */