Knight KE / Mbed OS Game_Master

游戏王对战板，目前code还是空的

mbed-os/hal/spi_api.h@0:9b3d4731edbb, 2018-06-21 (annotated)

Committer:
WFKnight
Date:
Thu Jun 21 13:51:43 2018 +0000
Revision:
0:9b3d4731edbb
UART, RTOS, LED

Who changed what in which revision?

UserRevisionLine numberNew contents of line
WFKnight 0:9b3d4731edbb 1
WFKnight 0:9b3d4731edbb 2 /** \addtogroup hal */
WFKnight 0:9b3d4731edbb 3 /** @{*/
WFKnight 0:9b3d4731edbb 4 /* mbed Microcontroller Library
WFKnight 0:9b3d4731edbb 5 * Copyright (c) 2006-2013 ARM Limited
WFKnight 0:9b3d4731edbb 6 *
WFKnight 0:9b3d4731edbb 7 * Licensed under the Apache License, Version 2.0 (the "License");
WFKnight 0:9b3d4731edbb 8 * you may not use this file except in compliance with the License.
WFKnight 0:9b3d4731edbb 9 * You may obtain a copy of the License at
WFKnight 0:9b3d4731edbb 10 *
WFKnight 0:9b3d4731edbb 11 * http://www.apache.org/licenses/LICENSE-2.0
WFKnight 0:9b3d4731edbb 12 *
WFKnight 0:9b3d4731edbb 13 * Unless required by applicable law or agreed to in writing, software
WFKnight 0:9b3d4731edbb 14 * distributed under the License is distributed on an "AS IS" BASIS,
WFKnight 0:9b3d4731edbb 15 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
WFKnight 0:9b3d4731edbb 16 * See the License for the specific language governing permissions and
WFKnight 0:9b3d4731edbb 17 * limitations under the License.
WFKnight 0:9b3d4731edbb 18 */
WFKnight 0:9b3d4731edbb 19 #ifndef MBED_SPI_API_H
WFKnight 0:9b3d4731edbb 20 #define MBED_SPI_API_H
WFKnight 0:9b3d4731edbb 21
WFKnight 0:9b3d4731edbb 22 #include "device.h"
WFKnight 0:9b3d4731edbb 23 #include "hal/dma_api.h"
WFKnight 0:9b3d4731edbb 24 #include "hal/buffer.h"
WFKnight 0:9b3d4731edbb 25
WFKnight 0:9b3d4731edbb 26 #if DEVICE_SPI
WFKnight 0:9b3d4731edbb 27
WFKnight 0:9b3d4731edbb 28 #define SPI_EVENT_ERROR (1 << 1)
WFKnight 0:9b3d4731edbb 29 #define SPI_EVENT_COMPLETE (1 << 2)
WFKnight 0:9b3d4731edbb 30 #define SPI_EVENT_RX_OVERFLOW (1 << 3)
WFKnight 0:9b3d4731edbb 31 #define SPI_EVENT_ALL (SPI_EVENT_ERROR | SPI_EVENT_COMPLETE | SPI_EVENT_RX_OVERFLOW)
WFKnight 0:9b3d4731edbb 32
WFKnight 0:9b3d4731edbb 33 #define SPI_EVENT_INTERNAL_TRANSFER_COMPLETE (1 << 30) // Internal flag to report that an event occurred
WFKnight 0:9b3d4731edbb 34
WFKnight 0:9b3d4731edbb 35 #define SPI_FILL_WORD (0xFFFF)
WFKnight 0:9b3d4731edbb 36 #define SPI_FILL_CHAR (0xFF)
WFKnight 0:9b3d4731edbb 37
WFKnight 0:9b3d4731edbb 38 #if DEVICE_SPI_ASYNCH
WFKnight 0:9b3d4731edbb 39 /** Asynch SPI HAL structure
WFKnight 0:9b3d4731edbb 40 */
WFKnight 0:9b3d4731edbb 41 typedef struct {
WFKnight 0:9b3d4731edbb 42 struct spi_s spi; /**< Target specific SPI structure */
WFKnight 0:9b3d4731edbb 43 struct buffer_s tx_buff; /**< Tx buffer */
WFKnight 0:9b3d4731edbb 44 struct buffer_s rx_buff; /**< Rx buffer */
WFKnight 0:9b3d4731edbb 45 } spi_t;
WFKnight 0:9b3d4731edbb 46
WFKnight 0:9b3d4731edbb 47 #else
WFKnight 0:9b3d4731edbb 48 /** Non-asynch SPI HAL structure
WFKnight 0:9b3d4731edbb 49 */
WFKnight 0:9b3d4731edbb 50 typedef struct spi_s spi_t;
WFKnight 0:9b3d4731edbb 51
WFKnight 0:9b3d4731edbb 52 #endif
WFKnight 0:9b3d4731edbb 53
WFKnight 0:9b3d4731edbb 54 #ifdef __cplusplus
WFKnight 0:9b3d4731edbb 55 extern "C" {
WFKnight 0:9b3d4731edbb 56 #endif
WFKnight 0:9b3d4731edbb 57
WFKnight 0:9b3d4731edbb 58 /**
WFKnight 0:9b3d4731edbb 59 * \defgroup hal_GeneralSPI SPI Configuration Functions
WFKnight 0:9b3d4731edbb 60 * @{
WFKnight 0:9b3d4731edbb 61 */
WFKnight 0:9b3d4731edbb 62
WFKnight 0:9b3d4731edbb 63 /** Initialize the SPI peripheral
WFKnight 0:9b3d4731edbb 64 *
WFKnight 0:9b3d4731edbb 65 * Configures the pins used by SPI, sets a default format and frequency, and enables the peripheral
WFKnight 0:9b3d4731edbb 66 * @param[out] obj The SPI object to initialize
WFKnight 0:9b3d4731edbb 67 * @param[in] mosi The pin to use for MOSI
WFKnight 0:9b3d4731edbb 68 * @param[in] miso The pin to use for MISO
WFKnight 0:9b3d4731edbb 69 * @param[in] sclk The pin to use for SCLK
WFKnight 0:9b3d4731edbb 70 * @param[in] ssel The pin to use for SSEL
WFKnight 0:9b3d4731edbb 71 */
WFKnight 0:9b3d4731edbb 72 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel);
WFKnight 0:9b3d4731edbb 73
WFKnight 0:9b3d4731edbb 74 /** Release a SPI object
WFKnight 0:9b3d4731edbb 75 *
WFKnight 0:9b3d4731edbb 76 * TODO: spi_free is currently unimplemented
WFKnight 0:9b3d4731edbb 77 * This will require reference counting at the C++ level to be safe
WFKnight 0:9b3d4731edbb 78 *
WFKnight 0:9b3d4731edbb 79 * Return the pins owned by the SPI object to their reset state
WFKnight 0:9b3d4731edbb 80 * Disable the SPI peripheral
WFKnight 0:9b3d4731edbb 81 * Disable the SPI clock
WFKnight 0:9b3d4731edbb 82 * @param[in] obj The SPI object to deinitialize
WFKnight 0:9b3d4731edbb 83 */
WFKnight 0:9b3d4731edbb 84 void spi_free(spi_t *obj);
WFKnight 0:9b3d4731edbb 85
WFKnight 0:9b3d4731edbb 86 /** Configure the SPI format
WFKnight 0:9b3d4731edbb 87 *
WFKnight 0:9b3d4731edbb 88 * Set the number of bits per frame, configure clock polarity and phase, shift order and master/slave mode.
WFKnight 0:9b3d4731edbb 89 * The default bit order is MSB.
WFKnight 0:9b3d4731edbb 90 * @param[in,out] obj The SPI object to configure
WFKnight 0:9b3d4731edbb 91 * @param[in] bits The number of bits per frame
WFKnight 0:9b3d4731edbb 92 * @param[in] mode The SPI mode (clock polarity, phase, and shift direction)
WFKnight 0:9b3d4731edbb 93 * @param[in] slave Zero for master mode or non-zero for slave mode
WFKnight 0:9b3d4731edbb 94 */
WFKnight 0:9b3d4731edbb 95 void spi_format(spi_t *obj, int bits, int mode, int slave);
WFKnight 0:9b3d4731edbb 96
WFKnight 0:9b3d4731edbb 97 /** Set the SPI baud rate
WFKnight 0:9b3d4731edbb 98 *
WFKnight 0:9b3d4731edbb 99 * Actual frequency may differ from the desired frequency due to available dividers and bus clock
WFKnight 0:9b3d4731edbb 100 * Configures the SPI peripheral's baud rate
WFKnight 0:9b3d4731edbb 101 * @param[in,out] obj The SPI object to configure
WFKnight 0:9b3d4731edbb 102 * @param[in] hz The baud rate in Hz
WFKnight 0:9b3d4731edbb 103 */
WFKnight 0:9b3d4731edbb 104 void spi_frequency(spi_t *obj, int hz);
WFKnight 0:9b3d4731edbb 105
WFKnight 0:9b3d4731edbb 106 /**@}*/
WFKnight 0:9b3d4731edbb 107 /**
WFKnight 0:9b3d4731edbb 108 * \defgroup SynchSPI Synchronous SPI Hardware Abstraction Layer
WFKnight 0:9b3d4731edbb 109 * @{
WFKnight 0:9b3d4731edbb 110 */
WFKnight 0:9b3d4731edbb 111
WFKnight 0:9b3d4731edbb 112 /** Write a byte out in master mode and receive a value
WFKnight 0:9b3d4731edbb 113 *
WFKnight 0:9b3d4731edbb 114 * @param[in] obj The SPI peripheral to use for sending
WFKnight 0:9b3d4731edbb 115 * @param[in] value The value to send
WFKnight 0:9b3d4731edbb 116 * @return Returns the value received during send
WFKnight 0:9b3d4731edbb 117 */
WFKnight 0:9b3d4731edbb 118 int spi_master_write(spi_t *obj, int value);
WFKnight 0:9b3d4731edbb 119
WFKnight 0:9b3d4731edbb 120 /** Write a block out in master mode and receive a value
WFKnight 0:9b3d4731edbb 121 *
WFKnight 0:9b3d4731edbb 122 * The total number of bytes sent and received will be the maximum of
WFKnight 0:9b3d4731edbb 123 * tx_length and rx_length. The bytes written will be padded with the
WFKnight 0:9b3d4731edbb 124 * value 0xff.
WFKnight 0:9b3d4731edbb 125 *
WFKnight 0:9b3d4731edbb 126 * @param[in] obj The SPI peripheral to use for sending
WFKnight 0:9b3d4731edbb 127 * @param[in] tx_buffer Pointer to the byte-array of data to write to the device
WFKnight 0:9b3d4731edbb 128 * @param[in] tx_length Number of bytes to write, may be zero
WFKnight 0:9b3d4731edbb 129 * @param[in] rx_buffer Pointer to the byte-array of data to read from the device
WFKnight 0:9b3d4731edbb 130 * @param[in] rx_length Number of bytes to read, may be zero
WFKnight 0:9b3d4731edbb 131 * @param[in] write_fill Default data transmitted while performing a read
WFKnight 0:9b3d4731edbb 132 * @returns
WFKnight 0:9b3d4731edbb 133 * The number of bytes written and read from the device. This is
WFKnight 0:9b3d4731edbb 134 * maximum of tx_length and rx_length.
WFKnight 0:9b3d4731edbb 135 */
WFKnight 0:9b3d4731edbb 136 int spi_master_block_write(spi_t *obj, const char *tx_buffer, int tx_length, char *rx_buffer, int rx_length, char write_fill);
WFKnight 0:9b3d4731edbb 137
WFKnight 0:9b3d4731edbb 138 /** Check if a value is available to read
WFKnight 0:9b3d4731edbb 139 *
WFKnight 0:9b3d4731edbb 140 * @param[in] obj The SPI peripheral to check
WFKnight 0:9b3d4731edbb 141 * @return non-zero if a value is available
WFKnight 0:9b3d4731edbb 142 */
WFKnight 0:9b3d4731edbb 143 int spi_slave_receive(spi_t *obj);
WFKnight 0:9b3d4731edbb 144
WFKnight 0:9b3d4731edbb 145 /** Get a received value out of the SPI receive buffer in slave mode
WFKnight 0:9b3d4731edbb 146 *
WFKnight 0:9b3d4731edbb 147 * Blocks until a value is available
WFKnight 0:9b3d4731edbb 148 * @param[in] obj The SPI peripheral to read
WFKnight 0:9b3d4731edbb 149 * @return The value received
WFKnight 0:9b3d4731edbb 150 */
WFKnight 0:9b3d4731edbb 151 int spi_slave_read(spi_t *obj);
WFKnight 0:9b3d4731edbb 152
WFKnight 0:9b3d4731edbb 153 /** Write a value to the SPI peripheral in slave mode
WFKnight 0:9b3d4731edbb 154 *
WFKnight 0:9b3d4731edbb 155 * Blocks until the SPI peripheral can be written to
WFKnight 0:9b3d4731edbb 156 * @param[in] obj The SPI peripheral to write
WFKnight 0:9b3d4731edbb 157 * @param[in] value The value to write
WFKnight 0:9b3d4731edbb 158 */
WFKnight 0:9b3d4731edbb 159 void spi_slave_write(spi_t *obj, int value);
WFKnight 0:9b3d4731edbb 160
WFKnight 0:9b3d4731edbb 161 /** Checks if the specified SPI peripheral is in use
WFKnight 0:9b3d4731edbb 162 *
WFKnight 0:9b3d4731edbb 163 * @param[in] obj The SPI peripheral to check
WFKnight 0:9b3d4731edbb 164 * @return non-zero if the peripheral is currently transmitting
WFKnight 0:9b3d4731edbb 165 */
WFKnight 0:9b3d4731edbb 166 int spi_busy(spi_t *obj);
WFKnight 0:9b3d4731edbb 167
WFKnight 0:9b3d4731edbb 168 /** Get the module number
WFKnight 0:9b3d4731edbb 169 *
WFKnight 0:9b3d4731edbb 170 * @param[in] obj The SPI peripheral to check
WFKnight 0:9b3d4731edbb 171 * @return The module number
WFKnight 0:9b3d4731edbb 172 */
WFKnight 0:9b3d4731edbb 173 uint8_t spi_get_module(spi_t *obj);
WFKnight 0:9b3d4731edbb 174
WFKnight 0:9b3d4731edbb 175 /**@}*/
WFKnight 0:9b3d4731edbb 176
WFKnight 0:9b3d4731edbb 177 #if DEVICE_SPI_ASYNCH
WFKnight 0:9b3d4731edbb 178 /**
WFKnight 0:9b3d4731edbb 179 * \defgroup AsynchSPI Asynchronous SPI Hardware Abstraction Layer
WFKnight 0:9b3d4731edbb 180 * @{
WFKnight 0:9b3d4731edbb 181 */
WFKnight 0:9b3d4731edbb 182
WFKnight 0:9b3d4731edbb 183 /** Begin the SPI transfer. Buffer pointers and lengths are specified in tx_buff and rx_buff
WFKnight 0:9b3d4731edbb 184 *
WFKnight 0:9b3d4731edbb 185 * @param[in] obj The SPI object that holds the transfer information
WFKnight 0:9b3d4731edbb 186 * @param[in] tx The transmit buffer
WFKnight 0:9b3d4731edbb 187 * @param[in] tx_length The number of bytes to transmit
WFKnight 0:9b3d4731edbb 188 * @param[in] rx The receive buffer
WFKnight 0:9b3d4731edbb 189 * @param[in] rx_length The number of bytes to receive
WFKnight 0:9b3d4731edbb 190 * @param[in] bit_width The bit width of buffer words
WFKnight 0:9b3d4731edbb 191 * @param[in] event The logical OR of events to be registered
WFKnight 0:9b3d4731edbb 192 * @param[in] handler SPI interrupt handler
WFKnight 0:9b3d4731edbb 193 * @param[in] hint A suggestion for how to use DMA with this transfer
WFKnight 0:9b3d4731edbb 194 */
WFKnight 0:9b3d4731edbb 195 void spi_master_transfer(spi_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint8_t bit_width, uint32_t handler, uint32_t event, DMAUsage hint);
WFKnight 0:9b3d4731edbb 196
WFKnight 0:9b3d4731edbb 197 /** The asynchronous IRQ handler
WFKnight 0:9b3d4731edbb 198 *
WFKnight 0:9b3d4731edbb 199 * Reads the received values out of the RX FIFO, writes values into the TX FIFO and checks for transfer termination
WFKnight 0:9b3d4731edbb 200 * conditions, such as buffer overflows or transfer complete.
WFKnight 0:9b3d4731edbb 201 * @param[in] obj The SPI object that holds the transfer information
WFKnight 0:9b3d4731edbb 202 * @return Event flags if a transfer termination condition was met; otherwise 0.
WFKnight 0:9b3d4731edbb 203 */
WFKnight 0:9b3d4731edbb 204 uint32_t spi_irq_handler_asynch(spi_t *obj);
WFKnight 0:9b3d4731edbb 205
WFKnight 0:9b3d4731edbb 206 /** Attempts to determine if the SPI peripheral is already in use
WFKnight 0:9b3d4731edbb 207 *
WFKnight 0:9b3d4731edbb 208 * If a temporary DMA channel has been allocated, peripheral is in use.
WFKnight 0:9b3d4731edbb 209 * If a permanent DMA channel has been allocated, check if the DMA channel is in use. If not, proceed as though no DMA
WFKnight 0:9b3d4731edbb 210 * channel were allocated.
WFKnight 0:9b3d4731edbb 211 * If no DMA channel is allocated, check whether tx and rx buffers have been assigned. For each assigned buffer, check
WFKnight 0:9b3d4731edbb 212 * if the corresponding buffer position is less than the buffer length. If buffers do not indicate activity, check if
WFKnight 0:9b3d4731edbb 213 * there are any bytes in the FIFOs.
WFKnight 0:9b3d4731edbb 214 * @param[in] obj The SPI object to check for activity
WFKnight 0:9b3d4731edbb 215 * @return Non-zero if the SPI port is active or zero if it is not.
WFKnight 0:9b3d4731edbb 216 */
WFKnight 0:9b3d4731edbb 217 uint8_t spi_active(spi_t *obj);
WFKnight 0:9b3d4731edbb 218
WFKnight 0:9b3d4731edbb 219 /** Abort an SPI transfer
WFKnight 0:9b3d4731edbb 220 *
WFKnight 0:9b3d4731edbb 221 * @param obj The SPI peripheral to stop
WFKnight 0:9b3d4731edbb 222 */
WFKnight 0:9b3d4731edbb 223 void spi_abort_asynch(spi_t *obj);
WFKnight 0:9b3d4731edbb 224
WFKnight 0:9b3d4731edbb 225
WFKnight 0:9b3d4731edbb 226 #endif
WFKnight 0:9b3d4731edbb 227
WFKnight 0:9b3d4731edbb 228 /**@}*/
WFKnight 0:9b3d4731edbb 229
WFKnight 0:9b3d4731edbb 230 #ifdef __cplusplus
WFKnight 0:9b3d4731edbb 231 }
WFKnight 0:9b3d4731edbb 232 #endif // __cplusplus
WFKnight 0:9b3d4731edbb 233
WFKnight 0:9b3d4731edbb 234 #endif // SPI_DEVICE
WFKnight 0:9b3d4731edbb 235
WFKnight 0:9b3d4731edbb 236 #endif // MBED_SPI_API_H
WFKnight 0:9b3d4731edbb 237
WFKnight 0:9b3d4731edbb 238 /** @}*/