Tobore Denedo / Mbed OS Watchdog_Hardware_Failure_Detection

Lab 6 Code 2 Hardware Failure Detection

Fork of Watchdog_sample_nocoverage by William Marsh

wdt.cpp@1:159a09ac60ba, 2017-02-28 (annotated)

Committer:
WilliamMarshQMUL
Date:
Tue Feb 28 17:39:50 2017 +0000
Revision:
1:159a09ac60ba
First version

Who changed what in which revision?

UserRevisionLine numberNew contents of line
WilliamMarshQMUL 1:159a09ac60ba 1 #include "mbed.h"
WilliamMarshQMUL 1:159a09ac60ba 2 #include "wdt.h"
WilliamMarshQMUL 1:159a09ac60ba 3
WilliamMarshQMUL 1:159a09ac60ba 4
WilliamMarshQMUL 1:159a09ac60ba 5 // Simple Library for Watchdog
WilliamMarshQMUL 1:159a09ac60ba 6 // ---------------------------
WilliamMarshQMUL 1:159a09ac60ba 7
WilliamMarshQMUL 1:159a09ac60ba 8 // Initialise watchdog using 1KHz clock
WilliamMarshQMUL 1:159a09ac60ba 9 // To prevent overwriting, only a single write to the COPC register possible
WilliamMarshQMUL 1:159a09ac60ba 10 //
WilliamMarshQMUL 1:159a09ac60ba 11 void wdt_1sec() {
WilliamMarshQMUL 1:159a09ac60ba 12 // 1024ms, not windowed - this is the default
WilliamMarshQMUL 1:159a09ac60ba 13 /* SIM_COPC: COPT=11,COPCLKS=0,COPW=0 */
WilliamMarshQMUL 1:159a09ac60ba 14 SIM->COPC = (uint32_t)0x0Cu;
WilliamMarshQMUL 1:159a09ac60ba 15 }
WilliamMarshQMUL 1:159a09ac60ba 16
WilliamMarshQMUL 1:159a09ac60ba 17 void wdt_256ms() {
WilliamMarshQMUL 1:159a09ac60ba 18 // 256ms, not windowed
WilliamMarshQMUL 1:159a09ac60ba 19 /* SIM_COPC: COPT=10,COPCLKS=0,COPW=0 */
WilliamMarshQMUL 1:159a09ac60ba 20 SIM->COPC = (uint32_t)0x08u;
WilliamMarshQMUL 1:159a09ac60ba 21 }
WilliamMarshQMUL 1:159a09ac60ba 22
WilliamMarshQMUL 1:159a09ac60ba 23 void wdt_32ms() {
WilliamMarshQMUL 1:159a09ac60ba 24 // 32ms, not windowed
WilliamMarshQMUL 1:159a09ac60ba 25 /* SIM_COPC: COPT=01,COPCLKS=0,COPW=0 */
WilliamMarshQMUL 1:159a09ac60ba 26 SIM->COPC = (uint32_t)0x04u;
WilliamMarshQMUL 1:159a09ac60ba 27 }
WilliamMarshQMUL 1:159a09ac60ba 28
WilliamMarshQMUL 1:159a09ac60ba 29 // Kick (feed, reload) our watchdog timer
WilliamMarshQMUL 1:159a09ac60ba 30 void wdt_kick_all(){
WilliamMarshQMUL 1:159a09ac60ba 31 SIM->SRVCOP = (uint32_t)0x55u;
WilliamMarshQMUL 1:159a09ac60ba 32 SIM->SRVCOP = (uint32_t)0xAAu;
WilliamMarshQMUL 1:159a09ac60ba 33 }
WilliamMarshQMUL 1:159a09ac60ba 34
WilliamMarshQMUL 1:159a09ac60ba 35 void wdt_kickA(){
WilliamMarshQMUL 1:159a09ac60ba 36 SIM->SRVCOP = (uint32_t)0x55u;
WilliamMarshQMUL 1:159a09ac60ba 37 }
WilliamMarshQMUL 1:159a09ac60ba 38
WilliamMarshQMUL 1:159a09ac60ba 39 void wdt_kickB(){
WilliamMarshQMUL 1:159a09ac60ba 40 SIM->SRVCOP = (uint32_t)0xAAu;
WilliamMarshQMUL 1:159a09ac60ba 41 }
WilliamMarshQMUL 1:159a09ac60ba 42
WilliamMarshQMUL 1:159a09ac60ba 43