skeleton
Dependencies: MAG3110 MMA8451Q SLCD TSI mbed
TPM_init.cpp
00001 #include "TPM_init.h" 00002 00003 void TPM0_init(unsigned int modulo_val, unsigned int prescale_val){ 00004 volatile unsigned int *ptrMyReg; 00005 unsigned int prev; 00006 00007 //ptrMyReg = (volatile unsigned int *) MCG_C1_ADDR; 00008 //pc.printf("MCG_C1 = 0x%x ", *ptrMyReg); 00009 00010 ptrMyReg = (volatile unsigned int *) SIM_SOPT2_ADDR; 00011 prev = *ptrMyReg; 00012 00013 SIM->SOPT2 |= SIM_SOPT2_PLLFLLSEL_MASK; 00014 SIM->SOPT2 &= ~(SIM_SOPT2_TPMSRC_MASK); 00015 SIM->SOPT2 |= SIM_SOPT2_TPMSRC(1); 00016 00017 /* 00018 //pc.printf("Previous value of SIM_SOPT2 = 0x%x ", *ptrMyReg); 00019 //prev = prev & 0xFDFEFFFF; //16:PLLFLLSEL, 0:MCFGFLLCLK, 1:MCGPLLCLK/2 00020 prev = prev & 0xFDFFFFFF; //16:PLLFLLSEL, 0:MCFGFLLCLK, 1:MCGPLLCLK/2 00021 //pc.printf("prev after AND MASK = %x", prev); 00022 prev = prev | 0x01000000; 00023 //pc.printf("prev after AND MASK = %x", prev); 00024 *ptrMyReg = prev; 00025 //*ptrMyReg = prev | 0x01000000; //25-24: TPMSRC, 01:MCGFLLCLK or MCFGPLLCLK/2 00026 //*ptrMyReg = 0x05010000; 00027 00028 //pc.printf("SIM_SOPT2 = 0x%x\n", *ptrMyReg); 00029 */ 00030 00031 SIM->SCGC6 |= SIM_SCGC6_TPM0_MASK; 00032 00033 /* 00034 ptrMyReg = (volatile unsigned int *) SIM_SCGC6_ADDR; //bit [26-24] 00035 prev = *ptrMyReg; 00036 prev = prev | 0x07000000; 00037 *ptrMyReg = prev; 00038 //pc.printf("New value of SIM_SCGC6 = 0x%x ", *ptrMyReg); 00039 */ 00040 00041 //Set all bits to zero 00042 TPM0->SC = 0x0; 00043 00044 /* 00045 ptrMyReg = (volatile unsigned int *) TPM0_SC_ADDR; //all bits set to 0 00046 *ptrMyReg = 0x0; 00047 //pc.printf("TPM0_SC = 0x%x\n", *ptrMyReg); 00048 */ 00049 00050 //No channels for now 00051 /* 00052 ptrMyReg = (volatile unsigned int *) TPM0_C0SC_ADDR; 00053 prev = *ptrMyReg; 00054 prev = prev | 0x00000040; 00055 *ptrMyReg = prev; 00056 //pc.printf("TPM0_C0SC = 0x%x\n", *ptrMyReg); 00057 */ 00058 00059 //Reset COUNT value to zero 00060 TPM0->CNT = 0x0; 00061 /* 00062 ptrMyReg = (volatile unsigned int *) TPM0_CNT_ADDR; //all bits set to 0 00063 *ptrMyReg = 0x0; 00064 //pc.printf("TPM0_CNT = 0x%x\n", *ptrMyReg); 00065 */ 00066 00067 //Set modulo value 00068 TPM0->MOD = modulo_val; 00069 /* 00070 ptrMyReg = (volatile unsigned int *) TPM0_MOD_ADDR; 00071 *ptrMyReg = modulo_val; 00072 //*ptrMyReg = 0xFFFF; 00073 //pc.printf("TPM0_MOD = 0x%x\n", *ptrMyReg); 00074 */ 00075 00076 //Set prescale value 00077 TPM0->SC |= prescale_val; 00078 00079 //Enable overflow interrupt 00080 TPM0->SC |= TPM_SC_TOIE_MASK; 00081 00082 /* 00083 ptrMyReg = (volatile unsigned int *) TPM0_SC_ADDR; 00084 *ptrMyReg = 0x00000040; //bit [6]:1, Enable Overflow Interrupts 00085 //pc.printf("TPM0_SC = 0x%x\n", *ptrMyReg); 00086 */ 00087 00088 00089 00090 00091 //Enable reset after overflow [27:24} Trigger, 1000: TPM0 overflow, [18]:counter reload on trigger 00092 /* ptrMyReg = (volatile unsigned int *) TPM0_CONF_ADDR; 00093 //prev = *ptrMyReg; 00094 //prev = prev | 0x08000000; 00095 //pc.printf("TPM0_CONF = 0x%x\n", *ptrMyReg); 00096 *ptrMyReg = 0x08040000; 00097 */ 00098 00099 } 00100 00101 unsigned int TPM0_SC_read() { 00102 unsigned int SC_value = TPM0->SC; 00103 return SC_value; 00104 /* 00105 volatile unsigned int *ptrMyReg; 00106 unsigned int value; 00107 ptrMyReg = (volatile unsigned int *) TPM0_SC_ADDR; //all bits set to 0 00108 value = *ptrMyReg; 00109 return value; 00110 */ 00111 } 00112 unsigned int TPM0_CNT_read() { 00113 unsigned int CNT_value = TPM0->CNT; 00114 return CNT_value; 00115 /* 00116 volatile unsigned int *ptrMyReg; 00117 unsigned int value; 00118 ptrMyReg = (volatile unsigned int *) TPM0_CNT_ADDR; //all bits set to 0 00119 value = *ptrMyReg; 00120 return value; 00121 */ 00122 } 00123 00124 void TPM0_clear_overflow() { 00125 TPM0->SC |= TPM_SC_TOF_MASK; 00126 /* 00127 volatile unsigned int *ptrMyReg; 00128 00129 ptrMyReg = (volatile unsigned int *) TPM0_SC_ADDR; //all bits set to 0 00130 *ptrMyReg = 0x000000C8; //bit[4:3]: 0x01, on every TPM counter clk 00131 //*ptrMyReg = 0x00000088; //Debugging handler. Try disabling overflow interrupts 00132 //*ptrMyReg = 0x00000050; //bit[4:3]: 0x10, on every rising edge of external .... 00133 */ 00134 } 00135 00136 void TPM0_start() { 00137 00138 TPM0->SC |= TPM_SC_CMOD(1); //Count on every TPM counter clk 00139 /* 00140 volatile unsigned int *ptrMyReg; 00141 00142 ptrMyReg = (volatile unsigned int *) TPM0_SC_ADDR; //all bits set to 0 00143 *ptrMyReg = 0x00000048; //bit[4:3]: 0x01, on every TPM counter clk 00144 */ 00145 }
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