skeleton
Dependencies: MAG3110 MMA8451Q SLCD TSI mbed
TPM_init.cpp@0:ba78bf4f69dc, 2014-03-12 (annotated)
- Committer:
- TimeString
- Date:
- Wed Mar 12 20:48:17 2014 +0000
- Revision:
- 0:ba78bf4f69dc
to jaeyoung
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
TimeString | 0:ba78bf4f69dc | 1 | #include "TPM_init.h" |
TimeString | 0:ba78bf4f69dc | 2 | |
TimeString | 0:ba78bf4f69dc | 3 | void TPM0_init(unsigned int modulo_val, unsigned int prescale_val){ |
TimeString | 0:ba78bf4f69dc | 4 | volatile unsigned int *ptrMyReg; |
TimeString | 0:ba78bf4f69dc | 5 | unsigned int prev; |
TimeString | 0:ba78bf4f69dc | 6 | |
TimeString | 0:ba78bf4f69dc | 7 | //ptrMyReg = (volatile unsigned int *) MCG_C1_ADDR; |
TimeString | 0:ba78bf4f69dc | 8 | //pc.printf("MCG_C1 = 0x%x ", *ptrMyReg); |
TimeString | 0:ba78bf4f69dc | 9 | |
TimeString | 0:ba78bf4f69dc | 10 | ptrMyReg = (volatile unsigned int *) SIM_SOPT2_ADDR; |
TimeString | 0:ba78bf4f69dc | 11 | prev = *ptrMyReg; |
TimeString | 0:ba78bf4f69dc | 12 | |
TimeString | 0:ba78bf4f69dc | 13 | SIM->SOPT2 |= SIM_SOPT2_PLLFLLSEL_MASK; |
TimeString | 0:ba78bf4f69dc | 14 | SIM->SOPT2 &= ~(SIM_SOPT2_TPMSRC_MASK); |
TimeString | 0:ba78bf4f69dc | 15 | SIM->SOPT2 |= SIM_SOPT2_TPMSRC(1); |
TimeString | 0:ba78bf4f69dc | 16 | |
TimeString | 0:ba78bf4f69dc | 17 | /* |
TimeString | 0:ba78bf4f69dc | 18 | //pc.printf("Previous value of SIM_SOPT2 = 0x%x ", *ptrMyReg); |
TimeString | 0:ba78bf4f69dc | 19 | //prev = prev & 0xFDFEFFFF; //16:PLLFLLSEL, 0:MCFGFLLCLK, 1:MCGPLLCLK/2 |
TimeString | 0:ba78bf4f69dc | 20 | prev = prev & 0xFDFFFFFF; //16:PLLFLLSEL, 0:MCFGFLLCLK, 1:MCGPLLCLK/2 |
TimeString | 0:ba78bf4f69dc | 21 | //pc.printf("prev after AND MASK = %x", prev); |
TimeString | 0:ba78bf4f69dc | 22 | prev = prev | 0x01000000; |
TimeString | 0:ba78bf4f69dc | 23 | //pc.printf("prev after AND MASK = %x", prev); |
TimeString | 0:ba78bf4f69dc | 24 | *ptrMyReg = prev; |
TimeString | 0:ba78bf4f69dc | 25 | //*ptrMyReg = prev | 0x01000000; //25-24: TPMSRC, 01:MCGFLLCLK or MCFGPLLCLK/2 |
TimeString | 0:ba78bf4f69dc | 26 | //*ptrMyReg = 0x05010000; |
TimeString | 0:ba78bf4f69dc | 27 | |
TimeString | 0:ba78bf4f69dc | 28 | //pc.printf("SIM_SOPT2 = 0x%x\n", *ptrMyReg); |
TimeString | 0:ba78bf4f69dc | 29 | */ |
TimeString | 0:ba78bf4f69dc | 30 | |
TimeString | 0:ba78bf4f69dc | 31 | SIM->SCGC6 |= SIM_SCGC6_TPM0_MASK; |
TimeString | 0:ba78bf4f69dc | 32 | |
TimeString | 0:ba78bf4f69dc | 33 | /* |
TimeString | 0:ba78bf4f69dc | 34 | ptrMyReg = (volatile unsigned int *) SIM_SCGC6_ADDR; //bit [26-24] |
TimeString | 0:ba78bf4f69dc | 35 | prev = *ptrMyReg; |
TimeString | 0:ba78bf4f69dc | 36 | prev = prev | 0x07000000; |
TimeString | 0:ba78bf4f69dc | 37 | *ptrMyReg = prev; |
TimeString | 0:ba78bf4f69dc | 38 | //pc.printf("New value of SIM_SCGC6 = 0x%x ", *ptrMyReg); |
TimeString | 0:ba78bf4f69dc | 39 | */ |
TimeString | 0:ba78bf4f69dc | 40 | |
TimeString | 0:ba78bf4f69dc | 41 | //Set all bits to zero |
TimeString | 0:ba78bf4f69dc | 42 | TPM0->SC = 0x0; |
TimeString | 0:ba78bf4f69dc | 43 | |
TimeString | 0:ba78bf4f69dc | 44 | /* |
TimeString | 0:ba78bf4f69dc | 45 | ptrMyReg = (volatile unsigned int *) TPM0_SC_ADDR; //all bits set to 0 |
TimeString | 0:ba78bf4f69dc | 46 | *ptrMyReg = 0x0; |
TimeString | 0:ba78bf4f69dc | 47 | //pc.printf("TPM0_SC = 0x%x\n", *ptrMyReg); |
TimeString | 0:ba78bf4f69dc | 48 | */ |
TimeString | 0:ba78bf4f69dc | 49 | |
TimeString | 0:ba78bf4f69dc | 50 | //No channels for now |
TimeString | 0:ba78bf4f69dc | 51 | /* |
TimeString | 0:ba78bf4f69dc | 52 | ptrMyReg = (volatile unsigned int *) TPM0_C0SC_ADDR; |
TimeString | 0:ba78bf4f69dc | 53 | prev = *ptrMyReg; |
TimeString | 0:ba78bf4f69dc | 54 | prev = prev | 0x00000040; |
TimeString | 0:ba78bf4f69dc | 55 | *ptrMyReg = prev; |
TimeString | 0:ba78bf4f69dc | 56 | //pc.printf("TPM0_C0SC = 0x%x\n", *ptrMyReg); |
TimeString | 0:ba78bf4f69dc | 57 | */ |
TimeString | 0:ba78bf4f69dc | 58 | |
TimeString | 0:ba78bf4f69dc | 59 | //Reset COUNT value to zero |
TimeString | 0:ba78bf4f69dc | 60 | TPM0->CNT = 0x0; |
TimeString | 0:ba78bf4f69dc | 61 | /* |
TimeString | 0:ba78bf4f69dc | 62 | ptrMyReg = (volatile unsigned int *) TPM0_CNT_ADDR; //all bits set to 0 |
TimeString | 0:ba78bf4f69dc | 63 | *ptrMyReg = 0x0; |
TimeString | 0:ba78bf4f69dc | 64 | //pc.printf("TPM0_CNT = 0x%x\n", *ptrMyReg); |
TimeString | 0:ba78bf4f69dc | 65 | */ |
TimeString | 0:ba78bf4f69dc | 66 | |
TimeString | 0:ba78bf4f69dc | 67 | //Set modulo value |
TimeString | 0:ba78bf4f69dc | 68 | TPM0->MOD = modulo_val; |
TimeString | 0:ba78bf4f69dc | 69 | /* |
TimeString | 0:ba78bf4f69dc | 70 | ptrMyReg = (volatile unsigned int *) TPM0_MOD_ADDR; |
TimeString | 0:ba78bf4f69dc | 71 | *ptrMyReg = modulo_val; |
TimeString | 0:ba78bf4f69dc | 72 | //*ptrMyReg = 0xFFFF; |
TimeString | 0:ba78bf4f69dc | 73 | //pc.printf("TPM0_MOD = 0x%x\n", *ptrMyReg); |
TimeString | 0:ba78bf4f69dc | 74 | */ |
TimeString | 0:ba78bf4f69dc | 75 | |
TimeString | 0:ba78bf4f69dc | 76 | //Set prescale value |
TimeString | 0:ba78bf4f69dc | 77 | TPM0->SC |= prescale_val; |
TimeString | 0:ba78bf4f69dc | 78 | |
TimeString | 0:ba78bf4f69dc | 79 | //Enable overflow interrupt |
TimeString | 0:ba78bf4f69dc | 80 | TPM0->SC |= TPM_SC_TOIE_MASK; |
TimeString | 0:ba78bf4f69dc | 81 | |
TimeString | 0:ba78bf4f69dc | 82 | /* |
TimeString | 0:ba78bf4f69dc | 83 | ptrMyReg = (volatile unsigned int *) TPM0_SC_ADDR; |
TimeString | 0:ba78bf4f69dc | 84 | *ptrMyReg = 0x00000040; //bit [6]:1, Enable Overflow Interrupts |
TimeString | 0:ba78bf4f69dc | 85 | //pc.printf("TPM0_SC = 0x%x\n", *ptrMyReg); |
TimeString | 0:ba78bf4f69dc | 86 | */ |
TimeString | 0:ba78bf4f69dc | 87 | |
TimeString | 0:ba78bf4f69dc | 88 | |
TimeString | 0:ba78bf4f69dc | 89 | |
TimeString | 0:ba78bf4f69dc | 90 | |
TimeString | 0:ba78bf4f69dc | 91 | //Enable reset after overflow [27:24} Trigger, 1000: TPM0 overflow, [18]:counter reload on trigger |
TimeString | 0:ba78bf4f69dc | 92 | /* ptrMyReg = (volatile unsigned int *) TPM0_CONF_ADDR; |
TimeString | 0:ba78bf4f69dc | 93 | //prev = *ptrMyReg; |
TimeString | 0:ba78bf4f69dc | 94 | //prev = prev | 0x08000000; |
TimeString | 0:ba78bf4f69dc | 95 | //pc.printf("TPM0_CONF = 0x%x\n", *ptrMyReg); |
TimeString | 0:ba78bf4f69dc | 96 | *ptrMyReg = 0x08040000; |
TimeString | 0:ba78bf4f69dc | 97 | */ |
TimeString | 0:ba78bf4f69dc | 98 | |
TimeString | 0:ba78bf4f69dc | 99 | } |
TimeString | 0:ba78bf4f69dc | 100 | |
TimeString | 0:ba78bf4f69dc | 101 | unsigned int TPM0_SC_read() { |
TimeString | 0:ba78bf4f69dc | 102 | unsigned int SC_value = TPM0->SC; |
TimeString | 0:ba78bf4f69dc | 103 | return SC_value; |
TimeString | 0:ba78bf4f69dc | 104 | /* |
TimeString | 0:ba78bf4f69dc | 105 | volatile unsigned int *ptrMyReg; |
TimeString | 0:ba78bf4f69dc | 106 | unsigned int value; |
TimeString | 0:ba78bf4f69dc | 107 | ptrMyReg = (volatile unsigned int *) TPM0_SC_ADDR; //all bits set to 0 |
TimeString | 0:ba78bf4f69dc | 108 | value = *ptrMyReg; |
TimeString | 0:ba78bf4f69dc | 109 | return value; |
TimeString | 0:ba78bf4f69dc | 110 | */ |
TimeString | 0:ba78bf4f69dc | 111 | } |
TimeString | 0:ba78bf4f69dc | 112 | unsigned int TPM0_CNT_read() { |
TimeString | 0:ba78bf4f69dc | 113 | unsigned int CNT_value = TPM0->CNT; |
TimeString | 0:ba78bf4f69dc | 114 | return CNT_value; |
TimeString | 0:ba78bf4f69dc | 115 | /* |
TimeString | 0:ba78bf4f69dc | 116 | volatile unsigned int *ptrMyReg; |
TimeString | 0:ba78bf4f69dc | 117 | unsigned int value; |
TimeString | 0:ba78bf4f69dc | 118 | ptrMyReg = (volatile unsigned int *) TPM0_CNT_ADDR; //all bits set to 0 |
TimeString | 0:ba78bf4f69dc | 119 | value = *ptrMyReg; |
TimeString | 0:ba78bf4f69dc | 120 | return value; |
TimeString | 0:ba78bf4f69dc | 121 | */ |
TimeString | 0:ba78bf4f69dc | 122 | } |
TimeString | 0:ba78bf4f69dc | 123 | |
TimeString | 0:ba78bf4f69dc | 124 | void TPM0_clear_overflow() { |
TimeString | 0:ba78bf4f69dc | 125 | TPM0->SC |= TPM_SC_TOF_MASK; |
TimeString | 0:ba78bf4f69dc | 126 | /* |
TimeString | 0:ba78bf4f69dc | 127 | volatile unsigned int *ptrMyReg; |
TimeString | 0:ba78bf4f69dc | 128 | |
TimeString | 0:ba78bf4f69dc | 129 | ptrMyReg = (volatile unsigned int *) TPM0_SC_ADDR; //all bits set to 0 |
TimeString | 0:ba78bf4f69dc | 130 | *ptrMyReg = 0x000000C8; //bit[4:3]: 0x01, on every TPM counter clk |
TimeString | 0:ba78bf4f69dc | 131 | //*ptrMyReg = 0x00000088; //Debugging handler. Try disabling overflow interrupts |
TimeString | 0:ba78bf4f69dc | 132 | //*ptrMyReg = 0x00000050; //bit[4:3]: 0x10, on every rising edge of external .... |
TimeString | 0:ba78bf4f69dc | 133 | */ |
TimeString | 0:ba78bf4f69dc | 134 | } |
TimeString | 0:ba78bf4f69dc | 135 | |
TimeString | 0:ba78bf4f69dc | 136 | void TPM0_start() { |
TimeString | 0:ba78bf4f69dc | 137 | |
TimeString | 0:ba78bf4f69dc | 138 | TPM0->SC |= TPM_SC_CMOD(1); //Count on every TPM counter clk |
TimeString | 0:ba78bf4f69dc | 139 | /* |
TimeString | 0:ba78bf4f69dc | 140 | volatile unsigned int *ptrMyReg; |
TimeString | 0:ba78bf4f69dc | 141 | |
TimeString | 0:ba78bf4f69dc | 142 | ptrMyReg = (volatile unsigned int *) TPM0_SC_ADDR; //all bits set to 0 |
TimeString | 0:ba78bf4f69dc | 143 | *ptrMyReg = 0x00000048; //bit[4:3]: 0x01, on every TPM counter clk |
TimeString | 0:ba78bf4f69dc | 144 | */ |
TimeString | 0:ba78bf4f69dc | 145 | } |