Revision 34:bb6061527455, committed 2015-12-07

Comitter:

mbed_official

Date:

Mon Dec 07 08:00:11 2015 +0000

Parent:

33:7b49ef75af0b

Child:

35:cb6c51ca2109

Commit message:

Synchronized with git revision a41d1d6c02719cd8c7829637b5ae1832821b578f

Full URL: https://github.com/mbedmicro/mbed/commit/a41d1d6c02719cd8c7829637b5ae1832821b578f/

I2C fixes, timeout for startup ~100/200

Changed in this revision

--- a/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/system_stm32f0xx.c	Thu Dec 03 15:15:11 2015 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/system_stm32f0xx.c	Mon Dec 07 08:00:11 2015 +0000
@@ -117,7 +117,7 @@
   */
 
 /* Select the clock sources (other than HSI) to start with (0=OFF, 1=ON) */
-#define USE_PLL_HSE_EXTC (1) /* Use external clock */
+#define USE_PLL_HSE_EXTC (0) /* Use external clock */
 #define USE_PLL_HSE_XTAL (0) /* Use external xtal */
 
 /**

--- a/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/system_stm32f0xx.c	Thu Dec 03 15:15:11 2015 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/system_stm32f0xx.c	Mon Dec 07 08:00:11 2015 +0000
@@ -117,7 +117,7 @@
   */
 
 /* Select the clock sources (other than HSI) to start with (0=OFF, 1=ON) */
-#define USE_PLL_HSE_EXTC (1) /* Use external clock */
+#define USE_PLL_HSE_EXTC (0) /* Use external clock */
 #define USE_PLL_HSE_XTAL (0) /* Use external xtal */
 
 /**

--- a/targets/cmsis/TARGET_STM/TARGET_STM32F0/stm32f0xx_hal_conf.h	Thu Dec 03 15:15:11 2015 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32F0/stm32f0xx_hal_conf.h	Mon Dec 07 08:00:11 2015 +0000
@@ -93,7 +93,7 @@
   *        Timeout value 
   */
 #if !defined  (HSE_STARTUP_TIMEOUT)
-  #define HSE_STARTUP_TIMEOUT    ((uint32_t)500)   /*!< Time out for HSE start up, in ms */
+  #define HSE_STARTUP_TIMEOUT    ((uint32_t)200)   /*!< Time out for HSE start up, in ms */
 #endif /* HSE_STARTUP_TIMEOUT */
 
 /**
@@ -110,7 +110,7 @@
   *        Timeout value 
   */
 #if !defined  (HSI_STARTUP_TIMEOUT) 
- #define HSI_STARTUP_TIMEOUT   ((uint32_t)5000) /*!< Time out for HSI start up */
+ #define HSI_STARTUP_TIMEOUT   ((uint32_t)100) /*!< Time out for HSI start up */
 #endif /* HSI_STARTUP_TIMEOUT */  
 
 /**
@@ -147,7 +147,7 @@
 #endif /* LSE_VALUE */     
 
 #if !defined  (LSE_STARTUP_TIMEOUT)
- #define LSE_STARTUP_TIMEOUT    ((uint32_t)500)   /*!< Time out for LSE start up, in ms */
+ #define LSE_STARTUP_TIMEOUT    ((uint32_t)100)   /*!< Time out for LSE start up, in ms */
 #endif /* HSE_STARTUP_TIMEOUT */
 
 

--- a/targets/cmsis/TARGET_STM/TARGET_STM32F1/stm32f1xx_hal_conf.h	Thu Dec 03 15:15:11 2015 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32F1/stm32f1xx_hal_conf.h	Mon Dec 07 08:00:11 2015 +0000
@@ -99,7 +99,7 @@
 #endif /* HSE_VALUE */
 
 #if !defined  (HSE_STARTUP_TIMEOUT)
-  #define HSE_STARTUP_TIMEOUT    ((uint32_t)500)   /*!< Time out for HSE start up, in ms */
+  #define HSE_STARTUP_TIMEOUT    ((uint32_t)200)   /*!< Time out for HSE start up, in ms */
 #endif /* HSE_STARTUP_TIMEOUT */
 
 /**
@@ -121,7 +121,7 @@
 
    
 #if !defined  (LSE_STARTUP_TIMEOUT)
-  #define LSE_STARTUP_TIMEOUT    ((uint32_t)5000)   /*!< Time out for LSE start up, in ms */
+  #define LSE_STARTUP_TIMEOUT    ((uint32_t)100)   /*!< Time out for LSE start up, in ms */
 #endif /* HSE_STARTUP_TIMEOUT */
 
    

--- a/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/system_stm32f3xx.c	Thu Dec 03 15:15:11 2015 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/system_stm32f3xx.c	Mon Dec 07 08:00:11 2015 +0000
@@ -125,8 +125,8 @@
   */
 
 /* Select the clock sources (other than HSI) to start with (0=OFF, 1=ON) */
-#define USE_PLL_HSE_EXTC (1) /* Use external clock */
-#define USE_PLL_HSE_XTAL (1) /* Use external xtal */
+#define USE_PLL_HSE_EXTC (0) /* Use external clock */
+#define USE_PLL_HSE_XTAL (0) /* Use external xtal */
 
 /**
   * @}

--- a/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_conf.h	Thu Dec 03 15:15:11 2015 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_conf.h	Mon Dec 07 08:00:11 2015 +0000
@@ -100,7 +100,7 @@
   *        Timeout value 
   */
 #if !defined  (HSE_STARTUP_TIMEOUT)
-  #define HSE_STARTUP_TIMEOUT    ((uint32_t)500)   /*!< Time out for HSE start up, in ms */
+  #define HSE_STARTUP_TIMEOUT    ((uint32_t)200)   /*!< Time out for HSE start up, in ms */
 #endif /* HSE_STARTUP_TIMEOUT */
 
 /**
@@ -117,7 +117,7 @@
   *        Timeout value 
   */
 #if !defined  (HSI_STARTUP_TIMEOUT) 
- #define HSI_STARTUP_TIMEOUT   ((uint32_t)5000) /*!< Time out for HSI start up */
+ #define HSI_STARTUP_TIMEOUT   ((uint32_t)100) /*!< Time out for HSI start up */
 #endif /* HSI_STARTUP_TIMEOUT */  
 
 /**

--- a/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_rcc.h	Thu Dec 03 15:15:11 2015 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_rcc.h	Mon Dec 07 08:00:11 2015 +0000
@@ -164,7 +164,7 @@
   * @{
   */  
 /* LSE state change timeout */
-#define LSE_TIMEOUT_VALUE          ((uint32_t)5000) /* 5 s    */
+#define LSE_TIMEOUT_VALUE          ((uint32_t)100) /* 5 s    */
 
 /* Disable Backup domain write protection state change timeout */
 #define DBP_TIMEOUT_VALUE          ((uint32_t)100)  /* 100 ms */

--- a/targets/cmsis/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F746NG/stm32f7xx_hal_conf.h	Thu Dec 03 15:15:11 2015 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F746NG/stm32f7xx_hal_conf.h	Mon Dec 07 08:00:11 2015 +0000
@@ -106,7 +106,7 @@
 #endif /* HSE_VALUE */
 
 #if !defined  (HSE_STARTUP_TIMEOUT)
-  #define HSE_STARTUP_TIMEOUT    ((uint32_t)500)   /*!< Time out for HSE start up, in ms */
+  #define HSE_STARTUP_TIMEOUT    ((uint32_t)200)   /*!< Time out for HSE start up, in ms */
 #endif /* HSE_STARTUP_TIMEOUT */
 
 /**

--- a/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_conf.h	Thu Dec 03 15:15:11 2015 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_conf.h	Mon Dec 07 08:00:11 2015 +0000
@@ -94,7 +94,7 @@
 #endif /* HSE_VALUE */
 
 #if !defined  (HSE_STARTUP_TIMEOUT)
-  #define HSE_STARTUP_TIMEOUT    ((uint32_t)50)   /*!< Time out for HSE start up, in ms */
+  #define HSE_STARTUP_TIMEOUT    ((uint32_t)200)   /*!< Time out for HSE start up, in ms */
 #endif /* HSE_STARTUP_TIMEOUT */
 
 /**
@@ -123,7 +123,7 @@
 
    
 #if !defined  (LSE_STARTUP_TIMEOUT)
-  #define LSE_STARTUP_TIMEOUT    ((uint32_t)5000)   /*!< Time out for LSE start up, in ms */
+  #define LSE_STARTUP_TIMEOUT    ((uint32_t)100)   /*!< Time out for LSE start up, in ms */
 #endif /* HSE_STARTUP_TIMEOUT */
 
    

--- a/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/stm32l1xx_hal_conf.h	Thu Dec 03 15:15:11 2015 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/stm32l1xx_hal_conf.h	Mon Dec 07 08:00:11 2015 +0000
@@ -93,7 +93,7 @@
 #endif /* HSE_VALUE */
 
 #if !defined  (HSE_STARTUP_TIMEOUT)
-  #define HSE_STARTUP_TIMEOUT    ((uint32_t)500)   /*!< Time out for HSE start up, in ms */
+  #define HSE_STARTUP_TIMEOUT    ((uint32_t)200)   /*!< Time out for HSE start up, in ms */
 #endif /* HSE_STARTUP_TIMEOUT */
 
 /**
@@ -122,7 +122,7 @@
 
    
 #if !defined  (LSE_STARTUP_TIMEOUT)
-  #define LSE_STARTUP_TIMEOUT    ((uint32_t)5000)   /*!< Time out for LSE start up, in ms */
+  #define LSE_STARTUP_TIMEOUT    ((uint32_t)100)   /*!< Time out for LSE start up, in ms */
 #endif /* HSE_STARTUP_TIMEOUT */
 
    

--- a/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/stm32l1xx_hal_conf.h	Thu Dec 03 15:15:11 2015 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/stm32l1xx_hal_conf.h	Mon Dec 07 08:00:11 2015 +0000
@@ -93,7 +93,7 @@
 #endif /* HSE_VALUE */
 
 #if !defined  (HSE_STARTUP_TIMEOUT)
-  #define HSE_STARTUP_TIMEOUT    ((uint32_t)500)   /*!< Time out for HSE start up, in ms */
+  #define HSE_STARTUP_TIMEOUT    ((uint32_t)200)   /*!< Time out for HSE start up, in ms */
 #endif /* HSE_STARTUP_TIMEOUT */
 
 /**
@@ -122,7 +122,7 @@
 
    
 #if !defined  (LSE_STARTUP_TIMEOUT)
-  #define LSE_STARTUP_TIMEOUT    ((uint32_t)5000)   /*!< Time out for LSE start up, in ms */
+  #define LSE_STARTUP_TIMEOUT    ((uint32_t)100)   /*!< Time out for LSE start up, in ms */
 #endif /* HSE_STARTUP_TIMEOUT */
 
    

--- a/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NZ32SC151/stm32l1xx_hal_conf.h	Thu Dec 03 15:15:11 2015 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NZ32SC151/stm32l1xx_hal_conf.h	Mon Dec 07 08:00:11 2015 +0000
@@ -93,7 +93,7 @@
 #endif /* HSE_VALUE */
 
 #if !defined  (HSE_STARTUP_TIMEOUT)
-  #define HSE_STARTUP_TIMEOUT    ((uint32_t)500)   /*!< Time out for HSE start up, in ms */
+  #define HSE_STARTUP_TIMEOUT    ((uint32_t)200)   /*!< Time out for HSE start up, in ms */
 #endif /* HSE_STARTUP_TIMEOUT */
 
 /**
@@ -122,7 +122,7 @@
 
    
 #if !defined  (LSE_STARTUP_TIMEOUT)
-  #define LSE_STARTUP_TIMEOUT    ((uint32_t)5000)   /*!< Time out for LSE start up, in ms */
+  #define LSE_STARTUP_TIMEOUT    ((uint32_t)100)   /*!< Time out for LSE start up, in ms */
 #endif /* HSE_STARTUP_TIMEOUT */
 
    

--- a/targets/cmsis/TARGET_STM/TARGET_STM32L4/stm32l4xx_hal_conf.h	Thu Dec 03 15:15:11 2015 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32L4/stm32l4xx_hal_conf.h	Mon Dec 07 08:00:11 2015 +0000
@@ -142,7 +142,7 @@
 #endif /* LSE_VALUE */
 
 #if !defined  (LSE_STARTUP_TIMEOUT)
-  #define LSE_STARTUP_TIMEOUT    ((uint32_t)500)   /*!< Time out for LSE start up, in ms */
+  #define LSE_STARTUP_TIMEOUT    ((uint32_t)100)   /*!< Time out for LSE start up, in ms */
 #endif /* HSE_STARTUP_TIMEOUT */
 
 /**

--- a/targets/cmsis/TARGET_STM/TARGET_STM32L4/stm32l4xx_hal_rcc.h	Thu Dec 03 15:15:11 2015 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32L4/stm32l4xx_hal_rcc.h	Mon Dec 07 08:00:11 2015 +0000
@@ -159,7 +159,7 @@
   * @{
   */
 #define RCC_DBP_TIMEOUT_VALUE          ((uint32_t)100)
-#define RCC_LSE_TIMEOUT_VALUE          ((uint32_t)5000)
+#define RCC_LSE_TIMEOUT_VALUE          ((uint32_t)100)
 /**
   * @}
   */

--- a/targets/hal/TARGET_STM/TARGET_STM32F0/i2c_api.c	Thu Dec 03 15:15:11 2015 +0000
+++ b/targets/hal/TARGET_STM/TARGET_STM32F0/i2c_api.c	Mon Dec 07 08:00:11 2015 +0000
@@ -133,6 +133,14 @@
     // Clear Acknowledge failure flag
     __HAL_I2C_CLEAR_FLAG(&I2cHandle, I2C_FLAG_AF);
 
+    // Wait the STOP condition has been previously correctly sent
+    timeout = FLAG_TIMEOUT;
+    while ((i2c->CR2 & I2C_CR2_STOP) == I2C_CR2_STOP){
+        if ((timeout--) == 0) {
+            return 1;
+        }
+    }
+
     // Generate the START condition
     i2c->CR2 |= I2C_CR2_START;
 

--- a/targets/hal/TARGET_STM/TARGET_STM32F0/rtc_api.c	Thu Dec 03 15:15:11 2015 +0000
+++ b/targets/hal/TARGET_STM/TARGET_STM32F0/rtc_api.c	Mon Dec 07 08:00:11 2015 +0000
@@ -45,6 +45,9 @@
     rtc_inited = 1;
 
     RtcHandle.Instance = RTC;
+	
+    // Check if RTC is already initialized
+    if ((RTC->ISR & RTC_ISR_INITS) ==  RTC_ISR_INITS) return;
 
     // Enable Power clock
     __PWR_CLK_ENABLE();

--- a/targets/hal/TARGET_STM/TARGET_STM32F1/i2c_api.c	Thu Dec 03 15:15:11 2015 +0000
+++ b/targets/hal/TARGET_STM/TARGET_STM32F1/i2c_api.c	Mon Dec 07 08:00:11 2015 +0000
@@ -124,6 +124,15 @@
     // Clear Acknowledge failure flag
     __HAL_I2C_CLEAR_FLAG(&I2cHandle, I2C_FLAG_AF);
 
+    // Wait the STOP condition has been previously correctly sent
+	// This timeout can be avoid in some specific cases by simply clearing the STOP bit
+    timeout = FLAG_TIMEOUT;
+    while ((i2c->CR1 & I2C_CR1_STOP) == I2C_CR1_STOP) {
+        if ((timeout--) == 0) {
+            return 1;
+        }
+    }
+
     // Generate the START condition
     i2c->CR1 |= I2C_CR1_START;
 

--- a/targets/hal/TARGET_STM/TARGET_STM32F3/i2c_api.c	Thu Dec 03 15:15:11 2015 +0000
+++ b/targets/hal/TARGET_STM/TARGET_STM32F3/i2c_api.c	Mon Dec 07 08:00:11 2015 +0000
@@ -195,6 +195,14 @@
     // Clear Acknowledge failure flag
     __HAL_I2C_CLEAR_FLAG(&I2cHandle, I2C_FLAG_AF);
 
+    // Wait the STOP condition has been previously correctly sent
+    timeout = FLAG_TIMEOUT;
+    while ((i2c->CR2 & I2C_CR2_STOP) == I2C_CR2_STOP){
+        if ((timeout--) == 0) {
+            return 1;
+        }
+    }
+
     // Generate the START condition
     i2c->CR2 |= I2C_CR2_START;
 

--- a/targets/hal/TARGET_STM/TARGET_STM32F3/rtc_api.c	Thu Dec 03 15:15:11 2015 +0000
+++ b/targets/hal/TARGET_STM/TARGET_STM32F3/rtc_api.c	Mon Dec 07 08:00:11 2015 +0000
@@ -46,6 +46,9 @@
     rtc_inited = 1;
 
     RtcHandle.Instance = RTC;
+	
+    // Check if RTC is already initialized
+    if ((RTC->ISR & RTC_ISR_INITS) ==  RTC_ISR_INITS) return;
 
     // Enable Power clock
     __PWR_CLK_ENABLE();

--- a/targets/hal/TARGET_STM/TARGET_STM32F4/i2c_api.c	Thu Dec 03 15:15:11 2015 +0000
+++ b/targets/hal/TARGET_STM/TARGET_STM32F4/i2c_api.c	Mon Dec 07 08:00:11 2015 +0000
@@ -151,8 +151,17 @@
     // Clear Acknowledge failure flag
     __HAL_I2C_CLEAR_FLAG(&I2cHandle, I2C_FLAG_AF);
 
-    // Generate the START condition and remove an eventual pending STOP bit
-    i2c->CR1 = ((i2c->CR1 & ~I2C_CR1_STOP) | I2C_CR1_START);
+    // Wait the STOP condition has been previously correctly sent
+	// This timeout can be avoid in some specific cases by simply clearing the STOP bit
+    timeout = FLAG_TIMEOUT;
+    while ((i2c->CR1 & I2C_CR1_STOP) == I2C_CR1_STOP) {
+        if ((timeout--) == 0) {
+            return 1;
+        }
+    }
+
+    // Generate the START condition
+    i2c->CR1 |= I2C_CR1_START;
 
     // Wait the START condition has been correctly sent
     timeout = FLAG_TIMEOUT;

--- a/targets/hal/TARGET_STM/TARGET_STM32F4/rtc_api.c	Thu Dec 03 15:15:11 2015 +0000
+++ b/targets/hal/TARGET_STM/TARGET_STM32F4/rtc_api.c	Mon Dec 07 08:00:11 2015 +0000
@@ -46,6 +46,9 @@
     rtc_inited = 1;
 
     RtcHandle.Instance = RTC;
+	
+    // Check if RTC is already initialized
+    if ((RTC->ISR & RTC_ISR_INITS) ==  RTC_ISR_INITS) return;
 
     // Enable Power clock
     __PWR_CLK_ENABLE();

--- a/targets/hal/TARGET_STM/TARGET_STM32F7/i2c_api.c	Thu Dec 03 15:15:11 2015 +0000
+++ b/targets/hal/TARGET_STM/TARGET_STM32F7/i2c_api.c	Mon Dec 07 08:00:11 2015 +0000
@@ -183,6 +183,14 @@
     // Clear Acknowledge failure flag
     __HAL_I2C_CLEAR_FLAG(&I2cHandle, I2C_FLAG_AF);
 
+    // Wait the STOP condition has been previously correctly sent
+    timeout = FLAG_TIMEOUT;
+    while ((i2c->CR2 & I2C_CR2_STOP) == I2C_CR2_STOP){
+        if ((timeout--) == 0) {
+            return 1;
+        }
+    }
+
     // Generate the START condition
     i2c->CR2 |= I2C_CR2_START;
 

--- a/targets/hal/TARGET_STM/TARGET_STM32F7/rtc_api.c	Thu Dec 03 15:15:11 2015 +0000
+++ b/targets/hal/TARGET_STM/TARGET_STM32F7/rtc_api.c	Mon Dec 07 08:00:11 2015 +0000
@@ -40,7 +40,7 @@
     RCC_OscInitTypeDef RCC_OscInitStruct;
     uint32_t rtc_freq = 0;
 
-    if(RTC->ISR == 7) {     // RTC initialization and status register (RTC_ISR), cold start (with no backup domain power) RTC reset value
+    if((RTC->ISR & RTC_ISR_INITS) ==  RTC_ISR_INITS) {     // RTC initialization and status register (RTC_ISR), cold start (with no backup domain power) RTC reset value
 
         RtcHandle.Instance = RTC;
 

--- a/targets/hal/TARGET_STM/TARGET_STM32L0/TARGET_DISCO_L053C8/rtc_api.c	Thu Dec 03 15:15:11 2015 +0000
+++ b/targets/hal/TARGET_STM/TARGET_STM32L0/TARGET_DISCO_L053C8/rtc_api.c	Mon Dec 07 08:00:11 2015 +0000
@@ -54,6 +54,9 @@
     rtc_inited = 1;
 
     RtcHandle.Instance = RTC;
+	
+    // Check if RTC is already initialized
+    if ((RTC->ISR & RTC_ISR_INITS) ==  RTC_ISR_INITS) return;
 
     // Enable Power clock
     __PWR_CLK_ENABLE();

--- a/targets/hal/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L053R8/rtc_api.c	Thu Dec 03 15:15:11 2015 +0000
+++ b/targets/hal/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L053R8/rtc_api.c	Mon Dec 07 08:00:11 2015 +0000
@@ -46,6 +46,9 @@
     rtc_inited = 1;
 
     RtcHandle.Instance = RTC;
+	
+    // Check if RTC is already initialized
+    if ((RTC->ISR & RTC_ISR_INITS) ==  RTC_ISR_INITS) return;
 
     // Enable Power clock
     __PWR_CLK_ENABLE();

--- a/targets/hal/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/rtc_api.c	Thu Dec 03 15:15:11 2015 +0000
+++ b/targets/hal/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/rtc_api.c	Mon Dec 07 08:00:11 2015 +0000
@@ -46,6 +46,9 @@
     rtc_inited = 1;
 
     RtcHandle.Instance = RTC;
+	
+    // Check if RTC is already initialized
+    if ((RTC->ISR & RTC_ISR_INITS) ==  RTC_ISR_INITS) return;
 
     // Enable Power clock
     __PWR_CLK_ENABLE();

--- a/targets/hal/TARGET_STM/TARGET_STM32L0/i2c_api.c	Thu Dec 03 15:15:11 2015 +0000
+++ b/targets/hal/TARGET_STM/TARGET_STM32L0/i2c_api.c	Mon Dec 07 08:00:11 2015 +0000
@@ -152,6 +152,14 @@
     // Clear Acknowledge failure flag
     __HAL_I2C_CLEAR_FLAG(&I2cHandle, I2C_FLAG_AF);
 
+    // Wait the STOP condition has been previously correctly sent
+    timeout = FLAG_TIMEOUT;
+    while ((i2c->CR2 & I2C_CR2_STOP) == I2C_CR2_STOP){
+        if ((timeout--) == 0) {
+            return 1;
+        }
+    }
+
     // Generate the START condition
     i2c->CR2 |= I2C_CR2_START;
 

--- a/targets/hal/TARGET_STM/TARGET_STM32L1/i2c_api.c	Thu Dec 03 15:15:11 2015 +0000
+++ b/targets/hal/TARGET_STM/TARGET_STM32L1/i2c_api.c	Mon Dec 07 08:00:11 2015 +0000
@@ -124,6 +124,15 @@
     // Clear Acknowledge failure flag
     __HAL_I2C_CLEAR_FLAG(&I2cHandle, I2C_FLAG_AF);
 
+    // Wait the STOP condition has been previously correctly sent
+	// This timeout can be avoid in some specific cases by simply clearing the STOP bit
+    timeout = FLAG_TIMEOUT;
+    while ((i2c->CR1 & I2C_CR1_STOP) == I2C_CR1_STOP) {
+        if ((timeout--) == 0) {
+            return 1;
+        }
+    }
+
     // Generate the START condition
     i2c->CR1 |= I2C_CR1_START;
 

--- a/targets/hal/TARGET_STM/TARGET_STM32L1/rtc_api.c	Thu Dec 03 15:15:11 2015 +0000
+++ b/targets/hal/TARGET_STM/TARGET_STM32L1/rtc_api.c	Mon Dec 07 08:00:11 2015 +0000
@@ -46,6 +46,9 @@
     rtc_inited = 1;
 
     RtcHandle.Instance = RTC;
+	
+    // Check if RTC is already initialized
+    if ((RTC->ISR & RTC_ISR_INITS) ==  RTC_ISR_INITS) return;
 
     // Enable Power clock
     __PWR_CLK_ENABLE();

--- a/targets/hal/TARGET_STM/TARGET_STM32L4/i2c_api.c	Thu Dec 03 15:15:11 2015 +0000
+++ b/targets/hal/TARGET_STM/TARGET_STM32L4/i2c_api.c	Mon Dec 07 08:00:11 2015 +0000
@@ -152,6 +152,14 @@
     // Clear Acknowledge failure flag
     __HAL_I2C_CLEAR_FLAG(&I2cHandle, I2C_FLAG_AF);
 
+    // Wait the STOP condition has been previously correctly sent
+    timeout = FLAG_TIMEOUT;
+    while ((i2c->CR2 & I2C_CR2_STOP) == I2C_CR2_STOP){
+        if ((timeout--) == 0) {
+            return 1;
+        }
+    }
+
     // Generate the START condition
     i2c->CR2 |= I2C_CR2_START;
 

--- a/targets/hal/TARGET_STM/TARGET_STM32L4/rtc_api.c	Thu Dec 03 15:15:11 2015 +0000
+++ b/targets/hal/TARGET_STM/TARGET_STM32L4/rtc_api.c	Mon Dec 07 08:00:11 2015 +0000
@@ -48,6 +48,9 @@
 
     RtcHandle.Instance = RTC;
 
+    // Check if RTC is already initialized
+    if ((RTC->ISR & RTC_ISR_INITS) ==  RTC_ISR_INITS) return;
+
     // Enable Power clock
     __HAL_RCC_PWR_CLK_ENABLE();