Revision 22:9c52de9bc1d7, committed 2015-11-17

Comitter:

mbed_official

Date:

Tue Nov 17 10:15:10 2015 +0000

Parent:

21:37171f377a9e

Child:

23:ee8ca7052b3c

Commit message:

Synchronized with git revision 8c540341dd44e9b99388db7b8389d756a7103dfd

Full URL: https://github.com/mbedmicro/mbed/commit/8c540341dd44e9b99388db7b8389d756a7103dfd/

Bugfixes to EFM32 serial, spi and sleep HAL

Changed in this revision

--- a/targets/hal/TARGET_Silicon_Labs/TARGET_EFM32/serial_api.c	Thu Nov 12 13:30:10 2015 +0000
+++ b/targets/hal/TARGET_Silicon_Labs/TARGET_EFM32/serial_api.c	Tue Nov 17 10:15:10 2015 +0000
@@ -1693,14 +1693,14 @@
             }
         }else{
             if(obj->serial.periph.uart->IEN & USART_IEN_TXC){
-                USART_IntDisable(obj->serial.periph.leuart,USART_IEN_TXC);
+                USART_IntDisable(obj->serial.periph.uart,USART_IEN_TXC);
                 /* Clean up */
                 serial_dma_irq_fired[obj->serial.dmaOptionsTX.dmaChannel] = false;
                 serial_tx_abort_asynch(obj);
                 /* Notify CPP land of completion */
                 return SERIAL_EVENT_TX_COMPLETE & obj->serial.events;
             }else{
-                USART_IntEnable(obj->serial.periph.leuart,USART_IEN_TXC);
+                USART_IntEnable(obj->serial.periph.uart,USART_IEN_TXC);
             }
         }
     } else {

--- a/targets/hal/TARGET_Silicon_Labs/TARGET_EFM32/sleep.c	Thu Nov 12 13:30:10 2015 +0000
+++ b/targets/hal/TARGET_Silicon_Labs/TARGET_EFM32/sleep.c	Tue Nov 17 10:15:10 2015 +0000
@@ -41,10 +41,7 @@
 
 /**
  * Sleep mode.
- * Enter Energy Mode 1, which turns off the clock to the CPU.
- *
- * In EM1, the CPU is sleeping and the power consumption is only 50 μA/MHz.
- * All peripherals, including DMA, PRS and memory system, are still available.
+ * Enter the lowest possible sleep mode that is not blocked by ongoing activity.
  */
 void sleep(void)
 {
@@ -57,13 +54,10 @@
     } else if (sleep_block_counter[2] > 0) {
         /* Blocked everything below EM2, enter EM2 */
         EMU_EnterEM2(true);
-    } else if (sleep_block_counter[3] > 0) {
+    } else {
         /* Blocked everything below EM3, enter EM3 */
         EMU_EnterEM3(true);
-    } else{
-        /* Nothing is blocked, enter EM4 */
-        EMU_EnterEM4();
-    }
+    } /* Never enter EM4, as mbed has no way of configuring EM4 wakeup */
     return;
 }
 

--- a/targets/hal/TARGET_Silicon_Labs/TARGET_EFM32/spi_api.c	Thu Nov 12 13:30:10 2015 +0000
+++ b/targets/hal/TARGET_Silicon_Labs/TARGET_EFM32/spi_api.c	Tue Nov 17 10:15:10 2015 +0000
@@ -50,7 +50,7 @@
 static uint16_t fill_word = SPI_FILL_WORD;
 #define SPI_LEAST_ACTIVE_SLEEPMODE EM1
 
-inline CMU_Clock_TypeDef spi_get_clock_tree(spi_t *obj)
+static inline CMU_Clock_TypeDef spi_get_clock_tree(spi_t *obj)
 {
     switch ((int)obj->spi.spi) {
 #ifdef USART0
@@ -71,7 +71,7 @@
     }
 }
 
-inline uint8_t spi_get_index(spi_t *obj)
+static inline uint8_t spi_get_index(spi_t *obj)
 {
     uint8_t index = 0;
     switch ((int)obj->spi.spi) {
@@ -359,7 +359,6 @@
 
     /* Wait for transmission of last byte */
     while (!(obj->spi.spi->STATUS & USART_STATUS_TXC)) {
-        sleep(); // TODO_LP this might break other code, write should be separate from read?
     }
 
     return spi_read(obj);