Andrew Lindsay / MMA8451Q

A work in progress on an updated library

Dependents:   FRDM_N3110LCD test

Fork of MMA8451Q by Emilio Monti

MMA8451Q.cpp@6:e8bacad228f6, 2013-03-27 (annotated)

Committer:
SomeRandomBloke
Date:
Wed Mar 27 22:00:57 2013 +0000
Revision:
6:e8bacad228f6
Parent:
5:d813fe6c0c70 
updates

Who changed what in which revision?

UserRevisionLine numberNew contents of line
samux 1:d2630136d51e 1 /* Copyright (c) 2010-2011 mbed.org, MIT License
samux 1:d2630136d51e 2 *
samux 1:d2630136d51e 3 * Permission is hereby granted, free of charge, to any person obtaining a copy of this software
samux 1:d2630136d51e 4 * and associated documentation files (the "Software"), to deal in the Software without
samux 1:d2630136d51e 5 * restriction, including without limitation the rights to use, copy, modify, merge, publish,
samux 1:d2630136d51e 6 * distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the
samux 1:d2630136d51e 7 * Software is furnished to do so, subject to the following conditions:
samux 1:d2630136d51e 8 *
samux 1:d2630136d51e 9 * The above copyright notice and this permission notice shall be included in all copies or
samux 1:d2630136d51e 10 * substantial portions of the Software.
samux 1:d2630136d51e 11 *
samux 1:d2630136d51e 12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
samux 1:d2630136d51e 13 * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
samux 1:d2630136d51e 14 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
samux 1:d2630136d51e 15 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
samux 1:d2630136d51e 16 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
samux 1:d2630136d51e 17 */
samux 1:d2630136d51e 18
emilmont 0:6149091f755d 19 #include "MMA8451Q.h"
emilmont 0:6149091f755d 20
SomeRandomBloke 5:d813fe6c0c70 21 #define MMA_845XQ_CTRL_REG1 0x2A
SomeRandomBloke 5:d813fe6c0c70 22 #define MMA_845XQ_CTRL_REG1_VALUE_ACTIVE 0x01
SomeRandomBloke 5:d813fe6c0c70 23 #define MMA_845XQ_CTRL_REG1_VALUE_F_READ 0x02
SomeRandomBloke 5:d813fe6c0c70 24
SomeRandomBloke 5:d813fe6c0c70 25 #define MMA_845XQ_CTRL_REG2 0x2B
SomeRandomBloke 5:d813fe6c0c70 26 #define MMA_845XQ_CTRL_REG2_RESET 0x40
SomeRandomBloke 5:d813fe6c0c70 27
SomeRandomBloke 5:d813fe6c0c70 28 #define MMA_845XQ_PL_STATUS 0x10
SomeRandomBloke 5:d813fe6c0c70 29 #define MMA_845XQ_PL_CFG 0x11
SomeRandomBloke 5:d813fe6c0c70 30 #define MMA_845XQ_PL_EN 0x40
SomeRandomBloke 5:d813fe6c0c70 31
SomeRandomBloke 5:d813fe6c0c70 32 #define MMA_845XQ_XYZ_DATA_CFG 0x0E
SomeRandomBloke 5:d813fe6c0c70 33 #define MMA_845XQ_2G_MODE 0x00 //Set Sensitivity to 2g
SomeRandomBloke 5:d813fe6c0c70 34 #define MMA_845XQ_4G_MODE 0x01 //Set Sensitivity to 4g
SomeRandomBloke 5:d813fe6c0c70 35 #define MMA_845XQ_8G_MODE 0x02 //Set Sensitivity to 8g
SomeRandomBloke 5:d813fe6c0c70 36 #define MMA_845XQ_HPF_OUT 0x10 //Set High pas filter out
SomeRandomBloke 5:d813fe6c0c70 37
SomeRandomBloke 5:d813fe6c0c70 38
SomeRandomBloke 5:d813fe6c0c70 39 #define MMA_845XQ_FF_MT_CFG 0x15
SomeRandomBloke 5:d813fe6c0c70 40 #define MMA_845XQ_FF_MT_CFG_ELE 0x80
SomeRandomBloke 5:d813fe6c0c70 41 #define MMA_845XQ_FF_MT_CFG_OAE 0x40
SomeRandomBloke 5:d813fe6c0c70 42
SomeRandomBloke 5:d813fe6c0c70 43 #define MMA_845XQ_FF_MT_SRC 0x16
SomeRandomBloke 5:d813fe6c0c70 44 #define MMA_845XQ_FF_MT_SRC_EA 0x80
SomeRandomBloke 5:d813fe6c0c70 45
SomeRandomBloke 5:d813fe6c0c70 46 #define MMA_845XQ_PULSE_CFG 0x21
SomeRandomBloke 5:d813fe6c0c70 47 #define MMA_845XQ_PULSE_CFG_ELE 0x80
SomeRandomBloke 5:d813fe6c0c70 48
SomeRandomBloke 5:d813fe6c0c70 49 #define MMA_845XQ_PULSE_SRC 0x22
SomeRandomBloke 5:d813fe6c0c70 50 #define MMA_845XQ_PULSE_SRC_EA 0x80
SomeRandomBloke 5:d813fe6c0c70 51
SomeRandomBloke 5:d813fe6c0c70 52 // Original
samux 1:d2630136d51e 53 #define REG_WHO_AM_I 0x0D
samux 1:d2630136d51e 54 #define REG_CTRL_REG_1 0x2A
emilmont 0:6149091f755d 55 #define REG_OUT_X_MSB 0x01
emilmont 0:6149091f755d 56 #define REG_OUT_Y_MSB 0x03
emilmont 0:6149091f755d 57 #define REG_OUT_Z_MSB 0x05
emilmont 0:6149091f755d 58
samux 1:d2630136d51e 59 #define UINT14_MAX 16383
emilmont 0:6149091f755d 60
SomeRandomBloke 5:d813fe6c0c70 61 MMA8451Q::MMA8451Q(PinName sda, PinName scl, int addr, bool highres, uint8_t scale) : m_i2c(sda, scl), m_addr(addr)
SomeRandomBloke 5:d813fe6c0c70 62 {
SomeRandomBloke 5:d813fe6c0c70 63 _highres = highres;
SomeRandomBloke 5:d813fe6c0c70 64 _scale = scale;
SomeRandomBloke 5:d813fe6c0c70 65 _step_factor = (_highres ? 0.0039 : 0.0156); // Base value at 2g setting
SomeRandomBloke 5:d813fe6c0c70 66 if( _scale == 4 )
SomeRandomBloke 5:d813fe6c0c70 67 _step_factor *= 2;
SomeRandomBloke 5:d813fe6c0c70 68 else if (_scale == 8)
SomeRandomBloke 5:d813fe6c0c70 69 _step_factor *= 4;
SomeRandomBloke 5:d813fe6c0c70 70
SomeRandomBloke 5:d813fe6c0c70 71 // Set parameters
SomeRandomBloke 5:d813fe6c0c70 72 uint8_t data[2] = {REG_CTRL_REG_1, 0x04};
samux 1:d2630136d51e 73 writeRegs(data, 2);
SomeRandomBloke 5:d813fe6c0c70 74
SomeRandomBloke 5:d813fe6c0c70 75 // Activate
SomeRandomBloke 5:d813fe6c0c70 76 data[1] = 0x05;
SomeRandomBloke 5:d813fe6c0c70 77 writeRegs(data, 2);
SomeRandomBloke 5:d813fe6c0c70 78
SomeRandomBloke 5:d813fe6c0c70 79 data[0] = MMA_845XQ_XYZ_DATA_CFG;
SomeRandomBloke 5:d813fe6c0c70 80 if (_scale == 4 || _scale == 8)
SomeRandomBloke 5:d813fe6c0c70 81 data[1] = (_scale == 4) ? MMA_845XQ_4G_MODE : MMA_845XQ_8G_MODE;
SomeRandomBloke 5:d813fe6c0c70 82 else // Default to 2g mode
SomeRandomBloke 5:d813fe6c0c70 83 data[1] = (uint8_t)MMA_845XQ_2G_MODE;
SomeRandomBloke 5:d813fe6c0c70 84
SomeRandomBloke 5:d813fe6c0c70 85 // data[1] |= MMA_845XQ_HPF_OUT;
SomeRandomBloke 5:d813fe6c0c70 86 writeRegs(data, 2);
emilmont 0:6149091f755d 87 }
emilmont 0:6149091f755d 88
emilmont 0:6149091f755d 89 MMA8451Q::~MMA8451Q() { }
emilmont 0:6149091f755d 90
SomeRandomBloke 5:d813fe6c0c70 91 uint8_t MMA8451Q::getWhoAmI()
SomeRandomBloke 5:d813fe6c0c70 92 {
emilmont 0:6149091f755d 93 uint8_t who_am_i = 0;
samux 1:d2630136d51e 94 readRegs(REG_WHO_AM_I, &who_am_i, 1);
emilmont 0:6149091f755d 95 return who_am_i;
emilmont 0:6149091f755d 96 }
emilmont 0:6149091f755d 97
SomeRandomBloke 5:d813fe6c0c70 98 float MMA8451Q::getAccX()
SomeRandomBloke 5:d813fe6c0c70 99 {
SomeRandomBloke 5:d813fe6c0c70 100 // return (getAccAxis(REG_OUT_X_MSB));
chris 3:db7126dbd63f 101 return (float(getAccAxis(REG_OUT_X_MSB))/4096.0);
emilmont 0:6149091f755d 102 }
emilmont 0:6149091f755d 103
SomeRandomBloke 5:d813fe6c0c70 104 float MMA8451Q::getAccY()
SomeRandomBloke 5:d813fe6c0c70 105 {
SomeRandomBloke 5:d813fe6c0c70 106 // return (getAccAxis(REG_OUT_Y_MSB));
chris 3:db7126dbd63f 107 return (float(getAccAxis(REG_OUT_Y_MSB))/4096.0);
emilmont 0:6149091f755d 108 }
emilmont 0:6149091f755d 109
SomeRandomBloke 5:d813fe6c0c70 110 float MMA8451Q::getAccZ()
SomeRandomBloke 5:d813fe6c0c70 111 {
SomeRandomBloke 5:d813fe6c0c70 112 // return (getAccAxis(REG_OUT_Z_MSB));
chris 3:db7126dbd63f 113 return (float(getAccAxis(REG_OUT_Z_MSB))/4096.0);
emilmont 0:6149091f755d 114 }
emilmont 0:6149091f755d 115
SomeRandomBloke 5:d813fe6c0c70 116 void MMA8451Q::getAccAllAxis(float * res)
SomeRandomBloke 5:d813fe6c0c70 117 {
emilmont 0:6149091f755d 118 res[0] = getAccX();
emilmont 0:6149091f755d 119 res[1] = getAccY();
emilmont 0:6149091f755d 120 res[2] = getAccZ();
emilmont 0:6149091f755d 121 }
emilmont 0:6149091f755d 122
SomeRandomBloke 5:d813fe6c0c70 123 float MMA8451Q::getAccAxisF(uint8_t addr)
SomeRandomBloke 5:d813fe6c0c70 124 {
emilmont 0:6149091f755d 125 int16_t acc;
SomeRandomBloke 6:e8bacad228f6 126 // float facc;
emilmont 0:6149091f755d 127 uint8_t res[2];
samux 1:d2630136d51e 128 readRegs(addr, res, 2);
emilmont 0:6149091f755d 129
emilmont 0:6149091f755d 130 acc = (res[0] << 6) | (res[1] >> 2);
emilmont 0:6149091f755d 131 if (acc > UINT14_MAX/2)
emilmont 0:6149091f755d 132 acc -= UINT14_MAX;
SomeRandomBloke 5:d813fe6c0c70 133 return (acc * 4096.0);
SomeRandomBloke 5:d813fe6c0c70 134 /*
SomeRandomBloke 5:d813fe6c0c70 135 if(_highres)
SomeRandomBloke 5:d813fe6c0c70 136 {
SomeRandomBloke 5:d813fe6c0c70 137 acc = (int16_t)(res[0] << 8) + res[1];
SomeRandomBloke 5:d813fe6c0c70 138 facc = (acc / 64) * _step_factor;
SomeRandomBloke 5:d813fe6c0c70 139 }
SomeRandomBloke 5:d813fe6c0c70 140 else
SomeRandomBloke 5:d813fe6c0c70 141 {
SomeRandomBloke 5:d813fe6c0c70 142 facc = (float)((int16_t)(res[0] * _step_factor) * 1.0);
SomeRandomBloke 5:d813fe6c0c70 143 }
SomeRandomBloke 5:d813fe6c0c70 144 return acc;
SomeRandomBloke 5:d813fe6c0c70 145 */
SomeRandomBloke 5:d813fe6c0c70 146 }
emilmont 0:6149091f755d 147
SomeRandomBloke 5:d813fe6c0c70 148 int16_t MMA8451Q::getAccAxis(uint8_t addr)
SomeRandomBloke 5:d813fe6c0c70 149 {
SomeRandomBloke 5:d813fe6c0c70 150 int16_t acc;
SomeRandomBloke 5:d813fe6c0c70 151 uint8_t res[2];
SomeRandomBloke 5:d813fe6c0c70 152 readRegs(addr, res, 2);
SomeRandomBloke 5:d813fe6c0c70 153
SomeRandomBloke 5:d813fe6c0c70 154 // acc = (res[0] << 6) | (res[1] >> 2);
SomeRandomBloke 5:d813fe6c0c70 155 acc = (res[0] << 8) | (res[1]);
SomeRandomBloke 5:d813fe6c0c70 156 acc = acc >> 2;
SomeRandomBloke 5:d813fe6c0c70 157 // if (acc > UINT14_MAX/2)
SomeRandomBloke 5:d813fe6c0c70 158 // acc -= UINT14_MAX;
emilmont 0:6149091f755d 159 return acc;
emilmont 0:6149091f755d 160 }
emilmont 0:6149091f755d 161
SomeRandomBloke 5:d813fe6c0c70 162 void MMA8451Q::readRegs(int addr, uint8_t * data, int len)
SomeRandomBloke 5:d813fe6c0c70 163 {
emilmont 0:6149091f755d 164 char t[1] = {addr};
emilmont 0:6149091f755d 165 m_i2c.write(m_addr, t, 1, true);
emilmont 0:6149091f755d 166 m_i2c.read(m_addr, (char *)data, len);
emilmont 0:6149091f755d 167 }
emilmont 0:6149091f755d 168
SomeRandomBloke 5:d813fe6c0c70 169 void MMA8451Q::writeRegs(uint8_t * data, int len)
SomeRandomBloke 5:d813fe6c0c70 170 {
emilmont 0:6149091f755d 171 m_i2c.write(m_addr, (char *)data, len);
emilmont 0:6149091f755d 172 }