Class similar to InterruptIn which allows the LPC1114 to wake from deepsleep. (For other targets you can use InterruptIn).

Dependents:   WakeUp WakeUp WakeUp WakeUp ... more

Committer:
Sissors
Date:
Mon Jul 28 06:14:48 2014 +0000
Revision:
1:128f3fe79240
Parent:
0:d726461bd0af
Added include guards + only include it on correct targets (allows for re-using it in other libraries)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Sissors 1:128f3fe79240 1 #ifdef TARGET_LPC11XX_11CXX
Sissors 1:128f3fe79240 2
Sissors 0:d726461bd0af 3 #include "WakeInterruptIn.h"
Sissors 0:d726461bd0af 4
Sissors 0:d726461bd0af 5 WakeInterruptIn* WakeInterruptIn::objects[NUM_CHANNEL] = {0};
Sissors 0:d726461bd0af 6
Sissors 0:d726461bd0af 7 WakeInterruptIn::WakeInterruptIn(PinName pin) : DigitalIn(pin)
Sissors 0:d726461bd0af 8 {
Sissors 0:d726461bd0af 9 if (pin < P1_0)
Sissors 0:d726461bd0af 10 channel = (pin >> PIN_SHIFT) & 0xF;
Sissors 0:d726461bd0af 11 else if (pin == P1_0)
Sissors 0:d726461bd0af 12 channel = 12;
Sissors 0:d726461bd0af 13 else
Sissors 0:d726461bd0af 14 error("Pin is not valid for WakeInterruptIn");
Sissors 0:d726461bd0af 15
Sissors 0:d726461bd0af 16 objects[channel] = this;
Sissors 0:d726461bd0af 17 switch (channel) {
Sissors 0:d726461bd0af 18 case 0:
Sissors 0:d726461bd0af 19 NVIC_SetVector((IRQn_Type)channel, (uint32_t)handler0);
Sissors 0:d726461bd0af 20 break;
Sissors 0:d726461bd0af 21 case 1:
Sissors 0:d726461bd0af 22 NVIC_SetVector((IRQn_Type)channel, (uint32_t)handler1);
Sissors 0:d726461bd0af 23 break;
Sissors 0:d726461bd0af 24 case 2:
Sissors 0:d726461bd0af 25 NVIC_SetVector((IRQn_Type)channel, (uint32_t)handler2);
Sissors 0:d726461bd0af 26 break;
Sissors 0:d726461bd0af 27 case 3:
Sissors 0:d726461bd0af 28 NVIC_SetVector((IRQn_Type)channel, (uint32_t)handler3);
Sissors 0:d726461bd0af 29 break;
Sissors 0:d726461bd0af 30 case 4:
Sissors 0:d726461bd0af 31 NVIC_SetVector((IRQn_Type)channel, (uint32_t)handler4);
Sissors 0:d726461bd0af 32 break;
Sissors 0:d726461bd0af 33 case 5:
Sissors 0:d726461bd0af 34 NVIC_SetVector((IRQn_Type)channel, (uint32_t)handler5);
Sissors 0:d726461bd0af 35 break;
Sissors 0:d726461bd0af 36 case 6:
Sissors 0:d726461bd0af 37 NVIC_SetVector((IRQn_Type)channel, (uint32_t)handler6);
Sissors 0:d726461bd0af 38 break;
Sissors 0:d726461bd0af 39 case 7:
Sissors 0:d726461bd0af 40 NVIC_SetVector((IRQn_Type)channel, (uint32_t)handler7);
Sissors 0:d726461bd0af 41 break;
Sissors 0:d726461bd0af 42 case 8:
Sissors 0:d726461bd0af 43 NVIC_SetVector((IRQn_Type)channel, (uint32_t)handler8);
Sissors 0:d726461bd0af 44 break;
Sissors 0:d726461bd0af 45 case 9:
Sissors 0:d726461bd0af 46 NVIC_SetVector((IRQn_Type)channel, (uint32_t)handler9);
Sissors 0:d726461bd0af 47 break;
Sissors 0:d726461bd0af 48 case 10:
Sissors 0:d726461bd0af 49 NVIC_SetVector((IRQn_Type)channel, (uint32_t)handler10);
Sissors 0:d726461bd0af 50 break;
Sissors 0:d726461bd0af 51 case 11:
Sissors 0:d726461bd0af 52 NVIC_SetVector((IRQn_Type)channel, (uint32_t)handler11);
Sissors 0:d726461bd0af 53 break;
Sissors 0:d726461bd0af 54 case 12:
Sissors 0:d726461bd0af 55 NVIC_SetVector((IRQn_Type)channel, (uint32_t)handler12);
Sissors 0:d726461bd0af 56 break;
Sissors 0:d726461bd0af 57 }
Sissors 0:d726461bd0af 58 }
Sissors 1:128f3fe79240 59
Sissors 1:128f3fe79240 60 #endif