Sim mbed
spilcd.h@0:304c871df0a8, 2009-12-06 (annotated)
- Committer:
- Sim
- Date:
- Sun Dec 06 16:28:01 2009 +0000
- Revision:
- 0:304c871df0a8
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| Sim | 0:304c871df0a8 | 1 | // AD-12684-SPI control class |
| Sim | 0:304c871df0a8 | 2 | // version 0.1 |
| Sim | 0:304c871df0a8 | 3 | // created by Sim (http://mbed.org/users/Sim/) |
| Sim | 0:304c871df0a8 | 4 | // |
| Sim | 0:304c871df0a8 | 5 | // About AD-12864-SPI, see http://www.aitendo.co.jp/product/1622 . |
| Sim | 0:304c871df0a8 | 6 | |
| Sim | 0:304c871df0a8 | 7 | #ifndef __SPILCD_H__ |
| Sim | 0:304c871df0a8 | 8 | #define __SPILCD_H__ |
| Sim | 0:304c871df0a8 | 9 | |
| Sim | 0:304c871df0a8 | 10 | #include "mbed.h" |
| Sim | 0:304c871df0a8 | 11 | |
| Sim | 0:304c871df0a8 | 12 | class SPILCD { |
| Sim | 0:304c871df0a8 | 13 | private: |
| Sim | 0:304c871df0a8 | 14 | DigitalOut cs, rst, a0; |
| Sim | 0:304c871df0a8 | 15 | SPI spi; |
| Sim | 0:304c871df0a8 | 16 | |
| Sim | 0:304c871df0a8 | 17 | // boot up sequence |
| Sim | 0:304c871df0a8 | 18 | void init(){ |
| Sim | 0:304c871df0a8 | 19 | spi.format(8,0); // nazo |
| Sim | 0:304c871df0a8 | 20 | spi.frequency(20000000); // modify later |
| Sim | 0:304c871df0a8 | 21 | |
| Sim | 0:304c871df0a8 | 22 | // reset |
| Sim | 0:304c871df0a8 | 23 | wait_ms(10); |
| Sim | 0:304c871df0a8 | 24 | rst = 0; |
| Sim | 0:304c871df0a8 | 25 | wait_us(1); |
| Sim | 0:304c871df0a8 | 26 | rst = 1; |
| Sim | 0:304c871df0a8 | 27 | wait_us(1); |
| Sim | 0:304c871df0a8 | 28 | |
| Sim | 0:304c871df0a8 | 29 | // initialize sequence |
| Sim | 0:304c871df0a8 | 30 | cmd(0xa2); // (11) LCD Bias Set ... 1/9 bias (see 2.4.11) |
| Sim | 0:304c871df0a8 | 31 | cmd(0xa0); // (8) ADC Select ... normal (see 2.4.8) |
| Sim | 0:304c871df0a8 | 32 | cmd(0xc8); // (15) Common Output Mode Select ... Reverse (see 2.4.15) |
| Sim | 0:304c871df0a8 | 33 | cmd(0x24); // (17) V5 Volatge Regulator Internal Resister Ratio Set (see 2.4.17) |
| Sim | 0:304c871df0a8 | 34 | cmd(0x81); // (18) set electronic volume mode (see 2.4.18) |
| Sim | 0:304c871df0a8 | 35 | cmd(0x1e); // electronic volume data 00-3f ... control your own value |
| Sim | 0:304c871df0a8 | 36 | cmd(0x2f); // (16) power control set (see 2.4.16) |
| Sim | 0:304c871df0a8 | 37 | cmd(0x40); // (2) Display Start Line Set ... 0 (see 2.4.2) |
| Sim | 0:304c871df0a8 | 38 | cmd(0xe0); // (6) Write Mode Set |
| Sim | 0:304c871df0a8 | 39 | cmd(0xaf); // (1) display on (see 2.4.1) |
| Sim | 0:304c871df0a8 | 40 | } |
| Sim | 0:304c871df0a8 | 41 | |
| Sim | 0:304c871df0a8 | 42 | public: |
| Sim | 0:304c871df0a8 | 43 | |
| Sim | 0:304c871df0a8 | 44 | // constructor |
| Sim | 0:304c871df0a8 | 45 | SPILCD(PinName cs_pin, PinName rst_pin, PinName a0_pin, PinName mosi_pin, PinName miso_pin, PinName sclk_pin) |
| Sim | 0:304c871df0a8 | 46 | : cs(cs_pin), rst(rst_pin), a0(a0_pin), spi(mosi_pin, miso_pin, sclk_pin) { |
| Sim | 0:304c871df0a8 | 47 | |
| Sim | 0:304c871df0a8 | 48 | init(); |
| Sim | 0:304c871df0a8 | 49 | cls(); |
| Sim | 0:304c871df0a8 | 50 | } |
| Sim | 0:304c871df0a8 | 51 | |
| Sim | 0:304c871df0a8 | 52 | // wipe all screen |
| Sim | 0:304c871df0a8 | 53 | void cls(void){ |
| Sim | 0:304c871df0a8 | 54 | int x, y; |
| Sim | 0:304c871df0a8 | 55 | for(y = 0; y < 8; y++){ |
| Sim | 0:304c871df0a8 | 56 | moveto(0, y); |
| Sim | 0:304c871df0a8 | 57 | for(x = 0; x < 128; x++) write(0x00); |
| Sim | 0:304c871df0a8 | 58 | } |
| Sim | 0:304c871df0a8 | 59 | moveto(0, 0); |
| Sim | 0:304c871df0a8 | 60 | } |
| Sim | 0:304c871df0a8 | 61 | |
| Sim | 0:304c871df0a8 | 62 | // move position to (x, 8 * y) |
| Sim | 0:304c871df0a8 | 63 | void moveto(int x, int y){ |
| Sim | 0:304c871df0a8 | 64 | cmd(0xb0 | (y & 0x0f)); // Page Address Set (see 2.4.3) |
| Sim | 0:304c871df0a8 | 65 | cmd(0x10 | (x >> 4 & 0x0f)); // Column Address Set (see 2.4.4) |
| Sim | 0:304c871df0a8 | 66 | cmd(x & 0x0f); |
| Sim | 0:304c871df0a8 | 67 | } |
| Sim | 0:304c871df0a8 | 68 | |
| Sim | 0:304c871df0a8 | 69 | // write command |
| Sim | 0:304c871df0a8 | 70 | void cmd(unsigned char c){ |
| Sim | 0:304c871df0a8 | 71 | cs = a0 = 0; |
| Sim | 0:304c871df0a8 | 72 | spi.write(c); |
| Sim | 0:304c871df0a8 | 73 | cs = 1; |
| Sim | 0:304c871df0a8 | 74 | } |
| Sim | 0:304c871df0a8 | 75 | |
| Sim | 0:304c871df0a8 | 76 | // write data |
| Sim | 0:304c871df0a8 | 77 | void write(unsigned char c){ |
| Sim | 0:304c871df0a8 | 78 | cs = 0; |
| Sim | 0:304c871df0a8 | 79 | a0 = 1; |
| Sim | 0:304c871df0a8 | 80 | spi.write(c); |
| Sim | 0:304c871df0a8 | 81 | cs = 1; |
| Sim | 0:304c871df0a8 | 82 | } |
| Sim | 0:304c871df0a8 | 83 | }; |
| Sim | 0:304c871df0a8 | 84 | |
| Sim | 0:304c871df0a8 | 85 | #endif |