Unyte Logo Animation (growing leaf in 6 frames)
Dependencies: unytelogo BLE_API USBDevice mbed
Fork of mbed-os-example-mbed5-blinky by
clkman.h@32:d1c11d170f0e, 2017-07-18 (annotated)
- Committer:
- SamShiSS
- Date:
- Tue Jul 18 14:49:16 2017 +0000
- Revision:
- 32:d1c11d170f0e
Unyte logo animation (growing leaf)
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| SamShiSS | 32:d1c11d170f0e | 1 | /******************************************************************************* |
| SamShiSS | 32:d1c11d170f0e | 2 | * Copyright (C) 2014 Maxim Integrated Products, Inc., All Rights Reserved. |
| SamShiSS | 32:d1c11d170f0e | 3 | * |
| SamShiSS | 32:d1c11d170f0e | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| SamShiSS | 32:d1c11d170f0e | 5 | * copy of this software and associated documentation files (the "Software"), |
| SamShiSS | 32:d1c11d170f0e | 6 | * to deal in the Software without restriction, including without limitation |
| SamShiSS | 32:d1c11d170f0e | 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| SamShiSS | 32:d1c11d170f0e | 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| SamShiSS | 32:d1c11d170f0e | 9 | * Software is furnished to do so, subject to the following conditions: |
| SamShiSS | 32:d1c11d170f0e | 10 | * |
| SamShiSS | 32:d1c11d170f0e | 11 | * The above copyright notice and this permission notice shall be included |
| SamShiSS | 32:d1c11d170f0e | 12 | * in all copies or substantial portions of the Software. |
| SamShiSS | 32:d1c11d170f0e | 13 | * |
| SamShiSS | 32:d1c11d170f0e | 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
| SamShiSS | 32:d1c11d170f0e | 15 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| SamShiSS | 32:d1c11d170f0e | 16 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
| SamShiSS | 32:d1c11d170f0e | 17 | * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES |
| SamShiSS | 32:d1c11d170f0e | 18 | * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| SamShiSS | 32:d1c11d170f0e | 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| SamShiSS | 32:d1c11d170f0e | 20 | * OTHER DEALINGS IN THE SOFTWARE. |
| SamShiSS | 32:d1c11d170f0e | 21 | * |
| SamShiSS | 32:d1c11d170f0e | 22 | * Except as contained in this notice, the name of Maxim Integrated |
| SamShiSS | 32:d1c11d170f0e | 23 | * Products, Inc. shall not be used except as stated in the Maxim Integrated |
| SamShiSS | 32:d1c11d170f0e | 24 | * Products, Inc. Branding Policy. |
| SamShiSS | 32:d1c11d170f0e | 25 | * |
| SamShiSS | 32:d1c11d170f0e | 26 | * The mere transfer of this software does not imply any licenses |
| SamShiSS | 32:d1c11d170f0e | 27 | * of trade secrets, proprietary technology, copyrights, patents, |
| SamShiSS | 32:d1c11d170f0e | 28 | * trademarks, maskwork rights, or any other form of intellectual |
| SamShiSS | 32:d1c11d170f0e | 29 | * property whatsoever. Maxim Integrated Products, Inc. retains all |
| SamShiSS | 32:d1c11d170f0e | 30 | * ownership rights. |
| SamShiSS | 32:d1c11d170f0e | 31 | ******************************************************************************* |
| SamShiSS | 32:d1c11d170f0e | 32 | */ |
| SamShiSS | 32:d1c11d170f0e | 33 | |
| SamShiSS | 32:d1c11d170f0e | 34 | /* $Revision: 3581 $ $Date: 2014-11-18 11:46:39 -0600 (Tue, 18 Nov 2014) $ */ |
| SamShiSS | 32:d1c11d170f0e | 35 | |
| SamShiSS | 32:d1c11d170f0e | 36 | #ifndef _CLKMAN_H |
| SamShiSS | 32:d1c11d170f0e | 37 | #define _CLKMAN_H |
| SamShiSS | 32:d1c11d170f0e | 38 | |
| SamShiSS | 32:d1c11d170f0e | 39 | #include "clkman_regs.h" |
| SamShiSS | 32:d1c11d170f0e | 40 | #include "adc_regs.h" |
| SamShiSS | 32:d1c11d170f0e | 41 | |
| SamShiSS | 32:d1c11d170f0e | 42 | /** |
| SamShiSS | 32:d1c11d170f0e | 43 | * @file clkman.h |
| SamShiSS | 32:d1c11d170f0e | 44 | * @addtogroup clkman CLKMAN |
| SamShiSS | 32:d1c11d170f0e | 45 | * @{ |
| SamShiSS | 32:d1c11d170f0e | 46 | * @brief This is the high level API for the clock management module |
| SamShiSS | 32:d1c11d170f0e | 47 | * of the MAX32600 family of ARM Cortex based embedded microcontrollers. |
| SamShiSS | 32:d1c11d170f0e | 48 | */ |
| SamShiSS | 32:d1c11d170f0e | 49 | |
| SamShiSS | 32:d1c11d170f0e | 50 | /** |
| SamShiSS | 32:d1c11d170f0e | 51 | * @brief Selects an internal module clock for clock scaling configuration. |
| SamShiSS | 32:d1c11d170f0e | 52 | */ |
| SamShiSS | 32:d1c11d170f0e | 53 | typedef enum { |
| SamShiSS | 32:d1c11d170f0e | 54 | /** Main System clock */ |
| SamShiSS | 32:d1c11d170f0e | 55 | MXC_E_CLKMAN_CLK_SYS = 0, |
| SamShiSS | 32:d1c11d170f0e | 56 | /** GPIO module clock */ |
| SamShiSS | 32:d1c11d170f0e | 57 | MXC_E_CLKMAN_CLK_GPIO, |
| SamShiSS | 32:d1c11d170f0e | 58 | /** Pulse Train engine clock */ |
| SamShiSS | 32:d1c11d170f0e | 59 | MXC_E_CLKMAN_CLK_PT, |
| SamShiSS | 32:d1c11d170f0e | 60 | /** SPI instance 0 module clock */ |
| SamShiSS | 32:d1c11d170f0e | 61 | MXC_E_CLKMAN_CLK_SPI0, |
| SamShiSS | 32:d1c11d170f0e | 62 | /** SPI instance 1 module clock */ |
| SamShiSS | 32:d1c11d170f0e | 63 | MXC_E_CLKMAN_CLK_SPI1, |
| SamShiSS | 32:d1c11d170f0e | 64 | /** SPI instance 2 module clock */ |
| SamShiSS | 32:d1c11d170f0e | 65 | MXC_E_CLKMAN_CLK_SPI2, |
| SamShiSS | 32:d1c11d170f0e | 66 | /** I2C Master module clock (for all instances) */ |
| SamShiSS | 32:d1c11d170f0e | 67 | MXC_E_CLKMAN_CLK_I2CM, |
| SamShiSS | 32:d1c11d170f0e | 68 | /** I2C Slave module clock */ |
| SamShiSS | 32:d1c11d170f0e | 69 | MXC_E_CLKMAN_CLK_I2CS, |
| SamShiSS | 32:d1c11d170f0e | 70 | /** LCD Charge pump clock */ |
| SamShiSS | 32:d1c11d170f0e | 71 | MXC_E_CLKMAN_CLK_LCD_CHPUMP, |
| SamShiSS | 32:d1c11d170f0e | 72 | /** Reserved */ |
| SamShiSS | 32:d1c11d170f0e | 73 | MXC_E_CLKMAN_CLK_PUF, |
| SamShiSS | 32:d1c11d170f0e | 74 | /** PRNG module clock */ |
| SamShiSS | 32:d1c11d170f0e | 75 | MXC_E_CLKMAN_CLK_PRNG, |
| SamShiSS | 32:d1c11d170f0e | 76 | /** Watchdog Timer 0 clock */ |
| SamShiSS | 32:d1c11d170f0e | 77 | MXC_E_CLKMAN_CLK_WDT0, |
| SamShiSS | 32:d1c11d170f0e | 78 | /** Watchdog Timer 1 clock */ |
| SamShiSS | 32:d1c11d170f0e | 79 | MXC_E_CLKMAN_CLK_WDT1, |
| SamShiSS | 32:d1c11d170f0e | 80 | /** RTC synchronizer clock (required for cross-clock-domain register updates) */ |
| SamShiSS | 32:d1c11d170f0e | 81 | MXC_E_CLKMAN_CLK_RTC_INT_SYNC, |
| SamShiSS | 32:d1c11d170f0e | 82 | /** Clock for DAC 0 */ |
| SamShiSS | 32:d1c11d170f0e | 83 | MXC_E_CLKMAN_CLK_DAC0, |
| SamShiSS | 32:d1c11d170f0e | 84 | /** Clock for DAC 1 */ |
| SamShiSS | 32:d1c11d170f0e | 85 | MXC_E_CLKMAN_CLK_DAC1, |
| SamShiSS | 32:d1c11d170f0e | 86 | /** Clock for DAC 2 */ |
| SamShiSS | 32:d1c11d170f0e | 87 | MXC_E_CLKMAN_CLK_DAC2, |
| SamShiSS | 32:d1c11d170f0e | 88 | /** Clock for DAC 3 */ |
| SamShiSS | 32:d1c11d170f0e | 89 | MXC_E_CLKMAN_CLK_DAC3 |
| SamShiSS | 32:d1c11d170f0e | 90 | } mxc_clkman_clk_t; |
| SamShiSS | 32:d1c11d170f0e | 91 | |
| SamShiSS | 32:d1c11d170f0e | 92 | /** |
| SamShiSS | 32:d1c11d170f0e | 93 | * @brief Selects a TPU module clock for crypto ring-oscillator clock scaling configuration |
| SamShiSS | 32:d1c11d170f0e | 94 | */ |
| SamShiSS | 32:d1c11d170f0e | 95 | typedef enum { |
| SamShiSS | 32:d1c11d170f0e | 96 | /** AES engine clock */ |
| SamShiSS | 32:d1c11d170f0e | 97 | MXC_E_CLKMAN_CRYPT_CLK_AES = 0, |
| SamShiSS | 32:d1c11d170f0e | 98 | /** Modular Arithmetic Accelerator (MAA) clock */ |
| SamShiSS | 32:d1c11d170f0e | 99 | MXC_E_CLKMAN_CRYPT_CLK_MAA, |
| SamShiSS | 32:d1c11d170f0e | 100 | /** Pseudo-random number Generator (PRNG) clock */ |
| SamShiSS | 32:d1c11d170f0e | 101 | MXC_E_CLKMAN_CRYPT_CLK_PRNG |
| SamShiSS | 32:d1c11d170f0e | 102 | } mxc_clkman_crypt_clk_t; |
| SamShiSS | 32:d1c11d170f0e | 103 | |
| SamShiSS | 32:d1c11d170f0e | 104 | /** |
| SamShiSS | 32:d1c11d170f0e | 105 | * @brief Configures but does not enable the high frequency external oscillator circuitry. |
| SamShiSS | 32:d1c11d170f0e | 106 | * |
| SamShiSS | 32:d1c11d170f0e | 107 | * @param hfx_bypass 1 for crystal receiver bypass, 0 for no bypass. |
| SamShiSS | 32:d1c11d170f0e | 108 | * @param hfx_gm_adjust High frequency crystal gain adjust. |
| SamShiSS | 32:d1c11d170f0e | 109 | * @param hfx_dc_control High frequency crystal dc control. |
| SamShiSS | 32:d1c11d170f0e | 110 | * |
| SamShiSS | 32:d1c11d170f0e | 111 | * @return 0 => Success. Non zero => error condition. |
| SamShiSS | 32:d1c11d170f0e | 112 | */ |
| SamShiSS | 32:d1c11d170f0e | 113 | int32_t CLKMAN_HFXConfig(uint8_t hfx_bypass, uint8_t hfx_gm_adjust, uint8_t hfx_dc_control); |
| SamShiSS | 32:d1c11d170f0e | 114 | |
| SamShiSS | 32:d1c11d170f0e | 115 | /** |
| SamShiSS | 32:d1c11d170f0e | 116 | * @brief Enables the high frequency crystal receiver. Make sure HFX is stable before switching system clock. |
| SamShiSS | 32:d1c11d170f0e | 117 | */ |
| SamShiSS | 32:d1c11d170f0e | 118 | void CLKMAN_HFXEnable(void); |
| SamShiSS | 32:d1c11d170f0e | 119 | |
| SamShiSS | 32:d1c11d170f0e | 120 | /** |
| SamShiSS | 32:d1c11d170f0e | 121 | * @brief Disables the high frequency crystal receiver. |
| SamShiSS | 32:d1c11d170f0e | 122 | * |
| SamShiSS | 32:d1c11d170f0e | 123 | * @return 0 => Success. Non zero => error condition. |
| SamShiSS | 32:d1c11d170f0e | 124 | */ |
| SamShiSS | 32:d1c11d170f0e | 125 | int32_t CLKMAN_HFXDisable(void); |
| SamShiSS | 32:d1c11d170f0e | 126 | |
| SamShiSS | 32:d1c11d170f0e | 127 | /** |
| SamShiSS | 32:d1c11d170f0e | 128 | * @brief Configures but does not enable the phase locked loop circuitry. |
| SamShiSS | 32:d1c11d170f0e | 129 | * |
| SamShiSS | 32:d1c11d170f0e | 130 | * @param pll_input_select Phase locked loop clock input. |
| SamShiSS | 32:d1c11d170f0e | 131 | * @param pll_divisor_select Input clock frequency for the phase locked loop. |
| SamShiSS | 32:d1c11d170f0e | 132 | * @param pll_stability_count Number of clocks before phase locked loop is stable. |
| SamShiSS | 32:d1c11d170f0e | 133 | * @param pll_bypass 1 for high frequency oscillator output for 48MHz clock, 0 for phase locked loop output. |
| SamShiSS | 32:d1c11d170f0e | 134 | * @param pll_8mhz_enable 1 for enable 8MHz phase locked loop output, 0 for disable. |
| SamShiSS | 32:d1c11d170f0e | 135 | * |
| SamShiSS | 32:d1c11d170f0e | 136 | * @return 0 => Success. Non zero => error condition. |
| SamShiSS | 32:d1c11d170f0e | 137 | */ |
| SamShiSS | 32:d1c11d170f0e | 138 | int32_t CLKMAN_PLLConfig(mxc_clkman_pll_input_select_t pll_input_select, |
| SamShiSS | 32:d1c11d170f0e | 139 | mxc_clkman_pll_divisor_select_t pll_divisor_select, |
| SamShiSS | 32:d1c11d170f0e | 140 | mxc_clkman_stability_count_t pll_stability_count, |
| SamShiSS | 32:d1c11d170f0e | 141 | uint8_t pll_bypass, uint8_t pll_8mhz_enable); |
| SamShiSS | 32:d1c11d170f0e | 142 | |
| SamShiSS | 32:d1c11d170f0e | 143 | /** |
| SamShiSS | 32:d1c11d170f0e | 144 | * @brief Enables the phase locked loop circuitry. |
| SamShiSS | 32:d1c11d170f0e | 145 | */ |
| SamShiSS | 32:d1c11d170f0e | 146 | void CLKMAN_PLLEnable(void); |
| SamShiSS | 32:d1c11d170f0e | 147 | |
| SamShiSS | 32:d1c11d170f0e | 148 | /** |
| SamShiSS | 32:d1c11d170f0e | 149 | * @brief Disables the phase locked loop circuitry. |
| SamShiSS | 32:d1c11d170f0e | 150 | * |
| SamShiSS | 32:d1c11d170f0e | 151 | * @return 0 => Success. Non zero => error condition. |
| SamShiSS | 32:d1c11d170f0e | 152 | */ |
| SamShiSS | 32:d1c11d170f0e | 153 | int32_t CLKMAN_PLLDisable(void); |
| SamShiSS | 32:d1c11d170f0e | 154 | |
| SamShiSS | 32:d1c11d170f0e | 155 | /** |
| SamShiSS | 32:d1c11d170f0e | 156 | * @brief Starts the Trim calibration of the relaxation oscillator off the 32kHz crystal for use with USB. |
| SamShiSS | 32:d1c11d170f0e | 157 | */ |
| SamShiSS | 32:d1c11d170f0e | 158 | void CLKMAN_TrimRO_Start(void); |
| SamShiSS | 32:d1c11d170f0e | 159 | |
| SamShiSS | 32:d1c11d170f0e | 160 | /** |
| SamShiSS | 32:d1c11d170f0e | 161 | * @brief Stops the Trim calibration of the relaxation oscillator off the 32kHz crystal for use with USB. |
| SamShiSS | 32:d1c11d170f0e | 162 | */ |
| SamShiSS | 32:d1c11d170f0e | 163 | void CLKMAN_TrimRO_Stop(void); |
| SamShiSS | 32:d1c11d170f0e | 164 | |
| SamShiSS | 32:d1c11d170f0e | 165 | /** |
| SamShiSS | 32:d1c11d170f0e | 166 | * @brief Sets the system clock source if the source is valid. Make sure HFX is stable before switching system clock. |
| SamShiSS | 32:d1c11d170f0e | 167 | * |
| SamShiSS | 32:d1c11d170f0e | 168 | * @param system_source_select System clock source. |
| SamShiSS | 32:d1c11d170f0e | 169 | * |
| SamShiSS | 32:d1c11d170f0e | 170 | * @return 0 => Success. Non zero => error condition. |
| SamShiSS | 32:d1c11d170f0e | 171 | */ |
| SamShiSS | 32:d1c11d170f0e | 172 | int32_t CLKMAN_SetSystemClock(mxc_clkman_system_source_select_t system_source_select); |
| SamShiSS | 32:d1c11d170f0e | 173 | |
| SamShiSS | 32:d1c11d170f0e | 174 | /** |
| SamShiSS | 32:d1c11d170f0e | 175 | * @brief Polls on the clock stable flags until all are stable. |
| SamShiSS | 32:d1c11d170f0e | 176 | */ |
| SamShiSS | 32:d1c11d170f0e | 177 | void CLKMAN_WaitForSystemClockStable(void); |
| SamShiSS | 32:d1c11d170f0e | 178 | |
| SamShiSS | 32:d1c11d170f0e | 179 | /** |
| SamShiSS | 32:d1c11d170f0e | 180 | * @brief Enables the USB clock. |
| SamShiSS | 32:d1c11d170f0e | 181 | */ |
| SamShiSS | 32:d1c11d170f0e | 182 | void CLKMAN_USBClockEnable(void); |
| SamShiSS | 32:d1c11d170f0e | 183 | |
| SamShiSS | 32:d1c11d170f0e | 184 | /** |
| SamShiSS | 32:d1c11d170f0e | 185 | * @brief Disables the USB clock. |
| SamShiSS | 32:d1c11d170f0e | 186 | */ |
| SamShiSS | 32:d1c11d170f0e | 187 | void CLKMAN_USBClockDisable(void); |
| SamShiSS | 32:d1c11d170f0e | 188 | |
| SamShiSS | 32:d1c11d170f0e | 189 | /** |
| SamShiSS | 32:d1c11d170f0e | 190 | * @brief Configures but does not enable the crypto clock. |
| SamShiSS | 32:d1c11d170f0e | 191 | * |
| SamShiSS | 32:d1c11d170f0e | 192 | * @param crypto_stability_count Number of clocks before crypto clock is stable. |
| SamShiSS | 32:d1c11d170f0e | 193 | * |
| SamShiSS | 32:d1c11d170f0e | 194 | * @return 0 => Success. Non zero => error condition. |
| SamShiSS | 32:d1c11d170f0e | 195 | */ |
| SamShiSS | 32:d1c11d170f0e | 196 | int32_t CLKMAN_CryptoClockConfig(mxc_clkman_stability_count_t crypto_stability_count); |
| SamShiSS | 32:d1c11d170f0e | 197 | |
| SamShiSS | 32:d1c11d170f0e | 198 | /** |
| SamShiSS | 32:d1c11d170f0e | 199 | * @brief Enables the crypto clock. |
| SamShiSS | 32:d1c11d170f0e | 200 | */ |
| SamShiSS | 32:d1c11d170f0e | 201 | void CLKMAN_CryptoClockEnable(void); |
| SamShiSS | 32:d1c11d170f0e | 202 | |
| SamShiSS | 32:d1c11d170f0e | 203 | /** |
| SamShiSS | 32:d1c11d170f0e | 204 | * @brief Disables the crypto clock. |
| SamShiSS | 32:d1c11d170f0e | 205 | */ |
| SamShiSS | 32:d1c11d170f0e | 206 | void CLKMAN_CryptoClockDisable(void); |
| SamShiSS | 32:d1c11d170f0e | 207 | |
| SamShiSS | 32:d1c11d170f0e | 208 | /** |
| SamShiSS | 32:d1c11d170f0e | 209 | * @brief Sets the analog to digital converter clock source if the source is valid. |
| SamShiSS | 32:d1c11d170f0e | 210 | * |
| SamShiSS | 32:d1c11d170f0e | 211 | * @param adc_source_select Analog to digital converter clock source. |
| SamShiSS | 32:d1c11d170f0e | 212 | * @param adc_clk_mode Divide the clock source into the ADC if source is too high. |
| SamShiSS | 32:d1c11d170f0e | 213 | * ADC must run at 8MHz. |
| SamShiSS | 32:d1c11d170f0e | 214 | * |
| SamShiSS | 32:d1c11d170f0e | 215 | * @return 0 => Success. Non zero => error condition. |
| SamShiSS | 32:d1c11d170f0e | 216 | */ |
| SamShiSS | 32:d1c11d170f0e | 217 | int32_t CLKMAN_SetADCClock(mxc_clkman_adc_source_select_t adc_source_select, mxc_adc_clk_mode adc_clk_mode); |
| SamShiSS | 32:d1c11d170f0e | 218 | |
| SamShiSS | 32:d1c11d170f0e | 219 | /** |
| SamShiSS | 32:d1c11d170f0e | 220 | * @brief Disables the analog to digital converter clock source. |
| SamShiSS | 32:d1c11d170f0e | 221 | */ |
| SamShiSS | 32:d1c11d170f0e | 222 | void CLKMAN_ADCClockDisable(void); |
| SamShiSS | 32:d1c11d170f0e | 223 | |
| SamShiSS | 32:d1c11d170f0e | 224 | /** |
| SamShiSS | 32:d1c11d170f0e | 225 | * @brief Sets the watchdog clock source if the source is valid for the watchdog specified. |
| SamShiSS | 32:d1c11d170f0e | 226 | * |
| SamShiSS | 32:d1c11d170f0e | 227 | * @param index Index of watchdog to set clock. |
| SamShiSS | 32:d1c11d170f0e | 228 | * @param watchdog_source_select Watchdog clock source. |
| SamShiSS | 32:d1c11d170f0e | 229 | * |
| SamShiSS | 32:d1c11d170f0e | 230 | * @return 0 => Success. Non zero => error condition. |
| SamShiSS | 32:d1c11d170f0e | 231 | */ |
| SamShiSS | 32:d1c11d170f0e | 232 | int32_t CLKMAN_SetWatchdogClock(uint8_t index, mxc_clkman_wdt_source_select_t watchdog_source_select); |
| SamShiSS | 32:d1c11d170f0e | 233 | |
| SamShiSS | 32:d1c11d170f0e | 234 | /** |
| SamShiSS | 32:d1c11d170f0e | 235 | * @brief Disable the watchdog clock source for the watchdog specified. |
| SamShiSS | 32:d1c11d170f0e | 236 | * |
| SamShiSS | 32:d1c11d170f0e | 237 | * @param index Index of watchdog to disable. |
| SamShiSS | 32:d1c11d170f0e | 238 | * |
| SamShiSS | 32:d1c11d170f0e | 239 | * @return 0 => Success. Non zero => error condition. |
| SamShiSS | 32:d1c11d170f0e | 240 | */ |
| SamShiSS | 32:d1c11d170f0e | 241 | int32_t CLKMAN_WatchdogClockDisable(uint8_t index); |
| SamShiSS | 32:d1c11d170f0e | 242 | |
| SamShiSS | 32:d1c11d170f0e | 243 | /** |
| SamShiSS | 32:d1c11d170f0e | 244 | * @brief Set the system clock scale. |
| SamShiSS | 32:d1c11d170f0e | 245 | * @param device_clk device enum for clock scale setup |
| SamShiSS | 32:d1c11d170f0e | 246 | * @param clk_scale System clock scale. |
| SamShiSS | 32:d1c11d170f0e | 247 | */ |
| SamShiSS | 32:d1c11d170f0e | 248 | void CLKMAN_SetClkScale(mxc_clkman_clk_t device_clk, mxc_clkman_clk_scale_t clk_scale); |
| SamShiSS | 32:d1c11d170f0e | 249 | |
| SamShiSS | 32:d1c11d170f0e | 250 | /** |
| SamShiSS | 32:d1c11d170f0e | 251 | * @brief Set the TPU clock scale. |
| SamShiSS | 32:d1c11d170f0e | 252 | * @param device_clk device enum for clock scale setup |
| SamShiSS | 32:d1c11d170f0e | 253 | * @param clk_scale System clock scale. |
| SamShiSS | 32:d1c11d170f0e | 254 | */ |
| SamShiSS | 32:d1c11d170f0e | 255 | void CLKMAN_SetCryptClkScale(mxc_clkman_crypt_clk_t device_clk, mxc_clkman_clk_scale_t clk_scale); |
| SamShiSS | 32:d1c11d170f0e | 256 | |
| SamShiSS | 32:d1c11d170f0e | 257 | /** |
| SamShiSS | 32:d1c11d170f0e | 258 | * @brief Set RTC clock for systick counter, allowing systick to operate in full clockgating powersaving mode |
| SamShiSS | 32:d1c11d170f0e | 259 | * @param enable 1 enable 0 disable |
| SamShiSS | 32:d1c11d170f0e | 260 | */ |
| SamShiSS | 32:d1c11d170f0e | 261 | void CLKMAN_SetRTOSMode(uint8_t enable); |
| SamShiSS | 32:d1c11d170f0e | 262 | |
| SamShiSS | 32:d1c11d170f0e | 263 | /** |
| SamShiSS | 32:d1c11d170f0e | 264 | * @} |
| SamShiSS | 32:d1c11d170f0e | 265 | */ |
| SamShiSS | 32:d1c11d170f0e | 266 | |
| SamShiSS | 32:d1c11d170f0e | 267 | #endif /* _CLKMAN_H */ |
| SamShiSS | 32:d1c11d170f0e | 268 |
