Structure type to access the System Control Block (SCB). More...

#include <core_cm0.h>

Detailed Description

Structure type to access the System Control Block (SCB).

Definition at line 290 of file core_cm0.h.

Field Documentation

__IO uint32_t AIRCR

Offset: 0x00C (R/W) Application Interrupt and Reset Control Register

Definition at line 295 of file core_cm0.h.

__IO uint32_t CCR

Offset: 0x014 (R/W) Configuration Control Register

Definition at line 297 of file core_cm0.h.

__I uint32_t CPUID

Offset: 0x000 (R/ ) CPUID Base Register

Definition at line 292 of file core_cm0.h.

__IO uint32_t ICSR

Offset: 0x004 (R/W) Interrupt Control and State Register

Definition at line 293 of file core_cm0.h.

__IO uint32_t SCR

Offset: 0x010 (R/W) System Control Register

Definition at line 296 of file core_cm0.h.

__IO uint32_t SHCSR

Offset: 0x024 (R/W) System Handler Control and State Register

Definition at line 300 of file core_cm0.h.

__IO uint32_t SHP[2]

Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED

Definition at line 299 of file core_cm0.h.