gpiogroup_11xx.h

00001 /*
00002  * @brief LPC11xx GPIO group driver for CHIP_LPC11AXX, CHIP_LPC11EXX, and
00003  * CHIP_LPC11UXX families only.
00004  *
00005  * @note
00006  * Copyright(C) NXP Semiconductors, 2013
00007  * All rights reserved.
00008  *
00009  * @par
00010  * Software that is described herein is for illustrative purposes only
00011  * which provides customers with programming information regarding the
00012  * LPC products.  This software is supplied "AS IS" without any warranties of
00013  * any kind, and NXP Semiconductors and its licensor disclaim any and
00014  * all warranties, express or implied, including all implied warranties of
00015  * merchantability, fitness for a particular purpose and non-infringement of
00016  * intellectual property rights.  NXP Semiconductors assumes no responsibility
00017  * or liability for the use of the software, conveys no license or rights under any
00018  * patent, copyright, mask work right, or any other intellectual property rights in
00019  * or to any products. NXP Semiconductors reserves the right to make changes
00020  * in the software without notification. NXP Semiconductors also makes no
00021  * representation or warranty that such application will be suitable for the
00022  * specified use without further testing or modification.
00023  *
00024  * @par
00025  * Permission to use, copy, modify, and distribute this software and its
00026  * documentation is hereby granted, under NXP Semiconductors' and its
00027  * licensor's relevant copyrights in the software, without fee, provided that it
00028  * is used in conjunction with NXP Semiconductors microcontrollers.  This
00029  * copyright, permission, and disclaimer notice must appear in all copies of
00030  * this code.
00031  */
00032 
00033 #ifndef __GPIOGROUP_11XX_H_
00034 #define __GPIOGROUP_11XX_H_
00035 
00036 #ifdef __cplusplus
00037 extern "C" {
00038 #endif
00039 
00040 /** @defgroup GPIOGP_11XX CHIP: LPC11xx GPIO group driver for CHIP_LPC11(A/E/U)XX families
00041  * @ingroup CHIP_11XX_Drivers
00042  * For device familes identified with CHIP definitions CHIP_LPC11AXX,
00043  * CHIP_LPC11EXX, and CHIP_LPC11UXX only.
00044  * @{
00045  */
00046 
00047 #if defined(CHIP_LPC11AXX) || defined(CHIP_LPC11EXX) || defined(CHIP_LPC11UXX)
00048 
00049 /**
00050  * @brief GPIO grouped interrupt register block structure
00051  */
00052 typedef struct {                    /*!< GPIO_GROUP_INTn Structure */
00053     __IO uint32_t  CTRL ;            /*!< GPIO grouped interrupt control register */
00054     __I  uint32_t  RESERVED0[7];
00055     __IO uint32_t  PORT_POL[8];     /*!< GPIO grouped interrupt port polarity register */
00056     __IO uint32_t  PORT_ENA[8];     /*!< GPIO grouped interrupt port m enable register */
00057     uint32_t       RESERVED1[4072];
00058 } LPC_GPIOGROUPINT_T;
00059 
00060 /**
00061  * LPC11xx GPIO group bit definitions
00062  */
00063 #define GPIOGR_INT      (1 << 0)    /*!< GPIO interrupt pending/clear bit */
00064 #define GPIOGR_COMB     (1 << 1)    /*!< GPIO interrupt OR(0)/AND(1) mode bit */
00065 #define GPIOGR_TRIG     (1 << 2)    /*!< GPIO interrupt edge(0)/level(1) mode bit */
00066 
00067 /**
00068  * @brief   Clear interrupt pending status for the selected group
00069  * @param   pGPIOGPINT  : Pointer to GPIO group register block
00070  * @param   group       : GPIO group number
00071  * @return  None
00072  */
00073 STATIC INLINE void Chip_GPIOGP_ClearIntStatus(LPC_GPIOGROUPINT_T *pGPIOGPINT, uint8_t group)
00074 {
00075     uint32_t temp;
00076 
00077     temp = pGPIOGPINT[group].CTRL ;
00078     pGPIOGPINT[group].CTRL  = temp | GPIOGR_INT;
00079 }
00080 
00081 /**
00082  * @brief   Returns current GPIO group inetrrupt pending status
00083  * @param   pGPIOGPINT  : Pointer to GPIO group register block
00084  * @param   group       : GPIO group number
00085  * @return  true if the group interrupt is pending, otherwise false.
00086  */
00087 STATIC INLINE bool Chip_GPIOGP_GetIntStatus(LPC_GPIOGROUPINT_T *pGPIOGPINT, uint8_t group)
00088 {
00089     return (bool) ((pGPIOGPINT[group].CTRL  & GPIOGR_INT) != 0);
00090 }
00091 
00092 /**
00093  * @brief   Selected GPIO group functionality for trigger on any pin in group (OR mode)
00094  * @param   pGPIOGPINT  : Pointer to GPIO group register block
00095  * @param   group       : GPIO group number
00096  * @return  None
00097  */
00098 STATIC INLINE void Chip_GPIOGP_SelectOrMode(LPC_GPIOGROUPINT_T *pGPIOGPINT, uint8_t group)
00099 {
00100     pGPIOGPINT[group].CTRL  &= ~GPIOGR_COMB;
00101 }
00102 
00103 /**
00104  * @brief   Selected GPIO group functionality for trigger on all matching pins in group (AND mode)
00105  * @param   pGPIOGPINT  : Pointer to GPIO group register block
00106  * @param   group       : GPIO group number
00107  * @return  None
00108  */
00109 STATIC INLINE void Chip_GPIOGP_SelectAndMode(LPC_GPIOGROUPINT_T *pGPIOGPINT, uint8_t group)
00110 {
00111     pGPIOGPINT[group].CTRL  |= GPIOGR_COMB;
00112 }
00113 
00114 /**
00115  * @brief   Selected GPIO group functionality edge trigger mode
00116  * @param   pGPIOGPINT  : Pointer to GPIO group register block
00117  * @param   group       : GPIO group number
00118  * @return  None
00119  */
00120 STATIC INLINE void Chip_GPIOGP_SelectEdgeMode(LPC_GPIOGROUPINT_T *pGPIOGPINT, uint8_t group)
00121 {
00122     pGPIOGPINT[group].CTRL  &= ~GPIOGR_TRIG;
00123 }
00124 
00125 /**
00126  * @brief   Selected GPIO group functionality level trigger mode
00127  * @param   pGPIOGPINT  : Pointer to GPIO group register block
00128  * @param   group       : GPIO group number
00129  * @return  None
00130  */
00131 STATIC INLINE void Chip_GPIOGP_SelectLevelMode(LPC_GPIOGROUPINT_T *pGPIOGPINT, uint8_t group)
00132 {
00133     pGPIOGPINT[group].CTRL  |= GPIOGR_TRIG;
00134 }
00135 
00136 /**
00137  * @brief   Set selected pins for the group and port to low level trigger
00138  * @param   pGPIOGPINT  : Pointer to GPIO group register block
00139  * @param   group       : GPIO group number
00140  * @param   port        : GPIO port number
00141  * @param   pinMask     : Or'ed value of pins to select for low level (bit 0 = pin 0, 1 = pin1, etc.)
00142  * @return  None
00143  */
00144 STATIC INLINE void Chip_GPIOGP_SelectLowLevel(LPC_GPIOGROUPINT_T *pGPIOGPINT,
00145                                               uint8_t group,
00146                                               uint8_t port,
00147                                               uint32_t pinMask)
00148 {
00149     pGPIOGPINT[group].PORT_POL [port] &= ~pinMask;
00150 }
00151 
00152 /**
00153  * @brief   Set selected pins for the group and port to high level trigger
00154  * @param   pGPIOGPINT  : Pointer to GPIO group register block
00155  * @param   group       : GPIO group number
00156  * @param   port        : GPIO port number
00157  * @param   pinMask     : Or'ed value of pins to select for high level (bit 0 = pin 0, 1 = pin1, etc.)
00158  * @return  None
00159  */
00160 STATIC INLINE void Chip_GPIOGP_SelectHighLevel(LPC_GPIOGROUPINT_T *pGPIOGPINT,
00161                                                uint8_t group,
00162                                                uint8_t port,
00163                                                uint32_t pinMask)
00164 {
00165     pGPIOGPINT[group].PORT_POL [port] = pinMask;
00166 }
00167 
00168 /**
00169  * @brief   Disabled selected pins for the group interrupt
00170  * @param   pGPIOGPINT  : Pointer to GPIO group register block
00171  * @param   group       : GPIO group number
00172  * @param   port        : GPIO port number
00173  * @param   pinMask     : Or'ed value of pins to disable interrupt for (bit 0 = pin 0, 1 = pin1, etc.)
00174  * @return  None
00175  * @note    Disabled pins do not contrinute to the group interrupt.
00176  */
00177 STATIC INLINE void Chip_GPIOGP_DisableGroupPins(LPC_GPIOGROUPINT_T *pGPIOGPINT,
00178                                                 uint8_t group,
00179                                                 uint8_t port,
00180                                                 uint32_t pinMask)
00181 {
00182     pGPIOGPINT[group].PORT_ENA [port] &= ~pinMask;
00183 }
00184 
00185 /**
00186  * @brief   Enable selected pins for the group interrupt
00187  * @param   pGPIOGPINT  : Pointer to GPIO group register block
00188  * @param   group       : GPIO group number
00189  * @param   port        : GPIO port number
00190  * @param   pinMask     : Or'ed value of pins to enable interrupt for (bit 0 = pin 0, 1 = pin1, etc.)
00191  * @return  None
00192  * @note    Enables pins contrinute to the group interrupt.
00193  */
00194 STATIC INLINE void Chip_GPIOGP_EnableGroupPins(LPC_GPIOGROUPINT_T *pGPIOGPINT,
00195                                                uint8_t group,
00196                                                uint8_t port,
00197                                                uint32_t pinMask)
00198 {
00199     pGPIOGPINT[group].PORT_ENA [port] = pinMask;
00200 }
00201 
00202 #endif /* defined(CHIP_LPC11AXX) || defined(CHIP_LPC11EXX) || defined(CHIP_LPC11UXX) */
00203 
00204 /**
00205  * @}
00206  */
00207 
00208 #ifdef __cplusplus
00209 }
00210 #endif
00211 
00212 #endif /* __GPIOGROUP_11XX_H_ */