fmc_11xx.h

00001 /*
00002  * @brief FLASH Memory Controller (FMC) registers and control functions
00003  *
00004  * @note
00005  * Copyright(C) NXP Semiconductors, 2012
00006  * All rights reserved.
00007  *
00008  * @par
00009  * Software that is described herein is for illustrative purposes only
00010  * which provides customers with programming information regarding the
00011  * LPC products.  This software is supplied "AS IS" without any warranties of
00012  * any kind, and NXP Semiconductors and its licensor disclaim any and
00013  * all warranties, express or implied, including all implied warranties of
00014  * merchantability, fitness for a particular purpose and non-infringement of
00015  * intellectual property rights.  NXP Semiconductors assumes no responsibility
00016  * or liability for the use of the software, conveys no license or rights under any
00017  * patent, copyright, mask work right, or any other intellectual property rights in
00018  * or to any products. NXP Semiconductors reserves the right to make changes
00019  * in the software without notification. NXP Semiconductors also makes no
00020  * representation or warranty that such application will be suitable for the
00021  * specified use without further testing or modification.
00022  *
00023  * @par
00024  * Permission to use, copy, modify, and distribute this software and its
00025  * documentation is hereby granted, under NXP Semiconductors' and its
00026  * licensor's relevant copyrights in the software, without fee, provided that it
00027  * is used in conjunction with NXP Semiconductors microcontrollers.  This
00028  * copyright, permission, and disclaimer notice must appear in all copies of
00029  * this code.
00030  */
00031 
00032 #ifndef __FMC_11XX_H_
00033 #define __FMC_11XX_H_
00034 
00035 #ifdef __cplusplus
00036 extern "C" {
00037 #endif
00038 
00039 /** @defgroup FMC_11XX CHIP: LPC11xx FLASH Memory Controller driver
00040  * @ingroup CHIP_11XX_Drivers
00041  * @{
00042  */
00043 
00044 /**
00045  * @brief FLASH Memory Controller Unit register block structure
00046  */
00047 typedef struct {/*!< FMC Structure */
00048     __I  uint32_t  RESERVED1[4];
00049     __IO uint32_t  FLASHTIM;
00050     __I  uint32_t  RESERVED2[3];
00051     __IO uint32_t  FMSSTART;
00052     __IO uint32_t  FMSSTOP;
00053     __I  uint32_t  RESERVED3;
00054     __I  uint32_t  FMSW[4];
00055     __I  uint32_t  RESERVED4[25];
00056 #if defined(CHIP_LPC1125)
00057     __I  uint32_t  RESERVED5[977];
00058 #else
00059     __IO uint32_t  EEMSSTART;
00060     __IO uint32_t  EEMSSTOP;
00061     __I  uint32_t  EEMSSIG;
00062     __I  uint32_t  RESERVED5[974];
00063 #endif
00064     __I  uint32_t  FMSTAT;
00065     __I  uint32_t  RESERVED6;
00066     __O  uint32_t  FMSTATCLR;
00067 } LPC_FMC_T;
00068 
00069 /**
00070  * @brief FLASH Access time definitions
00071  */
00072 typedef enum {
00073     FLASHTIM_20MHZ_CPU  = 0,     /*!< Flash accesses use 1 CPU clocks. Use for up to 20 MHz CPU clock*/
00074     FLASHTIM_40MHZ_CPU  = 1,     /*!< Flash accesses use 2 CPU clocks. Use for up to 40 MHz CPU clock*/
00075     FLASHTIM_50MHZ_CPU  = 2,     /*!< Flash accesses use 3 CPU clocks. Use for up to 50 MHz CPU clock*/
00076 } FMC_FLASHTIM_T;
00077 
00078 /**
00079  * @brief   Set FLASH access time in clocks
00080  * @param   clks    : Clock cycles for FLASH access (minus 1)
00081  * @return  Nothing
00082  * @note    For CPU speed up to 20MHz, use a value of 0. For up to 40MHz, use
00083  * a value of 1. For up to 50MHz, use a value of 2.
00084  */
00085 STATIC INLINE void Chip_FMC_SetFLASHAccess(FMC_FLASHTIM_T clks)
00086 {
00087     uint32_t tmp = LPC_FMC->FLASHTIM & (~(0x3));
00088 
00089     /* Don't alter upper bits */
00090     LPC_FMC->FLASHTIM = tmp | clks;
00091 }
00092 
00093 /**
00094  * @}
00095  */
00096 
00097 #ifdef __cplusplus
00098 }
00099 #endif
00100 
00101 #endif /* __FMC_11XX_H_ */