PokittoLib is the library needed for programming the Pokitto DIY game console (www.pokitto.com)
Dependents: YATTT sd_map_test cPong SnowDemo ... more
clock_11u6x.c
00001 #include "clock_11u6x.h" 00002 00003 00004 /* Inprecise clock rates for the watchdog oscillator */ 00005 STATIC const uint32_t wdtOSCRate[WDTLFO_OSC_4_60 + 1] = { 00006 0, /* WDT_OSC_ILLEGAL */ 00007 600000, /* WDT_OSC_0_60 */ 00008 1050000, /* WDT_OSC_1_05 */ 00009 1400000, /* WDT_OSC_1_40 */ 00010 1750000, /* WDT_OSC_1_75 */ 00011 2100000, /* WDT_OSC_2_10 */ 00012 2400000, /* WDT_OSC_2_40 */ 00013 2700000, /* WDT_OSC_2_70 */ 00014 3000000, /* WDT_OSC_3_00 */ 00015 3250000, /* WDT_OSC_3_25 */ 00016 3500000, /* WDT_OSC_3_50 */ 00017 3750000, /* WDT_OSC_3_75 */ 00018 4000000, /* WDT_OSC_4_00 */ 00019 4200000, /* WDT_OSC_4_20 */ 00020 4400000, /* WDT_OSC_4_40 */ 00021 4600000 /* WDT_OSC_4_60 */ 00022 }; 00023 00024 /* Compute a PLL frequency */ 00025 STATIC uint32_t Chip_Clock_GetPLLFreq(uint32_t PLLReg, uint32_t inputRate) 00026 { 00027 uint32_t msel = ((PLLReg & 0x1F) + 1); 00028 00029 return inputRate * msel; 00030 } 00031 00032 /* Return System PLL output clock rate */ 00033 uint32_t Chip_Clock_GetSystemPLLOutClockRate(void) 00034 { 00035 return Chip_Clock_GetPLLFreq(LPC_SYSCTL->SYSPLLCTRL, 00036 Chip_Clock_GetSystemPLLInClockRate()); 00037 } 00038 00039 00040 /* Compute a WDT rate */ 00041 STATIC uint32_t Chip_Clock_GetWDTRate(uint32_t reg) 00042 { 00043 uint32_t div; 00044 CHIP_WDTLFO_OSC_T clk; 00045 00046 /* Get WDT oscillator settings */ 00047 clk = (CHIP_WDTLFO_OSC_T) ((reg >> 5) & 0xF); 00048 div = reg & 0x1F; 00049 00050 /* Compute clock rate and divided by divde value */ 00051 return wdtOSCRate[clk] / ((div + 1) << 1); 00052 } 00053 00054 /* Return estimated watchdog oscillator rate */ 00055 uint32_t Chip_Clock_GetWDTOSCRate(void) 00056 { 00057 return Chip_Clock_GetWDTRate(LPC_SYSCTL->WDTOSCCTRL); 00058 } 00059 00060 00061 /* Return System PLL input clock rate */ 00062 uint32_t Chip_Clock_GetSystemPLLInClockRate(void) 00063 { 00064 uint32_t clkRate; 00065 00066 switch ((CHIP_SYSCTL_PLLCLKSRC_T) (LPC_SYSCTL->SYSPLLCLKSEL & 0x3)) { 00067 case SYSCTL_PLLCLKSRC_IRC : 00068 clkRate = Chip_Clock_GetIntOscRate(); 00069 break; 00070 00071 case SYSCTL_PLLCLKSRC_MAINOSC : 00072 clkRate = Chip_Clock_GetMainOscRate(); 00073 break; 00074 00075 case SYSCTL_PLLCLKSRC_RTC32K : 00076 clkRate = Chip_Clock_GetRTCOscRate(); 00077 break; 00078 00079 default: 00080 clkRate = 0; 00081 } 00082 00083 return clkRate; 00084 } 00085 00086 00087 /* Return main clock rate */ 00088 uint32_t Chip_Clock_GetMainClockRate(void) 00089 { 00090 uint32_t clkRate = 0; 00091 00092 switch ((CHIP_SYSCTL_MAINCLKSRC_T) (LPC_SYSCTL->MAINCLKSEL & 0x3)) { 00093 case SYSCTL_MAINCLKSRC_IRC : 00094 clkRate = Chip_Clock_GetIntOscRate(); 00095 break; 00096 00097 case SYSCTL_MAINCLKSRC_PLLIN : 00098 clkRate = Chip_Clock_GetSystemPLLInClockRate(); 00099 break; 00100 00101 case SYSCTL_MAINCLKSRC_WDTOSC : 00102 clkRate = Chip_Clock_GetWDTOSCRate(); 00103 break; 00104 00105 case SYSCTL_MAINCLKSRC_PLLOUT : 00106 clkRate = Chip_Clock_GetSystemPLLOutClockRate(); 00107 break; 00108 } 00109 00110 return clkRate; 00111 } 00112 00113 /* Return system clock rate */ 00114 uint32_t Chip_Clock_GetSystemClockRate(void) 00115 { 00116 /* No point in checking for divide by 0 */ 00117 return Chip_Clock_GetMainClockRate() / LPC_SYSCTL->SYSAHBCLKDIV; 00118 } 00119 00120
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